drivers/media/video/rk29_camera.c

   1 #include <mach/rk29_camera.h> \r
   2 #include <mach/iomux.h>\r
   3 \r
   4 #ifndef PMEM_CAM_SIZE\r
   5 #include "../../../arch/arm/plat-rk/rk_camera.c"\r
   6 #else\r
   7 \r
   8 /*****************************************************************************************\r
   9  * camera  devices\r
  10  * author: ddl@rock-chips.com\r
  11  *****************************************************************************************/\r
  12 #ifdef CONFIG_VIDEO_RK29 \r
  13 static int rk_sensor_iomux(int pin)\r
  14 {    \r
  15     switch (pin)\r
  16     {\r
  17         case RK29_PIN0_PA0:        \r
  18         case RK29_PIN0_PA1:        \r
  19         case RK29_PIN0_PA2:\r
  20         case RK29_PIN0_PA3:\r
  21         case RK29_PIN0_PA4:\r
  22         {\r
  23             break;      \r
  24         }\r
  25         case RK29_PIN0_PA5:\r
  26         {\r
  27              rk29_mux_api_set(GPIO0A5_FLASHDQS_NAME,0);\r
  28             break;      \r
  29         }\r
  30         case RK29_PIN0_PA6:\r
  31         {\r
  32              rk29_mux_api_set(GPIO0A6_MIIMD_NAME,0);\r
  33             break;      \r
  34         }\r
  35         case RK29_PIN0_PA7:\r
  36         {\r
  37              rk29_mux_api_set(GPIO0A7_MIIMDCLK_NAME,0);\r
  38             break;      \r
  39         }\r
  40         case RK29_PIN0_PB0:\r
  41         {\r
  42              rk29_mux_api_set(GPIO0B0_EBCSDCE0_SMCADDR0_HOSTDATA0_NAME,0);\r
  43             break;      \r
  44         }\r
  45         case RK29_PIN0_PB1:\r
  46         {\r
  47              rk29_mux_api_set(GPIO0B1_EBCSDCE1_SMCADDR1_HOSTDATA1_NAME,0);\r
  48             break;      \r
  49         }\r
  50         case RK29_PIN0_PB2:\r
  51         {\r
  52              rk29_mux_api_set(GPIO0B2_EBCSDCE2_SMCADDR2_HOSTDATA2_NAME,0);\r
  53             break;      \r
  54         }\r
  55         case RK29_PIN0_PB3:\r
  56         {\r
  57              rk29_mux_api_set(GPIO0B3_EBCBORDER0_SMCADDR3_HOSTDATA3_NAME,0);\r
  58             break;      \r
  59         }\r
  60         case RK29_PIN0_PB4:\r
  61         {\r
  62              rk29_mux_api_set(GPIO0B4_EBCBORDER1_SMCWEN_NAME,0);\r
  63             break;      \r
  64         }\r
  65         case RK29_PIN0_PB5:\r
  66         {\r
  67              rk29_mux_api_set(GPIO0B5_EBCVCOM_SMCBLSN0_NAME,0);\r
  68             break;      \r
  69         }\r
  70         case RK29_PIN0_PB6:\r
  71         {\r
  72              rk29_mux_api_set(GPIO0B6_EBCSDSHR_SMCBLSN1_HOSTINT_NAME,0);\r
  73             break;      \r
  74         }\r
  75         case RK29_PIN0_PB7:\r
  76         {\r
  77              rk29_mux_api_set(GPIO0B7_EBCGDOE_SMCOEN_NAME,0);\r
  78             break;      \r
  79         }\r
  80         case RK29_PIN0_PC0:\r
  81         {\r
  82              rk29_mux_api_set(GPIO0C0_EBCGDSP_SMCDATA8_NAME,0);\r
  83             break;      \r
  84         }\r
  85         case RK29_PIN0_PC1:\r
  86         {\r
  87              rk29_mux_api_set(GPIO0C1_EBCGDR1_SMCDATA9_NAME,0);\r
  88             break;      \r
  89         }\r
  90         case RK29_PIN0_PC2:\r
  91         {\r
  92              rk29_mux_api_set(GPIO0C2_EBCSDCE0_SMCDATA10_NAME,0);\r
  93             break;      \r
  94         }\r
  95         case RK29_PIN0_PC3:\r
  96         {\r
  97              rk29_mux_api_set(GPIO0C3_EBCSDCE1_SMCDATA11_NAME,0);\r
  98             break;      \r
  99         }\r
 100         case RK29_PIN0_PC4:\r
 101         {\r
 102              rk29_mux_api_set(GPIO0C4_EBCSDCE2_SMCDATA12_NAME,0);\r
 103             break;      \r
 104         }\r
 105         case RK29_PIN0_PC5:\r
 106         {\r
 107              rk29_mux_api_set(GPIO0C5_EBCSDCE3_SMCDATA13_NAME,0);\r
 108             break;      \r
 109         }\r
 110         case RK29_PIN0_PC6:\r
 111         {\r
 112              rk29_mux_api_set(GPIO0C6_EBCSDCE4_SMCDATA14_NAME,0);\r
 113             break;      \r
 114         }\r
 115         case RK29_PIN0_PC7:\r
 116         {\r
 117              rk29_mux_api_set(GPIO0C7_EBCSDCE5_SMCDATA15_NAME,0);\r
 118             break;      \r
 119         }\r
 120         case RK29_PIN0_PD0:\r
 121         {\r
 122              rk29_mux_api_set(GPIO0D0_EBCSDOE_SMCADVN_NAME,0);\r
 123             break;      \r
 124         }\r
 125         case RK29_PIN0_PD1:\r
 126         {\r
 127              rk29_mux_api_set(GPIO0D1_EBCGDCLK_SMCADDR4_HOSTDATA4_NAME,0);\r
 128             break;      \r
 129         }\r
 130         case RK29_PIN0_PD2:\r
 131         {\r
 132              rk29_mux_api_set(GPIO0D2_FLASHCSN1_NAME,0);\r
 133             break;      \r
 134         }\r
 135         case RK29_PIN0_PD3:\r
 136         {\r
 137              rk29_mux_api_set(GPIO0D3_FLASHCSN2_NAME,0);\r
 138             break;      \r
 139         }\r
 140         case RK29_PIN0_PD4:\r
 141         {\r
 142              rk29_mux_api_set(GPIO0D4_FLASHCSN3_NAME,0);\r
 143             break;      \r
 144         }\r
 145         case RK29_PIN0_PD5:\r
 146         {\r
 147              rk29_mux_api_set(GPIO0D5_FLASHCSN4_NAME,0);\r
 148             break;      \r
 149         }\r
 150         case RK29_PIN0_PD6:\r
 151         {\r
 152              rk29_mux_api_set(GPIO0D6_FLASHCSN5_NAME,0);\r
 153             break;      \r
 154         }\r
 155         case RK29_PIN0_PD7:\r
 156         {\r
 157              rk29_mux_api_set(GPIO0D7_FLASHCSN6_NAME,0);\r
 158             break;      \r
 159         }\r
 160         case RK29_PIN1_PA0:\r
 161         {\r
 162              rk29_mux_api_set(GPIO1A0_FLASHCS7_MDDRTQ_NAME,0);\r
 163             break;      \r
 164         }\r
 165         case RK29_PIN1_PA1:\r
 166         {\r
 167              rk29_mux_api_set(GPIO1A1_SMCCSN0_NAME,0);\r
 168             break;      \r
 169         }\r
 170         case RK29_PIN1_PA2:\r
 171         {\r
 172              rk29_mux_api_set(GPIO1A2_SMCCSN1_NAME,0);\r
 173             break;      \r
 174         }\r
 175         case RK29_PIN1_PA3:\r
 176         {\r
 177              rk29_mux_api_set(GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,0);\r
 178             break;      \r
 179         }\r
 180         case RK29_PIN1_PA4:\r
 181         {\r
 182              rk29_mux_api_set(GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,0);\r
 183             break;      \r
 184         }\r
 185         case RK29_PIN1_PA5:\r
 186         {\r
 187              rk29_mux_api_set(GPIO1A5_EMMCPWREN_PWM3_NAME,0);\r
 188             break;      \r
 189         }\r
 190         case RK29_PIN1_PA6:\r
 191         {\r
 192              rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME,0);\r
 193             break;      \r
 194         }\r
 195         case RK29_PIN1_PA7:\r
 196         {\r
 197              rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME,0);\r
 198             break;      \r
 199         }\r
 200         case RK29_PIN1_PB0:\r
 201         {\r
 202              rk29_mux_api_set(GPIO1B0_VIPDATA0_NAME,0);\r
 203             break;      \r
 204         }\r
 205         case RK29_PIN1_PB1:\r
 206         {\r
 207              rk29_mux_api_set(GPIO1B1_VIPDATA1_NAME,0);\r
 208             break;      \r
 209         }\r
 210         case RK29_PIN1_PB2:\r
 211         {\r
 212              rk29_mux_api_set(GPIO1B2_VIPDATA2_NAME,0);\r
 213             break;      \r
 214         }\r
 215         case RK29_PIN1_PB3:\r
 216         {\r
 217              rk29_mux_api_set(GPIO1B3_VIPDATA3_NAME,0);\r
 218             break;      \r
 219         }\r
 220         case RK29_PIN1_PB4:\r
 221         {\r
 222              rk29_mux_api_set(GPIO1B4_VIPCLKOUT_NAME,0);\r
 223             break;      \r
 224         }\r
 225         case RK29_PIN1_PB5:\r
 226         {\r
 227              rk29_mux_api_set(GPIO1B5_PWM0_NAME,0);\r
 228             break;      \r
 229         }\r
 230         case RK29_PIN1_PB6:\r
 231         {\r
 232              rk29_mux_api_set(GPIO1B6_UART0SIN_NAME,0);\r
 233             break;      \r
 234         }\r
 235         case RK29_PIN1_PB7:\r
 236         {\r
 237              rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME,0);\r
 238             break;      \r
 239         }\r
 240         case RK29_PIN1_PC0:\r
 241         {\r
 242              rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME,0);\r
 243             break;      \r
 244         }\r
 245         case RK29_PIN1_PC1:\r
 246         {\r
 247              rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME,0);\r
 248             break;      \r
 249         }\r
 250         case RK29_PIN1_PC2:\r
 251         {\r
 252              rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME,0);\r
 253             break;      \r
 254         }\r
 255         case RK29_PIN1_PC3:\r
 256         {\r
 257              rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME,0);\r
 258             break;      \r
 259         }\r
 260         case RK29_PIN1_PC4:\r
 261         {\r
 262              rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME,0);\r
 263             break;      \r
 264         }\r
 265         case RK29_PIN1_PC5:\r
 266         {\r
 267              rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME,0);\r
 268             break;      \r
 269         }\r
 270         case RK29_PIN1_PC6:\r
 271         {\r
 272              rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME,0);\r
 273             break;      \r
 274         }\r
 275         case RK29_PIN1_PC7:\r
 276         {\r
 277              rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME,0);\r
 278             break;      \r
 279         }\r
 280         case RK29_PIN1_PD0:\r
 281         {\r
 282              rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME,0);\r
 283             break;      \r
 284         }\r
 285         case RK29_PIN1_PD1:\r
 286         {\r
 287              rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME,0);\r
 288             break;      \r
 289         }\r
 290         case RK29_PIN1_PD2:\r
 291         {\r
 292              rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME,0);\r
 293             break;      \r
 294         }\r
 295         case RK29_PIN1_PD3:\r
 296         {\r
 297              rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME,0);\r
 298             break;      \r
 299         }\r
 300         case RK29_PIN1_PD4:\r
 301         {\r
 302              rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME,0);\r
 303             break;      \r
 304         }\r
 305         case RK29_PIN1_PD5:\r
 306         {\r
 307              rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME,0);\r
 308             break;      \r
 309         }\r
 310         case RK29_PIN1_PD6:\r
 311         {\r
 312              rk29_mux_api_set(GPIO1D6_SDMMC0DATA4_NAME,0);\r
 313             break;      \r
 314         }\r
 315         case RK29_PIN1_PD7:\r
 316         {\r
 317              rk29_mux_api_set(GPIO1D7_SDMMC0DATA5_NAME,0);\r
 318             break;      \r
 319         }\r
 320         case RK29_PIN2_PA0:\r
 321         {\r
 322              rk29_mux_api_set(GPIO2A0_SDMMC0DATA6_NAME,0);\r
 323             break;      \r
 324         }\r
 325         case RK29_PIN2_PA1:\r
 326         {\r
 327              rk29_mux_api_set(GPIO2A1_SDMMC0DATA7_NAME,0);\r
 328             break;      \r
 329         }\r
 330         case RK29_PIN2_PA2:\r
 331         {\r
 332              rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME,0);\r
 333             break;      \r
 334         }\r
 335         case RK29_PIN2_PA3:\r
 336         {\r
 337              rk29_mux_api_set(GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME,0);\r
 338             break;      \r
 339         }\r
 340         case RK29_PIN2_PA4:\r
 341         {\r
 342              rk29_mux_api_set(GPIO2A4_UART1SIN_NAME,0);\r
 343             break;      \r
 344         }\r
 345         case RK29_PIN2_PA5:\r
 346         {\r
 347              rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME,0);\r
 348             break;      \r
 349         }\r
 350         case RK29_PIN2_PA6:\r
 351         {\r
 352              rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME,0);\r
 353             break;      \r
 354         }\r
 355         case RK29_PIN2_PA7:\r
 356         {\r
 357              rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME,0);\r
 358             break;      \r
 359         }\r
 360         case RK29_PIN2_PB0:\r
 361         {\r
 362              rk29_mux_api_set(GPIO2B0_UART2SIN_NAME,0);\r
 363             break;      \r
 364         }\r
 365         case RK29_PIN2_PB1:\r
 366         {\r
 367              rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME,0);\r
 368             break;      \r
 369         }\r
 370         case RK29_PIN2_PB2:\r
 371         {\r
 372              rk29_mux_api_set(GPIO2B2_UART3SIN_NAME,0);\r
 373             break;      \r
 374         }\r
 375         case RK29_PIN2_PB3:\r
 376         {\r
 377              rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME,0);\r
 378             break;      \r
 379         }\r
 380         case RK29_PIN2_PB4:\r
 381         {\r
 382              rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME,0);\r
 383             break;      \r
 384         }\r
 385         case RK29_PIN2_PB5:\r
 386         {\r
 387              rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME,0);\r
 388             break;      \r
 389         }\r
 390         case RK29_PIN2_PB6:\r
 391         {\r
 392              rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME,0);\r
 393             break;      \r
 394         }\r
 395         case RK29_PIN2_PB7:\r
 396         {\r
 397              rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME,0);\r
 398             break;      \r
 399         }\r
 400         case RK29_PIN2_PC0:\r
 401         {\r
 402              rk29_mux_api_set(GPIO2C0_SPI0CLK_NAME,0);\r
 403             break;      \r
 404         }\r
 405         case RK29_PIN2_PC1:\r
 406         {\r
 407              rk29_mux_api_set(GPIO2C1_SPI0CSN0_NAME,0);\r
 408             break;      \r
 409         }\r
 410         case RK29_PIN2_PC2:\r
 411         {\r
 412              rk29_mux_api_set(GPIO2C2_SPI0TXD_NAME,0);\r
 413             break;      \r
 414         }\r
 415         case RK29_PIN2_PC3:\r
 416         {\r
 417              rk29_mux_api_set(GPIO2C3_SPI0RXD_NAME,0);\r
 418             break;      \r
 419         }\r
 420         case RK29_PIN2_PC4:\r
 421         {\r
 422              rk29_mux_api_set(GPIO2C4_SPI1CLK_NAME,0);\r
 423             break;      \r
 424         }\r
 425         case RK29_PIN2_PC5:\r
 426         {\r
 427              rk29_mux_api_set(GPIO2C5_SPI1CSN0_NAME,0);\r
 428             break;      \r
 429         }\r
 430         case RK29_PIN2_PC6:\r
 431         {\r
 432              rk29_mux_api_set(GPIO2C6_SPI1TXD_NAME,0);\r
 433             break;      \r
 434         }\r
 435         case RK29_PIN2_PC7:\r
 436         {\r
 437              rk29_mux_api_set(GPIO2C7_SPI1RXD_NAME,0);\r
 438             break;      \r
 439         }\r
 440         case RK29_PIN2_PD0:\r
 441         {\r
 442              rk29_mux_api_set(GPIO2D0_I2S0CLK_MIIRXCLKIN_NAME,0);\r
 443             break;      \r
 444         }\r
 445         case RK29_PIN2_PD1:\r
 446         {\r
 447              rk29_mux_api_set(GPIO2D1_I2S0SCLK_MIICRS_NAME,0);\r
 448             break;      \r
 449         }\r
 450         case RK29_PIN2_PD2:\r
 451         {\r
 452              rk29_mux_api_set(GPIO2D2_I2S0LRCKRX_MIITXERR_NAME,0);\r
 453             break;      \r
 454         }\r
 455         case RK29_PIN2_PD3:\r
 456         {\r
 457              rk29_mux_api_set(GPIO2D3_I2S0SDI_MIICOL_NAME,0);\r
 458             break;      \r
 459         }\r
 460         case RK29_PIN2_PD4:\r
 461         {\r
 462              rk29_mux_api_set(GPIO2D4_I2S0SDO0_MIIRXD2_NAME,0);\r
 463             break;      \r
 464         }\r
 465         case RK29_PIN2_PD5:\r
 466         {\r
 467              rk29_mux_api_set(GPIO2D5_I2S0SDO1_MIIRXD3_NAME,0);\r
 468             break;      \r
 469         }\r
 470         case RK29_PIN2_PD6:\r
 471         {\r
 472              rk29_mux_api_set(GPIO2D6_I2S0SDO2_MIITXD2_NAME,0);\r
 473             break;      \r
 474         }\r
 475         case RK29_PIN2_PD7:\r
 476         {\r
 477              rk29_mux_api_set(GPIO2D7_I2S0SDO3_MIITXD3_NAME,0);\r
 478             break;      \r
 479         }\r
 480         case RK29_PIN3_PA0:\r
 481         {\r
 482              rk29_mux_api_set(GPIO3A0_I2S1CLK_NAME,0);\r
 483             break;      \r
 484         }\r
 485         case RK29_PIN3_PA1:\r
 486         {\r
 487              rk29_mux_api_set(GPIO3A1_I2S1SCLK_NAME,0);\r
 488             break;      \r
 489         }\r
 490         case RK29_PIN3_PA2:\r
 491         {\r
 492              rk29_mux_api_set(GPIO3A2_I2S1LRCKRX_NAME,0);\r
 493             break;      \r
 494         }\r
 495         case RK29_PIN3_PA3:\r
 496         {\r
 497              rk29_mux_api_set(GPIO3A3_I2S1SDI_NAME,0);\r
 498             break;      \r
 499         }\r
 500         case RK29_PIN3_PA4:\r
 501         {\r
 502              rk29_mux_api_set(GPIO3A4_I2S1SDO_NAME,0);\r
 503             break;      \r
 504         }\r
 505         case RK29_PIN3_PA5:\r
 506         {\r
 507              rk29_mux_api_set(GPIO3A5_I2S1LRCKTX_NAME,0);\r
 508             break;      \r
 509         }\r
 510         case RK29_PIN3_PA6:\r
 511         {\r
 512              rk29_mux_api_set(GPIO3A6_SMCADDR14_HOSTDATA14_NAME,0);\r
 513             break;      \r
 514         }\r
 515         case RK29_PIN3_PA7:\r
 516         {\r
 517              rk29_mux_api_set(GPIO3A7_SMCADDR15_HOSTDATA15_NAME,0);\r
 518             break;      \r
 519         }\r
 520         case RK29_PIN3_PB0:\r
 521         {\r
 522              rk29_mux_api_set(GPIO3B0_EMMCLKOUT_NAME,0);\r
 523             break;      \r
 524         }\r
 525         case RK29_PIN3_PB1:\r
 526         {\r
 527              rk29_mux_api_set(GPIO3B1_EMMCMD_NAME,0);\r
 528             break;      \r
 529         }\r
 530         case RK29_PIN3_PB2:\r
 531         {\r
 532              rk29_mux_api_set(GPIO3B2_EMMCDATA0_NAME,0);\r
 533             break;      \r
 534         }\r
 535         case RK29_PIN3_PB3:\r
 536         {\r
 537              rk29_mux_api_set(GPIO3B3_EMMCDATA1_NAME,0);\r
 538             break;      \r
 539         }\r
 540         case RK29_PIN3_PB4:\r
 541         {\r
 542              rk29_mux_api_set(GPIO3B4_EMMCDATA2_NAME,0);\r
 543             break;      \r
 544         }\r
 545         case RK29_PIN3_PB5:\r
 546         {\r
 547              rk29_mux_api_set(GPIO3B5_EMMCDATA3_NAME,0);\r
 548             break;      \r
 549         }\r
 550         case RK29_PIN3_PB6:\r
 551         {\r
 552              rk29_mux_api_set(GPIO3B6_EMMCDATA4_NAME,0);\r
 553             break;      \r
 554         }\r
 555         case RK29_PIN3_PB7:\r
 556         {\r
 557              rk29_mux_api_set(GPIO3B7_EMMCDATA5_NAME,0);\r
 558             break;      \r
 559         }\r
 560         case RK29_PIN3_PC0:\r
 561         {\r
 562              rk29_mux_api_set(GPIO3C0_EMMCDATA6_NAME,0);\r
 563             break;      \r
 564         }\r
 565         case RK29_PIN3_PC1:\r
 566         {\r
 567              rk29_mux_api_set(GPIO3C1_EMMCDATA7_NAME,0);\r
 568             break;      \r
 569         }\r
 570         case RK29_PIN3_PC2:\r
 571         {\r
 572              rk29_mux_api_set(GPIO3C2_SMCADDR13_HOSTDATA13_NAME,0);\r
 573             break;      \r
 574         }\r
 575         case RK29_PIN3_PC3:\r
 576         {\r
 577              rk29_mux_api_set(GPIO3C3_SMCADDR10_HOSTDATA10_NAME,0);\r
 578             break;      \r
 579         }\r
 580         case RK29_PIN3_PC4:\r
 581         {\r
 582              rk29_mux_api_set(GPIO3C4_SMCADDR11_HOSTDATA11_NAME,0);\r
 583             break;      \r
 584         }\r
 585         case RK29_PIN3_PC5:\r
 586         {\r
 587              rk29_mux_api_set(GPIO3C5_SMCADDR12_HOSTDATA12_NAME,0);\r
 588             break;      \r
 589         }\r
 590         case RK29_PIN3_PC6:\r
 591         {\r
 592              rk29_mux_api_set(GPIO3C6_SMCADDR16_HOSTDATA16_NAME,0);\r
 593             break;      \r
 594         }\r
 595         case RK29_PIN3_PC7:\r
 596         {\r
 597              rk29_mux_api_set(GPIO3C7_SMCADDR17_HOSTDATA17_NAME,0);\r
 598             break;      \r
 599         }\r
 600         case RK29_PIN3_PD0:\r
 601         {\r
 602              rk29_mux_api_set(GPIO3D0_SMCADDR18_HOSTADDR0_NAME,0);\r
 603             break;      \r
 604         }\r
 605         case RK29_PIN3_PD1:\r
 606         {\r
 607              rk29_mux_api_set(GPIO3D1_SMCADDR19_HOSTADDR1_NAME,0);\r
 608             break;      \r
 609         }\r
 610         case RK29_PIN3_PD2:\r
 611         {\r
 612              rk29_mux_api_set(GPIO3D2_HOSTCSN_NAME,0);\r
 613             break;      \r
 614         }\r
 615         case RK29_PIN3_PD3:\r
 616         {\r
 617              rk29_mux_api_set(GPIO3D3_HOSTRDN_NAME,0);\r
 618             break;      \r
 619         }\r
 620         case RK29_PIN3_PD4:\r
 621         {\r
 622              rk29_mux_api_set(GPIO3D4_HOSTWRN_NAME,0);\r
 623             break;      \r
 624         }\r
 625         case RK29_PIN3_PD5:\r
 626         {\r
 627              rk29_mux_api_set(GPIO3D5_SMCADDR7_HOSTDATA7_NAME,0);\r
 628             break;      \r
 629         }\r
 630         case RK29_PIN3_PD6:\r
 631         {\r
 632              rk29_mux_api_set(GPIO3D6_SMCADDR8_HOSTDATA8_NAME,0);\r
 633             break;      \r
 634         }\r
 635         case RK29_PIN3_PD7:\r
 636         {\r
 637              rk29_mux_api_set(GPIO3D7_SMCADDR9_HOSTDATA9_NAME,0);\r
 638             break;      \r
 639         }\r
 640         case RK29_PIN4_PA0:\r
 641         case RK29_PIN4_PA1:\r
 642         case RK29_PIN4_PA2:\r
 643         case RK29_PIN4_PA3:\r
 644         case RK29_PIN4_PA4:\r
 645         {            \r
 646             break;      \r
 647         }\r
 648         case RK29_PIN4_PA5:\r
 649         {\r
 650              rk29_mux_api_set(GPIO4A5_OTG0DRVVBUS_NAME,0);\r
 651             break;      \r
 652         }\r
 653         case RK29_PIN4_PA6:\r
 654         {\r
 655              rk29_mux_api_set(GPIO4A6_OTG1DRVVBUS_NAME,0);\r
 656             break;      \r
 657         }\r
 658         case RK29_PIN4_PA7:\r
 659         {\r
 660              rk29_mux_api_set(GPIO4A7_SPDIFTX_NAME,0);\r
 661             break;      \r
 662         }\r
 663         case RK29_PIN4_PB0:\r
 664         {\r
 665              rk29_mux_api_set(GPIO4B0_FLASHDATA8_NAME,0);\r
 666             break;      \r
 667         }\r
 668         case RK29_PIN4_PB1:\r
 669         {\r
 670              rk29_mux_api_set(GPIO4B1_FLASHDATA9_NAME,0);\r
 671             break;      \r
 672         }\r
 673         case RK29_PIN4_PB2:\r
 674         {\r
 675              rk29_mux_api_set(GPIO4B2_FLASHDATA10_NAME,0);\r
 676             break;      \r
 677         }\r
 678         case RK29_PIN4_PB3:\r
 679         {\r
 680              rk29_mux_api_set(GPIO4B3_FLASHDATA11_NAME,0);\r
 681             break;      \r
 682         }\r
 683         case RK29_PIN4_PB4:\r
 684         {\r
 685              rk29_mux_api_set(GPIO4B4_FLASHDATA12_NAME,0);\r
 686             break;      \r
 687         }\r
 688         case RK29_PIN4_PB5:\r
 689         {\r
 690              rk29_mux_api_set(GPIO4B5_FLASHDATA13_NAME,0);\r
 691             break;      \r
 692         }\r
 693         case RK29_PIN4_PB6:\r
 694         {\r
 695              rk29_mux_api_set(GPIO4B6_FLASHDATA14_NAME ,0);\r
 696             break;      \r
 697         }\r
 698         case RK29_PIN4_PB7:\r
 699         {\r
 700              rk29_mux_api_set(GPIO4B7_FLASHDATA15_NAME,0);\r
 701             break;      \r
 702         }\r
 703         case RK29_PIN4_PC0:\r
 704         {\r
 705              rk29_mux_api_set(GPIO4C0_RMIICLKOUT_RMIICLKIN_NAME,0);\r
 706             break;      \r
 707         }\r
 708         case RK29_PIN4_PC1:\r
 709         {\r
 710              rk29_mux_api_set(GPIO4C1_RMIITXEN_MIITXEN_NAME,0);\r
 711             break;      \r
 712         }\r
 713         case RK29_PIN4_PC2:\r
 714         {\r
 715              rk29_mux_api_set(GPIO4C2_RMIITXD1_MIITXD1_NAME,0);\r
 716             break;      \r
 717         }\r
 718         case RK29_PIN4_PC3:\r
 719         {\r
 720              rk29_mux_api_set(GPIO4C3_RMIITXD0_MIITXD0_NAME,0);\r
 721             break;      \r
 722         }\r
 723         case RK29_PIN4_PC4:\r
 724         {\r
 725              rk29_mux_api_set(GPIO4C4_RMIIRXERR_MIIRXERR_NAME,0);\r
 726             break;      \r
 727         }\r
 728         case RK29_PIN4_PC5:\r
 729         {\r
 730              rk29_mux_api_set(GPIO4C5_RMIICSRDVALID_MIIRXDVALID_NAME,0);\r
 731             break;      \r
 732         }\r
 733         case RK29_PIN4_PC6:\r
 734         {\r
 735              rk29_mux_api_set(GPIO4C6_RMIIRXD1_MIIRXD1_NAME,0);\r
 736             break;      \r
 737         }\r
 738 \r
 739         case RK29_PIN4_PC7:\r
 740         {\r
 741              rk29_mux_api_set(GPIO4C7_RMIIRXD0_MIIRXD0_NAME,0);\r
 742             break;      \r
 743         }\r
 744         case RK29_PIN4_PD0:\r
 745         case RK29_PIN4_PD1:\r
 746         {\r
 747              rk29_mux_api_set(GPIO4D10_CPUTRACEDATA10_NAME,0);             \r
 748             break;      \r
 749         }\r
 750         case RK29_PIN4_PD2:\r
 751         case RK29_PIN4_PD3:\r
 752         {\r
 753              rk29_mux_api_set(GPIO4D32_CPUTRACEDATA32_NAME,0);           \r
 754             break;      \r
 755         }\r
 756         case RK29_PIN4_PD4:\r
 757         {\r
 758              rk29_mux_api_set(GPIO4D4_CPUTRACECLK_NAME,0);\r
 759             break;      \r
 760         }\r
 761         case RK29_PIN4_PD5:\r
 762         {\r
 763              rk29_mux_api_set(GPIO4D5_CPUTRACECTL_NAME,0);\r
 764             break;      \r
 765         }\r
 766         case RK29_PIN4_PD6:\r
 767         {\r
 768              rk29_mux_api_set(GPIO4D6_I2S0LRCKTX0_NAME,0);\r
 769             break;      \r
 770         }\r
 771         case RK29_PIN4_PD7:\r
 772         {\r
 773              rk29_mux_api_set(GPIO4D7_I2S0LRCKTX1_NAME,0);\r
 774             break;      \r
 775         } \r
 776         case RK29_PIN5_PA0:\r
 777         case RK29_PIN5_PA1:\r
 778         case RK29_PIN5_PA2:\r
 779         {      \r
 780             break;      \r
 781         }\r
 782         case RK29_PIN5_PA3:\r
 783         {\r
 784              rk29_mux_api_set(GPIO5A3_MIITXCLKIN_NAME,0);\r
 785             break;      \r
 786         }\r
 787         case RK29_PIN5_PA4:\r
 788         {\r
 789              rk29_mux_api_set(GPIO5A4_TSSYNC_NAME,0);\r
 790             break;      \r
 791         }\r
 792         case RK29_PIN5_PA5:\r
 793         {\r
 794              rk29_mux_api_set(GPIO5A5_HSADCDATA0_NAME,0);\r
 795             break;      \r
 796         }\r
 797         case RK29_PIN5_PA6:\r
 798         {\r
 799              rk29_mux_api_set(GPIO5A6_HSADCDATA1_NAME,0);\r
 800             break;      \r
 801         }\r
 802         case RK29_PIN5_PA7:\r
 803         {\r
 804              rk29_mux_api_set(GPIO5A7_HSADCDATA2_NAME,0);\r
 805             break;      \r
 806         }\r
 807         case RK29_PIN5_PB0:\r
 808         {\r
 809              rk29_mux_api_set(GPIO5B0_HSADCDATA3_NAME,0);\r
 810             break;      \r
 811         }\r
 812         case RK29_PIN5_PB1:\r
 813         {\r
 814              rk29_mux_api_set(GPIO5B1_HSADCDATA4_NAME,0);\r
 815             break;      \r
 816         }\r
 817         case RK29_PIN5_PB2:\r
 818         {\r
 819              rk29_mux_api_set(GPIO5B2_HSADCDATA5_NAME,0);\r
 820             break;      \r
 821         }\r
 822         case RK29_PIN5_PB3:\r
 823         {\r
 824              rk29_mux_api_set(GPIO5B3_HSADCDATA6_NAME,0);\r
 825             break;      \r
 826         }\r
 827         case RK29_PIN5_PB4:\r
 828         {\r
 829              rk29_mux_api_set(GPIO5B4_HSADCDATA7_NAME,0);\r
 830             break;      \r
 831         }\r
 832         case RK29_PIN5_PB5:\r
 833         {\r
 834              rk29_mux_api_set(GPIO5B5_HSADCDATA8_NAME,0);\r
 835             break;      \r
 836         }\r
 837         case RK29_PIN5_PB6:\r
 838         {\r
 839              rk29_mux_api_set(GPIO5B6_HSADCDATA9_NAME,0);\r
 840             break;      \r
 841         }\r
 842         case RK29_PIN5_PB7:\r
 843         {\r
 844              rk29_mux_api_set(GPIO5B7_HSADCCLKOUTGPSCLK_NAME,0);\r
 845             break;      \r
 846         }\r
 847         case RK29_PIN5_PC0:\r
 848         {\r
 849              rk29_mux_api_set(GPIO5C0_EBCSDDO0_SMCDATA0_NAME,0);\r
 850             break;      \r
 851         }\r
 852         case RK29_PIN5_PC1:\r
 853         {\r
 854              rk29_mux_api_set(GPIO5C1_EBCSDDO1_SMCDATA1_NAME,0);\r
 855             break;      \r
 856         }\r
 857         case RK29_PIN5_PC2:\r
 858         {\r
 859              rk29_mux_api_set(GPIO5C2_EBCSDDO2_SMCDATA2_NAME,0);\r
 860             break;      \r
 861         }\r
 862         case RK29_PIN5_PC3:\r
 863         {\r
 864              rk29_mux_api_set(GPIO5C3_EBCSDDO3_SMCDATA3_NAME,0);\r
 865             break;      \r
 866         }\r
 867         case RK29_PIN5_PC4:\r
 868         {\r
 869              rk29_mux_api_set(GPIO5C4_EBCSDDO4_SMCDATA4_NAME,0);\r
 870             break;      \r
 871         }\r
 872         case RK29_PIN5_PC5:\r
 873         {\r
 874              rk29_mux_api_set(GPIO5C5_EBCSDDO5_SMCDATA5_NAME,0);\r
 875             break;      \r
 876         }\r
 877         case RK29_PIN5_PC6:\r
 878         {\r
 879              rk29_mux_api_set(GPIO5C6_EBCSDDO6_SMCDATA6_NAME,0);\r
 880             break;      \r
 881         }\r
 882         case RK29_PIN5_PC7:\r
 883         {\r
 884              rk29_mux_api_set(GPIO5C7_EBCSDDO7_SMCDATA7_NAME,0);\r
 885             break;      \r
 886         }\r
 887         case RK29_PIN5_PD0:\r
 888         {\r
 889              rk29_mux_api_set(GPIO5D0_EBCSDLE_SMCADDR5_HOSTDATA5_NAME,0);\r
 890             break;      \r
 891         }\r
 892         case RK29_PIN5_PD1:\r
 893         {\r
 894              rk29_mux_api_set(GPIO5D1_EBCSDCLK_SMCADDR6_HOSTDATA6_NAME,0);\r
 895             break;      \r
 896         }\r
 897         case RK29_PIN5_PD2:\r
 898         {\r
 899              rk29_mux_api_set(GPIO5D2_PWM1_UART1SIRIN_NAME,0);\r
 900             break;      \r
 901         }\r
 902         case RK29_PIN5_PD3:\r
 903         {\r
 904              rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME,0);\r
 905             break;      \r
 906         }\r
 907         case RK29_PIN5_PD4:\r
 908         {\r
 909              rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME,0);\r
 910             break;      \r
 911         }\r
 912         case RK29_PIN5_PD5:\r
 913         {\r
 914              rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME,0);\r
 915             break;      \r
 916         }\r
 917         case RK29_PIN5_PD6:\r
 918         {\r
 919              rk29_mux_api_set(GPIO5D6_SDMMC1PWREN_NAME,0);\r
 920             break;      \r
 921         }\r
 922         case RK29_PIN5_PD7:\r
 923         case RK29_PIN6_PA0:\r
 924         case RK29_PIN6_PA1:\r
 925         case RK29_PIN6_PA2:\r
 926         case RK29_PIN6_PA3:\r
 927         case RK29_PIN6_PA4:\r
 928         case RK29_PIN6_PA5:\r
 929         case RK29_PIN6_PA6:\r
 930         case RK29_PIN6_PA7:\r
 931         case RK29_PIN6_PB0:\r
 932         case RK29_PIN6_PB1:\r
 933         case RK29_PIN6_PB2:\r
 934         case RK29_PIN6_PB3:\r
 935         case RK29_PIN6_PB4:\r
 936         case RK29_PIN6_PB5:\r
 937         case RK29_PIN6_PB6:\r
 938         case RK29_PIN6_PB7:\r
 939         case RK29_PIN6_PC0:\r
 940         case RK29_PIN6_PC1:\r
 941         case RK29_PIN6_PC2:\r
 942         case RK29_PIN6_PC3:\r
 943         {\r
 944             break;\r
 945         }\r
 946         case RK29_PIN6_PC4:\r
 947         case RK29_PIN6_PC5:\r
 948         {\r
 949              rk29_mux_api_set(GPIO6C54_CPUTRACEDATA54_NAME,0);\r
 950             break;      \r
 951         }\r
 952         case RK29_PIN6_PC6:\r
 953         case RK29_PIN6_PC7:\r
 954         {\r
 955              rk29_mux_api_set(GPIO6C76_CPUTRACEDATA76_NAME,0);\r
 956             break;      \r
 957         }\r
 958         case RK29_PIN6_PD0:\r
 959         case RK29_PIN6_PD1:\r
 960         case RK29_PIN6_PD2:\r
 961         case RK29_PIN6_PD3:\r
 962         case RK29_PIN6_PD4:\r
 963         case RK29_PIN6_PD5:\r
 964         case RK29_PIN6_PD6:\r
 965         case RK29_PIN6_PD7:\r
 966         {\r
 967             break;      \r
 968         }    \r
 969         default:\r
 970         {\r
 971             printk("Pin=%d isn't RK29 GPIO, Please init it's iomux yourself!",pin);\r
 972             break;\r
 973         }\r
 974     }\r
 975     return 0;\r
 976 }\r
 977 #include "../../../arch/arm/plat-rk/rk_camera.c"\r
 978 \r
 979 #if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)\r
 980 static struct i2c_board_info rk29_i2c_cam_info_0[] = {\r
 981         {\r
 982                 I2C_BOARD_INFO(SENSOR_NAME_0, CONFIG_SENSOR_IIC_ADDR_0>>1)\r
 983         },\r
 984 };\r
 985 \r
 986 static struct soc_camera_link rk29_iclink_0 = {\r
 987         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
 988         .power          = rk_sensor_power,\r
 989 #if (CONFIG_SENSOR_RESET_PIN_0 != INVALID_GPIO)\r
 990     .reset      = rk_sensor_reset,\r
 991 #endif    \r
 992         .powerdown  = rk_sensor_powerdown,\r
 993         .board_info     = &rk29_i2c_cam_info_0[0],\r
 994         .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_0,\r
 995         .module_name    = SENSOR_NAME_0,\r
 996 };\r
 997 \r
 998 /*platform_device : soc-camera need  */\r
 999 static struct platform_device rk29_soc_camera_pdrv_0 = {\r
1000         .name   = "soc-camera-pdrv",\r
1001         .id     = 0,\r
1002         .dev    = {\r
1003                 .init_name = SENSOR_DEVICE_NAME_0,\r
1004                 .platform_data = &rk29_iclink_0,\r
1005         },\r
1006 };\r
1007 #endif\r
1008 #if (CONFIG_SENSOR_IIC_ADDR_1 != 0x00)\r
1009 static struct i2c_board_info rk29_i2c_cam_info_1[] = {\r
1010         {\r
1011                 I2C_BOARD_INFO(SENSOR_NAME_1, CONFIG_SENSOR_IIC_ADDR_1>>1)\r
1012         },\r
1013 };\r
1014 \r
1015 static struct soc_camera_link rk29_iclink_1 = {\r
1016         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
1017         .power          = rk_sensor_power,\r
1018 #if (CONFIG_SENSOR_RESET_PIN_1 != INVALID_GPIO)\r
1019     .reset      = rk_sensor_reset,\r
1020 #endif          \r
1021         .powerdown  = rk_sensor_powerdown,\r
1022         .board_info     = &rk29_i2c_cam_info_1[0],\r
1023         .i2c_adapter_id = CONFIG_SENSOR_IIC_ADAPTER_ID_1,\r
1024         .module_name    = SENSOR_NAME_1,\r
1025 };\r
1026 \r
1027 /*platform_device : soc-camera need  */\r
1028 static struct platform_device rk29_soc_camera_pdrv_1 = {\r
1029         .name   = "soc-camera-pdrv",\r
1030         .id     = 1,\r
1031         .dev    = {\r
1032                 .init_name = SENSOR_DEVICE_NAME_1,\r
1033                 .platform_data = &rk29_iclink_1,\r
1034         },\r
1035 };\r
1036 #endif\r
1037 \r
1038 static u64 rockchip_device_camera_dmamask = 0xffffffffUL;\r
1039 static struct resource rk29_camera_resource[] = {\r
1040         [0] = {\r
1041                 .start = RK29_VIP_PHYS,\r
1042                 .end   = RK29_VIP_PHYS + RK29_VIP_SIZE - 1,\r
1043                 .flags = IORESOURCE_MEM,\r
1044         },\r
1045         [1] = {\r
1046                 .start = IRQ_VIP,\r
1047                 .end   = IRQ_VIP,\r
1048                 .flags = IORESOURCE_IRQ,\r
1049         }\r
1050 };\r
1051 \r
1052 /*platform_device : */\r
1053 static struct platform_device rk29_device_camera = {\r
1054         .name             = RK29_CAM_DRV_NAME,\r
1055         .id               = RK29_CAM_PLATFORM_DEV_ID,               /* This is used to put cameras on this interface */\r
1056         .num_resources    = ARRAY_SIZE(rk29_camera_resource),\r
1057         .resource         = rk29_camera_resource,\r
1058         .dev            = {\r
1059                 .dma_mask = &rockchip_device_camera_dmamask,\r
1060                 .coherent_dma_mask = 0xffffffffUL,\r
1061                 .platform_data  = &rk_camera_platform_data,\r
1062         }\r
1063 };\r
1064 \r
1065 static void rk_init_camera_plateform_data(void)\r
1066 {\r
1067     int i,dev_idx;\r
1068     \r
1069     dev_idx = 0;\r
1070     for (i=0; i<RK_CAM_NUM; i++) {\r
1071         if (rk_camera_platform_data.register_dev[i].device_info.name) {            \r
1072             rk_camera_platform_data.register_dev[i].link_info.board_info = \r
1073                 &rk_camera_platform_data.register_dev[i].i2c_cam_info;\r
1074             rk_camera_platform_data.register_dev[i].device_info.id = dev_idx;\r
1075             rk_camera_platform_data.register_dev[i].device_info.dev.platform_data = \r
1076                 &rk_camera_platform_data.register_dev[i].link_info;\r
1077             dev_idx++;\r
1078         }\r
1079     }\r
1080 }\r
1081 \r
1082 static int rk_register_camera_devices(void)\r
1083 {   \r
1084     int i;\r
1085     \r
1086         rk_init_camera_plateform_data();\r
1087     for (i=0; i<RK_CAM_NUM; i++) {\r
1088         if (rk_camera_platform_data.register_dev[i].device_info.name\r
1089             && !strcmp(rk_camera_platform_data.register_dev[i].device_info.dev.init_name,SENSOR_DEVICE_NAME_0)\r
1090             && !strcmp(rk_camera_platform_data.register_dev[i].device_info.dev.init_name,SENSOR_DEVICE_NAME_1)) {\r
1091             platform_device_register(&rk_camera_platform_data.register_dev[i].device_info);\r
1092         }\r
1093     }\r
1094         return 0;\r
1095 }\r
1096 \r
1097 module_init(rk_register_camera_devices);\r
1098 \r
1099 #endif\r
1100 \r
1101 #endif //#ifdef CONFIG_VIDEO_RK29\r