drivers/media/video/gspca/ov519.c

   1 /**
   2  * OV519 driver
   3  *
   4  * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
   5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * This module is adapted from the ov51x-jpeg package, which itself
   8  * was adapted from the ov511 driver.
   9  *
  10  * Original copyright for the ov511 driver is:
  11  *
  12  * Copyright (c) 1999-2006 Mark W. McClelland
  13  * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14  * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15  * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16  * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17  * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18  *
  19  * ov51x-jpeg original copyright is:
  20  *
  21  * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22  * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23  *
  24  * This program is free software; you can redistribute it and/or modify
  25  * it under the terms of the GNU General Public License as published by
  26  * the Free Software Foundation; either version 2 of the License, or
  27  * any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32  * GNU General Public License for more details.
  33  *
  34  * You should have received a copy of the GNU General Public License
  35  * along with this program; if not, write to the Free Software
  36  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37  *
  38  */
  39
  40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  41
  42 #define MODULE_NAME "ov519"
  43
  44 #include <linux/input.h>
  45 #include "gspca.h"
  46
  47 /* The jpeg_hdr is used by w996Xcf only */
  48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  49 #define CONEX_CAM
  50 #include "jpeg.h"
  51
  52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
  54 MODULE_LICENSE("GPL");
  55
  56 /* global parameters */
  57 static int frame_rate;
  58
  59 /* Number of times to retry a failed I2C transaction. Increase this if you
  60  * are getting "Failed to read sensor ID..." */
  61 static int i2c_detect_tries = 10;
  62
  63 /* controls */
  64 enum e_ctrl {
  65         BRIGHTNESS,
  66         CONTRAST,
  67         EXPOSURE,
  68         COLORS,
  69         HFLIP,
  70         VFLIP,
  71         AUTOBRIGHT,
  72         AUTOGAIN,
  73         FREQ,
  74         NCTRL           /* number of controls */
  75 };
  76
  77 /* ov519 device descriptor */
  78 struct sd {
  79         struct gspca_dev gspca_dev;             /* !! must be the first item */
  80
  81         struct gspca_ctrl ctrls[NCTRL];
  82
  83         u8 packet_nr;
  84
  85         char bridge;
  86 #define BRIDGE_OV511            0
  87 #define BRIDGE_OV511PLUS        1
  88 #define BRIDGE_OV518            2
  89 #define BRIDGE_OV518PLUS        3
  90 #define BRIDGE_OV519            4               /* = ov530 */
  91 #define BRIDGE_OVFX2            5
  92 #define BRIDGE_W9968CF          6
  93 #define BRIDGE_MASK             7
  94
  95         char invert_led;
  96 #define BRIDGE_INVERT_LED       8
  97
  98         char snapshot_pressed;
  99         char snapshot_needs_reset;
 100
 101         /* Determined by sensor type */
 102         u8 sif;
 103
 104         u8 quality;
 105 #define QUALITY_MIN 50
 106 #define QUALITY_MAX 70
 107 #define QUALITY_DEF 50
 108
 109         u8 stopped;             /* Streaming is temporarily paused */
 110         u8 first_frame;
 111
 112         u8 frame_rate;          /* current Framerate */
 113         u8 clockdiv;            /* clockdiv override */
 114
 115         s8 sensor;              /* Type of image sensor chip (SEN_*) */
 116
 117         u8 sensor_addr;
 118         u16 sensor_width;
 119         u16 sensor_height;
 120         s16 sensor_reg_cache[256];
 121
 122         u8 jpeg_hdr[JPEG_HDR_SZ];
 123 };
 124 enum sensors {
 125         SEN_OV2610,
 126         SEN_OV2610AE,
 127         SEN_OV3610,
 128         SEN_OV6620,
 129         SEN_OV6630,
 130         SEN_OV66308AF,
 131         SEN_OV7610,
 132         SEN_OV7620,
 133         SEN_OV7620AE,
 134         SEN_OV7640,
 135         SEN_OV7648,
 136         SEN_OV7660,
 137         SEN_OV7670,
 138         SEN_OV76BE,
 139         SEN_OV8610,
 140         SEN_OV9600,
 141 };
 142
 143 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 144    the ov sensors which is already present here. When we have the time we
 145    really should move the sensor drivers to v4l2 sub drivers. */
 146 #include "w996Xcf.c"
 147
 148 /* V4L2 controls supported by the driver */
 149 static void setbrightness(struct gspca_dev *gspca_dev);
 150 static void setcontrast(struct gspca_dev *gspca_dev);
 151 static void setexposure(struct gspca_dev *gspca_dev);
 152 static void setcolors(struct gspca_dev *gspca_dev);
 153 static void sethvflip(struct gspca_dev *gspca_dev);
 154 static void setautobright(struct gspca_dev *gspca_dev);
 155 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
 156 static void setfreq(struct gspca_dev *gspca_dev);
 157 static void setfreq_i(struct sd *sd);
 158
 159 static const struct ctrl sd_ctrls[] = {
 160 [BRIGHTNESS] = {
 161             {
 162                 .id      = V4L2_CID_BRIGHTNESS,
 163                 .type    = V4L2_CTRL_TYPE_INTEGER,
 164                 .name    = "Brightness",
 165                 .minimum = 0,
 166                 .maximum = 255,
 167                 .step    = 1,
 168                 .default_value = 127,
 169             },
 170             .set_control = setbrightness,
 171         },
 172 [CONTRAST] = {
 173             {
 174                 .id      = V4L2_CID_CONTRAST,
 175                 .type    = V4L2_CTRL_TYPE_INTEGER,
 176                 .name    = "Contrast",
 177                 .minimum = 0,
 178                 .maximum = 255,
 179                 .step    = 1,
 180                 .default_value = 127,
 181             },
 182             .set_control = setcontrast,
 183         },
 184 [EXPOSURE] = {
 185             {
 186                 .id      = V4L2_CID_EXPOSURE,
 187                 .type    = V4L2_CTRL_TYPE_INTEGER,
 188                 .name    = "Exposure",
 189                 .minimum = 0,
 190                 .maximum = 255,
 191                 .step    = 1,
 192                 .default_value = 127,
 193             },
 194             .set_control = setexposure,
 195         },
 196 [COLORS] = {
 197             {
 198                 .id      = V4L2_CID_SATURATION,
 199                 .type    = V4L2_CTRL_TYPE_INTEGER,
 200                 .name    = "Color",
 201                 .minimum = 0,
 202                 .maximum = 255,
 203                 .step    = 1,
 204                 .default_value = 127,
 205             },
 206             .set_control = setcolors,
 207         },
 208 /* The flip controls work for sensors ov7660 and ov7670 only */
 209 [HFLIP] = {
 210             {
 211                 .id      = V4L2_CID_HFLIP,
 212                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 213                 .name    = "Mirror",
 214                 .minimum = 0,
 215                 .maximum = 1,
 216                 .step    = 1,
 217                 .default_value = 0,
 218             },
 219             .set_control = sethvflip,
 220         },
 221 [VFLIP] = {
 222             {
 223                 .id      = V4L2_CID_VFLIP,
 224                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 225                 .name    = "Vflip",
 226                 .minimum = 0,
 227                 .maximum = 1,
 228                 .step    = 1,
 229                 .default_value = 0,
 230             },
 231             .set_control = sethvflip,
 232         },
 233 [AUTOBRIGHT] = {
 234             {
 235                 .id      = V4L2_CID_AUTOBRIGHTNESS,
 236                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 237                 .name    = "Auto Brightness",
 238                 .minimum = 0,
 239                 .maximum = 1,
 240                 .step    = 1,
 241                 .default_value = 1,
 242             },
 243             .set_control = setautobright,
 244         },
 245 [AUTOGAIN] = {
 246             {
 247                 .id      = V4L2_CID_AUTOGAIN,
 248                 .type    = V4L2_CTRL_TYPE_BOOLEAN,
 249                 .name    = "Auto Gain",
 250                 .minimum = 0,
 251                 .maximum = 1,
 252                 .step    = 1,
 253                 .default_value = 1,
 254                 .flags   = V4L2_CTRL_FLAG_UPDATE
 255             },
 256             .set = sd_setautogain,
 257         },
 258 [FREQ] = {
 259             {
 260                 .id      = V4L2_CID_POWER_LINE_FREQUENCY,
 261                 .type    = V4L2_CTRL_TYPE_MENU,
 262                 .name    = "Light frequency filter",
 263                 .minimum = 0,
 264                 .maximum = 2,   /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
 265                 .step    = 1,
 266                 .default_value = 0,
 267             },
 268             .set_control = setfreq,
 269         },
 270 };
 271
 272 /* table of the disabled controls */
 273 static const unsigned ctrl_dis[] = {
 274 [SEN_OV2610] =          ((1 << NCTRL) - 1)      /* no control */
 275                         ^ ((1 << EXPOSURE)      /* but exposure */
 276                          | (1 << AUTOGAIN)),    /* and autogain */
 277
 278 [SEN_OV2610AE] =        ((1 << NCTRL) - 1)      /* no control */
 279                         ^ ((1 << EXPOSURE)      /* but exposure */
 280                          | (1 << AUTOGAIN)),    /* and autogain */
 281
 282 [SEN_OV3610] =          (1 << NCTRL) - 1,       /* no control */
 283
 284 [SEN_OV6620] =          (1 << HFLIP) |
 285                         (1 << VFLIP) |
 286                         (1 << EXPOSURE) |
 287                         (1 << AUTOGAIN),
 288
 289 [SEN_OV6630] =          (1 << HFLIP) |
 290                         (1 << VFLIP) |
 291                         (1 << EXPOSURE) |
 292                         (1 << AUTOGAIN),
 293
 294 [SEN_OV66308AF] =       (1 << HFLIP) |
 295                         (1 << VFLIP) |
 296                         (1 << EXPOSURE) |
 297                         (1 << AUTOGAIN),
 298
 299 [SEN_OV7610] =          (1 << HFLIP) |
 300                         (1 << VFLIP) |
 301                         (1 << EXPOSURE) |
 302                         (1 << AUTOGAIN),
 303
 304 [SEN_OV7620] =          (1 << HFLIP) |
 305                         (1 << VFLIP) |
 306                         (1 << EXPOSURE) |
 307                         (1 << AUTOGAIN),
 308
 309 [SEN_OV7620AE] =        (1 << HFLIP) |
 310                         (1 << VFLIP) |
 311                         (1 << EXPOSURE) |
 312                         (1 << AUTOGAIN),
 313
 314 [SEN_OV7640] =          (1 << HFLIP) |
 315                         (1 << VFLIP) |
 316                         (1 << AUTOBRIGHT) |
 317                         (1 << CONTRAST) |
 318                         (1 << EXPOSURE) |
 319                         (1 << AUTOGAIN),
 320
 321 [SEN_OV7648] =          (1 << HFLIP) |
 322                         (1 << VFLIP) |
 323                         (1 << AUTOBRIGHT) |
 324                         (1 << CONTRAST) |
 325                         (1 << EXPOSURE) |
 326                         (1 << AUTOGAIN),
 327
 328 [SEN_OV7660] =          (1 << AUTOBRIGHT) |
 329                         (1 << EXPOSURE) |
 330                         (1 << AUTOGAIN),
 331
 332 [SEN_OV7670] =          (1 << COLORS) |
 333                         (1 << AUTOBRIGHT) |
 334                         (1 << EXPOSURE) |
 335                         (1 << AUTOGAIN),
 336
 337 [SEN_OV76BE] =          (1 << HFLIP) |
 338                         (1 << VFLIP) |
 339                         (1 << EXPOSURE) |
 340                         (1 << AUTOGAIN),
 341
 342 [SEN_OV8610] =          (1 << HFLIP) |
 343                         (1 << VFLIP) |
 344                         (1 << EXPOSURE) |
 345                         (1 << AUTOGAIN) |
 346                         (1 << FREQ),
 347 [SEN_OV9600] =          ((1 << NCTRL) - 1)      /* no control */
 348                         ^ ((1 << EXPOSURE)      /* but exposure */
 349                          | (1 << AUTOGAIN)),    /* and autogain */
 350
 351 };
 352
 353 static const struct v4l2_pix_format ov519_vga_mode[] = {
 354         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 355                 .bytesperline = 320,
 356                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 357                 .colorspace = V4L2_COLORSPACE_JPEG,
 358                 .priv = 1},
 359         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 360                 .bytesperline = 640,
 361                 .sizeimage = 640 * 480 * 3 / 8 + 590,
 362                 .colorspace = V4L2_COLORSPACE_JPEG,
 363                 .priv = 0},
 364 };
 365 static const struct v4l2_pix_format ov519_sif_mode[] = {
 366         {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 367                 .bytesperline = 160,
 368                 .sizeimage = 160 * 120 * 3 / 8 + 590,
 369                 .colorspace = V4L2_COLORSPACE_JPEG,
 370                 .priv = 3},
 371         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 372                 .bytesperline = 176,
 373                 .sizeimage = 176 * 144 * 3 / 8 + 590,
 374                 .colorspace = V4L2_COLORSPACE_JPEG,
 375                 .priv = 1},
 376         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 377                 .bytesperline = 320,
 378                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 379                 .colorspace = V4L2_COLORSPACE_JPEG,
 380                 .priv = 2},
 381         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 382                 .bytesperline = 352,
 383                 .sizeimage = 352 * 288 * 3 / 8 + 590,
 384                 .colorspace = V4L2_COLORSPACE_JPEG,
 385                 .priv = 0},
 386 };
 387
 388 /* Note some of the sizeimage values for the ov511 / ov518 may seem
 389    larger then necessary, however they need to be this big as the ov511 /
 390    ov518 always fills the entire isoc frame, using 0 padding bytes when
 391    it doesn't have any data. So with low framerates the amount of data
 392    transferred can become quite large (libv4l will remove all the 0 padding
 393    in userspace). */
 394 static const struct v4l2_pix_format ov518_vga_mode[] = {
 395         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 396                 .bytesperline = 320,
 397                 .sizeimage = 320 * 240 * 3,
 398                 .colorspace = V4L2_COLORSPACE_JPEG,
 399                 .priv = 1},
 400         {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 401                 .bytesperline = 640,
 402                 .sizeimage = 640 * 480 * 2,
 403                 .colorspace = V4L2_COLORSPACE_JPEG,
 404                 .priv = 0},
 405 };
 406 static const struct v4l2_pix_format ov518_sif_mode[] = {
 407         {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 408                 .bytesperline = 160,
 409                 .sizeimage = 70000,
 410                 .colorspace = V4L2_COLORSPACE_JPEG,
 411                 .priv = 3},
 412         {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 413                 .bytesperline = 176,
 414                 .sizeimage = 70000,
 415                 .colorspace = V4L2_COLORSPACE_JPEG,
 416                 .priv = 1},
 417         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 418                 .bytesperline = 320,
 419                 .sizeimage = 320 * 240 * 3,
 420                 .colorspace = V4L2_COLORSPACE_JPEG,
 421                 .priv = 2},
 422         {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 423                 .bytesperline = 352,
 424                 .sizeimage = 352 * 288 * 3,
 425                 .colorspace = V4L2_COLORSPACE_JPEG,
 426                 .priv = 0},
 427 };
 428
 429 static const struct v4l2_pix_format ov511_vga_mode[] = {
 430         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 431                 .bytesperline = 320,
 432                 .sizeimage = 320 * 240 * 3,
 433                 .colorspace = V4L2_COLORSPACE_JPEG,
 434                 .priv = 1},
 435         {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 436                 .bytesperline = 640,
 437                 .sizeimage = 640 * 480 * 2,
 438                 .colorspace = V4L2_COLORSPACE_JPEG,
 439                 .priv = 0},
 440 };
 441 static const struct v4l2_pix_format ov511_sif_mode[] = {
 442         {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 443                 .bytesperline = 160,
 444                 .sizeimage = 70000,
 445                 .colorspace = V4L2_COLORSPACE_JPEG,
 446                 .priv = 3},
 447         {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 448                 .bytesperline = 176,
 449                 .sizeimage = 70000,
 450                 .colorspace = V4L2_COLORSPACE_JPEG,
 451                 .priv = 1},
 452         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 453                 .bytesperline = 320,
 454                 .sizeimage = 320 * 240 * 3,
 455                 .colorspace = V4L2_COLORSPACE_JPEG,
 456                 .priv = 2},
 457         {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 458                 .bytesperline = 352,
 459                 .sizeimage = 352 * 288 * 3,
 460                 .colorspace = V4L2_COLORSPACE_JPEG,
 461                 .priv = 0},
 462 };
 463
 464 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
 465         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 466                 .bytesperline = 320,
 467                 .sizeimage = 320 * 240,
 468                 .colorspace = V4L2_COLORSPACE_SRGB,
 469                 .priv = 1},
 470         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 471                 .bytesperline = 640,
 472                 .sizeimage = 640 * 480,
 473                 .colorspace = V4L2_COLORSPACE_SRGB,
 474                 .priv = 0},
 475 };
 476 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
 477         {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 478                 .bytesperline = 160,
 479                 .sizeimage = 160 * 120,
 480                 .colorspace = V4L2_COLORSPACE_SRGB,
 481                 .priv = 3},
 482         {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 483                 .bytesperline = 176,
 484                 .sizeimage = 176 * 144,
 485                 .colorspace = V4L2_COLORSPACE_SRGB,
 486                 .priv = 1},
 487         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 488                 .bytesperline = 320,
 489                 .sizeimage = 320 * 240,
 490                 .colorspace = V4L2_COLORSPACE_SRGB,
 491                 .priv = 2},
 492         {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 493                 .bytesperline = 352,
 494                 .sizeimage = 352 * 288,
 495                 .colorspace = V4L2_COLORSPACE_SRGB,
 496                 .priv = 0},
 497 };
 498 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 499         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 500                 .bytesperline = 800,
 501                 .sizeimage = 800 * 600,
 502                 .colorspace = V4L2_COLORSPACE_SRGB,
 503                 .priv = 1},
 504         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 505                 .bytesperline = 1600,
 506                 .sizeimage = 1600 * 1200,
 507                 .colorspace = V4L2_COLORSPACE_SRGB},
 508 };
 509 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 510         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 511                 .bytesperline = 640,
 512                 .sizeimage = 640 * 480,
 513                 .colorspace = V4L2_COLORSPACE_SRGB,
 514                 .priv = 1},
 515         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 516                 .bytesperline = 800,
 517                 .sizeimage = 800 * 600,
 518                 .colorspace = V4L2_COLORSPACE_SRGB,
 519                 .priv = 1},
 520         {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 521                 .bytesperline = 1024,
 522                 .sizeimage = 1024 * 768,
 523                 .colorspace = V4L2_COLORSPACE_SRGB,
 524                 .priv = 1},
 525         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 526                 .bytesperline = 1600,
 527                 .sizeimage = 1600 * 1200,
 528                 .colorspace = V4L2_COLORSPACE_SRGB,
 529                 .priv = 0},
 530         {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 531                 .bytesperline = 2048,
 532                 .sizeimage = 2048 * 1536,
 533                 .colorspace = V4L2_COLORSPACE_SRGB,
 534                 .priv = 0},
 535 };
 536 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
 537         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 538                 .bytesperline = 640,
 539                 .sizeimage = 640 * 480,
 540                 .colorspace = V4L2_COLORSPACE_SRGB,
 541                 .priv = 1},
 542         {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 543                 .bytesperline = 1280,
 544                 .sizeimage = 1280 * 1024,
 545                 .colorspace = V4L2_COLORSPACE_SRGB},
 546 };
 547
 548 /* Registers common to OV511 / OV518 */
 549 #define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 550 #define R51x_SYS_RESET                  0x50
 551         /* Reset type flags */
 552         #define OV511_RESET_OMNICE      0x08
 553 #define R51x_SYS_INIT                   0x53
 554 #define R51x_SYS_SNAP                   0x52
 555 #define R51x_SYS_CUST_ID                0x5f
 556 #define R51x_COMP_LUT_BEGIN             0x80
 557
 558 /* OV511 Camera interface register numbers */
 559 #define R511_CAM_DELAY                  0x10
 560 #define R511_CAM_EDGE                   0x11
 561 #define R511_CAM_PXCNT                  0x12
 562 #define R511_CAM_LNCNT                  0x13
 563 #define R511_CAM_PXDIV                  0x14
 564 #define R511_CAM_LNDIV                  0x15
 565 #define R511_CAM_UV_EN                  0x16
 566 #define R511_CAM_LINE_MODE              0x17
 567 #define R511_CAM_OPTS                   0x18
 568
 569 #define R511_SNAP_FRAME                 0x19
 570 #define R511_SNAP_PXCNT                 0x1a
 571 #define R511_SNAP_LNCNT                 0x1b
 572 #define R511_SNAP_PXDIV                 0x1c
 573 #define R511_SNAP_LNDIV                 0x1d
 574 #define R511_SNAP_UV_EN                 0x1e
 575 #define R511_SNAP_OPTS                  0x1f
 576
 577 #define R511_DRAM_FLOW_CTL              0x20
 578 #define R511_FIFO_OPTS                  0x31
 579 #define R511_I2C_CTL                    0x40
 580 #define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 581 #define R511_COMP_EN                    0x78
 582 #define R511_COMP_LUT_EN                0x79
 583
 584 /* OV518 Camera interface register numbers */
 585 #define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 586 #define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 587
 588 /* OV519 Camera interface register numbers */
 589 #define OV519_R10_H_SIZE                0x10
 590 #define OV519_R11_V_SIZE                0x11
 591 #define OV519_R12_X_OFFSETL             0x12
 592 #define OV519_R13_X_OFFSETH             0x13
 593 #define OV519_R14_Y_OFFSETL             0x14
 594 #define OV519_R15_Y_OFFSETH             0x15
 595 #define OV519_R16_DIVIDER               0x16
 596 #define OV519_R20_DFR                   0x20
 597 #define OV519_R25_FORMAT                0x25
 598
 599 /* OV519 System Controller register numbers */
 600 #define OV519_R51_RESET1                0x51
 601 #define OV519_R54_EN_CLK1               0x54
 602 #define OV519_R57_SNAPSHOT              0x57
 603
 604 #define OV519_GPIO_DATA_OUT0            0x71
 605 #define OV519_GPIO_IO_CTRL0             0x72
 606
 607 /*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 608
 609 /*
 610  * The FX2 chip does not give us a zero length read at end of frame.
 611  * It does, however, give a short read at the end of a frame, if
 612  * necessary, rather than run two frames together.
 613  *
 614  * By choosing the right bulk transfer size, we are guaranteed to always
 615  * get a short read for the last read of each frame.  Frame sizes are
 616  * always a composite number (width * height, or a multiple) so if we
 617  * choose a prime number, we are guaranteed that the last read of a
 618  * frame will be short.
 619  *
 620  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 621  * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 622  * to figure out why.  [PMiller]
 623  *
 624  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 625  *
 626  * It isn't enough to know the number of bytes per frame, in case we
 627  * have data dropouts or buffer overruns (even though the FX2 double
 628  * buffers, there are some pretty strict real time constraints for
 629  * isochronous transfer for larger frame sizes).
 630  */
 631 /*jfm: this value does not work for 800x600 - see isoc_init */
 632 #define OVFX2_BULK_SIZE (13 * 4096)
 633
 634 /* I2C registers */
 635 #define R51x_I2C_W_SID          0x41
 636 #define R51x_I2C_SADDR_3        0x42
 637 #define R51x_I2C_SADDR_2        0x43
 638 #define R51x_I2C_R_SID          0x44
 639 #define R51x_I2C_DATA           0x45
 640 #define R518_I2C_CTL            0x47    /* OV518(+) only */
 641 #define OVFX2_I2C_ADDR          0x00
 642
 643 /* I2C ADDRESSES */
 644 #define OV7xx0_SID   0x42
 645 #define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 646 #define OV8xx0_SID   0xa0
 647 #define OV6xx0_SID   0xc0
 648
 649 /* OV7610 registers */
 650 #define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 651 #define OV7610_REG_BLUE         0x01    /* blue channel balance */
 652 #define OV7610_REG_RED          0x02    /* red channel balance */
 653 #define OV7610_REG_SAT          0x03    /* saturation */
 654 #define OV8610_REG_HUE          0x04    /* 04 reserved */
 655 #define OV7610_REG_CNT          0x05    /* Y contrast */
 656 #define OV7610_REG_BRT          0x06    /* Y brightness */
 657 #define OV7610_REG_COM_C        0x14    /* misc common regs */
 658 #define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 659 #define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 660 #define OV7610_REG_COM_I        0x29    /* misc settings */
 661
 662 /* OV7660 and OV7670 registers */
 663 #define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 664 #define OV7670_R01_BLUE         0x01    /* blue gain */
 665 #define OV7670_R02_RED          0x02    /* red gain */
 666 #define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 667 #define OV7670_R04_COM1         0x04    /* Control 1 */
 668 /*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 669 #define OV7670_R0C_COM3         0x0c    /* Control 3 */
 670 #define OV7670_R0D_COM4         0x0d    /* Control 4 */
 671 #define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 672 #define OV7670_R0F_COM6         0x0f    /* Control 6 */
 673 #define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 674 #define OV7670_R11_CLKRC        0x11    /* Clock control */
 675 #define OV7670_R12_COM7         0x12    /* Control 7 */
 676 #define   OV7670_COM7_FMT_VGA    0x00
 677 /*#define   OV7670_COM7_YUV      0x00    * YUV */
 678 #define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 679 #define   OV7670_COM7_FMT_MASK   0x38
 680 #define   OV7670_COM7_RESET      0x80   /* Register reset */
 681 #define OV7670_R13_COM8         0x13    /* Control 8 */
 682 #define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 683 #define   OV7670_COM8_AWB        0x02   /* White balance enable */
 684 #define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 685 #define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 686 #define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 687 #define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 688 #define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 689 #define OV7670_R15_COM10        0x15    /* Control 10 */
 690 #define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 691 #define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 692 #define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 693 #define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 694 #define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 695 #define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 696 #define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 697 #define OV7670_R24_AEW          0x24    /* AGC upper limit */
 698 #define OV7670_R25_AEB          0x25    /* AGC lower limit */
 699 #define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 700 #define OV7670_R32_HREF         0x32    /* HREF pieces */
 701 #define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 702 #define OV7670_R3B_COM11        0x3b    /* Control 11 */
 703 #define   OV7670_COM11_EXP       0x02
 704 #define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 705 #define OV7670_R3C_COM12        0x3c    /* Control 12 */
 706 #define OV7670_R3D_COM13        0x3d    /* Control 13 */
 707 #define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 708 #define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 709 #define OV7670_R3E_COM14        0x3e    /* Control 14 */
 710 #define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 711 #define OV7670_R40_COM15        0x40    /* Control 15 */
 712 /*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 713 #define OV7670_R41_COM16        0x41    /* Control 16 */
 714 #define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 715 /* end of ov7660 common registers */
 716 #define OV7670_R55_BRIGHT       0x55    /* Brightness */
 717 #define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 718 #define OV7670_R69_GFIX         0x69    /* Fix gain control */
 719 /*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 720 #define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 721 #define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 722 #define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 723 #define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 724 #define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 725 #define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 726 #define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 727 #define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 728 #define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 729
 730 struct ov_regvals {
 731         u8 reg;
 732         u8 val;
 733 };
 734 struct ov_i2c_regvals {
 735         u8 reg;
 736         u8 val;
 737 };
 738
 739 /* Settings for OV2610 camera chip */
 740 static const struct ov_i2c_regvals norm_2610[] = {
 741         { 0x12, 0x80 }, /* reset */
 742 };
 743
 744 static const struct ov_i2c_regvals norm_2610ae[] = {
 745         {0x12, 0x80},   /* reset */
 746         {0x13, 0xcd},
 747         {0x09, 0x01},
 748         {0x0d, 0x00},
 749         {0x11, 0x80},
 750         {0x12, 0x20},   /* 1600x1200 */
 751         {0x33, 0x0c},
 752         {0x35, 0x90},
 753         {0x36, 0x37},
 754 /* ms-win traces */
 755         {0x11, 0x83},   /* clock / 3 ? */
 756         {0x2d, 0x00},   /* 60 Hz filter */
 757         {0x24, 0xb0},   /* normal colors */
 758         {0x25, 0x90},
 759         {0x10, 0x43},
 760 };
 761
 762 static const struct ov_i2c_regvals norm_3620b[] = {
 763         /*
 764          * From the datasheet: "Note that after writing to register COMH
 765          * (0x12) to change the sensor mode, registers related to the
 766          * sensor’s cropping window will be reset back to their default
 767          * values."
 768          *
 769          * "wait 4096 external clock ... to make sure the sensor is
 770          * stable and ready to access registers" i.e. 160us at 24MHz
 771          */
 772         { 0x12, 0x80 }, /* COMH reset */
 773         { 0x12, 0x00 }, /* QXGA, master */
 774
 775         /*
 776          * 11 CLKRC "Clock Rate Control"
 777          * [7] internal frequency doublers: on
 778          * [6] video port mode: master
 779          * [5:0] clock divider: 1
 780          */
 781         { 0x11, 0x80 },
 782
 783         /*
 784          * 13 COMI "Common Control I"
 785          *                  = 192 (0xC0) 11000000
 786          *    COMI[7] "AEC speed selection"
 787          *                  =   1 (0x01) 1....... "Faster AEC correction"
 788          *    COMI[6] "AEC speed step selection"
 789          *                  =   1 (0x01) .1...... "Big steps, fast"
 790          *    COMI[5] "Banding filter on off"
 791          *                  =   0 (0x00) ..0..... "Off"
 792          *    COMI[4] "Banding filter option"
 793          *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 794          *                                         the PLL is ON"
 795          *    COMI[3] "Reserved"
 796          *                  =   0 (0x00) ....0...
 797          *    COMI[2] "AGC auto manual control selection"
 798          *                  =   0 (0x00) .....0.. "Manual"
 799          *    COMI[1] "AWB auto manual control selection"
 800          *                  =   0 (0x00) ......0. "Manual"
 801          *    COMI[0] "Exposure control"
 802          *                  =   0 (0x00) .......0 "Manual"
 803          */
 804         { 0x13, 0xc0 },
 805
 806         /*
 807          * 09 COMC "Common Control C"
 808          *                  =   8 (0x08) 00001000
 809          *    COMC[7:5] "Reserved"
 810          *                  =   0 (0x00) 000.....
 811          *    COMC[4] "Sleep Mode Enable"
 812          *                  =   0 (0x00) ...0.... "Normal mode"
 813          *    COMC[3:2] "Sensor sampling reset timing selection"
 814          *                  =   2 (0x02) ....10.. "Longer reset time"
 815          *    COMC[1:0] "Output drive current select"
 816          *                  =   0 (0x00) ......00 "Weakest"
 817          */
 818         { 0x09, 0x08 },
 819
 820         /*
 821          * 0C COMD "Common Control D"
 822          *                  =   8 (0x08) 00001000
 823          *    COMD[7] "Reserved"
 824          *                  =   0 (0x00) 0.......
 825          *    COMD[6] "Swap MSB and LSB at the output port"
 826          *                  =   0 (0x00) .0...... "False"
 827          *    COMD[5:3] "Reserved"
 828          *                  =   1 (0x01) ..001...
 829          *    COMD[2] "Output Average On Off"
 830          *                  =   0 (0x00) .....0.. "Output Normal"
 831          *    COMD[1] "Sensor precharge voltage selection"
 832          *                  =   0 (0x00) ......0. "Selects internal
 833          *                                         reference precharge
 834          *                                         voltage"
 835          *    COMD[0] "Snapshot option"
 836          *                  =   0 (0x00) .......0 "Enable live video output
 837          *                                         after snapshot sequence"
 838          */
 839         { 0x0c, 0x08 },
 840
 841         /*
 842          * 0D COME "Common Control E"
 843          *                  = 161 (0xA1) 10100001
 844          *    COME[7] "Output average option"
 845          *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 846          *    COME[6] "Anti-blooming control"
 847          *                  =   0 (0x00) .0...... "Off"
 848          *    COME[5:3] "Reserved"
 849          *                  =   4 (0x04) ..100...
 850          *    COME[2] "Clock output power down pin status"
 851          *                  =   0 (0x00) .....0.. "Tri-state data output pin
 852          *                                         on power down"
 853          *    COME[1] "Data output pin status selection at power down"
 854          *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 855          *                                         HREF, and CHSYNC pins on
 856          *                                         power down"
 857          *    COME[0] "Auto zero circuit select"
 858          *                  =   1 (0x01) .......1 "On"
 859          */
 860         { 0x0d, 0xa1 },
 861
 862         /*
 863          * 0E COMF "Common Control F"
 864          *                  = 112 (0x70) 01110000
 865          *    COMF[7] "System clock selection"
 866          *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 867          *    COMF[6:4] "Reserved"
 868          *                  =   7 (0x07) .111....
 869          *    COMF[3] "Manual auto negative offset canceling selection"
 870          *                  =   0 (0x00) ....0... "Auto detect negative
 871          *                                         offset and cancel it"
 872          *    COMF[2:0] "Reserved"
 873          *                  =   0 (0x00) .....000
 874          */
 875         { 0x0e, 0x70 },
 876
 877         /*
 878          * 0F COMG "Common Control G"
 879          *                  =  66 (0x42) 01000010
 880          *    COMG[7] "Optical black output selection"
 881          *                  =   0 (0x00) 0....... "Disable"
 882          *    COMG[6] "Black level calibrate selection"
 883          *                  =   1 (0x01) .1...... "Use optical black pixels
 884          *                                         to calibrate"
 885          *    COMG[5:4] "Reserved"
 886          *                  =   0 (0x00) ..00....
 887          *    COMG[3] "Channel offset adjustment"
 888          *                  =   0 (0x00) ....0... "Disable offset adjustment"
 889          *    COMG[2] "ADC black level calibration option"
 890          *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 891          *                                         line to calibrate each
 892          *                                         channel's black level"
 893          *    COMG[1] "Reserved"
 894          *                  =   1 (0x01) ......1.
 895          *    COMG[0] "ADC black level calibration enable"
 896          *                  =   0 (0x00) .......0 "Disable"
 897          */
 898         { 0x0f, 0x42 },
 899
 900         /*
 901          * 14 COMJ "Common Control J"
 902          *                  = 198 (0xC6) 11000110
 903          *    COMJ[7:6] "AGC gain ceiling"
 904          *                  =   3 (0x03) 11...... "8x"
 905          *    COMJ[5:4] "Reserved"
 906          *                  =   0 (0x00) ..00....
 907          *    COMJ[3] "Auto banding filter"
 908          *                  =   0 (0x00) ....0... "Banding filter is always
 909          *                                         on off depending on
 910          *                                         COMI[5] setting"
 911          *    COMJ[2] "VSYNC drop option"
 912          *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 913          *                                         data is dropped"
 914          *    COMJ[1] "Frame data drop"
 915          *                  =   1 (0x01) ......1. "Drop frame data if
 916          *                                         exposure is not within
 917          *                                         tolerance.  In AEC mode,
 918          *                                         data is normally dropped
 919          *                                         when data is out of
 920          *                                         range."
 921          *    COMJ[0] "Reserved"
 922          *                  =   0 (0x00) .......0
 923          */
 924         { 0x14, 0xc6 },
 925
 926         /*
 927          * 15 COMK "Common Control K"
 928          *                  =   2 (0x02) 00000010
 929          *    COMK[7] "CHSYNC pin output swap"
 930          *                  =   0 (0x00) 0....... "CHSYNC"
 931          *    COMK[6] "HREF pin output swap"
 932          *                  =   0 (0x00) .0...... "HREF"
 933          *    COMK[5] "PCLK output selection"
 934          *                  =   0 (0x00) ..0..... "PCLK always output"
 935          *    COMK[4] "PCLK edge selection"
 936          *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 937          *    COMK[3] "HREF output polarity"
 938          *                  =   0 (0x00) ....0... "positive"
 939          *    COMK[2] "Reserved"
 940          *                  =   0 (0x00) .....0..
 941          *    COMK[1] "VSYNC polarity"
 942          *                  =   1 (0x01) ......1. "negative"
 943          *    COMK[0] "HSYNC polarity"
 944          *                  =   0 (0x00) .......0 "positive"
 945          */
 946         { 0x15, 0x02 },
 947
 948         /*
 949          * 33 CHLF "Current Control"
 950          *                  =   9 (0x09) 00001001
 951          *    CHLF[7:6] "Sensor current control"
 952          *                  =   0 (0x00) 00......
 953          *    CHLF[5] "Sensor current range control"
 954          *                  =   0 (0x00) ..0..... "normal range"
 955          *    CHLF[4] "Sensor current"
 956          *                  =   0 (0x00) ...0.... "normal current"
 957          *    CHLF[3] "Sensor buffer current control"
 958          *                  =   1 (0x01) ....1... "half current"
 959          *    CHLF[2] "Column buffer current control"
 960          *                  =   0 (0x00) .....0.. "normal current"
 961          *    CHLF[1] "Analog DSP current control"
 962          *                  =   0 (0x00) ......0. "normal current"
 963          *    CHLF[1] "ADC current control"
 964          *                  =   0 (0x00) ......0. "normal current"
 965          */
 966         { 0x33, 0x09 },
 967
 968         /*
 969          * 34 VBLM "Blooming Control"
 970          *                  =  80 (0x50) 01010000
 971          *    VBLM[7] "Hard soft reset switch"
 972          *                  =   0 (0x00) 0....... "Hard reset"
 973          *    VBLM[6:4] "Blooming voltage selection"
 974          *                  =   5 (0x05) .101....
 975          *    VBLM[3:0] "Sensor current control"
 976          *                  =   0 (0x00) ....0000
 977          */
 978         { 0x34, 0x50 },
 979
 980         /*
 981          * 36 VCHG "Sensor Precharge Voltage Control"
 982          *                  =   0 (0x00) 00000000
 983          *    VCHG[7] "Reserved"
 984          *                  =   0 (0x00) 0.......
 985          *    VCHG[6:4] "Sensor precharge voltage control"
 986          *                  =   0 (0x00) .000....
 987          *    VCHG[3:0] "Sensor array common reference"
 988          *                  =   0 (0x00) ....0000
 989          */
 990         { 0x36, 0x00 },
 991
 992         /*
 993          * 37 ADC "ADC Reference Control"
 994          *                  =   4 (0x04) 00000100
 995          *    ADC[7:4] "Reserved"
 996          *                  =   0 (0x00) 0000....
 997          *    ADC[3] "ADC input signal range"
 998          *                  =   0 (0x00) ....0... "Input signal 1.0x"
 999          *    ADC[2:0] "ADC range control"
1000          *                  =   4 (0x04) .....100
1001          */
1002         { 0x37, 0x04 },
1003
1004         /*
1005          * 38 ACOM "Analog Common Ground"
1006          *                  =  82 (0x52) 01010010
1007          *    ACOM[7] "Analog gain control"
1008          *                  =   0 (0x00) 0....... "Gain 1x"
1009          *    ACOM[6] "Analog black level calibration"
1010          *                  =   1 (0x01) .1...... "On"
1011          *    ACOM[5:0] "Reserved"
1012          *                  =  18 (0x12) ..010010
1013          */
1014         { 0x38, 0x52 },
1015
1016         /*
1017          * 3A FREFA "Internal Reference Adjustment"
1018          *                  =   0 (0x00) 00000000
1019          *    FREFA[7:0] "Range"
1020          *                  =   0 (0x00) 00000000
1021          */
1022         { 0x3a, 0x00 },
1023
1024         /*
1025          * 3C FVOPT "Internal Reference Adjustment"
1026          *                  =  31 (0x1F) 00011111
1027          *    FVOPT[7:0] "Range"
1028          *                  =  31 (0x1F) 00011111
1029          */
1030         { 0x3c, 0x1f },
1031
1032         /*
1033          * 44 Undocumented  =   0 (0x00) 00000000
1034          *    44[7:0] "It's a secret"
1035          *                  =   0 (0x00) 00000000
1036          */
1037         { 0x44, 0x00 },
1038
1039         /*
1040          * 40 Undocumented  =   0 (0x00) 00000000
1041          *    40[7:0] "It's a secret"
1042          *                  =   0 (0x00) 00000000
1043          */
1044         { 0x40, 0x00 },
1045
1046         /*
1047          * 41 Undocumented  =   0 (0x00) 00000000
1048          *    41[7:0] "It's a secret"
1049          *                  =   0 (0x00) 00000000
1050          */
1051         { 0x41, 0x00 },
1052
1053         /*
1054          * 42 Undocumented  =   0 (0x00) 00000000
1055          *    42[7:0] "It's a secret"
1056          *                  =   0 (0x00) 00000000
1057          */
1058         { 0x42, 0x00 },
1059
1060         /*
1061          * 43 Undocumented  =   0 (0x00) 00000000
1062          *    43[7:0] "It's a secret"
1063          *                  =   0 (0x00) 00000000
1064          */
1065         { 0x43, 0x00 },
1066
1067         /*
1068          * 45 Undocumented  = 128 (0x80) 10000000
1069          *    45[7:0] "It's a secret"
1070          *                  = 128 (0x80) 10000000
1071          */
1072         { 0x45, 0x80 },
1073
1074         /*
1075          * 48 Undocumented  = 192 (0xC0) 11000000
1076          *    48[7:0] "It's a secret"
1077          *                  = 192 (0xC0) 11000000
1078          */
1079         { 0x48, 0xc0 },
1080
1081         /*
1082          * 49 Undocumented  =  25 (0x19) 00011001
1083          *    49[7:0] "It's a secret"
1084          *                  =  25 (0x19) 00011001
1085          */
1086         { 0x49, 0x19 },
1087
1088         /*
1089          * 4B Undocumented  = 128 (0x80) 10000000
1090          *    4B[7:0] "It's a secret"
1091          *                  = 128 (0x80) 10000000
1092          */
1093         { 0x4b, 0x80 },
1094
1095         /*
1096          * 4D Undocumented  = 196 (0xC4) 11000100
1097          *    4D[7:0] "It's a secret"
1098          *                  = 196 (0xC4) 11000100
1099          */
1100         { 0x4d, 0xc4 },
1101
1102         /*
1103          * 35 VREF "Reference Voltage Control"
1104          *                  =  76 (0x4c) 01001100
1105          *    VREF[7:5] "Column high reference control"
1106          *                  =   2 (0x02) 010..... "higher voltage"
1107          *    VREF[4:2] "Column low reference control"
1108          *                  =   3 (0x03) ...011.. "Highest voltage"
1109          *    VREF[1:0] "Reserved"
1110          *                  =   0 (0x00) ......00
1111          */
1112         { 0x35, 0x4c },
1113
1114         /*
1115          * 3D Undocumented  =   0 (0x00) 00000000
1116          *    3D[7:0] "It's a secret"
1117          *                  =   0 (0x00) 00000000
1118          */
1119         { 0x3d, 0x00 },
1120
1121         /*
1122          * 3E Undocumented  =   0 (0x00) 00000000
1123          *    3E[7:0] "It's a secret"
1124          *                  =   0 (0x00) 00000000
1125          */
1126         { 0x3e, 0x00 },
1127
1128         /*
1129          * 3B FREFB "Internal Reference Adjustment"
1130          *                  =  24 (0x18) 00011000
1131          *    FREFB[7:0] "Range"
1132          *                  =  24 (0x18) 00011000
1133          */
1134         { 0x3b, 0x18 },
1135
1136         /*
1137          * 33 CHLF "Current Control"
1138          *                  =  25 (0x19) 00011001
1139          *    CHLF[7:6] "Sensor current control"
1140          *                  =   0 (0x00) 00......
1141          *    CHLF[5] "Sensor current range control"
1142          *                  =   0 (0x00) ..0..... "normal range"
1143          *    CHLF[4] "Sensor current"
1144          *                  =   1 (0x01) ...1.... "double current"
1145          *    CHLF[3] "Sensor buffer current control"
1146          *                  =   1 (0x01) ....1... "half current"
1147          *    CHLF[2] "Column buffer current control"
1148          *                  =   0 (0x00) .....0.. "normal current"
1149          *    CHLF[1] "Analog DSP current control"
1150          *                  =   0 (0x00) ......0. "normal current"
1151          *    CHLF[1] "ADC current control"
1152          *                  =   0 (0x00) ......0. "normal current"
1153          */
1154         { 0x33, 0x19 },
1155
1156         /*
1157          * 34 VBLM "Blooming Control"
1158          *                  =  90 (0x5A) 01011010
1159          *    VBLM[7] "Hard soft reset switch"
1160          *                  =   0 (0x00) 0....... "Hard reset"
1161          *    VBLM[6:4] "Blooming voltage selection"
1162          *                  =   5 (0x05) .101....
1163          *    VBLM[3:0] "Sensor current control"
1164          *                  =  10 (0x0A) ....1010
1165          */
1166         { 0x34, 0x5a },
1167
1168         /*
1169          * 3B FREFB "Internal Reference Adjustment"
1170          *                  =   0 (0x00) 00000000
1171          *    FREFB[7:0] "Range"
1172          *                  =   0 (0x00) 00000000
1173          */
1174         { 0x3b, 0x00 },
1175
1176         /*
1177          * 33 CHLF "Current Control"
1178          *                  =   9 (0x09) 00001001
1179          *    CHLF[7:6] "Sensor current control"
1180          *                  =   0 (0x00) 00......
1181          *    CHLF[5] "Sensor current range control"
1182          *                  =   0 (0x00) ..0..... "normal range"
1183          *    CHLF[4] "Sensor current"
1184          *                  =   0 (0x00) ...0.... "normal current"
1185          *    CHLF[3] "Sensor buffer current control"
1186          *                  =   1 (0x01) ....1... "half current"
1187          *    CHLF[2] "Column buffer current control"
1188          *                  =   0 (0x00) .....0.. "normal current"
1189          *    CHLF[1] "Analog DSP current control"
1190          *                  =   0 (0x00) ......0. "normal current"
1191          *    CHLF[1] "ADC current control"
1192          *                  =   0 (0x00) ......0. "normal current"
1193          */
1194         { 0x33, 0x09 },
1195
1196         /*
1197          * 34 VBLM "Blooming Control"
1198          *                  =  80 (0x50) 01010000
1199          *    VBLM[7] "Hard soft reset switch"
1200          *                  =   0 (0x00) 0....... "Hard reset"
1201          *    VBLM[6:4] "Blooming voltage selection"
1202          *                  =   5 (0x05) .101....
1203          *    VBLM[3:0] "Sensor current control"
1204          *                  =   0 (0x00) ....0000
1205          */
1206         { 0x34, 0x50 },
1207
1208         /*
1209          * 12 COMH "Common Control H"
1210          *                  =  64 (0x40) 01000000
1211          *    COMH[7] "SRST"
1212          *                  =   0 (0x00) 0....... "No-op"
1213          *    COMH[6:4] "Resolution selection"
1214          *                  =   4 (0x04) .100.... "XGA"
1215          *    COMH[3] "Master slave selection"
1216          *                  =   0 (0x00) ....0... "Master mode"
1217          *    COMH[2] "Internal B/R channel option"
1218          *                  =   0 (0x00) .....0.. "B/R use same channel"
1219          *    COMH[1] "Color bar test pattern"
1220          *                  =   0 (0x00) ......0. "Off"
1221          *    COMH[0] "Reserved"
1222          *                  =   0 (0x00) .......0
1223          */
1224         { 0x12, 0x40 },
1225
1226         /*
1227          * 17 HREFST "Horizontal window start"
1228          *                  =  31 (0x1F) 00011111
1229          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1230          *                  =  31 (0x1F) 00011111
1231          */
1232         { 0x17, 0x1f },
1233
1234         /*
1235          * 18 HREFEND "Horizontal window end"
1236          *                  =  95 (0x5F) 01011111
1237          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1238          *                  =  95 (0x5F) 01011111
1239          */
1240         { 0x18, 0x5f },
1241
1242         /*
1243          * 19 VSTRT "Vertical window start"
1244          *                  =   0 (0x00) 00000000
1245          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1246          *                  =   0 (0x00) 00000000
1247          */
1248         { 0x19, 0x00 },
1249
1250         /*
1251          * 1A VEND "Vertical window end"
1252          *                  =  96 (0x60) 01100000
1253          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1254          *                  =  96 (0x60) 01100000
1255          */
1256         { 0x1a, 0x60 },
1257
1258         /*
1259          * 32 COMM "Common Control M"
1260          *                  =  18 (0x12) 00010010
1261          *    COMM[7:6] "Pixel clock divide option"
1262          *                  =   0 (0x00) 00...... "/1"
1263          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1264          *                  =   2 (0x02) ..010...
1265          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1266          *                  =   2 (0x02) .....010
1267          */
1268         { 0x32, 0x12 },
1269
1270         /*
1271          * 03 COMA "Common Control A"
1272          *                  =  74 (0x4A) 01001010
1273          *    COMA[7:4] "AWB Update Threshold"
1274          *                  =   4 (0x04) 0100....
1275          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1276          *                  =   2 (0x02) ....10..
1277          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1278          *                  =   2 (0x02) ......10
1279          */
1280         { 0x03, 0x4a },
1281
1282         /*
1283          * 11 CLKRC "Clock Rate Control"
1284          *                  = 128 (0x80) 10000000
1285          *    CLKRC[7] "Internal frequency doublers on off seclection"
1286          *                  =   1 (0x01) 1....... "On"
1287          *    CLKRC[6] "Digital video master slave selection"
1288          *                  =   0 (0x00) .0...... "Master mode, sensor
1289          *                                         provides PCLK"
1290          *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1291          *                  =   0 (0x00) ..000000
1292          */
1293         { 0x11, 0x80 },
1294
1295         /*
1296          * 12 COMH "Common Control H"
1297          *                  =   0 (0x00) 00000000
1298          *    COMH[7] "SRST"
1299          *                  =   0 (0x00) 0....... "No-op"
1300          *    COMH[6:4] "Resolution selection"
1301          *                  =   0 (0x00) .000.... "QXGA"
1302          *    COMH[3] "Master slave selection"
1303          *                  =   0 (0x00) ....0... "Master mode"
1304          *    COMH[2] "Internal B/R channel option"
1305          *                  =   0 (0x00) .....0.. "B/R use same channel"
1306          *    COMH[1] "Color bar test pattern"
1307          *                  =   0 (0x00) ......0. "Off"
1308          *    COMH[0] "Reserved"
1309          *                  =   0 (0x00) .......0
1310          */
1311         { 0x12, 0x00 },
1312
1313         /*
1314          * 12 COMH "Common Control H"
1315          *                  =  64 (0x40) 01000000
1316          *    COMH[7] "SRST"
1317          *                  =   0 (0x00) 0....... "No-op"
1318          *    COMH[6:4] "Resolution selection"
1319          *                  =   4 (0x04) .100.... "XGA"
1320          *    COMH[3] "Master slave selection"
1321          *                  =   0 (0x00) ....0... "Master mode"
1322          *    COMH[2] "Internal B/R channel option"
1323          *                  =   0 (0x00) .....0.. "B/R use same channel"
1324          *    COMH[1] "Color bar test pattern"
1325          *                  =   0 (0x00) ......0. "Off"
1326          *    COMH[0] "Reserved"
1327          *                  =   0 (0x00) .......0
1328          */
1329         { 0x12, 0x40 },
1330
1331         /*
1332          * 17 HREFST "Horizontal window start"
1333          *                  =  31 (0x1F) 00011111
1334          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1335          *                  =  31 (0x1F) 00011111
1336          */
1337         { 0x17, 0x1f },
1338
1339         /*
1340          * 18 HREFEND "Horizontal window end"
1341          *                  =  95 (0x5F) 01011111
1342          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1343          *                  =  95 (0x5F) 01011111
1344          */
1345         { 0x18, 0x5f },
1346
1347         /*
1348          * 19 VSTRT "Vertical window start"
1349          *                  =   0 (0x00) 00000000
1350          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1351          *                  =   0 (0x00) 00000000
1352          */
1353         { 0x19, 0x00 },
1354
1355         /*
1356          * 1A VEND "Vertical window end"
1357          *                  =  96 (0x60) 01100000
1358          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1359          *                  =  96 (0x60) 01100000
1360          */
1361         { 0x1a, 0x60 },
1362
1363         /*
1364          * 32 COMM "Common Control M"
1365          *                  =  18 (0x12) 00010010
1366          *    COMM[7:6] "Pixel clock divide option"
1367          *                  =   0 (0x00) 00...... "/1"
1368          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1369          *                  =   2 (0x02) ..010...
1370          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1371          *                  =   2 (0x02) .....010
1372          */
1373         { 0x32, 0x12 },
1374
1375         /*
1376          * 03 COMA "Common Control A"
1377          *                  =  74 (0x4A) 01001010
1378          *    COMA[7:4] "AWB Update Threshold"
1379          *                  =   4 (0x04) 0100....
1380          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1381          *                  =   2 (0x02) ....10..
1382          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1383          *                  =   2 (0x02) ......10
1384          */
1385         { 0x03, 0x4a },
1386
1387         /*
1388          * 02 RED "Red Gain Control"
1389          *                  = 175 (0xAF) 10101111
1390          *    RED[7] "Action"
1391          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1392          *    RED[6:0] "Value"
1393          *                  =  47 (0x2F) .0101111
1394          */
1395         { 0x02, 0xaf },
1396
1397         /*
1398          * 2D ADDVSL "VSYNC Pulse Width"
1399          *                  = 210 (0xD2) 11010010
1400          *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1401          *                  = 210 (0xD2) 11010010
1402          */
1403         { 0x2d, 0xd2 },
1404
1405         /*
1406          * 00 GAIN          =  24 (0x18) 00011000
1407          *    GAIN[7:6] "Reserved"
1408          *                  =   0 (0x00) 00......
1409          *    GAIN[5] "Double"
1410          *                  =   0 (0x00) ..0..... "False"
1411          *    GAIN[4] "Double"
1412          *                  =   1 (0x01) ...1.... "True"
1413          *    GAIN[3:0] "Range"
1414          *                  =   8 (0x08) ....1000
1415          */
1416         { 0x00, 0x18 },
1417
1418         /*
1419          * 01 BLUE "Blue Gain Control"
1420          *                  = 240 (0xF0) 11110000
1421          *    BLUE[7] "Action"
1422          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1423          *    BLUE[6:0] "Value"
1424          *                  = 112 (0x70) .1110000
1425          */
1426         { 0x01, 0xf0 },
1427
1428         /*
1429          * 10 AEC "Automatic Exposure Control"
1430          *                  =  10 (0x0A) 00001010
1431          *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1432          *                  =  10 (0x0A) 00001010
1433          */
1434         { 0x10, 0x0a },
1435
1436         { 0xe1, 0x67 },
1437         { 0xe3, 0x03 },
1438         { 0xe4, 0x26 },
1439         { 0xe5, 0x3e },
1440         { 0xf8, 0x01 },
1441         { 0xff, 0x01 },
1442 };
1443
1444 static const struct ov_i2c_regvals norm_6x20[] = {
1445         { 0x12, 0x80 }, /* reset */
1446         { 0x11, 0x01 },
1447         { 0x03, 0x60 },
1448         { 0x05, 0x7f }, /* For when autoadjust is off */
1449         { 0x07, 0xa8 },
1450         /* The ratio of 0x0c and 0x0d controls the white point */
1451         { 0x0c, 0x24 },
1452         { 0x0d, 0x24 },
1453         { 0x0f, 0x15 }, /* COMS */
1454         { 0x10, 0x75 }, /* AEC Exposure time */
1455         { 0x12, 0x24 }, /* Enable AGC */
1456         { 0x14, 0x04 },
1457         /* 0x16: 0x06 helps frame stability with moving objects */
1458         { 0x16, 0x06 },
1459 /*      { 0x20, 0x30 },  * Aperture correction enable */
1460         { 0x26, 0xb2 }, /* BLC enable */
1461         /* 0x28: 0x05 Selects RGB format if RGB on */
1462         { 0x28, 0x05 },
1463         { 0x2a, 0x04 }, /* Disable framerate adjust */
1464 /*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1465         { 0x2d, 0x85 },
1466         { 0x33, 0xa0 }, /* Color Processing Parameter */
1467         { 0x34, 0xd2 }, /* Max A/D range */
1468         { 0x38, 0x8b },
1469         { 0x39, 0x40 },
1470
1471         { 0x3c, 0x39 }, /* Enable AEC mode changing */
1472         { 0x3c, 0x3c }, /* Change AEC mode */
1473         { 0x3c, 0x24 }, /* Disable AEC mode changing */
1474
1475         { 0x3d, 0x80 },
1476         /* These next two registers (0x4a, 0x4b) are undocumented.
1477          * They control the color balance */
1478         { 0x4a, 0x80 },
1479         { 0x4b, 0x80 },
1480         { 0x4d, 0xd2 }, /* This reduces noise a bit */
1481         { 0x4e, 0xc1 },
1482         { 0x4f, 0x04 },
1483 /* Do 50-53 have any effect? */
1484 /* Toggle 0x12[2] off and on here? */
1485 };
1486
1487 static const struct ov_i2c_regvals norm_6x30[] = {
1488         { 0x12, 0x80 }, /* Reset */
1489         { 0x00, 0x1f }, /* Gain */
1490         { 0x01, 0x99 }, /* Blue gain */
1491         { 0x02, 0x7c }, /* Red gain */
1492         { 0x03, 0xc0 }, /* Saturation */
1493         { 0x05, 0x0a }, /* Contrast */
1494         { 0x06, 0x95 }, /* Brightness */
1495         { 0x07, 0x2d }, /* Sharpness */
1496         { 0x0c, 0x20 },
1497         { 0x0d, 0x20 },
1498         { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1499         { 0x0f, 0x05 },
1500         { 0x10, 0x9a },
1501         { 0x11, 0x00 }, /* Pixel clock = fastest */
1502         { 0x12, 0x24 }, /* Enable AGC and AWB */
1503         { 0x13, 0x21 },
1504         { 0x14, 0x80 },
1505         { 0x15, 0x01 },
1506         { 0x16, 0x03 },
1507         { 0x17, 0x38 },
1508         { 0x18, 0xea },
1509         { 0x19, 0x04 },
1510         { 0x1a, 0x93 },
1511         { 0x1b, 0x00 },
1512         { 0x1e, 0xc4 },
1513         { 0x1f, 0x04 },
1514         { 0x20, 0x20 },
1515         { 0x21, 0x10 },
1516         { 0x22, 0x88 },
1517         { 0x23, 0xc0 }, /* Crystal circuit power level */
1518         { 0x25, 0x9a }, /* Increase AEC black ratio */
1519         { 0x26, 0xb2 }, /* BLC enable */
1520         { 0x27, 0xa2 },
1521         { 0x28, 0x00 },
1522         { 0x29, 0x00 },
1523         { 0x2a, 0x84 }, /* 60 Hz power */
1524         { 0x2b, 0xa8 }, /* 60 Hz power */
1525         { 0x2c, 0xa0 },
1526         { 0x2d, 0x95 }, /* Enable auto-brightness */
1527         { 0x2e, 0x88 },
1528         { 0x33, 0x26 },
1529         { 0x34, 0x03 },
1530         { 0x36, 0x8f },
1531         { 0x37, 0x80 },
1532         { 0x38, 0x83 },
1533         { 0x39, 0x80 },
1534         { 0x3a, 0x0f },
1535         { 0x3b, 0x3c },
1536         { 0x3c, 0x1a },
1537         { 0x3d, 0x80 },
1538         { 0x3e, 0x80 },
1539         { 0x3f, 0x0e },
1540         { 0x40, 0x00 }, /* White bal */
1541         { 0x41, 0x00 }, /* White bal */
1542         { 0x42, 0x80 },
1543         { 0x43, 0x3f }, /* White bal */
1544         { 0x44, 0x80 },
1545         { 0x45, 0x20 },
1546         { 0x46, 0x20 },
1547         { 0x47, 0x80 },
1548         { 0x48, 0x7f },
1549         { 0x49, 0x00 },
1550         { 0x4a, 0x00 },
1551         { 0x4b, 0x80 },
1552         { 0x4c, 0xd0 },
1553         { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1554         { 0x4e, 0x40 },
1555         { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1556         { 0x50, 0xff },
1557         { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1558         { 0x55, 0xff },
1559         { 0x56, 0x12 },
1560         { 0x57, 0x81 },
1561         { 0x58, 0x75 },
1562         { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1563         { 0x5a, 0x2c },
1564         { 0x5b, 0x0f }, /* AWB chrominance levels */
1565         { 0x5c, 0x10 },
1566         { 0x3d, 0x80 },
1567         { 0x27, 0xa6 },
1568         { 0x12, 0x20 }, /* Toggle AWB */
1569         { 0x12, 0x24 },
1570 };
1571
1572 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1573  *
1574  * Register 0x0f in the 7610 has the following effects:
1575  *
1576  * 0x85 (AEC method 1): Best overall, good contrast range
1577  * 0x45 (AEC method 2): Very overexposed
1578  * 0xa5 (spec sheet default): Ok, but the black level is
1579  *      shifted resulting in loss of contrast
1580  * 0x05 (old driver setting): very overexposed, too much
1581  *      contrast
1582  */
1583 static const struct ov_i2c_regvals norm_7610[] = {
1584         { 0x10, 0xff },
1585         { 0x16, 0x06 },
1586         { 0x28, 0x24 },
1587         { 0x2b, 0xac },
1588         { 0x12, 0x00 },
1589         { 0x38, 0x81 },
1590         { 0x28, 0x24 }, /* 0c */
1591         { 0x0f, 0x85 }, /* lg's setting */
1592         { 0x15, 0x01 },
1593         { 0x20, 0x1c },
1594         { 0x23, 0x2a },
1595         { 0x24, 0x10 },
1596         { 0x25, 0x8a },
1597         { 0x26, 0xa2 },
1598         { 0x27, 0xc2 },
1599         { 0x2a, 0x04 },
1600         { 0x2c, 0xfe },
1601         { 0x2d, 0x93 },
1602         { 0x30, 0x71 },
1603         { 0x31, 0x60 },
1604         { 0x32, 0x26 },
1605         { 0x33, 0x20 },
1606         { 0x34, 0x48 },
1607         { 0x12, 0x24 },
1608         { 0x11, 0x01 },
1609         { 0x0c, 0x24 },
1610         { 0x0d, 0x24 },
1611 };
1612
1613 static const struct ov_i2c_regvals norm_7620[] = {
1614         { 0x12, 0x80 },         /* reset */
1615         { 0x00, 0x00 },         /* gain */
1616         { 0x01, 0x80 },         /* blue gain */
1617         { 0x02, 0x80 },         /* red gain */
1618         { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1619         { 0x06, 0x60 },
1620         { 0x07, 0x00 },
1621         { 0x0c, 0x24 },
1622         { 0x0c, 0x24 },
1623         { 0x0d, 0x24 },
1624         { 0x11, 0x01 },
1625         { 0x12, 0x24 },
1626         { 0x13, 0x01 },
1627         { 0x14, 0x84 },
1628         { 0x15, 0x01 },
1629         { 0x16, 0x03 },
1630         { 0x17, 0x2f },
1631         { 0x18, 0xcf },
1632         { 0x19, 0x06 },
1633         { 0x1a, 0xf5 },
1634         { 0x1b, 0x00 },
1635         { 0x20, 0x18 },
1636         { 0x21, 0x80 },
1637         { 0x22, 0x80 },
1638         { 0x23, 0x00 },
1639         { 0x26, 0xa2 },
1640         { 0x27, 0xea },
1641         { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1642         { 0x29, 0x00 },
1643         { 0x2a, 0x10 },
1644         { 0x2b, 0x00 },
1645         { 0x2c, 0x88 },
1646         { 0x2d, 0x91 },
1647         { 0x2e, 0x80 },
1648         { 0x2f, 0x44 },
1649         { 0x60, 0x27 },
1650         { 0x61, 0x02 },
1651         { 0x62, 0x5f },
1652         { 0x63, 0xd5 },
1653         { 0x64, 0x57 },
1654         { 0x65, 0x83 },
1655         { 0x66, 0x55 },
1656         { 0x67, 0x92 },
1657         { 0x68, 0xcf },
1658         { 0x69, 0x76 },
1659         { 0x6a, 0x22 },
1660         { 0x6b, 0x00 },
1661         { 0x6c, 0x02 },
1662         { 0x6d, 0x44 },
1663         { 0x6e, 0x80 },
1664         { 0x6f, 0x1d },
1665         { 0x70, 0x8b },
1666         { 0x71, 0x00 },
1667         { 0x72, 0x14 },
1668         { 0x73, 0x54 },
1669         { 0x74, 0x00 },
1670         { 0x75, 0x8e },
1671         { 0x76, 0x00 },
1672         { 0x77, 0xff },
1673         { 0x78, 0x80 },
1674         { 0x79, 0x80 },
1675         { 0x7a, 0x80 },
1676         { 0x7b, 0xe2 },
1677         { 0x7c, 0x00 },
1678 };
1679
1680 /* 7640 and 7648. The defaults should be OK for most registers. */
1681 static const struct ov_i2c_regvals norm_7640[] = {
1682         { 0x12, 0x80 },
1683         { 0x12, 0x14 },
1684 };
1685
1686 static const struct ov_regvals init_519_ov7660[] = {
1687         { 0x5d, 0x03 }, /* Turn off suspend mode */
1688         { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1689         { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1690         { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1691         { 0xa3, 0x18 },
1692         { 0xa4, 0x04 },
1693         { 0xa5, 0x28 },
1694         { 0x37, 0x00 }, /* SetUsbInit */
1695         { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1696         /* Enable both fields, YUV Input, disable defect comp (why?) */
1697         { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1698         { 0x21, 0x38 },
1699         { 0x22, 0x1d },
1700         { 0x17, 0x50 }, /* undocumented */
1701         { 0x37, 0x00 }, /* undocumented */
1702         { 0x40, 0xff }, /* I2C timeout counter */
1703         { 0x46, 0x00 }, /* I2C clock prescaler */
1704 };
1705 static const struct ov_i2c_regvals norm_7660[] = {
1706         {OV7670_R12_COM7, OV7670_COM7_RESET},
1707         {OV7670_R11_CLKRC, 0x81},
1708         {0x92, 0x00},                   /* DM_LNL */
1709         {0x93, 0x00},                   /* DM_LNH */
1710         {0x9d, 0x4c},                   /* BD50ST */
1711         {0x9e, 0x3f},                   /* BD60ST */
1712         {OV7670_R3B_COM11, 0x02},
1713         {OV7670_R13_COM8, 0xf5},
1714         {OV7670_R10_AECH, 0x00},
1715         {OV7670_R00_GAIN, 0x00},
1716         {OV7670_R01_BLUE, 0x7c},
1717         {OV7670_R02_RED, 0x9d},
1718         {OV7670_R12_COM7, 0x00},
1719         {OV7670_R04_COM1, 00},
1720         {OV7670_R18_HSTOP, 0x01},
1721         {OV7670_R17_HSTART, 0x13},
1722         {OV7670_R32_HREF, 0x92},
1723         {OV7670_R19_VSTART, 0x02},
1724         {OV7670_R1A_VSTOP, 0x7a},
1725         {OV7670_R03_VREF, 0x00},
1726         {OV7670_R0E_COM5, 0x04},
1727         {OV7670_R0F_COM6, 0x62},
1728         {OV7670_R15_COM10, 0x00},
1729         {0x16, 0x02},                   /* RSVD */
1730         {0x1b, 0x00},                   /* PSHFT */
1731         {OV7670_R1E_MVFP, 0x01},
1732         {0x29, 0x3c},                   /* RSVD */
1733         {0x33, 0x00},                   /* CHLF */
1734         {0x34, 0x07},                   /* ARBLM */
1735         {0x35, 0x84},                   /* RSVD */
1736         {0x36, 0x00},                   /* RSVD */
1737         {0x37, 0x04},                   /* ADC */
1738         {0x39, 0x43},                   /* OFON */
1739         {OV7670_R3A_TSLB, 0x00},
1740         {OV7670_R3C_COM12, 0x6c},
1741         {OV7670_R3D_COM13, 0x98},
1742         {OV7670_R3F_EDGE, 0x23},
1743         {OV7670_R40_COM15, 0xc1},
1744         {OV7670_R41_COM16, 0x22},
1745         {0x6b, 0x0a},                   /* DBLV */
1746         {0xa1, 0x08},                   /* RSVD */
1747         {0x69, 0x80},                   /* HV */
1748         {0x43, 0xf0},                   /* RSVD.. */
1749         {0x44, 0x10},
1750         {0x45, 0x78},
1751         {0x46, 0xa8},
1752         {0x47, 0x60},
1753         {0x48, 0x80},
1754         {0x59, 0xba},
1755         {0x5a, 0x9a},
1756         {0x5b, 0x22},
1757         {0x5c, 0xb9},
1758         {0x5d, 0x9b},
1759         {0x5e, 0x10},
1760         {0x5f, 0xe0},
1761         {0x60, 0x85},
1762         {0x61, 0x60},
1763         {0x9f, 0x9d},                   /* RSVD */
1764         {0xa0, 0xa0},                   /* DSPC2 */
1765         {0x4f, 0x60},                   /* matrix */
1766         {0x50, 0x64},
1767         {0x51, 0x04},
1768         {0x52, 0x18},
1769         {0x53, 0x3c},
1770         {0x54, 0x54},
1771         {0x55, 0x40},
1772         {0x56, 0x40},
1773         {0x57, 0x40},
1774         {0x58, 0x0d},                   /* matrix sign */
1775         {0x8b, 0xcc},                   /* RSVD */
1776         {0x8c, 0xcc},
1777         {0x8d, 0xcf},
1778         {0x6c, 0x40},                   /* gamma curve */
1779         {0x6d, 0xe0},
1780         {0x6e, 0xa0},
1781         {0x6f, 0x80},
1782         {0x70, 0x70},
1783         {0x71, 0x80},
1784         {0x72, 0x60},
1785         {0x73, 0x60},
1786         {0x74, 0x50},
1787         {0x75, 0x40},
1788         {0x76, 0x38},
1789         {0x77, 0x3c},
1790         {0x78, 0x32},
1791         {0x79, 0x1a},
1792         {0x7a, 0x28},
1793         {0x7b, 0x24},
1794         {0x7c, 0x04},                   /* gamma curve */
1795         {0x7d, 0x12},
1796         {0x7e, 0x26},
1797         {0x7f, 0x46},
1798         {0x80, 0x54},
1799         {0x81, 0x64},
1800         {0x82, 0x70},
1801         {0x83, 0x7c},
1802         {0x84, 0x86},
1803         {0x85, 0x8e},
1804         {0x86, 0x9c},
1805         {0x87, 0xab},
1806         {0x88, 0xc4},
1807         {0x89, 0xd1},
1808         {0x8a, 0xe5},
1809         {OV7670_R14_COM9, 0x1e},
1810         {OV7670_R24_AEW, 0x80},
1811         {OV7670_R25_AEB, 0x72},
1812         {OV7670_R26_VPT, 0xb3},
1813         {0x62, 0x80},                   /* LCC1 */
1814         {0x63, 0x80},                   /* LCC2 */
1815         {0x64, 0x06},                   /* LCC3 */
1816         {0x65, 0x00},                   /* LCC4 */
1817         {0x66, 0x01},                   /* LCC5 */
1818         {0x94, 0x0e},                   /* RSVD.. */
1819         {0x95, 0x14},
1820         {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1821                         | OV7670_COM8_AECSTEP
1822                         | OV7670_COM8_BFILT
1823                         | 0x10
1824                         | OV7670_COM8_AGC
1825                         | OV7670_COM8_AWB
1826                         | OV7670_COM8_AEC},
1827         {0xa1, 0xc8}
1828 };
1829 static const struct ov_i2c_regvals norm_9600[] = {
1830         {0x12, 0x80},
1831         {0x0c, 0x28},
1832         {0x11, 0x80},
1833         {0x13, 0xb5},
1834         {0x14, 0x3e},
1835         {0x1b, 0x04},
1836         {0x24, 0xb0},
1837         {0x25, 0x90},
1838         {0x26, 0x94},
1839         {0x35, 0x90},
1840         {0x37, 0x07},
1841         {0x38, 0x08},
1842         {0x01, 0x8e},
1843         {0x02, 0x85}
1844 };
1845
1846 /* 7670. Defaults taken from OmniVision provided data,
1847 *  as provided by Jonathan Corbet of OLPC               */
1848 static const struct ov_i2c_regvals norm_7670[] = {
1849         { OV7670_R12_COM7, OV7670_COM7_RESET },
1850         { OV7670_R3A_TSLB, 0x04 },              /* OV */
1851         { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1852         { OV7670_R11_CLKRC, 0x01 },
1853 /*
1854  * Set the hardware window.  These values from OV don't entirely
1855  * make sense - hstop is less than hstart.  But they work...
1856  */
1857         { OV7670_R17_HSTART, 0x13 },
1858         { OV7670_R18_HSTOP, 0x01 },
1859         { OV7670_R32_HREF, 0xb6 },
1860         { OV7670_R19_VSTART, 0x02 },
1861         { OV7670_R1A_VSTOP, 0x7a },
1862         { OV7670_R03_VREF, 0x0a },
1863
1864         { OV7670_R0C_COM3, 0x00 },
1865         { OV7670_R3E_COM14, 0x00 },
1866 /* Mystery scaling numbers */
1867         { 0x70, 0x3a },
1868         { 0x71, 0x35 },
1869         { 0x72, 0x11 },
1870         { 0x73, 0xf0 },
1871         { 0xa2, 0x02 },
1872 /*      { OV7670_R15_COM10, 0x0 }, */
1873
1874 /* Gamma curve values */
1875         { 0x7a, 0x20 },
1876         { 0x7b, 0x10 },
1877         { 0x7c, 0x1e },
1878         { 0x7d, 0x35 },
1879         { 0x7e, 0x5a },
1880         { 0x7f, 0x69 },
1881         { 0x80, 0x76 },
1882         { 0x81, 0x80 },
1883         { 0x82, 0x88 },
1884         { 0x83, 0x8f },
1885         { 0x84, 0x96 },
1886         { 0x85, 0xa3 },
1887         { 0x86, 0xaf },
1888         { 0x87, 0xc4 },
1889         { 0x88, 0xd7 },
1890         { 0x89, 0xe8 },
1891
1892 /* AGC and AEC parameters.  Note we start by disabling those features,
1893    then turn them only after tweaking the values. */
1894         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1895                          | OV7670_COM8_AECSTEP
1896                          | OV7670_COM8_BFILT },
1897         { OV7670_R00_GAIN, 0x00 },
1898         { OV7670_R10_AECH, 0x00 },
1899         { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1900         { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1901         { OV7670_RA5_BD50MAX, 0x05 },
1902         { OV7670_RAB_BD60MAX, 0x07 },
1903         { OV7670_R24_AEW, 0x95 },
1904         { OV7670_R25_AEB, 0x33 },
1905         { OV7670_R26_VPT, 0xe3 },
1906         { OV7670_R9F_HAECC1, 0x78 },
1907         { OV7670_RA0_HAECC2, 0x68 },
1908         { 0xa1, 0x03 }, /* magic */
1909         { OV7670_RA6_HAECC3, 0xd8 },
1910         { OV7670_RA7_HAECC4, 0xd8 },
1911         { OV7670_RA8_HAECC5, 0xf0 },
1912         { OV7670_RA9_HAECC6, 0x90 },
1913         { OV7670_RAA_HAECC7, 0x94 },
1914         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1915                         | OV7670_COM8_AECSTEP
1916                         | OV7670_COM8_BFILT
1917                         | OV7670_COM8_AGC
1918                         | OV7670_COM8_AEC },
1919
1920 /* Almost all of these are magic "reserved" values.  */
1921         { OV7670_R0E_COM5, 0x61 },
1922         { OV7670_R0F_COM6, 0x4b },
1923         { 0x16, 0x02 },
1924         { OV7670_R1E_MVFP, 0x07 },
1925         { 0x21, 0x02 },
1926         { 0x22, 0x91 },
1927         { 0x29, 0x07 },
1928         { 0x33, 0x0b },
1929         { 0x35, 0x0b },
1930         { 0x37, 0x1d },
1931         { 0x38, 0x71 },
1932         { 0x39, 0x2a },
1933         { OV7670_R3C_COM12, 0x78 },
1934         { 0x4d, 0x40 },
1935         { 0x4e, 0x20 },
1936         { OV7670_R69_GFIX, 0x00 },
1937         { 0x6b, 0x4a },
1938         { 0x74, 0x10 },
1939         { 0x8d, 0x4f },
1940         { 0x8e, 0x00 },
1941         { 0x8f, 0x00 },
1942         { 0x90, 0x00 },
1943         { 0x91, 0x00 },
1944         { 0x96, 0x00 },
1945         { 0x9a, 0x00 },
1946         { 0xb0, 0x84 },
1947         { 0xb1, 0x0c },
1948         { 0xb2, 0x0e },
1949         { 0xb3, 0x82 },
1950         { 0xb8, 0x0a },
1951
1952 /* More reserved magic, some of which tweaks white balance */
1953         { 0x43, 0x0a },
1954         { 0x44, 0xf0 },
1955         { 0x45, 0x34 },
1956         { 0x46, 0x58 },
1957         { 0x47, 0x28 },
1958         { 0x48, 0x3a },
1959         { 0x59, 0x88 },
1960         { 0x5a, 0x88 },
1961         { 0x5b, 0x44 },
1962         { 0x5c, 0x67 },
1963         { 0x5d, 0x49 },
1964         { 0x5e, 0x0e },
1965         { 0x6c, 0x0a },
1966         { 0x6d, 0x55 },
1967         { 0x6e, 0x11 },
1968         { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1969         { 0x6a, 0x40 },
1970         { OV7670_R01_BLUE, 0x40 },
1971         { OV7670_R02_RED, 0x60 },
1972         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1973                         | OV7670_COM8_AECSTEP
1974                         | OV7670_COM8_BFILT
1975                         | OV7670_COM8_AGC
1976                         | OV7670_COM8_AEC
1977                         | OV7670_COM8_AWB },
1978
1979 /* Matrix coefficients */
1980         { 0x4f, 0x80 },
1981         { 0x50, 0x80 },
1982         { 0x51, 0x00 },
1983         { 0x52, 0x22 },
1984         { 0x53, 0x5e },
1985         { 0x54, 0x80 },
1986         { 0x58, 0x9e },
1987
1988         { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1989         { OV7670_R3F_EDGE, 0x00 },
1990         { 0x75, 0x05 },
1991         { 0x76, 0xe1 },
1992         { 0x4c, 0x00 },
1993         { 0x77, 0x01 },
1994         { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1995                           | OV7670_COM13_UVSAT
1996                           | 2},         /* was 3 */
1997         { 0x4b, 0x09 },
1998         { 0xc9, 0x60 },
1999         { OV7670_R41_COM16, 0x38 },
2000         { 0x56, 0x40 },
2001
2002         { 0x34, 0x11 },
2003         { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
2004         { 0xa4, 0x88 },
2005         { 0x96, 0x00 },
2006         { 0x97, 0x30 },
2007         { 0x98, 0x20 },
2008         { 0x99, 0x30 },
2009         { 0x9a, 0x84 },
2010         { 0x9b, 0x29 },
2011         { 0x9c, 0x03 },
2012         { 0x9d, 0x4c },
2013         { 0x9e, 0x3f },
2014         { 0x78, 0x04 },
2015
2016 /* Extra-weird stuff.  Some sort of multiplexor register */
2017         { 0x79, 0x01 },
2018         { 0xc8, 0xf0 },
2019         { 0x79, 0x0f },
2020         { 0xc8, 0x00 },
2021         { 0x79, 0x10 },
2022         { 0xc8, 0x7e },
2023         { 0x79, 0x0a },
2024         { 0xc8, 0x80 },
2025         { 0x79, 0x0b },
2026         { 0xc8, 0x01 },
2027         { 0x79, 0x0c },
2028         { 0xc8, 0x0f },
2029         { 0x79, 0x0d },
2030         { 0xc8, 0x20 },
2031         { 0x79, 0x09 },
2032         { 0xc8, 0x80 },
2033         { 0x79, 0x02 },
2034         { 0xc8, 0xc0 },
2035         { 0x79, 0x03 },
2036         { 0xc8, 0x40 },
2037         { 0x79, 0x05 },
2038         { 0xc8, 0x30 },
2039         { 0x79, 0x26 },
2040 };
2041
2042 static const struct ov_i2c_regvals norm_8610[] = {
2043         { 0x12, 0x80 },
2044         { 0x00, 0x00 },
2045         { 0x01, 0x80 },
2046         { 0x02, 0x80 },
2047         { 0x03, 0xc0 },
2048         { 0x04, 0x30 },
2049         { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
2050         { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
2051         { 0x0a, 0x86 },
2052         { 0x0b, 0xb0 },
2053         { 0x0c, 0x20 },
2054         { 0x0d, 0x20 },
2055         { 0x11, 0x01 },
2056         { 0x12, 0x25 },
2057         { 0x13, 0x01 },
2058         { 0x14, 0x04 },
2059         { 0x15, 0x01 }, /* Lin and Win think different about UV order */
2060         { 0x16, 0x03 },
2061         { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
2062         { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
2063         { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
2064         { 0x1a, 0xf5 },
2065         { 0x1b, 0x00 },
2066         { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
2067         { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
2068         { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
2069         { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
2070         { 0x26, 0xa2 },
2071         { 0x27, 0xea },
2072         { 0x28, 0x00 },
2073         { 0x29, 0x00 },
2074         { 0x2a, 0x80 },
2075         { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
2076         { 0x2c, 0xac },
2077         { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
2078         { 0x2e, 0x80 },
2079         { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
2080         { 0x4c, 0x00 },
2081         { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
2082         { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
2083         { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
2084         { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
2085         { 0x63, 0xff },
2086         { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
2087                          * maybe thats wrong */
2088         { 0x65, 0x00 },
2089         { 0x66, 0x55 },
2090         { 0x67, 0xb0 },
2091         { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
2092         { 0x69, 0x02 },
2093         { 0x6a, 0x22 },
2094         { 0x6b, 0x00 },
2095         { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
2096                          * deleting bit7 colors the first images red */
2097         { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
2098         { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
2099         { 0x6f, 0x01 },
2100         { 0x70, 0x8b },
2101         { 0x71, 0x00 },
2102         { 0x72, 0x14 },
2103         { 0x73, 0x54 },
2104         { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2105         { 0x75, 0x0e },
2106         { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2107         { 0x77, 0xff },
2108         { 0x78, 0x80 },
2109         { 0x79, 0x80 },
2110         { 0x7a, 0x80 },
2111         { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2112         { 0x7c, 0x00 },
2113         { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2114         { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2115         { 0x7f, 0xfb },
2116         { 0x80, 0x28 },
2117         { 0x81, 0x00 },
2118         { 0x82, 0x23 },
2119         { 0x83, 0x0b },
2120         { 0x84, 0x00 },
2121         { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2122         { 0x86, 0xc9 },
2123         { 0x87, 0x00 },
2124         { 0x88, 0x00 },
2125         { 0x89, 0x01 },
2126         { 0x12, 0x20 },
2127         { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2128 };
2129
2130 static unsigned char ov7670_abs_to_sm(unsigned char v)
2131 {
2132         if (v > 127)
2133                 return v & 0x7f;
2134         return (128 - v) | 0x80;
2135 }
2136
2137 /* Write a OV519 register */
2138 static void reg_w(struct sd *sd, u16 index, u16 value)
2139 {
2140         int ret, req = 0;
2141
2142         if (sd->gspca_dev.usb_err < 0)
2143                 return;
2144
2145         switch (sd->bridge) {
2146         case BRIDGE_OV511:
2147         case BRIDGE_OV511PLUS:
2148                 req = 2;
2149                 break;
2150         case BRIDGE_OVFX2:
2151                 req = 0x0a;
2152                 /* fall through */
2153         case BRIDGE_W9968CF:
2154                 PDEBUG(D_USBO, "SET %02x %04x %04x",
2155                                 req, value, index);
2156                 ret = usb_control_msg(sd->gspca_dev.dev,
2157                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2158                         req,
2159                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2160                         value, index, NULL, 0, 500);
2161                 goto leave;
2162         default:
2163                 req = 1;
2164         }
2165
2166         PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2167                         req, index, value);
2168         sd->gspca_dev.usb_buf[0] = value;
2169         ret = usb_control_msg(sd->gspca_dev.dev,
2170                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2171                         req,
2172                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2173                         0, index,
2174                         sd->gspca_dev.usb_buf, 1, 500);
2175 leave:
2176         if (ret < 0) {
2177                 pr_err("reg_w %02x failed %d\n", index, ret);
2178                 sd->gspca_dev.usb_err = ret;
2179                 return;
2180         }
2181 }
2182
2183 /* Read from a OV519 register, note not valid for the w9968cf!! */
2184 /* returns: negative is error, pos or zero is data */
2185 static int reg_r(struct sd *sd, u16 index)
2186 {
2187         int ret;
2188         int req;
2189
2190         if (sd->gspca_dev.usb_err < 0)
2191                 return -1;
2192
2193         switch (sd->bridge) {
2194         case BRIDGE_OV511:
2195         case BRIDGE_OV511PLUS:
2196                 req = 3;
2197                 break;
2198         case BRIDGE_OVFX2:
2199                 req = 0x0b;
2200                 break;
2201         default:
2202                 req = 1;
2203         }
2204
2205         ret = usb_control_msg(sd->gspca_dev.dev,
2206                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2207                         req,
2208                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2209                         0, index, sd->gspca_dev.usb_buf, 1, 500);
2210
2211         if (ret >= 0) {
2212                 ret = sd->gspca_dev.usb_buf[0];
2213                 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2214                         req, index, ret);
2215         } else {
2216                 pr_err("reg_r %02x failed %d\n", index, ret);
2217                 sd->gspca_dev.usb_err = ret;
2218         }
2219
2220         return ret;
2221 }
2222
2223 /* Read 8 values from a OV519 register */
2224 static int reg_r8(struct sd *sd,
2225                   u16 index)
2226 {
2227         int ret;
2228
2229         if (sd->gspca_dev.usb_err < 0)
2230                 return -1;
2231
2232         ret = usb_control_msg(sd->gspca_dev.dev,
2233                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2234                         1,                      /* REQ_IO */
2235                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2236                         0, index, sd->gspca_dev.usb_buf, 8, 500);
2237
2238         if (ret >= 0) {
2239                 ret = sd->gspca_dev.usb_buf[0];
2240         } else {
2241                 pr_err("reg_r8 %02x failed %d\n", index, ret);
2242                 sd->gspca_dev.usb_err = ret;
2243         }
2244
2245         return ret;
2246 }
2247
2248 /*
2249  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2250  * the same position as 1's in "mask" are cleared and set to "value". Bits
2251  * that are in the same position as 0's in "mask" are preserved, regardless
2252  * of their respective state in "value".
2253  */
2254 static void reg_w_mask(struct sd *sd,
2255                         u16 index,
2256                         u8 value,
2257                         u8 mask)
2258 {
2259         int ret;
2260         u8 oldval;
2261
2262         if (mask != 0xff) {
2263                 value &= mask;                  /* Enforce mask on value */
2264                 ret = reg_r(sd, index);
2265                 if (ret < 0)
2266                         return;
2267
2268                 oldval = ret & ~mask;           /* Clear the masked bits */
2269                 value |= oldval;                /* Set the desired bits */
2270         }
2271         reg_w(sd, index, value);
2272 }
2273
2274 /*
2275  * Writes multiple (n) byte value to a single register. Only valid with certain
2276  * registers (0x30 and 0xc4 - 0xce).
2277  */
2278 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2279 {
2280         int ret;
2281
2282         if (sd->gspca_dev.usb_err < 0)
2283                 return;
2284
2285         *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2286
2287         ret = usb_control_msg(sd->gspca_dev.dev,
2288                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2289                         1 /* REG_IO */,
2290                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2291                         0, index,
2292                         sd->gspca_dev.usb_buf, n, 500);
2293         if (ret < 0) {
2294                 pr_err("reg_w32 %02x failed %d\n", index, ret);
2295                 sd->gspca_dev.usb_err = ret;
2296         }
2297 }
2298
2299 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2300 {
2301         int rc, retries;
2302
2303         PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2304
2305         /* Three byte write cycle */
2306         for (retries = 6; ; ) {
2307                 /* Select camera register */
2308                 reg_w(sd, R51x_I2C_SADDR_3, reg);
2309
2310                 /* Write "value" to I2C data port of OV511 */
2311                 reg_w(sd, R51x_I2C_DATA, value);
2312
2313                 /* Initiate 3-byte write cycle */
2314                 reg_w(sd, R511_I2C_CTL, 0x01);
2315
2316                 do {
2317                         rc = reg_r(sd, R511_I2C_CTL);
2318                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2319
2320                 if (rc < 0)
2321                         return;
2322
2323                 if ((rc & 2) == 0) /* Ack? */
2324                         break;
2325                 if (--retries < 0) {
2326                         PDEBUG(D_USBO, "i2c write retries exhausted");
2327                         return;
2328                 }
2329         }
2330 }
2331
2332 static int ov511_i2c_r(struct sd *sd, u8 reg)
2333 {
2334         int rc, value, retries;
2335
2336         /* Two byte write cycle */
2337         for (retries = 6; ; ) {
2338                 /* Select camera register */
2339                 reg_w(sd, R51x_I2C_SADDR_2, reg);
2340
2341                 /* Initiate 2-byte write cycle */
2342                 reg_w(sd, R511_I2C_CTL, 0x03);
2343
2344                 do {
2345                         rc = reg_r(sd, R511_I2C_CTL);
2346                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2347
2348                 if (rc < 0)
2349                         return rc;
2350
2351                 if ((rc & 2) == 0) /* Ack? */
2352                         break;
2353
2354                 /* I2C abort */
2355                 reg_w(sd, R511_I2C_CTL, 0x10);
2356
2357                 if (--retries < 0) {
2358                         PDEBUG(D_USBI, "i2c write retries exhausted");
2359                         return -1;
2360                 }
2361         }
2362
2363         /* Two byte read cycle */
2364         for (retries = 6; ; ) {
2365                 /* Initiate 2-byte read cycle */
2366                 reg_w(sd, R511_I2C_CTL, 0x05);
2367
2368                 do {
2369                         rc = reg_r(sd, R511_I2C_CTL);
2370                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2371
2372                 if (rc < 0)
2373                         return rc;
2374
2375                 if ((rc & 2) == 0) /* Ack? */
2376                         break;
2377
2378                 /* I2C abort */
2379                 reg_w(sd, R511_I2C_CTL, 0x10);
2380
2381                 if (--retries < 0) {
2382                         PDEBUG(D_USBI, "i2c read retries exhausted");
2383                         return -1;
2384                 }
2385         }
2386
2387         value = reg_r(sd, R51x_I2C_DATA);
2388
2389         PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2390
2391         /* This is needed to make i2c_w() work */
2392         reg_w(sd, R511_I2C_CTL, 0x05);
2393
2394         return value;
2395 }
2396
2397 /*
2398  * The OV518 I2C I/O procedure is different, hence, this function.
2399  * This is normally only called from i2c_w(). Note that this function
2400  * always succeeds regardless of whether the sensor is present and working.
2401  */
2402 static void ov518_i2c_w(struct sd *sd,
2403                 u8 reg,
2404                 u8 value)
2405 {
2406         PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2407
2408         /* Select camera register */
2409         reg_w(sd, R51x_I2C_SADDR_3, reg);
2410
2411         /* Write "value" to I2C data port of OV511 */
2412         reg_w(sd, R51x_I2C_DATA, value);
2413
2414         /* Initiate 3-byte write cycle */
2415         reg_w(sd, R518_I2C_CTL, 0x01);
2416
2417         /* wait for write complete */
2418         msleep(4);
2419         reg_r8(sd, R518_I2C_CTL);
2420 }
2421
2422 /*
2423  * returns: negative is error, pos or zero is data
2424  *
2425  * The OV518 I2C I/O procedure is different, hence, this function.
2426  * This is normally only called from i2c_r(). Note that this function
2427  * always succeeds regardless of whether the sensor is present and working.
2428  */
2429 static int ov518_i2c_r(struct sd *sd, u8 reg)
2430 {
2431         int value;
2432
2433         /* Select camera register */
2434         reg_w(sd, R51x_I2C_SADDR_2, reg);
2435
2436         /* Initiate 2-byte write cycle */
2437         reg_w(sd, R518_I2C_CTL, 0x03);
2438         reg_r8(sd, R518_I2C_CTL);
2439
2440         /* Initiate 2-byte read cycle */
2441         reg_w(sd, R518_I2C_CTL, 0x05);
2442         reg_r8(sd, R518_I2C_CTL);
2443
2444         value = reg_r(sd, R51x_I2C_DATA);
2445         PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2446         return value;
2447 }
2448
2449 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2450 {
2451         int ret;
2452
2453         if (sd->gspca_dev.usb_err < 0)
2454                 return;
2455
2456         ret = usb_control_msg(sd->gspca_dev.dev,
2457                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2458                         0x02,
2459                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2460                         (u16) value, (u16) reg, NULL, 0, 500);
2461
2462         if (ret < 0) {
2463                 pr_err("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2464                 sd->gspca_dev.usb_err = ret;
2465         }
2466
2467         PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2468 }
2469
2470 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2471 {
2472         int ret;
2473
2474         if (sd->gspca_dev.usb_err < 0)
2475                 return -1;
2476
2477         ret = usb_control_msg(sd->gspca_dev.dev,
2478                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2479                         0x03,
2480                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2481                         0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2482
2483         if (ret >= 0) {
2484                 ret = sd->gspca_dev.usb_buf[0];
2485                 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2486         } else {
2487                 pr_err("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2488                 sd->gspca_dev.usb_err = ret;
2489         }
2490
2491         return ret;
2492 }
2493
2494 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2495 {
2496         if (sd->sensor_reg_cache[reg] == value)
2497                 return;
2498
2499         switch (sd->bridge) {
2500         case BRIDGE_OV511:
2501         case BRIDGE_OV511PLUS:
2502                 ov511_i2c_w(sd, reg, value);
2503                 break;
2504         case BRIDGE_OV518:
2505         case BRIDGE_OV518PLUS:
2506         case BRIDGE_OV519:
2507                 ov518_i2c_w(sd, reg, value);
2508                 break;
2509         case BRIDGE_OVFX2:
2510                 ovfx2_i2c_w(sd, reg, value);
2511                 break;
2512         case BRIDGE_W9968CF:
2513                 w9968cf_i2c_w(sd, reg, value);
2514                 break;
2515         }
2516
2517         if (sd->gspca_dev.usb_err >= 0) {
2518                 /* Up on sensor reset empty the register cache */
2519                 if (reg == 0x12 && (value & 0x80))
2520                         memset(sd->sensor_reg_cache, -1,
2521                                 sizeof(sd->sensor_reg_cache));
2522                 else
2523                         sd->sensor_reg_cache[reg] = value;
2524         }
2525 }
2526
2527 static int i2c_r(struct sd *sd, u8 reg)
2528 {
2529         int ret = -1;
2530
2531         if (sd->sensor_reg_cache[reg] != -1)
2532                 return sd->sensor_reg_cache[reg];
2533
2534         switch (sd->bridge) {
2535         case BRIDGE_OV511:
2536         case BRIDGE_OV511PLUS:
2537                 ret = ov511_i2c_r(sd, reg);
2538                 break;
2539         case BRIDGE_OV518:
2540         case BRIDGE_OV518PLUS:
2541         case BRIDGE_OV519:
2542                 ret = ov518_i2c_r(sd, reg);
2543                 break;
2544         case BRIDGE_OVFX2:
2545                 ret = ovfx2_i2c_r(sd, reg);
2546                 break;
2547         case BRIDGE_W9968CF:
2548                 ret = w9968cf_i2c_r(sd, reg);
2549                 break;
2550         }
2551
2552         if (ret >= 0)
2553                 sd->sensor_reg_cache[reg] = ret;
2554
2555         return ret;
2556 }
2557
2558 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2559  * the same position as 1's in "mask" are cleared and set to "value". Bits
2560  * that are in the same position as 0's in "mask" are preserved, regardless
2561  * of their respective state in "value".
2562  */
2563 static void i2c_w_mask(struct sd *sd,
2564                         u8 reg,
2565                         u8 value,
2566                         u8 mask)
2567 {
2568         int rc;
2569         u8 oldval;
2570
2571         value &= mask;                  /* Enforce mask on value */
2572         rc = i2c_r(sd, reg);
2573         if (rc < 0)
2574                 return;
2575         oldval = rc & ~mask;            /* Clear the masked bits */
2576         value |= oldval;                /* Set the desired bits */
2577         i2c_w(sd, reg, value);
2578 }
2579
2580 /* Temporarily stops OV511 from functioning. Must do this before changing
2581  * registers while the camera is streaming */
2582 static inline void ov51x_stop(struct sd *sd)
2583 {
2584         PDEBUG(D_STREAM, "stopping");
2585         sd->stopped = 1;
2586         switch (sd->bridge) {
2587         case BRIDGE_OV511:
2588         case BRIDGE_OV511PLUS:
2589                 reg_w(sd, R51x_SYS_RESET, 0x3d);
2590                 break;
2591         case BRIDGE_OV518:
2592         case BRIDGE_OV518PLUS:
2593                 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2594                 break;
2595         case BRIDGE_OV519:
2596                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2597                 reg_w(sd, OV519_R51_RESET1, 0x00);
2598                 reg_w(sd, 0x22, 0x00);          /* FRAR */
2599                 break;
2600         case BRIDGE_OVFX2:
2601                 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2602                 break;
2603         case BRIDGE_W9968CF:
2604                 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2605                 break;
2606         }
2607 }
2608
2609 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2610  * actually stopped (for performance). */
2611 static inline void ov51x_restart(struct sd *sd)
2612 {
2613         PDEBUG(D_STREAM, "restarting");
2614         if (!sd->stopped)
2615                 return;
2616         sd->stopped = 0;
2617
2618         /* Reinitialize the stream */
2619         switch (sd->bridge) {
2620         case BRIDGE_OV511:
2621         case BRIDGE_OV511PLUS:
2622                 reg_w(sd, R51x_SYS_RESET, 0x00);
2623                 break;
2624         case BRIDGE_OV518:
2625         case BRIDGE_OV518PLUS:
2626                 reg_w(sd, 0x2f, 0x80);
2627                 reg_w(sd, R51x_SYS_RESET, 0x00);
2628                 break;
2629         case BRIDGE_OV519:
2630                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2631                 reg_w(sd, OV519_R51_RESET1, 0x00);
2632                 reg_w(sd, 0x22, 0x1d);          /* FRAR */
2633                 break;
2634         case BRIDGE_OVFX2:
2635                 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2636                 break;
2637         case BRIDGE_W9968CF:
2638                 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2639                 break;
2640         }
2641 }
2642
2643 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2644
2645 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2646  * is synchronized. Returns <0 on failure.
2647  */
2648 static int init_ov_sensor(struct sd *sd, u8 slave)
2649 {
2650         int i;
2651
2652         ov51x_set_slave_ids(sd, slave);
2653
2654         /* Reset the sensor */
2655         i2c_w(sd, 0x12, 0x80);
2656
2657         /* Wait for it to initialize */
2658         msleep(150);
2659
2660         for (i = 0; i < i2c_detect_tries; i++) {
2661                 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2662                     i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2663                         PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2664                         return 0;
2665                 }
2666
2667                 /* Reset the sensor */
2668                 i2c_w(sd, 0x12, 0x80);
2669
2670                 /* Wait for it to initialize */
2671                 msleep(150);
2672
2673                 /* Dummy read to sync I2C */
2674                 if (i2c_r(sd, 0x00) < 0)
2675                         return -1;
2676         }
2677         return -1;
2678 }
2679
2680 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2681  * and the read slave will be set to (slave + 1).
2682  * This should not be called from outside the i2c I/O functions.
2683  * Sets I2C read and write slave IDs. Returns <0 for error
2684  */
2685 static void ov51x_set_slave_ids(struct sd *sd,
2686                                 u8 slave)
2687 {
2688         switch (sd->bridge) {
2689         case BRIDGE_OVFX2:
2690                 reg_w(sd, OVFX2_I2C_ADDR, slave);
2691                 return;
2692         case BRIDGE_W9968CF:
2693                 sd->sensor_addr = slave;
2694                 return;
2695         }
2696
2697         reg_w(sd, R51x_I2C_W_SID, slave);
2698         reg_w(sd, R51x_I2C_R_SID, slave + 1);
2699 }
2700
2701 static void write_regvals(struct sd *sd,
2702                          const struct ov_regvals *regvals,
2703                          int n)
2704 {
2705         while (--n >= 0) {
2706                 reg_w(sd, regvals->reg, regvals->val);
2707                 regvals++;
2708         }
2709 }
2710
2711 static void write_i2c_regvals(struct sd *sd,
2712                         const struct ov_i2c_regvals *regvals,
2713                         int n)
2714 {
2715         while (--n >= 0) {
2716                 i2c_w(sd, regvals->reg, regvals->val);
2717                 regvals++;
2718         }
2719 }
2720
2721 /****************************************************************************
2722  *
2723  * OV511 and sensor configuration
2724  *
2725  ***************************************************************************/
2726
2727 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2728 static void ov_hires_configure(struct sd *sd)
2729 {
2730         int high, low;
2731
2732         if (sd->bridge != BRIDGE_OVFX2) {
2733                 pr_err("error hires sensors only supported with ovfx2\n");
2734                 return;
2735         }
2736
2737         PDEBUG(D_PROBE, "starting ov hires configuration");
2738
2739         /* Detect sensor (sub)type */
2740         high = i2c_r(sd, 0x0a);
2741         low = i2c_r(sd, 0x0b);
2742         /* info("%x, %x", high, low); */
2743         switch (high) {
2744         case 0x96:
2745                 switch (low) {
2746                 case 0x40:
2747                         PDEBUG(D_PROBE, "Sensor is a OV2610");
2748                         sd->sensor = SEN_OV2610;
2749                         return;
2750                 case 0x41:
2751                         PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2752                         sd->sensor = SEN_OV2610AE;
2753                         return;
2754                 case 0xb1:
2755                         PDEBUG(D_PROBE, "Sensor is a OV9600");
2756                         sd->sensor = SEN_OV9600;
2757                         return;
2758                 }
2759                 break;
2760         case 0x36:
2761                 if ((low & 0x0f) == 0x00) {
2762                         PDEBUG(D_PROBE, "Sensor is a OV3610");
2763                         sd->sensor = SEN_OV3610;
2764                         return;
2765                 }
2766                 break;
2767         }
2768         pr_err("Error unknown sensor type: %02x%02x\n", high, low);
2769 }
2770
2771 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2772  * the same register settings as the OV8610, since they are very similar.
2773  */
2774 static void ov8xx0_configure(struct sd *sd)
2775 {
2776         int rc;
2777
2778         PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2779
2780         /* Detect sensor (sub)type */
2781         rc = i2c_r(sd, OV7610_REG_COM_I);
2782         if (rc < 0) {
2783                 PDEBUG(D_ERR, "Error detecting sensor type");
2784                 return;
2785         }
2786         if ((rc & 3) == 1)
2787                 sd->sensor = SEN_OV8610;
2788         else
2789                 pr_err("Unknown image sensor version: %d\n", rc & 3);
2790 }
2791
2792 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2793  * the same register settings as the OV7610, since they are very similar.
2794  */
2795 static void ov7xx0_configure(struct sd *sd)
2796 {
2797         int rc, high, low;
2798
2799         PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2800
2801         /* Detect sensor (sub)type */
2802         rc = i2c_r(sd, OV7610_REG_COM_I);
2803
2804         /* add OV7670 here
2805          * it appears to be wrongly detected as a 7610 by default */
2806         if (rc < 0) {
2807                 PDEBUG(D_ERR, "Error detecting sensor type");
2808                 return;
2809         }
2810         if ((rc & 3) == 3) {
2811                 /* quick hack to make OV7670s work */
2812                 high = i2c_r(sd, 0x0a);
2813                 low = i2c_r(sd, 0x0b);
2814                 /* info("%x, %x", high, low); */
2815                 if (high == 0x76 && (low & 0xf0) == 0x70) {
2816                         PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2817                         sd->sensor = SEN_OV7670;
2818                 } else {
2819                         PDEBUG(D_PROBE, "Sensor is an OV7610");
2820                         sd->sensor = SEN_OV7610;
2821                 }
2822         } else if ((rc & 3) == 1) {
2823                 /* I don't know what's different about the 76BE yet. */
2824                 if (i2c_r(sd, 0x15) & 1) {
2825                         PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2826                         sd->sensor = SEN_OV7620AE;
2827                 } else {
2828                         PDEBUG(D_PROBE, "Sensor is an OV76BE");
2829                         sd->sensor = SEN_OV76BE;
2830                 }
2831         } else if ((rc & 3) == 0) {
2832                 /* try to read product id registers */
2833                 high = i2c_r(sd, 0x0a);
2834                 if (high < 0) {
2835                         PDEBUG(D_ERR, "Error detecting camera chip PID");
2836                         return;
2837                 }
2838                 low = i2c_r(sd, 0x0b);
2839                 if (low < 0) {
2840                         PDEBUG(D_ERR, "Error detecting camera chip VER");
2841                         return;
2842                 }
2843                 if (high == 0x76) {
2844                         switch (low) {
2845                         case 0x30:
2846                                 pr_err("Sensor is an OV7630/OV7635\n");
2847                                 pr_err("7630 is not supported by this driver\n");
2848                                 return;
2849                         case 0x40:
2850                                 PDEBUG(D_PROBE, "Sensor is an OV7645");
2851                                 sd->sensor = SEN_OV7640; /* FIXME */
2852                                 break;
2853                         case 0x45:
2854                                 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2855                                 sd->sensor = SEN_OV7640; /* FIXME */
2856                                 break;
2857                         case 0x48:
2858                                 PDEBUG(D_PROBE, "Sensor is an OV7648");
2859                                 sd->sensor = SEN_OV7648;
2860                                 break;
2861                         case 0x60:
2862                                 PDEBUG(D_PROBE, "Sensor is a OV7660");
2863                                 sd->sensor = SEN_OV7660;
2864                                 break;
2865                         default:
2866                                 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2867                                 return;
2868                         }
2869                 } else {
2870                         PDEBUG(D_PROBE, "Sensor is an OV7620");
2871                         sd->sensor = SEN_OV7620;
2872                 }
2873         } else {
2874                 pr_err("Unknown image sensor version: %d\n", rc & 3);
2875         }
2876 }
2877
2878 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2879 static void ov6xx0_configure(struct sd *sd)
2880 {
2881         int rc;
2882         PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2883
2884         /* Detect sensor (sub)type */
2885         rc = i2c_r(sd, OV7610_REG_COM_I);
2886         if (rc < 0) {
2887                 PDEBUG(D_ERR, "Error detecting sensor type");
2888                 return;
2889         }
2890
2891         /* Ugh. The first two bits are the version bits, but
2892          * the entire register value must be used. I guess OVT
2893          * underestimated how many variants they would make. */
2894         switch (rc) {
2895         case 0x00:
2896                 sd->sensor = SEN_OV6630;
2897                 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2898                 break;
2899         case 0x01:
2900                 sd->sensor = SEN_OV6620;
2901                 PDEBUG(D_PROBE, "Sensor is an OV6620");
2902                 break;
2903         case 0x02:
2904                 sd->sensor = SEN_OV6630;
2905                 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2906                 break;
2907         case 0x03:
2908                 sd->sensor = SEN_OV66308AF;
2909                 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2910                 break;
2911         case 0x90:
2912                 sd->sensor = SEN_OV6630;
2913                 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2914                 break;
2915         default:
2916                 pr_err("FATAL: Unknown sensor version: 0x%02x\n", rc);
2917                 return;
2918         }
2919
2920         /* Set sensor-specific vars */
2921         sd->sif = 1;
2922 }
2923
2924 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2925 static void ov51x_led_control(struct sd *sd, int on)
2926 {
2927         if (sd->invert_led)
2928                 on = !on;
2929
2930         switch (sd->bridge) {
2931         /* OV511 has no LED control */
2932         case BRIDGE_OV511PLUS:
2933                 reg_w(sd, R511_SYS_LED_CTL, on);
2934                 break;
2935         case BRIDGE_OV518:
2936         case BRIDGE_OV518PLUS:
2937                 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2938                 break;
2939         case BRIDGE_OV519:
2940                 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2941                 break;
2942         }
2943 }
2944
2945 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2946 {
2947         struct sd *sd = (struct sd *) gspca_dev;
2948
2949         if (!sd->snapshot_needs_reset)
2950                 return;
2951
2952         /* Note it is important that we clear sd->snapshot_needs_reset,
2953            before actually clearing the snapshot state in the bridge
2954            otherwise we might race with the pkt_scan interrupt handler */
2955         sd->snapshot_needs_reset = 0;
2956
2957         switch (sd->bridge) {
2958         case BRIDGE_OV511:
2959         case BRIDGE_OV511PLUS:
2960                 reg_w(sd, R51x_SYS_SNAP, 0x02);
2961                 reg_w(sd, R51x_SYS_SNAP, 0x00);
2962                 break;
2963         case BRIDGE_OV518:
2964         case BRIDGE_OV518PLUS:
2965                 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2966                 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2967                 break;
2968         case BRIDGE_OV519:
2969                 reg_w(sd, R51x_SYS_RESET, 0x40);
2970                 reg_w(sd, R51x_SYS_RESET, 0x00);
2971                 break;
2972         }
2973 }
2974
2975 static void ov51x_upload_quan_tables(struct sd *sd)
2976 {
2977         const unsigned char yQuanTable511[] = {
2978                 0, 1, 1, 2, 2, 3, 3, 4,
2979                 1, 1, 1, 2, 2, 3, 4, 4,
2980                 1, 1, 2, 2, 3, 4, 4, 4,
2981                 2, 2, 2, 3, 4, 4, 4, 4,
2982                 2, 2, 3, 4, 4, 5, 5, 5,
2983                 3, 3, 4, 4, 5, 5, 5, 5,
2984                 3, 4, 4, 4, 5, 5, 5, 5,
2985                 4, 4, 4, 4, 5, 5, 5, 5
2986         };
2987
2988         const unsigned char uvQuanTable511[] = {
2989                 0, 2, 2, 3, 4, 4, 4, 4,
2990                 2, 2, 2, 4, 4, 4, 4, 4,
2991                 2, 2, 3, 4, 4, 4, 4, 4,
2992                 3, 4, 4, 4, 4, 4, 4, 4,
2993                 4, 4, 4, 4, 4, 4, 4, 4,
2994                 4, 4, 4, 4, 4, 4, 4, 4,
2995                 4, 4, 4, 4, 4, 4, 4, 4,
2996                 4, 4, 4, 4, 4, 4, 4, 4
2997         };
2998
2999         /* OV518 quantization tables are 8x4 (instead of 8x8) */
3000         const unsigned char yQuanTable518[] = {
3001                 5, 4, 5, 6, 6, 7, 7, 7,
3002                 5, 5, 5, 5, 6, 7, 7, 7,
3003                 6, 6, 6, 6, 7, 7, 7, 8,
3004                 7, 7, 6, 7, 7, 7, 8, 8
3005         };
3006         const unsigned char uvQuanTable518[] = {
3007                 6, 6, 6, 7, 7, 7, 7, 7,
3008                 6, 6, 6, 7, 7, 7, 7, 7,
3009                 6, 6, 6, 7, 7, 7, 7, 8,
3010                 7, 7, 7, 7, 7, 7, 8, 8
3011         };
3012
3013         const unsigned char *pYTable, *pUVTable;
3014         unsigned char val0, val1;
3015         int i, size, reg = R51x_COMP_LUT_BEGIN;
3016
3017         PDEBUG(D_PROBE, "Uploading quantization tables");
3018
3019         if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
3020                 pYTable = yQuanTable511;
3021                 pUVTable = uvQuanTable511;
3022                 size = 32;
3023         } else {
3024                 pYTable = yQuanTable518;
3025                 pUVTable = uvQuanTable518;
3026                 size = 16;
3027         }
3028
3029         for (i = 0; i < size; i++) {
3030                 val0 = *pYTable++;
3031                 val1 = *pYTable++;
3032                 val0 &= 0x0f;
3033                 val1 &= 0x0f;
3034                 val0 |= val1 << 4;
3035                 reg_w(sd, reg, val0);
3036
3037                 val0 = *pUVTable++;
3038                 val1 = *pUVTable++;
3039                 val0 &= 0x0f;
3040                 val1 &= 0x0f;
3041                 val0 |= val1 << 4;
3042                 reg_w(sd, reg + size, val0);
3043
3044                 reg++;
3045         }
3046 }
3047
3048 /* This initializes the OV511/OV511+ and the sensor */
3049 static void ov511_configure(struct gspca_dev *gspca_dev)
3050 {
3051         struct sd *sd = (struct sd *) gspca_dev;
3052
3053         /* For 511 and 511+ */
3054         const struct ov_regvals init_511[] = {
3055                 { R51x_SYS_RESET,       0x7f },
3056                 { R51x_SYS_INIT,        0x01 },
3057                 { R51x_SYS_RESET,       0x7f },
3058                 { R51x_SYS_INIT,        0x01 },
3059                 { R51x_SYS_RESET,       0x3f },
3060                 { R51x_SYS_INIT,        0x01 },
3061                 { R51x_SYS_RESET,       0x3d },
3062         };
3063
3064         const struct ov_regvals norm_511[] = {
3065                 { R511_DRAM_FLOW_CTL,   0x01 },
3066                 { R51x_SYS_SNAP,        0x00 },
3067                 { R51x_SYS_SNAP,        0x02 },
3068                 { R51x_SYS_SNAP,        0x00 },
3069                 { R511_FIFO_OPTS,       0x1f },
3070                 { R511_COMP_EN,         0x00 },
3071                 { R511_COMP_LUT_EN,     0x03 },
3072         };
3073
3074         const struct ov_regvals norm_511_p[] = {
3075                 { R511_DRAM_FLOW_CTL,   0xff },
3076                 { R51x_SYS_SNAP,        0x00 },
3077                 { R51x_SYS_SNAP,        0x02 },
3078                 { R51x_SYS_SNAP,        0x00 },
3079                 { R511_FIFO_OPTS,       0xff },
3080                 { R511_COMP_EN,         0x00 },
3081                 { R511_COMP_LUT_EN,     0x03 },
3082         };
3083
3084         const struct ov_regvals compress_511[] = {
3085                 { 0x70, 0x1f },
3086                 { 0x71, 0x05 },
3087                 { 0x72, 0x06 },
3088                 { 0x73, 0x06 },
3089                 { 0x74, 0x14 },
3090                 { 0x75, 0x03 },
3091                 { 0x76, 0x04 },
3092                 { 0x77, 0x04 },
3093         };
3094
3095         PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3096
3097         write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3098
3099         switch (sd->bridge) {
3100         case BRIDGE_OV511:
3101                 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3102                 break;
3103         case BRIDGE_OV511PLUS:
3104                 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3105                 break;
3106         }
3107
3108         /* Init compression */
3109         write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3110
3111         ov51x_upload_quan_tables(sd);
3112 }
3113
3114 /* This initializes the OV518/OV518+ and the sensor */
3115 static void ov518_configure(struct gspca_dev *gspca_dev)
3116 {
3117         struct sd *sd = (struct sd *) gspca_dev;
3118
3119         /* For 518 and 518+ */
3120         const struct ov_regvals init_518[] = {
3121                 { R51x_SYS_RESET,       0x40 },
3122                 { R51x_SYS_INIT,        0xe1 },
3123                 { R51x_SYS_RESET,       0x3e },
3124                 { R51x_SYS_INIT,        0xe1 },
3125                 { R51x_SYS_RESET,       0x00 },
3126                 { R51x_SYS_INIT,        0xe1 },
3127                 { 0x46,                 0x00 },
3128                 { 0x5d,                 0x03 },
3129         };
3130
3131         const struct ov_regvals norm_518[] = {
3132                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3133                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3134                 { 0x31,                 0x0f },
3135                 { 0x5d,                 0x03 },
3136                 { 0x24,                 0x9f },
3137                 { 0x25,                 0x90 },
3138                 { 0x20,                 0x00 },
3139                 { 0x51,                 0x04 },
3140                 { 0x71,                 0x19 },
3141                 { 0x2f,                 0x80 },
3142         };
3143
3144         const struct ov_regvals norm_518_p[] = {
3145                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3146                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3147                 { 0x31,                 0x0f },
3148                 { 0x5d,                 0x03 },
3149                 { 0x24,                 0x9f },
3150                 { 0x25,                 0x90 },
3151                 { 0x20,                 0x60 },
3152                 { 0x51,                 0x02 },
3153                 { 0x71,                 0x19 },
3154                 { 0x40,                 0xff },
3155                 { 0x41,                 0x42 },
3156                 { 0x46,                 0x00 },
3157                 { 0x33,                 0x04 },
3158                 { 0x21,                 0x19 },
3159                 { 0x3f,                 0x10 },
3160                 { 0x2f,                 0x80 },
3161         };
3162
3163         /* First 5 bits of custom ID reg are a revision ID on OV518 */
3164         PDEBUG(D_PROBE, "Device revision %d",
3165                 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3166
3167         write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3168
3169         /* Set LED GPIO pin to output mode */
3170         reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3171
3172         switch (sd->bridge) {
3173         case BRIDGE_OV518:
3174                 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3175                 break;
3176         case BRIDGE_OV518PLUS:
3177                 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3178                 break;
3179         }
3180
3181         ov51x_upload_quan_tables(sd);
3182
3183         reg_w(sd, 0x2f, 0x80);
3184 }
3185
3186 static void ov519_configure(struct sd *sd)
3187 {
3188         static const struct ov_regvals init_519[] = {
3189                 { 0x5a, 0x6d }, /* EnableSystem */
3190                 { 0x53, 0x9b }, /* don't enable the microcontroller */
3191                 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3192                 { 0x5d, 0x03 },
3193                 { 0x49, 0x01 },
3194                 { 0x48, 0x00 },
3195                 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3196                  * detection will fail. This deserves further investigation. */
3197                 { OV519_GPIO_IO_CTRL0,   0xee },
3198                 { OV519_R51_RESET1, 0x0f },
3199                 { OV519_R51_RESET1, 0x00 },
3200                 { 0x22, 0x00 },
3201                 /* windows reads 0x55 at this point*/
3202         };
3203
3204         write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3205 }
3206
3207 static void ovfx2_configure(struct sd *sd)
3208 {
3209         static const struct ov_regvals init_fx2[] = {
3210                 { 0x00, 0x60 },
3211                 { 0x02, 0x01 },
3212                 { 0x0f, 0x1d },
3213                 { 0xe9, 0x82 },
3214                 { 0xea, 0xc7 },
3215                 { 0xeb, 0x10 },
3216                 { 0xec, 0xf6 },
3217         };
3218
3219         sd->stopped = 1;
3220
3221         write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3222 }
3223
3224 /* set the mode */
3225 /* This function works for ov7660 only */
3226 static void ov519_set_mode(struct sd *sd)
3227 {
3228         static const struct ov_regvals bridge_ov7660[2][10] = {
3229                 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3230                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3231                  {0x25, 0x01}, {0x26, 0x00}},
3232                 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3233                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3234                  {0x25, 0x03}, {0x26, 0x00}}
3235         };
3236         static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3237                 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3238                 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3239         };
3240         static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3241                 {OV7670_R17_HSTART, 0x13},
3242                 {OV7670_R18_HSTOP, 0x01},
3243                 {OV7670_R32_HREF, 0x92},
3244                 {OV7670_R19_VSTART, 0x02},
3245                 {OV7670_R1A_VSTOP, 0x7a},
3246                 {OV7670_R03_VREF, 0x00},
3247 /*              {0x33, 0x00}, */
3248 /*              {0x34, 0x07}, */
3249 /*              {0x36, 0x00}, */
3250 /*              {0x6b, 0x0a}, */
3251         };
3252
3253         write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3254                         ARRAY_SIZE(bridge_ov7660[0]));
3255         write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3256                         ARRAY_SIZE(sensor_ov7660[0]));
3257         write_i2c_regvals(sd, sensor_ov7660_2,
3258                         ARRAY_SIZE(sensor_ov7660_2));
3259 }
3260
3261 /* set the frame rate */
3262 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3263 static void ov519_set_fr(struct sd *sd)
3264 {
3265         int fr;
3266         u8 clock;
3267         /* frame rate table with indices:
3268          *      - mode = 0: 320x240, 1: 640x480
3269          *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3270          *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3271          */
3272         static const u8 fr_tb[2][6][3] = {
3273                 {{0x04, 0xff, 0x00},
3274                  {0x04, 0x1f, 0x00},
3275                  {0x04, 0x1b, 0x00},
3276                  {0x04, 0x15, 0x00},
3277                  {0x04, 0x09, 0x00},
3278                  {0x04, 0x01, 0x00}},
3279                 {{0x0c, 0xff, 0x00},
3280                  {0x0c, 0x1f, 0x00},
3281                  {0x0c, 0x1b, 0x00},
3282                  {0x04, 0xff, 0x01},
3283                  {0x04, 0x1f, 0x01},
3284                  {0x04, 0x1b, 0x01}},
3285         };
3286
3287         if (frame_rate > 0)
3288                 sd->frame_rate = frame_rate;
3289         if (sd->frame_rate >= 30)
3290                 fr = 0;
3291         else if (sd->frame_rate >= 25)
3292                 fr = 1;
3293         else if (sd->frame_rate >= 20)
3294                 fr = 2;
3295         else if (sd->frame_rate >= 15)
3296                 fr = 3;
3297         else if (sd->frame_rate >= 10)
3298                 fr = 4;
3299         else
3300                 fr = 5;
3301         reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3302         reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3303         clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3304         if (sd->sensor == SEN_OV7660)
3305                 clock |= 0x80;          /* enable double clock */
3306         ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3307 }
3308
3309 static void setautogain(struct gspca_dev *gspca_dev)
3310 {
3311         struct sd *sd = (struct sd *) gspca_dev;
3312
3313         i2c_w_mask(sd, 0x13, sd->ctrls[AUTOGAIN].val ? 0x05 : 0x00, 0x05);
3314 }
3315
3316 /* this function is called at probe time */
3317 static int sd_config(struct gspca_dev *gspca_dev,
3318                         const struct usb_device_id *id)
3319 {
3320         struct sd *sd = (struct sd *) gspca_dev;
3321         struct cam *cam = &gspca_dev->cam;
3322
3323         sd->bridge = id->driver_info & BRIDGE_MASK;
3324         sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3325
3326         switch (sd->bridge) {
3327         case BRIDGE_OV511:
3328         case BRIDGE_OV511PLUS:
3329                 cam->cam_mode = ov511_vga_mode;
3330                 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3331                 break;
3332         case BRIDGE_OV518:
3333         case BRIDGE_OV518PLUS:
3334                 cam->cam_mode = ov518_vga_mode;
3335                 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3336                 break;
3337         case BRIDGE_OV519:
3338                 cam->cam_mode = ov519_vga_mode;
3339                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3340                 break;
3341         case BRIDGE_OVFX2:
3342                 cam->cam_mode = ov519_vga_mode;
3343                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3344                 cam->bulk_size = OVFX2_BULK_SIZE;
3345                 cam->bulk_nurbs = MAX_NURBS;
3346                 cam->bulk = 1;
3347                 break;
3348         case BRIDGE_W9968CF:
3349                 cam->cam_mode = w9968cf_vga_mode;
3350                 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3351                 break;
3352         }
3353
3354         gspca_dev->cam.ctrls = sd->ctrls;
3355         sd->quality = QUALITY_DEF;
3356         sd->frame_rate = 15;
3357
3358         return 0;
3359 }
3360
3361 /* this function is called at probe and resume time */
3362 static int sd_init(struct gspca_dev *gspca_dev)
3363 {
3364         struct sd *sd = (struct sd *) gspca_dev;
3365         struct cam *cam = &gspca_dev->cam;
3366
3367         switch (sd->bridge) {
3368         case BRIDGE_OV511:
3369         case BRIDGE_OV511PLUS:
3370                 ov511_configure(gspca_dev);
3371                 break;
3372         case BRIDGE_OV518:
3373         case BRIDGE_OV518PLUS:
3374                 ov518_configure(gspca_dev);
3375                 break;
3376         case BRIDGE_OV519:
3377                 ov519_configure(sd);
3378                 break;
3379         case BRIDGE_OVFX2:
3380                 ovfx2_configure(sd);
3381                 break;
3382         case BRIDGE_W9968CF:
3383                 w9968cf_configure(sd);
3384                 break;
3385         }
3386
3387         /* The OV519 must be more aggressive about sensor detection since
3388          * I2C write will never fail if the sensor is not present. We have
3389          * to try to initialize the sensor to detect its presence */
3390         sd->sensor = -1;
3391
3392         /* Test for 76xx */
3393         if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3394                 ov7xx0_configure(sd);
3395
3396         /* Test for 6xx0 */
3397         } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3398                 ov6xx0_configure(sd);
3399
3400         /* Test for 8xx0 */
3401         } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3402                 ov8xx0_configure(sd);
3403
3404         /* Test for 3xxx / 2xxx */
3405         } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3406                 ov_hires_configure(sd);
3407         } else {
3408                 pr_err("Can't determine sensor slave IDs\n");
3409                 goto error;
3410         }
3411
3412         if (sd->sensor < 0)
3413                 goto error;
3414
3415         ov51x_led_control(sd, 0);       /* turn LED off */
3416
3417         switch (sd->bridge) {
3418         case BRIDGE_OV511:
3419         case BRIDGE_OV511PLUS:
3420                 if (sd->sif) {
3421                         cam->cam_mode = ov511_sif_mode;
3422                         cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3423                 }
3424                 break;
3425         case BRIDGE_OV518:
3426         case BRIDGE_OV518PLUS:
3427                 if (sd->sif) {
3428                         cam->cam_mode = ov518_sif_mode;
3429                         cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3430                 }
3431                 break;
3432         case BRIDGE_OV519:
3433                 if (sd->sif) {
3434                         cam->cam_mode = ov519_sif_mode;
3435                         cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3436                 }
3437                 break;
3438         case BRIDGE_OVFX2:
3439                 switch (sd->sensor) {
3440                 case SEN_OV2610:
3441                 case SEN_OV2610AE:
3442                         cam->cam_mode = ovfx2_ov2610_mode;
3443                         cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3444                         break;
3445                 case SEN_OV3610:
3446                         cam->cam_mode = ovfx2_ov3610_mode;
3447                         cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3448                         break;
3449                 case SEN_OV9600:
3450                         cam->cam_mode = ovfx2_ov9600_mode;
3451                         cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3452                         break;
3453                 default:
3454                         if (sd->sif) {
3455                                 cam->cam_mode = ov519_sif_mode;
3456                                 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3457                         }
3458                         break;
3459                 }
3460                 break;
3461         case BRIDGE_W9968CF:
3462                 if (sd->sif)
3463                         cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3464
3465                 /* w9968cf needs initialisation once the sensor is known */
3466                 w9968cf_init(sd);
3467                 break;
3468         }
3469
3470         gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3471
3472         /* initialize the sensor */
3473         switch (sd->sensor) {
3474         case SEN_OV2610:
3475                 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3476
3477                 /* Enable autogain, autoexpo, awb, bandfilter */
3478                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3479                 break;
3480         case SEN_OV2610AE:
3481                 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3482
3483                 /* enable autoexpo */
3484                 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3485                 break;
3486         case SEN_OV3610:
3487                 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3488
3489                 /* Enable autogain, autoexpo, awb, bandfilter */
3490                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3491                 break;
3492         case SEN_OV6620:
3493                 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3494                 break;
3495         case SEN_OV6630:
3496         case SEN_OV66308AF:
3497                 sd->ctrls[CONTRAST].def = 200;
3498                                  /* The default is too low for the ov6630 */
3499                 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3500                 break;
3501         default:
3502 /*      case SEN_OV7610: */
3503 /*      case SEN_OV76BE: */
3504                 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3505                 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3506                 break;
3507         case SEN_OV7620:
3508         case SEN_OV7620AE:
3509                 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3510                 break;
3511         case SEN_OV7640:
3512         case SEN_OV7648:
3513                 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3514                 break;
3515         case SEN_OV7660:
3516                 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3517                 msleep(14);
3518                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3519                 write_regvals(sd, init_519_ov7660,
3520                                 ARRAY_SIZE(init_519_ov7660));
3521                 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3522                 sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3523                 ov519_set_mode(sd);
3524                 ov519_set_fr(sd);
3525                 sd->ctrls[COLORS].max = 4;      /* 0..4 */
3526                 sd->ctrls[COLORS].val =
3527                         sd->ctrls[COLORS].def = 2;
3528                 setcolors(gspca_dev);
3529                 sd->ctrls[CONTRAST].max = 6;    /* 0..6 */
3530                 sd->ctrls[CONTRAST].val =
3531                         sd->ctrls[CONTRAST].def = 3;
3532                 setcontrast(gspca_dev);
3533                 sd->ctrls[BRIGHTNESS].max = 6;  /* 0..6 */
3534                 sd->ctrls[BRIGHTNESS].val =
3535                         sd->ctrls[BRIGHTNESS].def = 3;
3536                 setbrightness(gspca_dev);
3537                 sd_reset_snapshot(gspca_dev);
3538                 ov51x_restart(sd);
3539                 ov51x_stop(sd);                 /* not in win traces */
3540                 ov51x_led_control(sd, 0);
3541                 break;
3542         case SEN_OV7670:
3543                 sd->ctrls[FREQ].max = 3;        /* auto */
3544                 sd->ctrls[FREQ].def = 3;
3545                 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3546                 break;
3547         case SEN_OV8610:
3548                 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3549                 break;
3550         case SEN_OV9600:
3551                 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3552
3553                 /* enable autoexpo */
3554 /*              i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3555                 break;
3556         }
3557         return gspca_dev->usb_err;
3558 error:
3559         PDEBUG(D_ERR, "OV519 Config failed");
3560         return -EINVAL;
3561 }
3562
3563 /* function called at start time before URB creation */
3564 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3565 {
3566         struct sd *sd = (struct sd *) gspca_dev;
3567
3568         switch (sd->bridge) {
3569         case BRIDGE_OVFX2:
3570                 if (gspca_dev->width != 800)
3571                         gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3572                 else
3573                         gspca_dev->cam.bulk_size = 7 * 4096;
3574                 break;
3575         }
3576         return 0;
3577 }
3578
3579 /* Set up the OV511/OV511+ with the given image parameters.
3580  *
3581  * Do not put any sensor-specific code in here (including I2C I/O functions)
3582  */
3583 static void ov511_mode_init_regs(struct sd *sd)
3584 {
3585         int hsegs, vsegs, packet_size, fps, needed;
3586         int interlaced = 0;
3587         struct usb_host_interface *alt;
3588         struct usb_interface *intf;
3589
3590         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3591         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3592         if (!alt) {
3593                 pr_err("Couldn't get altsetting\n");
3594                 sd->gspca_dev.usb_err = -EIO;
3595                 return;
3596         }
3597
3598         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3599         reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3600
3601         reg_w(sd, R511_CAM_UV_EN, 0x01);
3602         reg_w(sd, R511_SNAP_UV_EN, 0x01);
3603         reg_w(sd, R511_SNAP_OPTS, 0x03);
3604
3605         /* Here I'm assuming that snapshot size == image size.
3606          * I hope that's always true. --claudio
3607          */
3608         hsegs = (sd->gspca_dev.width >> 3) - 1;
3609         vsegs = (sd->gspca_dev.height >> 3) - 1;
3610
3611         reg_w(sd, R511_CAM_PXCNT, hsegs);
3612         reg_w(sd, R511_CAM_LNCNT, vsegs);
3613         reg_w(sd, R511_CAM_PXDIV, 0x00);
3614         reg_w(sd, R511_CAM_LNDIV, 0x00);
3615
3616         /* YUV420, low pass filter on */
3617         reg_w(sd, R511_CAM_OPTS, 0x03);
3618
3619         /* Snapshot additions */
3620         reg_w(sd, R511_SNAP_PXCNT, hsegs);
3621         reg_w(sd, R511_SNAP_LNCNT, vsegs);
3622         reg_w(sd, R511_SNAP_PXDIV, 0x00);
3623         reg_w(sd, R511_SNAP_LNDIV, 0x00);
3624
3625         /******** Set the framerate ********/
3626         if (frame_rate > 0)
3627                 sd->frame_rate = frame_rate;
3628
3629         switch (sd->sensor) {
3630         case SEN_OV6620:
3631                 /* No framerate control, doesn't like higher rates yet */
3632                 sd->clockdiv = 3;
3633                 break;
3634
3635         /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3636            for more sensors we need to do this for them too */
3637         case SEN_OV7620:
3638         case SEN_OV7620AE:
3639         case SEN_OV7640:
3640         case SEN_OV7648:
3641         case SEN_OV76BE:
3642                 if (sd->gspca_dev.width == 320)
3643                         interlaced = 1;
3644                 /* Fall through */
3645         case SEN_OV6630:
3646         case SEN_OV7610:
3647         case SEN_OV7670:
3648                 switch (sd->frame_rate) {
3649                 case 30:
3650                 case 25:
3651                         /* Not enough bandwidth to do 640x480 @ 30 fps */
3652                         if (sd->gspca_dev.width != 640) {
3653                                 sd->clockdiv = 0;
3654                                 break;
3655                         }
3656                         /* Fall through for 640x480 case */
3657                 default:
3658 /*              case 20: */
3659 /*              case 15: */
3660                         sd->clockdiv = 1;
3661                         break;
3662                 case 10:
3663                         sd->clockdiv = 2;
3664                         break;
3665                 case 5:
3666                         sd->clockdiv = 5;
3667                         break;
3668                 }
3669                 if (interlaced) {
3670                         sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3671                         /* Higher then 10 does not work */
3672                         if (sd->clockdiv > 10)
3673                                 sd->clockdiv = 10;
3674                 }
3675                 break;
3676
3677         case SEN_OV8610:
3678                 /* No framerate control ?? */
3679                 sd->clockdiv = 0;
3680                 break;
3681         }
3682
3683         /* Check if we have enough bandwidth to disable compression */
3684         fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3685         needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3686         /* 1000 isoc packets/sec */
3687         if (needed > 1000 * packet_size) {
3688                 /* Enable Y and UV quantization and compression */
3689                 reg_w(sd, R511_COMP_EN, 0x07);
3690                 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3691         } else {
3692                 reg_w(sd, R511_COMP_EN, 0x06);
3693                 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3694         }
3695
3696         reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3697         reg_w(sd, R51x_SYS_RESET, 0);
3698 }
3699
3700 /* Sets up the OV518/OV518+ with the given image parameters
3701  *
3702  * OV518 needs a completely different approach, until we can figure out what
3703  * the individual registers do. Also, only 15 FPS is supported now.
3704  *
3705  * Do not put any sensor-specific code in here (including I2C I/O functions)
3706  */
3707 static void ov518_mode_init_regs(struct sd *sd)
3708 {
3709         int hsegs, vsegs, packet_size;
3710         struct usb_host_interface *alt;
3711         struct usb_interface *intf;
3712
3713         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3714         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3715         if (!alt) {
3716                 pr_err("Couldn't get altsetting\n");
3717                 sd->gspca_dev.usb_err = -EIO;
3718                 return;
3719         }
3720
3721         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3722         ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3723
3724         /******** Set the mode ********/
3725         reg_w(sd, 0x2b, 0);
3726         reg_w(sd, 0x2c, 0);
3727         reg_w(sd, 0x2d, 0);
3728         reg_w(sd, 0x2e, 0);
3729         reg_w(sd, 0x3b, 0);
3730         reg_w(sd, 0x3c, 0);
3731         reg_w(sd, 0x3d, 0);
3732         reg_w(sd, 0x3e, 0);
3733
3734         if (sd->bridge == BRIDGE_OV518) {
3735                 /* Set 8-bit (YVYU) input format */
3736                 reg_w_mask(sd, 0x20, 0x08, 0x08);
3737
3738                 /* Set 12-bit (4:2:0) output format */
3739                 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3740                 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3741         } else {
3742                 reg_w(sd, 0x28, 0x80);
3743                 reg_w(sd, 0x38, 0x80);
3744         }
3745
3746         hsegs = sd->gspca_dev.width / 16;
3747         vsegs = sd->gspca_dev.height / 4;
3748
3749         reg_w(sd, 0x29, hsegs);
3750         reg_w(sd, 0x2a, vsegs);
3751
3752         reg_w(sd, 0x39, hsegs);
3753         reg_w(sd, 0x3a, vsegs);
3754
3755         /* Windows driver does this here; who knows why */
3756         reg_w(sd, 0x2f, 0x80);
3757
3758         /******** Set the framerate ********/
3759         sd->clockdiv = 1;
3760
3761         /* Mode independent, but framerate dependent, regs */
3762         /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3763         reg_w(sd, 0x51, 0x04);
3764         reg_w(sd, 0x22, 0x18);
3765         reg_w(sd, 0x23, 0xff);
3766
3767         if (sd->bridge == BRIDGE_OV518PLUS) {
3768                 switch (sd->sensor) {
3769                 case SEN_OV7620AE:
3770                         if (sd->gspca_dev.width == 320) {
3771                                 reg_w(sd, 0x20, 0x00);
3772                                 reg_w(sd, 0x21, 0x19);
3773                         } else {
3774                                 reg_w(sd, 0x20, 0x60);
3775                                 reg_w(sd, 0x21, 0x1f);
3776                         }
3777                         break;
3778                 case SEN_OV7620:
3779                         reg_w(sd, 0x20, 0x00);
3780                         reg_w(sd, 0x21, 0x19);
3781                         break;
3782                 default:
3783                         reg_w(sd, 0x21, 0x19);
3784                 }
3785         } else
3786                 reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3787
3788         /* FIXME: Sensor-specific */
3789         /* Bit 5 is what matters here. Of course, it is "reserved" */
3790         i2c_w(sd, 0x54, 0x23);
3791
3792         reg_w(sd, 0x2f, 0x80);
3793
3794         if (sd->bridge == BRIDGE_OV518PLUS) {
3795                 reg_w(sd, 0x24, 0x94);
3796                 reg_w(sd, 0x25, 0x90);
3797                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3798                 ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3799                 ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3800                 ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3801                 ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3802                 ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3803                 ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3804                 ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3805                 ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3806         } else {
3807                 reg_w(sd, 0x24, 0x9f);
3808                 reg_w(sd, 0x25, 0x90);
3809                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3810                 ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3811                 ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3812                 ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3813                 ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3814                 ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3815                 ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3816                 ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3817                 ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3818         }
3819
3820         reg_w(sd, 0x2f, 0x80);
3821 }
3822
3823 /* Sets up the OV519 with the given image parameters
3824  *
3825  * OV519 needs a completely different approach, until we can figure out what
3826  * the individual registers do.
3827  *
3828  * Do not put any sensor-specific code in here (including I2C I/O functions)
3829  */
3830 static void ov519_mode_init_regs(struct sd *sd)
3831 {
3832         static const struct ov_regvals mode_init_519_ov7670[] = {
3833                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3834                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3835                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3836                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3837                 { 0xa3, 0x18 },
3838                 { 0xa4, 0x04 },
3839                 { 0xa5, 0x28 },
3840                 { 0x37, 0x00 }, /* SetUsbInit */
3841                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3842                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3843                 { 0x20, 0x0c },
3844                 { 0x21, 0x38 },
3845                 { 0x22, 0x1d },
3846                 { 0x17, 0x50 }, /* undocumented */
3847                 { 0x37, 0x00 }, /* undocumented */
3848                 { 0x40, 0xff }, /* I2C timeout counter */
3849                 { 0x46, 0x00 }, /* I2C clock prescaler */
3850                 { 0x59, 0x04 }, /* new from windrv 090403 */
3851                 { 0xff, 0x00 }, /* undocumented */
3852                 /* windows reads 0x55 at this point, why? */
3853         };
3854
3855         static const struct ov_regvals mode_init_519[] = {
3856                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3857                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3858                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3859                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3860                 { 0xa3, 0x18 },
3861                 { 0xa4, 0x04 },
3862                 { 0xa5, 0x28 },
3863                 { 0x37, 0x00 }, /* SetUsbInit */
3864                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3865                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3866                 { 0x22, 0x1d },
3867                 { 0x17, 0x50 }, /* undocumented */
3868                 { 0x37, 0x00 }, /* undocumented */
3869                 { 0x40, 0xff }, /* I2C timeout counter */
3870                 { 0x46, 0x00 }, /* I2C clock prescaler */
3871                 { 0x59, 0x04 }, /* new from windrv 090403 */
3872                 { 0xff, 0x00 }, /* undocumented */
3873                 /* windows reads 0x55 at this point, why? */
3874         };
3875
3876         /******** Set the mode ********/
3877         switch (sd->sensor) {
3878         default:
3879                 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3880                 if (sd->sensor == SEN_OV7640 ||
3881                     sd->sensor == SEN_OV7648) {
3882                         /* Select 8-bit input mode */
3883                         reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3884                 }
3885                 break;
3886         case SEN_OV7660:
3887                 return;         /* done by ov519_set_mode/fr() */
3888         case SEN_OV7670:
3889                 write_regvals(sd, mode_init_519_ov7670,
3890                                 ARRAY_SIZE(mode_init_519_ov7670));
3891                 break;
3892         }
3893
3894         reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.width >> 4);
3895         reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.height >> 3);
3896         if (sd->sensor == SEN_OV7670 &&
3897             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3898                 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3899         else if (sd->sensor == SEN_OV7648 &&
3900             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3901                 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3902         else
3903                 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3904         reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3905         reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3906         reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3907         reg_w(sd, OV519_R16_DIVIDER,    0x00);
3908         reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3909         reg_w(sd, 0x26,                 0x00); /* Undocumented */
3910
3911         /******** Set the framerate ********/
3912         if (frame_rate > 0)
3913                 sd->frame_rate = frame_rate;
3914
3915 /* FIXME: These are only valid at the max resolution. */
3916         sd->clockdiv = 0;
3917         switch (sd->sensor) {
3918         case SEN_OV7640:
3919         case SEN_OV7648:
3920                 switch (sd->frame_rate) {
3921                 default:
3922 /*              case 30: */
3923                         reg_w(sd, 0xa4, 0x0c);
3924                         reg_w(sd, 0x23, 0xff);
3925                         break;
3926                 case 25:
3927                         reg_w(sd, 0xa4, 0x0c);
3928                         reg_w(sd, 0x23, 0x1f);
3929                         break;
3930                 case 20:
3931                         reg_w(sd, 0xa4, 0x0c);
3932                         reg_w(sd, 0x23, 0x1b);
3933                         break;
3934                 case 15:
3935                         reg_w(sd, 0xa4, 0x04);
3936                         reg_w(sd, 0x23, 0xff);
3937                         sd->clockdiv = 1;
3938                         break;
3939                 case 10:
3940                         reg_w(sd, 0xa4, 0x04);
3941                         reg_w(sd, 0x23, 0x1f);
3942                         sd->clockdiv = 1;
3943                         break;
3944                 case 5:
3945                         reg_w(sd, 0xa4, 0x04);
3946                         reg_w(sd, 0x23, 0x1b);
3947                         sd->clockdiv = 1;
3948                         break;
3949                 }
3950                 break;
3951         case SEN_OV8610:
3952                 switch (sd->frame_rate) {
3953                 default:        /* 15 fps */
3954 /*              case 15: */
3955                         reg_w(sd, 0xa4, 0x06);
3956                         reg_w(sd, 0x23, 0xff);
3957                         break;
3958                 case 10:
3959                         reg_w(sd, 0xa4, 0x06);
3960                         reg_w(sd, 0x23, 0x1f);
3961                         break;
3962                 case 5:
3963                         reg_w(sd, 0xa4, 0x06);
3964                         reg_w(sd, 0x23, 0x1b);
3965                         break;
3966                 }
3967                 break;
3968         case SEN_OV7670:                /* guesses, based on 7640 */
3969                 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3970                                  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3971                 reg_w(sd, 0xa4, 0x10);
3972                 switch (sd->frame_rate) {
3973                 case 30:
3974                         reg_w(sd, 0x23, 0xff);
3975                         break;
3976                 case 20:
3977                         reg_w(sd, 0x23, 0x1b);
3978                         break;
3979                 default:
3980 /*              case 15: */
3981                         reg_w(sd, 0x23, 0xff);
3982                         sd->clockdiv = 1;
3983                         break;
3984                 }
3985                 break;
3986         }
3987 }
3988
3989 static void mode_init_ov_sensor_regs(struct sd *sd)
3990 {
3991         struct gspca_dev *gspca_dev;
3992         int qvga, xstart, xend, ystart, yend;
3993         u8 v;
3994
3995         gspca_dev = &sd->gspca_dev;
3996         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3997
3998         /******** Mode (VGA/QVGA) and sensor specific regs ********/
3999         switch (sd->sensor) {
4000         case SEN_OV2610:
4001                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4002                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4003                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4004                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4005                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4006                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4007                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4008                 return;
4009         case SEN_OV2610AE: {
4010                 u8 v;
4011
4012                 /* frame rates:
4013                  *      10fps / 5 fps for 1600x1200
4014                  *      40fps / 20fps for 800x600
4015                  */
4016                 v = 80;
4017                 if (qvga) {
4018                         if (sd->frame_rate < 25)
4019                                 v = 0x81;
4020                 } else {
4021                         if (sd->frame_rate < 10)
4022                                 v = 0x81;
4023                 }
4024                 i2c_w(sd, 0x11, v);
4025                 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
4026                 return;
4027             }
4028         case SEN_OV3610:
4029                 if (qvga) {
4030                         xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
4031                         ystart = (776 - gspca_dev->height) / 2;
4032                 } else {
4033                         xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
4034                         ystart = (1544 - gspca_dev->height) / 2;
4035                 }
4036                 xend = xstart + gspca_dev->width;
4037                 yend = ystart + gspca_dev->height;
4038                 /* Writing to the COMH register resets the other windowing regs
4039                    to their default values, so we must do this first. */
4040                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
4041                 i2c_w_mask(sd, 0x32,
4042                            (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
4043                            0x3f);
4044                 i2c_w_mask(sd, 0x03,
4045                            (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
4046                            0x0f);
4047                 i2c_w(sd, 0x17, xstart >> 4);
4048                 i2c_w(sd, 0x18, xend >> 4);
4049                 i2c_w(sd, 0x19, ystart >> 3);
4050                 i2c_w(sd, 0x1a, yend >> 3);
4051                 return;
4052         case SEN_OV8610:
4053                 /* For OV8610 qvga means qsvga */
4054                 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
4055                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4056                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4057                 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
4058                 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
4059                 break;
4060         case SEN_OV7610:
4061                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4062                 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4063                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4064                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4065                 break;
4066         case SEN_OV7620:
4067         case SEN_OV7620AE:
4068         case SEN_OV76BE:
4069                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4070                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4071                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4072                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4073                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4074                 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
4075                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4076                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4077                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4078                 if (sd->sensor == SEN_OV76BE)
4079                         i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4080                 break;
4081         case SEN_OV7640:
4082         case SEN_OV7648:
4083                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4084                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4085                 /* Setting this undocumented bit in qvga mode removes a very
4086                    annoying vertical shaking of the image */
4087                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4088                 /* Unknown */
4089                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4090                 /* Allow higher automatic gain (to allow higher framerates) */
4091                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4092                 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4093                 break;
4094         case SEN_OV7670:
4095                 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4096                  * do we need to set anything else?
4097                  *      HSTART etc are set in set_ov_sensor_window itself */
4098                 i2c_w_mask(sd, OV7670_R12_COM7,
4099                          qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4100                          OV7670_COM7_FMT_MASK);
4101                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4102                 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4103                                 OV7670_COM8_AWB);
4104                 if (qvga) {             /* QVGA from ov7670.c by
4105                                          * Jonathan Corbet */
4106                         xstart = 164;
4107                         xend = 28;
4108                         ystart = 14;
4109                         yend = 494;
4110                 } else {                /* VGA */
4111                         xstart = 158;
4112                         xend = 14;
4113                         ystart = 10;
4114                         yend = 490;
4115                 }
4116                 /* OV7670 hardware window registers are split across
4117                  * multiple locations */
4118                 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4119                 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4120                 v = i2c_r(sd, OV7670_R32_HREF);
4121                 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4122                 msleep(10);     /* need to sleep between read and write to
4123                                  * same reg! */
4124                 i2c_w(sd, OV7670_R32_HREF, v);
4125
4126                 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4127                 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4128                 v = i2c_r(sd, OV7670_R03_VREF);
4129                 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4130                 msleep(10);     /* need to sleep between read and write to
4131                                  * same reg! */
4132                 i2c_w(sd, OV7670_R03_VREF, v);
4133                 break;
4134         case SEN_OV6620:
4135                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4136                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4137                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4138                 break;
4139         case SEN_OV6630:
4140         case SEN_OV66308AF:
4141                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4142                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4143                 break;
4144         case SEN_OV9600: {
4145                 const struct ov_i2c_regvals *vals;
4146                 static const struct ov_i2c_regvals sxga_15[] = {
4147                         {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4148                 };
4149                 static const struct ov_i2c_regvals sxga_7_5[] = {
4150                         {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4151                 };
4152                 static const struct ov_i2c_regvals vga_30[] = {
4153                         {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4154                 };
4155                 static const struct ov_i2c_regvals vga_15[] = {
4156                         {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4157                 };
4158
4159                 /* frame rates:
4160                  *      15fps / 7.5 fps for 1280x1024
4161                  *      30fps / 15fps for 640x480
4162                  */
4163                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4164                 if (qvga)
4165                         vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4166                 else
4167                         vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4168                 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4169                 return;
4170             }
4171         default:
4172                 return;
4173         }
4174
4175         /******** Clock programming ********/
4176         i2c_w(sd, 0x11, sd->clockdiv);
4177 }
4178
4179 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4180 static void sethvflip(struct gspca_dev *gspca_dev)
4181 {
4182         struct sd *sd = (struct sd *) gspca_dev;
4183
4184         if (sd->gspca_dev.streaming)
4185                 reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4186         i2c_w_mask(sd, OV7670_R1E_MVFP,
4187                 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
4188                         | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
4189                 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4190         if (sd->gspca_dev.streaming)
4191                 reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4192 }
4193
4194 static void set_ov_sensor_window(struct sd *sd)
4195 {
4196         struct gspca_dev *gspca_dev;
4197         int qvga, crop;
4198         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4199
4200         /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4201         switch (sd->sensor) {
4202         case SEN_OV2610:
4203         case SEN_OV2610AE:
4204         case SEN_OV3610:
4205         case SEN_OV7670:
4206         case SEN_OV9600:
4207                 mode_init_ov_sensor_regs(sd);
4208                 return;
4209         case SEN_OV7660:
4210                 ov519_set_mode(sd);
4211                 ov519_set_fr(sd);
4212                 return;
4213         }
4214
4215         gspca_dev = &sd->gspca_dev;
4216         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4217         crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4218
4219         /* The different sensor ICs handle setting up of window differently.
4220          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4221         switch (sd->sensor) {
4222         case SEN_OV8610:
4223                 hwsbase = 0x1e;
4224                 hwebase = 0x1e;
4225                 vwsbase = 0x02;
4226                 vwebase = 0x02;
4227                 break;
4228         case SEN_OV7610:
4229         case SEN_OV76BE:
4230                 hwsbase = 0x38;
4231                 hwebase = 0x3a;
4232                 vwsbase = vwebase = 0x05;
4233                 break;
4234         case SEN_OV6620:
4235         case SEN_OV6630:
4236         case SEN_OV66308AF:
4237                 hwsbase = 0x38;
4238                 hwebase = 0x3a;
4239                 vwsbase = 0x05;
4240                 vwebase = 0x06;
4241                 if (sd->sensor == SEN_OV66308AF && qvga)
4242                         /* HDG: this fixes U and V getting swapped */
4243                         hwsbase++;
4244                 if (crop) {
4245                         hwsbase += 8;
4246                         hwebase += 8;
4247                         vwsbase += 11;
4248                         vwebase += 11;
4249                 }
4250                 break;
4251         case SEN_OV7620:
4252         case SEN_OV7620AE:
4253                 hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4254                 hwebase = 0x2f;
4255                 vwsbase = vwebase = 0x05;
4256                 break;
4257         case SEN_OV7640:
4258         case SEN_OV7648:
4259                 hwsbase = 0x1a;
4260                 hwebase = 0x1a;
4261                 vwsbase = vwebase = 0x03;
4262                 break;
4263         default:
4264                 return;
4265         }
4266
4267         switch (sd->sensor) {
4268         case SEN_OV6620:
4269         case SEN_OV6630:
4270         case SEN_OV66308AF:
4271                 if (qvga) {             /* QCIF */
4272                         hwscale = 0;
4273                         vwscale = 0;
4274                 } else {                /* CIF */
4275                         hwscale = 1;
4276                         vwscale = 1;    /* The datasheet says 0;
4277                                          * it's wrong */
4278                 }
4279                 break;
4280         case SEN_OV8610:
4281                 if (qvga) {             /* QSVGA */
4282                         hwscale = 1;
4283                         vwscale = 1;
4284                 } else {                /* SVGA */
4285                         hwscale = 2;
4286                         vwscale = 2;
4287                 }
4288                 break;
4289         default:                        /* SEN_OV7xx0 */
4290                 if (qvga) {             /* QVGA */
4291                         hwscale = 1;
4292                         vwscale = 0;
4293                 } else {                /* VGA */
4294                         hwscale = 2;
4295                         vwscale = 1;
4296                 }
4297         }
4298
4299         mode_init_ov_sensor_regs(sd);
4300
4301         i2c_w(sd, 0x17, hwsbase);
4302         i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4303         i2c_w(sd, 0x19, vwsbase);
4304         i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4305 }
4306
4307 /* -- start the camera -- */
4308 static int sd_start(struct gspca_dev *gspca_dev)
4309 {
4310         struct sd *sd = (struct sd *) gspca_dev;
4311
4312         /* Default for most bridges, allow bridge_mode_init_regs to override */
4313         sd->sensor_width = sd->gspca_dev.width;
4314         sd->sensor_height = sd->gspca_dev.height;
4315
4316         switch (sd->bridge) {
4317         case BRIDGE_OV511:
4318         case BRIDGE_OV511PLUS:
4319                 ov511_mode_init_regs(sd);
4320                 break;
4321         case BRIDGE_OV518:
4322         case BRIDGE_OV518PLUS:
4323                 ov518_mode_init_regs(sd);
4324                 break;
4325         case BRIDGE_OV519:
4326                 ov519_mode_init_regs(sd);
4327                 break;
4328         /* case BRIDGE_OVFX2: nothing to do */
4329         case BRIDGE_W9968CF:
4330                 w9968cf_mode_init_regs(sd);
4331                 break;
4332         }
4333
4334         set_ov_sensor_window(sd);
4335
4336         if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
4337                 setcontrast(gspca_dev);
4338         if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
4339                 setbrightness(gspca_dev);
4340         if (!(sd->gspca_dev.ctrl_dis & (1 << EXPOSURE)))
4341                 setexposure(gspca_dev);
4342         if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
4343                 setcolors(gspca_dev);
4344         if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
4345                 sethvflip(gspca_dev);
4346         if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
4347                 setautobright(gspca_dev);
4348         if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOGAIN)))
4349                 setautogain(gspca_dev);
4350         if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
4351                 setfreq_i(sd);
4352
4353         /* Force clear snapshot state in case the snapshot button was
4354            pressed while we weren't streaming */
4355         sd->snapshot_needs_reset = 1;
4356         sd_reset_snapshot(gspca_dev);
4357
4358         sd->first_frame = 3;
4359
4360         ov51x_restart(sd);
4361         ov51x_led_control(sd, 1);
4362         return gspca_dev->usb_err;
4363 }
4364
4365 static void sd_stopN(struct gspca_dev *gspca_dev)
4366 {
4367         struct sd *sd = (struct sd *) gspca_dev;
4368
4369         ov51x_stop(sd);
4370         ov51x_led_control(sd, 0);
4371 }
4372
4373 static void sd_stop0(struct gspca_dev *gspca_dev)
4374 {
4375         struct sd *sd = (struct sd *) gspca_dev;
4376
4377         if (!sd->gspca_dev.present)
4378                 return;
4379         if (sd->bridge == BRIDGE_W9968CF)
4380                 w9968cf_stop0(sd);
4381
4382 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4383         /* If the last button state is pressed, release it now! */
4384         if (sd->snapshot_pressed) {
4385                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4386                 input_sync(gspca_dev->input_dev);
4387                 sd->snapshot_pressed = 0;
4388         }
4389 #endif
4390         if (sd->bridge == BRIDGE_OV519)
4391                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4392 }
4393
4394 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4395 {
4396         struct sd *sd = (struct sd *) gspca_dev;
4397
4398         if (sd->snapshot_pressed != state) {
4399 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4400                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4401                 input_sync(gspca_dev->input_dev);
4402 #endif
4403                 if (state)
4404                         sd->snapshot_needs_reset = 1;
4405
4406                 sd->snapshot_pressed = state;
4407         } else {
4408                 /* On the ov511 / ov519 we need to reset the button state
4409                    multiple times, as resetting does not work as long as the
4410                    button stays pressed */
4411                 switch (sd->bridge) {
4412                 case BRIDGE_OV511:
4413                 case BRIDGE_OV511PLUS:
4414                 case BRIDGE_OV519:
4415                         if (state)
4416                                 sd->snapshot_needs_reset = 1;
4417                         break;
4418                 }
4419         }
4420 }
4421
4422 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4423                         u8 *in,                 /* isoc packet */
4424                         int len)                /* iso packet length */
4425 {
4426         struct sd *sd = (struct sd *) gspca_dev;
4427
4428         /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4429          * byte non-zero. The EOF packet has image width/height in the
4430          * 10th and 11th bytes. The 9th byte is given as follows:
4431          *
4432          * bit 7: EOF
4433          *     6: compression enabled
4434          *     5: 422/420/400 modes
4435          *     4: 422/420/400 modes
4436          *     3: 1
4437          *     2: snapshot button on
4438          *     1: snapshot frame
4439          *     0: even/odd field
4440          */
4441         if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4442             (in[8] & 0x08)) {
4443                 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4444                 if (in[8] & 0x80) {
4445                         /* Frame end */
4446                         if ((in[9] + 1) * 8 != gspca_dev->width ||
4447                             (in[10] + 1) * 8 != gspca_dev->height) {
4448                                 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4449                                         " requested: %dx%d\n",
4450                                         (in[9] + 1) * 8, (in[10] + 1) * 8,
4451                                         gspca_dev->width, gspca_dev->height);
4452                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4453                                 return;
4454                         }
4455                         /* Add 11 byte footer to frame, might be useful */
4456                         gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4457                         return;
4458                 } else {
4459                         /* Frame start */
4460                         gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4461                         sd->packet_nr = 0;
4462                 }
4463         }
4464
4465         /* Ignore the packet number */
4466         len--;
4467
4468         /* intermediate packet */
4469         gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4470 }
4471
4472 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4473                         u8 *data,                       /* isoc packet */
4474                         int len)                        /* iso packet length */
4475 {
4476         struct sd *sd = (struct sd *) gspca_dev;
4477
4478         /* A false positive here is likely, until OVT gives me
4479          * the definitive SOF/EOF format */
4480         if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4481                 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4482                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4483                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4484                 sd->packet_nr = 0;
4485         }
4486
4487         if (gspca_dev->last_packet_type == DISCARD_PACKET)
4488                 return;
4489
4490         /* Does this device use packet numbers ? */
4491         if (len & 7) {
4492                 len--;
4493                 if (sd->packet_nr == data[len])
4494                         sd->packet_nr++;
4495                 /* The last few packets of the frame (which are all 0's
4496                    except that they may contain part of the footer), are
4497                    numbered 0 */
4498                 else if (sd->packet_nr == 0 || data[len]) {
4499                         PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4500                                 (int)data[len], (int)sd->packet_nr);
4501                         gspca_dev->last_packet_type = DISCARD_PACKET;
4502                         return;
4503                 }
4504         }
4505
4506         /* intermediate packet */
4507         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4508 }
4509
4510 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4511                         u8 *data,                       /* isoc packet */
4512                         int len)                        /* iso packet length */
4513 {
4514         /* Header of ov519 is 16 bytes:
4515          *     Byte     Value      Description
4516          *      0       0xff    magic
4517          *      1       0xff    magic
4518          *      2       0xff    magic
4519          *      3       0xXX    0x50 = SOF, 0x51 = EOF
4520          *      9       0xXX    0x01 initial frame without data,
4521          *                      0x00 standard frame with image
4522          *      14      Lo      in EOF: length of image data / 8
4523          *      15      Hi
4524          */
4525
4526         if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4527                 switch (data[3]) {
4528                 case 0x50:              /* start of frame */
4529                         /* Don't check the button state here, as the state
4530                            usually (always ?) changes at EOF and checking it
4531                            here leads to unnecessary snapshot state resets. */
4532 #define HDRSZ 16
4533                         data += HDRSZ;
4534                         len -= HDRSZ;
4535 #undef HDRSZ
4536                         if (data[0] == 0xff || data[1] == 0xd8)
4537                                 gspca_frame_add(gspca_dev, FIRST_PACKET,
4538                                                 data, len);
4539                         else
4540                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4541                         return;
4542                 case 0x51:              /* end of frame */
4543                         ov51x_handle_button(gspca_dev, data[11] & 1);
4544                         if (data[9] != 0)
4545                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4546                         gspca_frame_add(gspca_dev, LAST_PACKET,
4547                                         NULL, 0);
4548                         return;
4549                 }
4550         }
4551
4552         /* intermediate packet */
4553         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4554 }
4555
4556 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4557                         u8 *data,                       /* isoc packet */
4558                         int len)                        /* iso packet length */
4559 {
4560         struct sd *sd = (struct sd *) gspca_dev;
4561
4562         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4563
4564         /* A short read signals EOF */
4565         if (len < gspca_dev->cam.bulk_size) {
4566                 /* If the frame is short, and it is one of the first ones
4567                    the sensor and bridge are still syncing, so drop it. */
4568                 if (sd->first_frame) {
4569                         sd->first_frame--;
4570                         if (gspca_dev->image_len <
4571                                   sd->gspca_dev.width * sd->gspca_dev.height)
4572                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4573                 }
4574                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4575                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4576         }
4577 }
4578
4579 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4580                         u8 *data,                       /* isoc packet */
4581                         int len)                        /* iso packet length */
4582 {
4583         struct sd *sd = (struct sd *) gspca_dev;
4584
4585         switch (sd->bridge) {
4586         case BRIDGE_OV511:
4587         case BRIDGE_OV511PLUS:
4588                 ov511_pkt_scan(gspca_dev, data, len);
4589                 break;
4590         case BRIDGE_OV518:
4591         case BRIDGE_OV518PLUS:
4592                 ov518_pkt_scan(gspca_dev, data, len);
4593                 break;
4594         case BRIDGE_OV519:
4595                 ov519_pkt_scan(gspca_dev, data, len);
4596                 break;
4597         case BRIDGE_OVFX2:
4598                 ovfx2_pkt_scan(gspca_dev, data, len);
4599                 break;
4600         case BRIDGE_W9968CF:
4601                 w9968cf_pkt_scan(gspca_dev, data, len);
4602                 break;
4603         }
4604 }
4605
4606 /* -- management routines -- */
4607
4608 static void setbrightness(struct gspca_dev *gspca_dev)
4609 {
4610         struct sd *sd = (struct sd *) gspca_dev;
4611         int val;
4612         static const struct ov_i2c_regvals brit_7660[][7] = {
4613                 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4614                         {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4615                 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4616                         {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4617                 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4618                         {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4619                 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4620                         {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4621                 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4622                         {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4623                 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4624                         {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4625                 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4626                         {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4627         };
4628
4629         val = sd->ctrls[BRIGHTNESS].val;
4630         switch (sd->sensor) {
4631         case SEN_OV8610:
4632         case SEN_OV7610:
4633         case SEN_OV76BE:
4634         case SEN_OV6620:
4635         case SEN_OV6630:
4636         case SEN_OV66308AF:
4637         case SEN_OV7640:
4638         case SEN_OV7648:
4639                 i2c_w(sd, OV7610_REG_BRT, val);
4640                 break;
4641         case SEN_OV7620:
4642         case SEN_OV7620AE:
4643                 /* 7620 doesn't like manual changes when in auto mode */
4644                 if (!sd->ctrls[AUTOBRIGHT].val)
4645                         i2c_w(sd, OV7610_REG_BRT, val);
4646                 break;
4647         case SEN_OV7660:
4648                 write_i2c_regvals(sd, brit_7660[val],
4649                                 ARRAY_SIZE(brit_7660[0]));
4650                 break;
4651         case SEN_OV7670:
4652 /*win trace
4653  *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4654                 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4655                 break;
4656         }
4657 }
4658
4659 static void setcontrast(struct gspca_dev *gspca_dev)
4660 {
4661         struct sd *sd = (struct sd *) gspca_dev;
4662         int val;
4663         static const struct ov_i2c_regvals contrast_7660[][31] = {
4664                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4665                  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4666                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4667                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4668                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4669                  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4670                  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4671                  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4672                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4673                  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4674                  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4675                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4676                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4677                  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4678                  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4679                  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4680                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4681                  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4682                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4683                  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4684                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4685                  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4686                  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4687                  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4688                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4689                  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4690                  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4691                  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4692                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4693                  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4694                  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4695                  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4696                 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4697                  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4698                  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4699                  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4700                  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4701                  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4702                  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4703                  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4704                 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4705                  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4706                  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4707                  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4708                  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4709                  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4710                  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4711                  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4712                 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4713                  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4714                  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4715                  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4716                  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4717                  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4718                  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4719                  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4720         };
4721
4722         val = sd->ctrls[CONTRAST].val;
4723         switch (sd->sensor) {
4724         case SEN_OV7610:
4725         case SEN_OV6620:
4726                 i2c_w(sd, OV7610_REG_CNT, val);
4727                 break;
4728         case SEN_OV6630:
4729         case SEN_OV66308AF:
4730                 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4731                 break;
4732         case SEN_OV8610: {
4733                 static const u8 ctab[] = {
4734                         0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4735                 };
4736
4737                 /* Use Y gamma control instead. Bit 0 enables it. */
4738                 i2c_w(sd, 0x64, ctab[val >> 5]);
4739                 break;
4740             }
4741         case SEN_OV7620:
4742         case SEN_OV7620AE: {
4743                 static const u8 ctab[] = {
4744                         0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4745                         0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4746                 };
4747
4748                 /* Use Y gamma control instead. Bit 0 enables it. */
4749                 i2c_w(sd, 0x64, ctab[val >> 4]);
4750                 break;
4751             }
4752         case SEN_OV7660:
4753                 write_i2c_regvals(sd, contrast_7660[val],
4754                                         ARRAY_SIZE(contrast_7660[0]));
4755                 break;
4756         case SEN_OV7670:
4757                 /* check that this isn't just the same as ov7610 */
4758                 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4759                 break;
4760         }
4761 }
4762
4763 static void setexposure(struct gspca_dev *gspca_dev)
4764 {
4765         struct sd *sd = (struct sd *) gspca_dev;
4766
4767         if (!sd->ctrls[AUTOGAIN].val)
4768                 i2c_w(sd, 0x10, sd->ctrls[EXPOSURE].val);
4769 }
4770
4771 static void setcolors(struct gspca_dev *gspca_dev)
4772 {
4773         struct sd *sd = (struct sd *) gspca_dev;
4774         int val;
4775         static const struct ov_i2c_regvals colors_7660[][6] = {
4776                 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4777                  {0x53, 0x19}, {0x54, 0x23}},
4778                 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4779                  {0x53, 0x2c}, {0x54, 0x3e}},
4780                 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4781                  {0x53, 0x40}, {0x54, 0x59}},
4782                 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4783                  {0x53, 0x53}, {0x54, 0x73}},
4784                 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4785                  {0x53, 0x66}, {0x54, 0x8e}},
4786         };
4787
4788         val = sd->ctrls[COLORS].val;
4789         switch (sd->sensor) {
4790         case SEN_OV8610:
4791         case SEN_OV7610:
4792         case SEN_OV76BE:
4793         case SEN_OV6620:
4794         case SEN_OV6630:
4795         case SEN_OV66308AF:
4796                 i2c_w(sd, OV7610_REG_SAT, val);
4797                 break;
4798         case SEN_OV7620:
4799         case SEN_OV7620AE:
4800                 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4801 /*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4802                 if (rc < 0)
4803                         goto out; */
4804                 i2c_w(sd, OV7610_REG_SAT, val);
4805                 break;
4806         case SEN_OV7640:
4807         case SEN_OV7648:
4808                 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4809                 break;
4810         case SEN_OV7660:
4811                 write_i2c_regvals(sd, colors_7660[val],
4812                                         ARRAY_SIZE(colors_7660[0]));
4813                 break;
4814         case SEN_OV7670:
4815                 /* supported later once I work out how to do it
4816                  * transparently fail now! */
4817                 /* set REG_COM13 values for UV sat auto mode */
4818                 break;
4819         }
4820 }
4821
4822 static void setautobright(struct gspca_dev *gspca_dev)
4823 {
4824         struct sd *sd = (struct sd *) gspca_dev;
4825
4826         i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4827 }
4828
4829 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
4830 {
4831         struct sd *sd = (struct sd *) gspca_dev;
4832
4833         sd->ctrls[AUTOGAIN].val = val;
4834         if (val) {
4835                 gspca_dev->ctrl_inac |= (1 << EXPOSURE);
4836         } else {
4837                 gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
4838                 sd->ctrls[EXPOSURE].val = i2c_r(sd, 0x10);
4839         }
4840         if (gspca_dev->streaming)
4841                 setautogain(gspca_dev);
4842         return gspca_dev->usb_err;
4843 }
4844
4845 static void setfreq_i(struct sd *sd)
4846 {
4847         if (sd->sensor == SEN_OV7660
4848          || sd->sensor == SEN_OV7670) {
4849                 switch (sd->ctrls[FREQ].val) {
4850                 case 0: /* Banding filter disabled */
4851                         i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4852                         break;
4853                 case 1: /* 50 hz */
4854                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4855                                    OV7670_COM8_BFILT);
4856                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4857                         break;
4858                 case 2: /* 60 hz */
4859                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4860                                    OV7670_COM8_BFILT);
4861                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4862                         break;
4863                 case 3: /* Auto hz - ov7670 only */
4864                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4865                                    OV7670_COM8_BFILT);
4866                         i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4867                                    0x18);
4868                         break;
4869                 }
4870         } else {
4871                 switch (sd->ctrls[FREQ].val) {
4872                 case 0: /* Banding filter disabled */
4873                         i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4874                         i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4875                         break;
4876                 case 1: /* 50 hz (filter on and framerate adj) */
4877                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4878                         i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4879                         /* 20 fps -> 16.667 fps */
4880                         if (sd->sensor == SEN_OV6620 ||
4881                             sd->sensor == SEN_OV6630 ||
4882                             sd->sensor == SEN_OV66308AF)
4883                                 i2c_w(sd, 0x2b, 0x5e);
4884                         else
4885                                 i2c_w(sd, 0x2b, 0xac);
4886                         break;
4887                 case 2: /* 60 hz (filter on, ...) */
4888                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4889                         if (sd->sensor == SEN_OV6620 ||
4890                             sd->sensor == SEN_OV6630 ||
4891                             sd->sensor == SEN_OV66308AF) {
4892                                 /* 20 fps -> 15 fps */
4893                                 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4894                                 i2c_w(sd, 0x2b, 0xa8);
4895                         } else {
4896                                 /* no framerate adj. */
4897                                 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4898                         }
4899                         break;
4900                 }
4901         }
4902 }
4903 static void setfreq(struct gspca_dev *gspca_dev)
4904 {
4905         struct sd *sd = (struct sd *) gspca_dev;
4906
4907         setfreq_i(sd);
4908
4909         /* Ugly but necessary */
4910         if (sd->bridge == BRIDGE_W9968CF)
4911                 w9968cf_set_crop_window(sd);
4912 }
4913
4914 static int sd_querymenu(struct gspca_dev *gspca_dev,
4915                         struct v4l2_querymenu *menu)
4916 {
4917         struct sd *sd = (struct sd *) gspca_dev;
4918
4919         switch (menu->id) {
4920         case V4L2_CID_POWER_LINE_FREQUENCY:
4921                 switch (menu->index) {
4922                 case 0:         /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4923                         strcpy((char *) menu->name, "NoFliker");
4924                         return 0;
4925                 case 1:         /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4926                         strcpy((char *) menu->name, "50 Hz");
4927                         return 0;
4928                 case 2:         /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4929                         strcpy((char *) menu->name, "60 Hz");
4930                         return 0;
4931                 case 3:
4932                         if (sd->sensor != SEN_OV7670)
4933                                 return -EINVAL;
4934
4935                         strcpy((char *) menu->name, "Automatic");
4936                         return 0;
4937                 }
4938                 break;
4939         }
4940         return -EINVAL;
4941 }
4942
4943 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4944                         struct v4l2_jpegcompression *jcomp)
4945 {
4946         struct sd *sd = (struct sd *) gspca_dev;
4947
4948         if (sd->bridge != BRIDGE_W9968CF)
4949                 return -EINVAL;
4950
4951         memset(jcomp, 0, sizeof *jcomp);
4952         jcomp->quality = sd->quality;
4953         jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4954                               V4L2_JPEG_MARKER_DRI;
4955         return 0;
4956 }
4957
4958 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4959                         struct v4l2_jpegcompression *jcomp)
4960 {
4961         struct sd *sd = (struct sd *) gspca_dev;
4962
4963         if (sd->bridge != BRIDGE_W9968CF)
4964                 return -EINVAL;
4965
4966         if (gspca_dev->streaming)
4967                 return -EBUSY;
4968
4969         if (jcomp->quality < QUALITY_MIN)
4970                 sd->quality = QUALITY_MIN;
4971         else if (jcomp->quality > QUALITY_MAX)
4972                 sd->quality = QUALITY_MAX;
4973         else
4974                 sd->quality = jcomp->quality;
4975
4976         /* Return resulting jcomp params to app */
4977         sd_get_jcomp(gspca_dev, jcomp);
4978
4979         return 0;
4980 }
4981
4982 /* sub-driver description */
4983 static const struct sd_desc sd_desc = {
4984         .name = MODULE_NAME,
4985         .ctrls = sd_ctrls,
4986         .nctrls = ARRAY_SIZE(sd_ctrls),
4987         .config = sd_config,
4988         .init = sd_init,
4989         .isoc_init = sd_isoc_init,
4990         .start = sd_start,
4991         .stopN = sd_stopN,
4992         .stop0 = sd_stop0,
4993         .pkt_scan = sd_pkt_scan,
4994         .dq_callback = sd_reset_snapshot,
4995         .querymenu = sd_querymenu,
4996         .get_jcomp = sd_get_jcomp,
4997         .set_jcomp = sd_set_jcomp,
4998 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4999         .other_input = 1,
5000 #endif
5001 };
5002
5003 /* -- module initialisation -- */
5004 static const struct usb_device_id device_table[] = {
5005         {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
5006         {USB_DEVICE(0x041e, 0x4052),
5007                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5008         {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
5009         {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
5010         {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
5011         {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
5012         {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
5013         {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
5014         {USB_DEVICE(0x045e, 0x028c),
5015                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5016         {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
5017         {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
5018         {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
5019         {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
5020         {USB_DEVICE(0x05a9, 0x0519),
5021                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5022         {USB_DEVICE(0x05a9, 0x0530),
5023                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5024         {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5025         {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5026         {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5027         {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5028         {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5029         {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5030         {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5031         {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5032         {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5033         {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5034         {}
5035 };
5036
5037 MODULE_DEVICE_TABLE(usb, device_table);
5038
5039 /* -- device connect -- */
5040 static int sd_probe(struct usb_interface *intf,
5041                         const struct usb_device_id *id)
5042 {
5043         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5044                                 THIS_MODULE);
5045 }
5046
5047 static struct usb_driver sd_driver = {
5048         .name = MODULE_NAME,
5049         .id_table = device_table,
5050         .probe = sd_probe,
5051         .disconnect = gspca_disconnect,
5052 #ifdef CONFIG_PM
5053         .suspend = gspca_suspend,
5054         .resume = gspca_resume,
5055 #endif
5056 };
5057
5058 module_usb_driver(sd_driver);
5059
5060 module_param(frame_rate, int, 0644);
5061 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");