2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/usb.h>
29 #include <linux/vmalloc.h>
30 #include <media/v4l2-common.h>
34 /* #define ENABLE_DEBUG_ISOC_FRAMES */
36 static unsigned int core_debug;
37 module_param(core_debug, int, 0644);
38 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
40 #define em28xx_coredbg(fmt, arg...) do {\
42 printk(KERN_INFO "%s %s :"fmt, \
43 dev->name, __func__ , ##arg); } while (0)
45 static unsigned int reg_debug;
46 module_param(reg_debug, int, 0644);
47 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
49 #define em28xx_regdbg(fmt, arg...) do {\
51 printk(KERN_INFO "%s %s :"fmt, \
52 dev->name, __func__ , ##arg); } while (0)
55 module_param(alt, int, 0644);
56 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
58 static unsigned int disable_vbi;
59 module_param(disable_vbi, int, 0644);
60 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
63 #define em28xx_isocdbg(fmt, arg...) do {\
65 printk(KERN_INFO "%s %s :"fmt, \
66 dev->name, __func__ , ##arg); } while (0)
69 * em28xx_read_reg_req()
70 * reads data from the usb device specifying bRequest
72 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
76 int pipe = usb_rcvctrlpipe(dev->udev, 0);
78 if (dev->state & DEV_DISCONNECTED)
81 if (len > URB_MAX_CTRL_SIZE)
85 printk(KERN_DEBUG "(pipe 0x%08x): "
86 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
88 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
91 len & 0xff, len >> 8);
94 mutex_lock(&dev->ctrl_urb_lock);
95 ret = usb_control_msg(dev->udev, pipe, req,
96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
97 0x0000, reg, dev->urb_buf, len, HZ);
100 printk(" failed!\n");
101 mutex_unlock(&dev->ctrl_urb_lock);
106 memcpy(buf, dev->urb_buf, len);
108 mutex_unlock(&dev->ctrl_urb_lock);
114 for (byte = 0; byte < len; byte++)
115 printk(" %02x", (unsigned char)buf[byte]);
123 * em28xx_read_reg_req()
124 * reads data from the usb device specifying bRequest
126 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
131 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
138 int em28xx_read_reg(struct em28xx *dev, u16 reg)
140 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
144 * em28xx_write_regs_req()
145 * sends data to the usb device, specifying bRequest
147 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
151 int pipe = usb_sndctrlpipe(dev->udev, 0);
153 if (dev->state & DEV_DISCONNECTED)
156 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
162 printk(KERN_DEBUG "(pipe 0x%08x): "
163 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
165 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
167 reg & 0xff, reg >> 8,
168 len & 0xff, len >> 8);
170 for (byte = 0; byte < len; byte++)
171 printk(" %02x", (unsigned char)buf[byte]);
175 mutex_lock(&dev->ctrl_urb_lock);
176 memcpy(dev->urb_buf, buf, len);
177 ret = usb_control_msg(dev->udev, pipe, req,
178 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
179 0x0000, reg, dev->urb_buf, len, HZ);
180 mutex_unlock(&dev->ctrl_urb_lock);
182 if (dev->wait_after_write)
183 msleep(dev->wait_after_write);
188 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
192 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
194 /* Stores GPO/GPIO values at the cache, if changed
195 Only write values should be stored, since input on a GPIO
196 register will return the input bits.
197 Not sure what happens on reading GPO register.
200 if (reg == dev->reg_gpo_num)
201 dev->reg_gpo = buf[0];
202 else if (reg == dev->reg_gpio_num)
203 dev->reg_gpio = buf[0];
209 /* Write a single register */
210 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
212 return em28xx_write_regs(dev, reg, &val, 1);
214 EXPORT_SYMBOL_GPL(em28xx_write_reg);
217 * em28xx_write_reg_bits()
218 * sets only some bits (specified by bitmask) of a register, by first reading
221 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
227 /* Uses cache for gpo/gpio registers */
228 if (reg == dev->reg_gpo_num)
229 oldval = dev->reg_gpo;
230 else if (reg == dev->reg_gpio_num)
231 oldval = dev->reg_gpio;
233 oldval = em28xx_read_reg(dev, reg);
238 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
240 return em28xx_write_regs(dev, reg, &newval, 1);
244 * em28xx_is_ac97_ready()
245 * Checks if ac97 is ready
247 static int em28xx_is_ac97_ready(struct em28xx *dev)
251 /* Wait up to 50 ms for AC97 command to complete */
252 for (i = 0; i < 10; i++, msleep(5)) {
253 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
261 em28xx_warn("AC97 command still being executed: not handled properly!\n");
267 * write a 16 bit value to the specified AC97 address (LSB first!)
269 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
272 u8 addr = (reg & 0x7f) | 0x80;
275 ret = em28xx_is_ac97_ready(dev);
279 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
283 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
284 (u8 *)&val, sizeof(val));
288 return le16_to_cpu(val);
290 EXPORT_SYMBOL_GPL(em28xx_read_ac97);
293 * em28xx_write_ac97()
294 * write a 16 bit value to the specified AC97 address (LSB first!)
296 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
299 u8 addr = reg & 0x7f;
302 value = cpu_to_le16(val);
304 ret = em28xx_is_ac97_ready(dev);
308 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
312 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
318 EXPORT_SYMBOL_GPL(em28xx_write_ac97);
320 struct em28xx_vol_itable {
321 enum em28xx_amux mux;
325 static struct em28xx_vol_itable inputs[] = {
326 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
327 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
328 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
329 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
330 { EM28XX_AMUX_CD, AC97_CD_VOL },
331 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
332 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
335 static int set_ac97_input(struct em28xx *dev)
338 enum em28xx_amux amux = dev->ctl_ainput;
340 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
341 em28xx should point to LINE IN, while AC97 should use VIDEO
343 if (amux == EM28XX_AMUX_VIDEO2)
344 amux = EM28XX_AMUX_VIDEO;
346 /* Mute all entres but the one that were selected */
347 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
348 if (amux == inputs[i].mux)
349 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
351 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
354 em28xx_warn("couldn't setup AC97 register %d\n",
360 static int em28xx_set_audio_source(struct em28xx *dev)
365 if (dev->board.is_em2800) {
366 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
367 input = EM2800_AUDIO_SRC_TUNER;
369 input = EM2800_AUDIO_SRC_LINE;
371 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
376 if (dev->board.has_msp34xx)
377 input = EM28XX_AUDIO_SRC_TUNER;
379 switch (dev->ctl_ainput) {
380 case EM28XX_AMUX_VIDEO:
381 input = EM28XX_AUDIO_SRC_TUNER;
384 input = EM28XX_AUDIO_SRC_LINE;
389 if (dev->board.mute_gpio && dev->mute)
390 em28xx_gpio_set(dev, dev->board.mute_gpio);
392 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
394 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
399 switch (dev->audio_mode.ac97) {
403 ret = set_ac97_input(dev);
409 struct em28xx_vol_otable {
410 enum em28xx_aout mux;
414 static const struct em28xx_vol_otable outputs[] = {
415 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
416 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
417 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
418 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
419 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
422 int em28xx_audio_analog_set(struct em28xx *dev)
427 if (!dev->audio_mode.has_audio)
430 /* It is assumed that all devices use master volume for output.
431 It would be possible to use also line output.
433 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
434 /* Mute all outputs */
435 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
436 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
438 em28xx_warn("couldn't setup AC97 register %d\n",
443 xclk = dev->board.xclk & 0x7f;
445 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
447 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
452 /* Selects the proper audio input */
453 ret = em28xx_set_audio_source(dev);
456 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
459 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
460 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
461 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
463 /* LSB: left channel - both channels with the same level */
464 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
466 /* Mute device, if needed */
471 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
472 if (dev->ctl_aoutput & outputs[i].mux)
473 ret = em28xx_write_ac97(dev, outputs[i].reg,
476 em28xx_warn("couldn't setup AC97 register %d\n",
480 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
481 int sel = ac97_return_record_select(dev->ctl_aoutput);
483 /* Use the same input for both left and right
487 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
493 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
495 int em28xx_audio_setup(struct em28xx *dev)
497 int vid1, vid2, feat, cfg;
500 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874
501 || dev->chip_id == CHIP_ID_EM28174) {
502 /* Digital only device - don't load any alsa module */
503 dev->audio_mode.has_audio = false;
504 dev->has_audio_class = false;
505 dev->has_alsa_audio = false;
509 dev->audio_mode.has_audio = true;
511 /* See how this device is configured */
512 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
513 em28xx_info("Config register raw data: 0x%02x\n", cfg);
515 /* Register read error? */
516 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
517 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
518 /* The device doesn't have vendor audio at all */
519 dev->has_alsa_audio = false;
520 dev->audio_mode.has_audio = false;
522 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
523 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
524 em28xx_info("I2S Audio (3 sample rates)\n");
525 dev->audio_mode.i2s_3rates = 1;
526 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
527 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
528 em28xx_info("I2S Audio (5 sample rates)\n");
529 dev->audio_mode.i2s_5rates = 1;
532 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
533 /* Skip the code that does AC97 vendor detection */
534 dev->audio_mode.ac97 = EM28XX_NO_AC97;
538 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
540 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
543 * Device likely doesn't support AC97
544 * Note: (some) em2800 devices without eeprom reports 0x91 on
545 * CHIPCFG register, even not having an AC97 chip
547 em28xx_warn("AC97 chip type couldn't be determined\n");
548 dev->audio_mode.ac97 = EM28XX_NO_AC97;
549 dev->has_alsa_audio = false;
550 dev->audio_mode.has_audio = false;
554 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
558 vid = vid1 << 16 | vid2;
560 dev->audio_mode.ac97_vendor_id = vid;
561 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
563 feat = em28xx_read_ac97(dev, AC97_RESET);
567 dev->audio_mode.ac97_feat = feat;
568 em28xx_warn("AC97 features = 0x%04x\n", feat);
570 /* Try to identify what audio processor we have */
571 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
572 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
573 else if ((vid >> 8) == 0x838476)
574 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
577 /* Reports detected AC97 processor */
578 switch (dev->audio_mode.ac97) {
580 em28xx_info("No AC97 audio processor\n");
582 case EM28XX_AC97_EM202:
583 em28xx_info("Empia 202 AC97 audio processor detected\n");
585 case EM28XX_AC97_SIGMATEL:
586 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
587 dev->audio_mode.ac97_vendor_id & 0xff);
589 case EM28XX_AC97_OTHER:
590 em28xx_warn("Unknown AC97 audio processor detected!\n");
596 return em28xx_audio_analog_set(dev);
598 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
600 int em28xx_colorlevels_set_default(struct em28xx *dev)
602 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
603 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
604 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
605 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
606 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
607 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
609 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
610 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
611 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
612 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
613 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
614 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
615 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
618 int em28xx_capture_start(struct em28xx *dev, int start)
622 if (dev->chip_id == CHIP_ID_EM2874 ||
623 dev->chip_id == CHIP_ID_EM2884 ||
624 dev->chip_id == CHIP_ID_EM28174) {
625 /* The Transport Stream Enable Register moved in em2874 */
627 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
629 EM2874_TS1_CAPTURE_ENABLE);
633 /* Enable Transport Stream */
634 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
635 EM2874_TS1_CAPTURE_ENABLE,
636 EM2874_TS1_CAPTURE_ENABLE);
641 /* FIXME: which is the best order? */
642 /* video registers are sampled by VREF */
643 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
644 start ? 0x10 : 0x00, 0x10);
649 /* disable video capture */
650 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
654 if (dev->board.is_webcam)
655 rc = em28xx_write_reg(dev, 0x13, 0x0c);
657 /* enable video capture */
658 rc = em28xx_write_reg(dev, 0x48, 0x00);
660 if (dev->mode == EM28XX_ANALOG_MODE)
661 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
663 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
669 EXPORT_SYMBOL_GPL(em28xx_capture_start);
671 int em28xx_vbi_supported(struct em28xx *dev)
673 /* Modprobe option to manually disable */
674 if (disable_vbi == 1)
677 if (dev->chip_id == CHIP_ID_EM2860 ||
678 dev->chip_id == CHIP_ID_EM2883)
681 /* Version of em28xx that does not support VBI */
685 int em28xx_set_outfmt(struct em28xx *dev)
690 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
691 dev->format->reg | 0x20, 0xff);
695 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
699 vinctrl = dev->vinctl;
700 if (em28xx_vbi_supported(dev) == 1) {
701 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
702 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
703 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
704 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
705 if (dev->norm & V4L2_STD_525_60) {
707 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
708 } else if (dev->norm & V4L2_STD_625_50) {
710 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
714 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
717 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
720 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
721 xmin, ymin, xmax, ymax);
723 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
724 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
725 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
726 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
729 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
730 u16 width, u16 height)
734 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
736 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
737 (width | (overflow & 2) << 7),
738 (height | (overflow & 1) << 8));
740 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
741 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
742 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
743 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
744 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
747 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
750 /* the em2800 scaler only supports scaling down to 50% */
752 if (dev->board.is_em2800) {
753 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
759 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
763 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
764 /* it seems that both H and V scalers must be active
766 mode = (h || v) ? 0x30 : 0x00;
768 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
771 /* FIXME: this only function read values from dev */
772 int em28xx_resolution_set(struct em28xx *dev)
775 width = norm_maxw(dev);
776 height = norm_maxh(dev);
778 /* Properly setup VBI */
779 dev->vbi_width = 720;
780 if (dev->norm & V4L2_STD_525_60)
781 dev->vbi_height = 12;
783 dev->vbi_height = 18;
785 if (!dev->progressive)
786 height >>= norm_maxh(dev);
788 em28xx_set_outfmt(dev);
791 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
793 /* If we don't set the start position to 2 in VBI mode, we end up
794 with line 20/21 being YUYV encoded instead of being in 8-bit
795 greyscale. The core of the issue is that line 21 (and line 23 for
796 PAL WSS) are inside of active video region, and as a result they
797 get the pixelformatting associated with that area. So by cropping
798 it out, we end up with the same format as the rest of the VBI
800 if (em28xx_vbi_supported(dev) == 1)
801 em28xx_capture_area_set(dev, 0, 2, width >> 2, height >> 2);
803 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
805 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
808 int em28xx_set_alternate(struct em28xx *dev)
810 int errCode, prev_alt = dev->alt;
812 unsigned int min_pkt_size = dev->width * 2 + 4;
815 * alt = 0 is used only for control messages, so, only values
816 * greater than 0 can be used for streaming.
818 if (alt && alt < dev->num_alt) {
819 em28xx_coredbg("alternate forced to %d\n", dev->alt);
824 /* When image size is bigger than a certain value,
825 the frame size should be increased, otherwise, only
826 green screen will be received.
828 if (dev->width * 2 * dev->height > 720 * 240 * 2)
831 for (i = 0; i < dev->num_alt; i++) {
832 /* stop when the selected alt setting offers enough bandwidth */
833 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
836 /* otherwise make sure that we end up with the maximum bandwidth
837 because the min_pkt_size equation might be wrong...
839 } else if (dev->alt_max_pkt_size[i] >
840 dev->alt_max_pkt_size[dev->alt])
845 if (dev->alt != prev_alt) {
846 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
847 min_pkt_size, dev->alt);
848 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
849 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
850 dev->alt, dev->max_pkt_size);
851 errCode = usb_set_interface(dev->udev, 0, dev->alt);
853 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
861 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
868 if (dev->mode != EM28XX_SUSPEND) {
869 em28xx_write_reg(dev, 0x48, 0x00);
870 if (dev->mode == EM28XX_ANALOG_MODE)
871 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
873 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
877 /* Send GPIO reset sequences specified at board entry */
878 while (gpio->sleep >= 0) {
879 if (gpio->reg >= 0) {
880 rc = em28xx_write_reg_bits(dev,
894 EXPORT_SYMBOL_GPL(em28xx_gpio_set);
896 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
898 if (dev->mode == set_mode)
901 if (set_mode == EM28XX_SUSPEND) {
902 dev->mode = set_mode;
904 /* FIXME: add suspend support for ac97 */
906 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
909 dev->mode = set_mode;
911 if (dev->mode == EM28XX_DIGITAL_MODE)
912 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
914 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
916 EXPORT_SYMBOL_GPL(em28xx_set_mode);
918 /* ------------------------------------------------------------------
920 ------------------------------------------------------------------*/
923 * IRQ callback, called by URB callback
925 static void em28xx_irq_callback(struct urb *urb)
927 struct em28xx *dev = urb->context;
930 switch (urb->status) {
931 case 0: /* success */
932 case -ETIMEDOUT: /* NAK */
934 case -ECONNRESET: /* kill */
939 em28xx_isocdbg("urb completition error %d.\n", urb->status);
943 /* Copy data from URB */
944 spin_lock(&dev->slock);
945 dev->isoc_ctl.isoc_copy(dev, urb);
946 spin_unlock(&dev->slock);
948 /* Reset urb buffers */
949 for (i = 0; i < urb->number_of_packets; i++) {
950 urb->iso_frame_desc[i].status = 0;
951 urb->iso_frame_desc[i].actual_length = 0;
955 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
957 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
963 * Stop and Deallocate URBs
965 void em28xx_uninit_isoc(struct em28xx *dev, enum em28xx_mode mode)
968 struct em28xx_usb_isoc_bufs *isoc_bufs;
971 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc in mode %d\n", mode);
973 if (mode == EM28XX_DIGITAL_MODE)
974 isoc_bufs = &dev->isoc_ctl.digital_bufs;
976 isoc_bufs = &dev->isoc_ctl.analog_bufs;
978 dev->isoc_ctl.nfields = -1;
979 for (i = 0; i < isoc_bufs->num_bufs; i++) {
980 urb = isoc_bufs->urb[i];
982 if (!irqs_disabled())
987 if (isoc_bufs->transfer_buffer[i]) {
988 usb_free_coherent(dev->udev,
989 urb->transfer_buffer_length,
990 isoc_bufs->transfer_buffer[i],
994 isoc_bufs->urb[i] = NULL;
996 isoc_bufs->transfer_buffer[i] = NULL;
999 kfree(isoc_bufs->urb);
1000 kfree(isoc_bufs->transfer_buffer);
1002 isoc_bufs->urb = NULL;
1003 isoc_bufs->transfer_buffer = NULL;
1004 isoc_bufs->num_bufs = 0;
1006 em28xx_capture_start(dev, 0);
1008 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
1013 int em28xx_alloc_isoc(struct em28xx *dev, enum em28xx_mode mode,
1014 int max_packets, int num_bufs, int max_pkt_size)
1016 struct em28xx_usb_isoc_bufs *isoc_bufs;
1022 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
1024 if (mode == EM28XX_DIGITAL_MODE)
1025 isoc_bufs = &dev->isoc_ctl.digital_bufs;
1027 isoc_bufs = &dev->isoc_ctl.analog_bufs;
1029 /* De-allocates all pending stuff */
1030 em28xx_uninit_isoc(dev, mode);
1032 isoc_bufs->num_bufs = num_bufs;
1034 isoc_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1035 if (!isoc_bufs->urb) {
1036 em28xx_errdev("cannot alloc memory for usb buffers\n");
1040 isoc_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1042 if (!isoc_bufs->transfer_buffer) {
1043 em28xx_errdev("cannot allocate memory for usb transfer\n");
1044 kfree(isoc_bufs->urb);
1048 isoc_bufs->max_pkt_size = max_pkt_size;
1049 isoc_bufs->num_packets = max_packets;
1050 dev->isoc_ctl.vid_buf = NULL;
1051 dev->isoc_ctl.vbi_buf = NULL;
1053 sb_size = isoc_bufs->num_packets * isoc_bufs->max_pkt_size;
1055 /* allocate urbs and transfer buffers */
1056 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1057 urb = usb_alloc_urb(isoc_bufs->num_packets, GFP_KERNEL);
1059 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1060 em28xx_uninit_isoc(dev, mode);
1063 isoc_bufs->urb[i] = urb;
1065 isoc_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev,
1066 sb_size, GFP_KERNEL, &urb->transfer_dma);
1067 if (!isoc_bufs->transfer_buffer[i]) {
1068 em28xx_err("unable to allocate %i bytes for transfer"
1071 in_interrupt() ? " while in int" : "");
1072 em28xx_uninit_isoc(dev, mode);
1075 memset(isoc_bufs->transfer_buffer[i], 0, sb_size);
1077 /* FIXME: this is a hack - should be
1078 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1079 should also be using 'desc.bInterval'
1081 pipe = usb_rcvisocpipe(dev->udev,
1082 mode == EM28XX_ANALOG_MODE ?
1083 EM28XX_EP_ANALOG : EM28XX_EP_DIGITAL);
1085 usb_fill_int_urb(urb, dev->udev, pipe,
1086 isoc_bufs->transfer_buffer[i], sb_size,
1087 em28xx_irq_callback, dev, 1);
1089 urb->number_of_packets = isoc_bufs->num_packets;
1090 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1093 for (j = 0; j < isoc_bufs->num_packets; j++) {
1094 urb->iso_frame_desc[j].offset = k;
1095 urb->iso_frame_desc[j].length =
1096 isoc_bufs->max_pkt_size;
1097 k += isoc_bufs->max_pkt_size;
1103 EXPORT_SYMBOL_GPL(em28xx_alloc_isoc);
1106 * Allocate URBs and start IRQ
1108 int em28xx_init_isoc(struct em28xx *dev, enum em28xx_mode mode,
1109 int max_packets, int num_bufs, int max_pkt_size,
1110 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
1112 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1113 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1114 struct em28xx_usb_isoc_bufs *isoc_bufs;
1119 em28xx_isocdbg("em28xx: called em28xx_init_isoc in mode %d\n", mode);
1121 dev->isoc_ctl.isoc_copy = isoc_copy;
1123 if (mode == EM28XX_DIGITAL_MODE) {
1124 isoc_bufs = &dev->isoc_ctl.digital_bufs;
1125 /* no need to free/alloc isoc buffers in digital mode */
1128 isoc_bufs = &dev->isoc_ctl.analog_bufs;
1133 rc = em28xx_alloc_isoc(dev, mode, max_packets,
1134 num_bufs, max_pkt_size);
1139 init_waitqueue_head(&dma_q->wq);
1140 init_waitqueue_head(&vbi_dma_q->wq);
1142 em28xx_capture_start(dev, 1);
1144 /* submit urbs and enables IRQ */
1145 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1146 rc = usb_submit_urb(isoc_bufs->urb[i], GFP_ATOMIC);
1148 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1150 em28xx_uninit_isoc(dev, mode);
1157 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1161 * configure i2c attached devices
1163 void em28xx_wake_i2c(struct em28xx *dev)
1165 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1166 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1167 INPUT(dev->ctl_input)->vmux, 0, 0);
1168 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1172 * Device control list
1175 static LIST_HEAD(em28xx_devlist);
1176 static DEFINE_MUTEX(em28xx_devlist_mutex);
1179 * Extension interface
1182 static LIST_HEAD(em28xx_extension_devlist);
1184 int em28xx_register_extension(struct em28xx_ops *ops)
1186 struct em28xx *dev = NULL;
1188 mutex_lock(&em28xx_devlist_mutex);
1189 list_add_tail(&ops->next, &em28xx_extension_devlist);
1190 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1193 mutex_unlock(&em28xx_devlist_mutex);
1194 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1197 EXPORT_SYMBOL(em28xx_register_extension);
1199 void em28xx_unregister_extension(struct em28xx_ops *ops)
1201 struct em28xx *dev = NULL;
1203 mutex_lock(&em28xx_devlist_mutex);
1204 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1207 list_del(&ops->next);
1208 mutex_unlock(&em28xx_devlist_mutex);
1209 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1211 EXPORT_SYMBOL(em28xx_unregister_extension);
1213 void em28xx_init_extension(struct em28xx *dev)
1215 const struct em28xx_ops *ops = NULL;
1217 mutex_lock(&em28xx_devlist_mutex);
1218 list_add_tail(&dev->devlist, &em28xx_devlist);
1219 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1223 mutex_unlock(&em28xx_devlist_mutex);
1226 void em28xx_close_extension(struct em28xx *dev)
1228 const struct em28xx_ops *ops = NULL;
1230 mutex_lock(&em28xx_devlist_mutex);
1231 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1235 list_del(&dev->devlist);
1236 mutex_unlock(&em28xx_devlist_mutex);