drivers/media/video/cx23885/cx23885.h

   1 /*
   2  *  Driver for the Conexant CX23885 PCIe bridge
   3  *
   4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/pci.h>
  23 #include <linux/i2c.h>
  24 #include <linux/i2c-algo-bit.h>
  25 #include <linux/kdev_t.h>
  26
  27 #include <media/v4l2-common.h>
  28 #include <media/tuner.h>
  29 #include <media/tveeprom.h>
  30 #include <media/videobuf-dma-sg.h>
  31 #include <media/videobuf-dvb.h>
  32
  33 #include "btcx-risc.h"
  34 #include "cx23885-reg.h"
  35 #include "media/cx2341x.h"
  36
  37 #include <linux/version.h>
  38 #include <linux/mutex.h>
  39
  40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)
  41
  42 #define UNSET (-1U)
  43
  44 #define CX23885_MAXBOARDS 8
  45
  46 /* Max number of inputs by card */
  47 #define MAX_CX23885_INPUT 8
  48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  49 #define RESOURCE_OVERLAY       1
  50 #define RESOURCE_VIDEO         2
  51 #define RESOURCE_VBI           4
  52
  53 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
  54
  55 #define CX23885_BOARD_NOAUTO               UNSET
  56 #define CX23885_BOARD_UNKNOWN                  0
  57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
  58 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
  59 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
  60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
  61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
  62 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
  63 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
  64 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
  65 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
  66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  69
  70 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  71 #define CX23885_NORMS (\
  72         V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
  73         V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
  74         V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
  75         V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
  76
  77 struct cx23885_fmt {
  78         char  *name;
  79         u32   fourcc;          /* v4l2 format id */
  80         int   depth;
  81         int   flags;
  82         u32   cxformat;
  83 };
  84
  85 struct cx23885_ctrl {
  86         struct v4l2_queryctrl v;
  87         u32                   off;
  88         u32                   reg;
  89         u32                   mask;
  90         u32                   shift;
  91 };
  92
  93 struct cx23885_tvnorm {
  94         char            *name;
  95         v4l2_std_id     id;
  96         u32             cxiformat;
  97         u32             cxoformat;
  98 };
  99
 100 struct cx23885_fh {
 101         struct cx23885_dev         *dev;
 102         enum v4l2_buf_type         type;
 103         int                        radio;
 104         u32                        resources;
 105
 106         /* video overlay */
 107         struct v4l2_window         win;
 108         struct v4l2_clip           *clips;
 109         unsigned int               nclips;
 110
 111         /* video capture */
 112         struct cx23885_fmt         *fmt;
 113         unsigned int               width, height;
 114
 115         /* vbi capture */
 116         struct videobuf_queue      vidq;
 117         struct videobuf_queue      vbiq;
 118
 119         /* MPEG Encoder specifics ONLY */
 120         struct videobuf_queue      mpegq;
 121         atomic_t                   v4l_reading;
 122 };
 123
 124 enum cx23885_itype {
 125         CX23885_VMUX_COMPOSITE1 = 1,
 126         CX23885_VMUX_COMPOSITE2,
 127         CX23885_VMUX_COMPOSITE3,
 128         CX23885_VMUX_COMPOSITE4,
 129         CX23885_VMUX_SVIDEO,
 130         CX23885_VMUX_TELEVISION,
 131         CX23885_VMUX_CABLE,
 132         CX23885_VMUX_DVB,
 133         CX23885_VMUX_DEBUG,
 134         CX23885_RADIO,
 135 };
 136
 137 enum cx23885_src_sel_type {
 138         CX23885_SRC_SEL_EXT_656_VIDEO = 0,
 139         CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
 140 };
 141
 142 /* buffer for one video frame */
 143 struct cx23885_buffer {
 144         /* common v4l buffer stuff -- must be first */
 145         struct videobuf_buffer vb;
 146
 147         /* cx23885 specific */
 148         unsigned int           bpl;
 149         struct btcx_riscmem    risc;
 150         struct cx23885_fmt     *fmt;
 151         u32                    count;
 152 };
 153
 154 struct cx23885_input {
 155         enum cx23885_itype type;
 156         unsigned int    vmux;
 157         u32             gpio0, gpio1, gpio2, gpio3;
 158 };
 159
 160 typedef enum {
 161         CX23885_MPEG_UNDEFINED = 0,
 162         CX23885_MPEG_DVB,
 163         CX23885_ANALOG_VIDEO,
 164         CX23885_MPEG_ENCODER,
 165 } port_t;
 166
 167 struct cx23885_board {
 168         char                    *name;
 169         port_t                  porta, portb, portc;
 170         unsigned int            tuner_type;
 171         unsigned int            radio_type;
 172         unsigned char           tuner_addr;
 173         unsigned char           radio_addr;
 174
 175         /* Vendors can and do run the PCIe bridge at different
 176          * clock rates, driven physically by crystals on the PCBs.
 177          * The core has to accomodate this. This allows the user
 178          * to add new boards with new frequencys. The value is
 179          * expressed in Hz.
 180          *
 181          * The core framework will default this value based on
 182          * current designs, but it can vary.
 183          */
 184         u32                     clk_freq;
 185         struct cx23885_input    input[MAX_CX23885_INPUT];
 186 };
 187
 188 struct cx23885_subid {
 189         u16     subvendor;
 190         u16     subdevice;
 191         u32     card;
 192 };
 193
 194 struct cx23885_i2c {
 195         struct cx23885_dev *dev;
 196
 197         int                        nr;
 198
 199         /* i2c i/o */
 200         struct i2c_adapter         i2c_adap;
 201         struct i2c_algo_bit_data   i2c_algo;
 202         struct i2c_client          i2c_client;
 203         u32                        i2c_rc;
 204
 205         /* 885 registers used for raw addess */
 206         u32                        i2c_period;
 207         u32                        reg_ctrl;
 208         u32                        reg_stat;
 209         u32                        reg_addr;
 210         u32                        reg_rdata;
 211         u32                        reg_wdata;
 212 };
 213
 214 struct cx23885_dmaqueue {
 215         struct list_head       active;
 216         struct list_head       queued;
 217         struct timer_list      timeout;
 218         struct btcx_riscmem    stopper;
 219         u32                    count;
 220 };
 221
 222 struct cx23885_tsport {
 223         struct cx23885_dev *dev;
 224
 225         int                        nr;
 226         int                        sram_chno;
 227
 228         struct videobuf_dvb_frontends frontends;
 229
 230         /* dma queues */
 231         struct cx23885_dmaqueue    mpegq;
 232         u32                        ts_packet_size;
 233         u32                        ts_packet_count;
 234
 235         int                        width;
 236         int                        height;
 237
 238         spinlock_t                 slock;
 239
 240         /* registers */
 241         u32                        reg_gpcnt;
 242         u32                        reg_gpcnt_ctl;
 243         u32                        reg_dma_ctl;
 244         u32                        reg_lngth;
 245         u32                        reg_hw_sop_ctrl;
 246         u32                        reg_gen_ctrl;
 247         u32                        reg_bd_pkt_status;
 248         u32                        reg_sop_status;
 249         u32                        reg_fifo_ovfl_stat;
 250         u32                        reg_vld_misc;
 251         u32                        reg_ts_clk_en;
 252         u32                        reg_ts_int_msk;
 253         u32                        reg_ts_int_stat;
 254         u32                        reg_src_sel;
 255
 256         /* Default register vals */
 257         int                        pci_irqmask;
 258         u32                        dma_ctl_val;
 259         u32                        ts_int_msk_val;
 260         u32                        gen_ctrl_val;
 261         u32                        ts_clk_en_val;
 262         u32                        src_sel_val;
 263         u32                        vld_misc_val;
 264         u32                        hw_sop_ctrl_val;
 265
 266         /* Allow a single tsport to have multiple frontends */
 267         u32                        num_frontends;
 268 };
 269
 270 struct cx23885_dev {
 271         struct list_head           devlist;
 272         atomic_t                   refcount;
 273
 274         /* pci stuff */
 275         struct pci_dev             *pci;
 276         unsigned char              pci_rev, pci_lat;
 277         int                        pci_bus, pci_slot;
 278         u32                        __iomem *lmmio;
 279         u8                         __iomem *bmmio;
 280         int                        pci_irqmask;
 281         int                        hwrevision;
 282
 283         /* This valud is board specific and is used to configure the
 284          * AV core so we see nice clean and stable video and audio. */
 285         u32                        clk_freq;
 286
 287         /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
 288         struct cx23885_i2c         i2c_bus[3];
 289
 290         int                        nr;
 291         struct mutex               lock;
 292
 293         /* board details */
 294         unsigned int               board;
 295         char                       name[32];
 296
 297         struct cx23885_tsport      ts1, ts2;
 298
 299         /* sram configuration */
 300         struct sram_channel        *sram_channels;
 301
 302         enum {
 303                 CX23885_BRIDGE_UNDEFINED = 0,
 304                 CX23885_BRIDGE_885 = 885,
 305                 CX23885_BRIDGE_887 = 887,
 306         } bridge;
 307
 308         /* Analog video */
 309         u32                        resources;
 310         unsigned int               input;
 311         u32                        tvaudio;
 312         v4l2_std_id                tvnorm;
 313         unsigned int               tuner_type;
 314         unsigned char              tuner_addr;
 315         unsigned int               radio_type;
 316         unsigned char              radio_addr;
 317         unsigned int               has_radio;
 318
 319         /* V4l */
 320         u32                        freq;
 321         struct video_device        *video_dev;
 322         struct video_device        *vbi_dev;
 323         struct video_device        *radio_dev;
 324
 325         struct cx23885_dmaqueue    vidq;
 326         struct cx23885_dmaqueue    vbiq;
 327         spinlock_t                 slock;
 328
 329         /* MPEG Encoder ONLY settings */
 330         u32                        cx23417_mailbox;
 331         struct cx2341x_mpeg_params mpeg_params;
 332         struct video_device        *v4l_device;
 333         atomic_t                   v4l_reader_count;
 334         struct cx23885_tvnorm      encodernorm;
 335
 336 };
 337
 338 extern struct list_head cx23885_devlist;
 339
 340 #define SRAM_CH01  0 /* Video A */
 341 #define SRAM_CH02  1 /* VBI A */
 342 #define SRAM_CH03  2 /* Video B */
 343 #define SRAM_CH04  3 /* Transport via B */
 344 #define SRAM_CH05  4 /* VBI B */
 345 #define SRAM_CH06  5 /* Video C */
 346 #define SRAM_CH07  6 /* Transport via C */
 347 #define SRAM_CH08  7 /* Audio Internal A */
 348 #define SRAM_CH09  8 /* Audio Internal B */
 349 #define SRAM_CH10  9 /* Audio External */
 350 #define SRAM_CH11 10 /* COMB_3D_N */
 351 #define SRAM_CH12 11 /* Comb 3D N1 */
 352 #define SRAM_CH13 12 /* Comb 3D N2 */
 353 #define SRAM_CH14 13 /* MOE Vid */
 354 #define SRAM_CH15 14 /* MOE RSLT */
 355
 356 struct sram_channel {
 357         char *name;
 358         u32  cmds_start;
 359         u32  ctrl_start;
 360         u32  cdt;
 361         u32  fifo_start;;
 362         u32  fifo_size;
 363         u32  ptr1_reg;
 364         u32  ptr2_reg;
 365         u32  cnt1_reg;
 366         u32  cnt2_reg;
 367         u32  jumponly;
 368 };
 369
 370 /* ----------------------------------------------------------- */
 371
 372 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
 373 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
 374
 375 #define cx_andor(reg, mask, value) \
 376   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
 377   ((value) & (mask)), dev->lmmio+((reg)>>2))
 378
 379 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
 380 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
 381
 382 /* ----------------------------------------------------------- */
 383 /* cx23885-core.c                                              */
 384
 385 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
 386         struct sram_channel *ch,
 387         unsigned int bpl, u32 risc);
 388
 389 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
 390         struct sram_channel *ch);
 391
 392 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
 393         u32 reg, u32 mask, u32 value);
 394
 395 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
 396         struct scatterlist *sglist,
 397         unsigned int top_offset, unsigned int bottom_offset,
 398         unsigned int bpl, unsigned int padding, unsigned int lines);
 399
 400 void cx23885_cancel_buffers(struct cx23885_tsport *port);
 401
 402 extern int cx23885_restart_queue(struct cx23885_tsport *port,
 403                                 struct cx23885_dmaqueue *q);
 404
 405 extern void cx23885_wakeup(struct cx23885_tsport *port,
 406                            struct cx23885_dmaqueue *q, u32 count);
 407
 408
 409 /* ----------------------------------------------------------- */
 410 /* cx23885-cards.c                                             */
 411 extern struct cx23885_board cx23885_boards[];
 412 extern const unsigned int cx23885_bcount;
 413
 414 extern struct cx23885_subid cx23885_subids[];
 415 extern const unsigned int cx23885_idcount;
 416
 417 extern int cx23885_tuner_callback(void *priv, int component,
 418         int command, int arg);
 419 extern void cx23885_card_list(struct cx23885_dev *dev);
 420 extern int  cx23885_ir_init(struct cx23885_dev *dev);
 421 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
 422 extern void cx23885_card_setup(struct cx23885_dev *dev);
 423 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
 424
 425 extern int cx23885_dvb_register(struct cx23885_tsport *port);
 426 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
 427
 428 extern int cx23885_buf_prepare(struct videobuf_queue *q,
 429                                struct cx23885_tsport *port,
 430                                struct cx23885_buffer *buf,
 431                                enum v4l2_field field);
 432 extern void cx23885_buf_queue(struct cx23885_tsport *port,
 433                               struct cx23885_buffer *buf);
 434 extern void cx23885_free_buffer(struct videobuf_queue *q,
 435                                 struct cx23885_buffer *buf);
 436
 437 /* ----------------------------------------------------------- */
 438 /* cx23885-video.c                                             */
 439 /* Video */
 440 extern int cx23885_video_register(struct cx23885_dev *dev);
 441 extern void cx23885_video_unregister(struct cx23885_dev *dev);
 442 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
 443
 444 /* ----------------------------------------------------------- */
 445 /* cx23885-vbi.c                                               */
 446 extern int cx23885_vbi_fmt(struct file *file, void *priv,
 447         struct v4l2_format *f);
 448 extern void cx23885_vbi_timeout(unsigned long data);
 449 extern struct videobuf_queue_ops cx23885_vbi_qops;
 450
 451 /* cx23885-i2c.c                                                */
 452 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
 453 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
 454 extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
 455                                      void *arg);
 456 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
 457
 458 /* ----------------------------------------------------------- */
 459 /* cx23885-417.c                                               */
 460 extern int cx23885_417_register(struct cx23885_dev *dev);
 461 extern void cx23885_417_unregister(struct cx23885_dev *dev);
 462 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
 463 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
 464 extern void cx23885_mc417_init(struct cx23885_dev *dev);
 465 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
 466 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
 467
 468
 469 /* ----------------------------------------------------------- */
 470 /* tv norms                                                    */
 471
 472 static inline unsigned int norm_maxw(v4l2_std_id norm)
 473 {
 474         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
 475 }
 476
 477 static inline unsigned int norm_maxh(v4l2_std_id norm)
 478 {
 479         return (norm & V4L2_STD_625_50) ? 576 : 480;
 480 }
 481
 482 static inline unsigned int norm_swidth(v4l2_std_id norm)
 483 {
 484         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
 485 }