cgroup: superblock can't be released with active dentries
[firefly-linux-kernel-4.4.55.git] / drivers / media / video / cx23885 / cx23885-dvb.c
1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include "cx23885.h"
31 #include <media/v4l2-common.h>
32
33 #include "dvb_ca_en50221.h"
34 #include "s5h1409.h"
35 #include "s5h1411.h"
36 #include "mt2131.h"
37 #include "tda8290.h"
38 #include "tda18271.h"
39 #include "lgdt330x.h"
40 #include "xc4000.h"
41 #include "xc5000.h"
42 #include "max2165.h"
43 #include "tda10048.h"
44 #include "tuner-xc2028.h"
45 #include "tuner-simple.h"
46 #include "dib7000p.h"
47 #include "dibx000_common.h"
48 #include "zl10353.h"
49 #include "stv0900.h"
50 #include "stv0900_reg.h"
51 #include "stv6110.h"
52 #include "lnbh24.h"
53 #include "cx24116.h"
54 #include "cimax2.h"
55 #include "lgs8gxx.h"
56 #include "netup-eeprom.h"
57 #include "netup-init.h"
58 #include "lgdt3305.h"
59 #include "atbm8830.h"
60 #include "ds3000.h"
61 #include "cx23885-f300.h"
62 #include "altera-ci.h"
63 #include "stv0367.h"
64 #include "drxk.h"
65 #include "mt2063.h"
66
67 static unsigned int debug;
68
69 #define dprintk(level, fmt, arg...)\
70         do { if (debug >= level)\
71                 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
72         } while (0)
73
74 /* ------------------------------------------------------------------ */
75
76 static unsigned int alt_tuner;
77 module_param(alt_tuner, int, 0644);
78 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
79
80 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
81
82 /* ------------------------------------------------------------------ */
83
84 static int dvb_buf_setup(struct videobuf_queue *q,
85                          unsigned int *count, unsigned int *size)
86 {
87         struct cx23885_tsport *port = q->priv_data;
88
89         port->ts_packet_size  = 188 * 4;
90         port->ts_packet_count = 32;
91
92         *size  = port->ts_packet_size * port->ts_packet_count;
93         *count = 32;
94         return 0;
95 }
96
97 static int dvb_buf_prepare(struct videobuf_queue *q,
98                            struct videobuf_buffer *vb, enum v4l2_field field)
99 {
100         struct cx23885_tsport *port = q->priv_data;
101         return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
102 }
103
104 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
105 {
106         struct cx23885_tsport *port = q->priv_data;
107         cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
108 }
109
110 static void dvb_buf_release(struct videobuf_queue *q,
111                             struct videobuf_buffer *vb)
112 {
113         cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
114 }
115
116 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe);
117
118 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
119 {
120         struct videobuf_dvb_frontends *f;
121         struct videobuf_dvb_frontend *fe;
122
123         f = &port->frontends;
124
125         if (f->gate <= 1) /* undefined or fe0 */
126                 fe = videobuf_dvb_get_frontend(f, 1);
127         else
128                 fe = videobuf_dvb_get_frontend(f, f->gate);
129
130         if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
131                 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
132
133         /*
134          * FIXME: Improve this path to avoid calling the
135          * cx23885_dvb_set_frontend() every time it passes here.
136          */
137         cx23885_dvb_set_frontend(fe->dvb.frontend);
138 }
139
140 static struct videobuf_queue_ops dvb_qops = {
141         .buf_setup    = dvb_buf_setup,
142         .buf_prepare  = dvb_buf_prepare,
143         .buf_queue    = dvb_buf_queue,
144         .buf_release  = dvb_buf_release,
145 };
146
147 static struct s5h1409_config hauppauge_generic_config = {
148         .demod_address = 0x32 >> 1,
149         .output_mode   = S5H1409_SERIAL_OUTPUT,
150         .gpio          = S5H1409_GPIO_ON,
151         .qam_if        = 44000,
152         .inversion     = S5H1409_INVERSION_OFF,
153         .status_mode   = S5H1409_DEMODLOCKING,
154         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
155 };
156
157 static struct tda10048_config hauppauge_hvr1200_config = {
158         .demod_address    = 0x10 >> 1,
159         .output_mode      = TDA10048_SERIAL_OUTPUT,
160         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
161         .inversion        = TDA10048_INVERSION_ON,
162         .dtv6_if_freq_khz = TDA10048_IF_3300,
163         .dtv7_if_freq_khz = TDA10048_IF_3800,
164         .dtv8_if_freq_khz = TDA10048_IF_4300,
165         .clk_freq_khz     = TDA10048_CLK_16000,
166 };
167
168 static struct tda10048_config hauppauge_hvr1210_config = {
169         .demod_address    = 0x10 >> 1,
170         .output_mode      = TDA10048_SERIAL_OUTPUT,
171         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
172         .inversion        = TDA10048_INVERSION_ON,
173         .dtv6_if_freq_khz = TDA10048_IF_3300,
174         .dtv7_if_freq_khz = TDA10048_IF_3500,
175         .dtv8_if_freq_khz = TDA10048_IF_4000,
176         .clk_freq_khz     = TDA10048_CLK_16000,
177 };
178
179 static struct s5h1409_config hauppauge_ezqam_config = {
180         .demod_address = 0x32 >> 1,
181         .output_mode   = S5H1409_SERIAL_OUTPUT,
182         .gpio          = S5H1409_GPIO_OFF,
183         .qam_if        = 4000,
184         .inversion     = S5H1409_INVERSION_ON,
185         .status_mode   = S5H1409_DEMODLOCKING,
186         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
187 };
188
189 static struct s5h1409_config hauppauge_hvr1800lp_config = {
190         .demod_address = 0x32 >> 1,
191         .output_mode   = S5H1409_SERIAL_OUTPUT,
192         .gpio          = S5H1409_GPIO_OFF,
193         .qam_if        = 44000,
194         .inversion     = S5H1409_INVERSION_OFF,
195         .status_mode   = S5H1409_DEMODLOCKING,
196         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
197 };
198
199 static struct s5h1409_config hauppauge_hvr1500_config = {
200         .demod_address = 0x32 >> 1,
201         .output_mode   = S5H1409_SERIAL_OUTPUT,
202         .gpio          = S5H1409_GPIO_OFF,
203         .inversion     = S5H1409_INVERSION_OFF,
204         .status_mode   = S5H1409_DEMODLOCKING,
205         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
206 };
207
208 static struct mt2131_config hauppauge_generic_tunerconfig = {
209         0x61
210 };
211
212 static struct lgdt330x_config fusionhdtv_5_express = {
213         .demod_address = 0x0e,
214         .demod_chip = LGDT3303,
215         .serial_mpeg = 0x40,
216 };
217
218 static struct s5h1409_config hauppauge_hvr1500q_config = {
219         .demod_address = 0x32 >> 1,
220         .output_mode   = S5H1409_SERIAL_OUTPUT,
221         .gpio          = S5H1409_GPIO_ON,
222         .qam_if        = 44000,
223         .inversion     = S5H1409_INVERSION_OFF,
224         .status_mode   = S5H1409_DEMODLOCKING,
225         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
226 };
227
228 static struct s5h1409_config dvico_s5h1409_config = {
229         .demod_address = 0x32 >> 1,
230         .output_mode   = S5H1409_SERIAL_OUTPUT,
231         .gpio          = S5H1409_GPIO_ON,
232         .qam_if        = 44000,
233         .inversion     = S5H1409_INVERSION_OFF,
234         .status_mode   = S5H1409_DEMODLOCKING,
235         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
236 };
237
238 static struct s5h1411_config dvico_s5h1411_config = {
239         .output_mode   = S5H1411_SERIAL_OUTPUT,
240         .gpio          = S5H1411_GPIO_ON,
241         .qam_if        = S5H1411_IF_44000,
242         .vsb_if        = S5H1411_IF_44000,
243         .inversion     = S5H1411_INVERSION_OFF,
244         .status_mode   = S5H1411_DEMODLOCKING,
245         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
246 };
247
248 static struct s5h1411_config hcw_s5h1411_config = {
249         .output_mode   = S5H1411_SERIAL_OUTPUT,
250         .gpio          = S5H1411_GPIO_OFF,
251         .vsb_if        = S5H1411_IF_44000,
252         .qam_if        = S5H1411_IF_4000,
253         .inversion     = S5H1411_INVERSION_ON,
254         .status_mode   = S5H1411_DEMODLOCKING,
255         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
256 };
257
258 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
259         .i2c_address      = 0x61,
260         .if_khz           = 5380,
261 };
262
263 static struct xc5000_config dvico_xc5000_tunerconfig = {
264         .i2c_address      = 0x64,
265         .if_khz           = 5380,
266 };
267
268 static struct tda829x_config tda829x_no_probe = {
269         .probe_tuner = TDA829X_DONT_PROBE,
270 };
271
272 static struct tda18271_std_map hauppauge_tda18271_std_map = {
273         .atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
274                       .if_lvl = 6, .rfagc_top = 0x37 },
275         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
276                       .if_lvl = 6, .rfagc_top = 0x37 },
277 };
278
279 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
280         .dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
281                       .if_lvl = 1, .rfagc_top = 0x37, },
282         .dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
283                       .if_lvl = 1, .rfagc_top = 0x37, },
284         .dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
285                       .if_lvl = 1, .rfagc_top = 0x37, },
286 };
287
288 static struct tda18271_config hauppauge_tda18271_config = {
289         .std_map = &hauppauge_tda18271_std_map,
290         .gate    = TDA18271_GATE_ANALOG,
291         .output_opt = TDA18271_OUTPUT_LT_OFF,
292 };
293
294 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
295         .std_map = &hauppauge_hvr1200_tda18271_std_map,
296         .gate    = TDA18271_GATE_ANALOG,
297         .output_opt = TDA18271_OUTPUT_LT_OFF,
298 };
299
300 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
301         .gate    = TDA18271_GATE_DIGITAL,
302         .output_opt = TDA18271_OUTPUT_LT_OFF,
303 };
304
305 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
306         .atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
307                       .if_lvl = 1, .rfagc_top = 0x58 },
308         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
309                       .if_lvl = 1, .rfagc_top = 0x58 },
310 };
311
312 static struct tda18271_config hauppauge_hvr127x_config = {
313         .std_map = &hauppauge_hvr127x_std_map,
314         .output_opt = TDA18271_OUTPUT_LT_OFF,
315 };
316
317 static struct lgdt3305_config hauppauge_lgdt3305_config = {
318         .i2c_addr           = 0x0e,
319         .mpeg_mode          = LGDT3305_MPEG_SERIAL,
320         .tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
321         .tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
322         .deny_i2c_rptr      = 1,
323         .spectral_inversion = 1,
324         .qam_if_khz         = 4000,
325         .vsb_if_khz         = 3250,
326 };
327
328 static struct dibx000_agc_config xc3028_agc_config = {
329         BAND_VHF | BAND_UHF,    /* band_caps */
330
331         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
332          * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
333          * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
334          * P_agc_nb_est=2, P_agc_write=0
335          */
336         (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
337                 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
338
339         712,    /* inv_gain */
340         21,     /* time_stabiliz */
341
342         0,      /* alpha_level */
343         118,    /* thlock */
344
345         0,      /* wbd_inv */
346         2867,   /* wbd_ref */
347         0,      /* wbd_sel */
348         2,      /* wbd_alpha */
349
350         0,      /* agc1_max */
351         0,      /* agc1_min */
352         39718,  /* agc2_max */
353         9930,   /* agc2_min */
354         0,      /* agc1_pt1 */
355         0,      /* agc1_pt2 */
356         0,      /* agc1_pt3 */
357         0,      /* agc1_slope1 */
358         0,      /* agc1_slope2 */
359         0,      /* agc2_pt1 */
360         128,    /* agc2_pt2 */
361         29,     /* agc2_slope1 */
362         29,     /* agc2_slope2 */
363
364         17,     /* alpha_mant */
365         27,     /* alpha_exp */
366         23,     /* beta_mant */
367         51,     /* beta_exp */
368
369         1,      /* perform_agc_softsplit */
370 };
371
372 /* PLL Configuration for COFDM BW_MHz = 8.000000
373  * With external clock = 30.000000 */
374 static struct dibx000_bandwidth_config xc3028_bw_config = {
375         60000,  /* internal */
376         30000,  /* sampling */
377         1,      /* pll_cfg: prediv */
378         8,      /* pll_cfg: ratio */
379         3,      /* pll_cfg: range */
380         1,      /* pll_cfg: reset */
381         0,      /* pll_cfg: bypass */
382         0,      /* misc: refdiv */
383         0,      /* misc: bypclk_div */
384         1,      /* misc: IO_CLK_en_core */
385         1,      /* misc: ADClkSrc */
386         0,      /* misc: modulo */
387         (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
388         (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
389         20452225, /* timf */
390         30000000  /* xtal_hz */
391 };
392
393 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
394         .output_mpeg2_in_188_bytes = 1,
395         .hostbus_diversity = 1,
396         .tuner_is_baseband = 0,
397         .update_lna  = NULL,
398
399         .agc_config_count = 1,
400         .agc = &xc3028_agc_config,
401         .bw  = &xc3028_bw_config,
402
403         .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
404         .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
405         .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
406
407         .pwm_freq_div = 0,
408         .agc_control  = NULL,
409         .spur_protect = 0,
410
411         .output_mode = OUTMODE_MPEG2_SERIAL,
412 };
413
414 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
415         .demod_address = 0x0f,
416         .if2           = 45600,
417         .no_tuner      = 1,
418         .disable_i2c_gate_ctrl = 1,
419 };
420
421 static struct stv0900_reg stv0900_ts_regs[] = {
422         { R0900_TSGENERAL, 0x00 },
423         { R0900_P1_TSSPEED, 0x40 },
424         { R0900_P2_TSSPEED, 0x40 },
425         { R0900_P1_TSCFGM, 0xc0 },
426         { R0900_P2_TSCFGM, 0xc0 },
427         { R0900_P1_TSCFGH, 0xe0 },
428         { R0900_P2_TSCFGH, 0xe0 },
429         { R0900_P1_TSCFGL, 0x20 },
430         { R0900_P2_TSCFGL, 0x20 },
431         { 0xffff, 0xff }, /* terminate */
432 };
433
434 static struct stv0900_config netup_stv0900_config = {
435         .demod_address = 0x68,
436         .demod_mode = 1, /* dual */
437         .xtal = 8000000,
438         .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
439         .diseqc_mode = 2,/* 2/3 PWM */
440         .ts_config_regs = stv0900_ts_regs,
441         .tun1_maddress = 0,/* 0x60 */
442         .tun2_maddress = 3,/* 0x63 */
443         .tun1_adc = 1,/* 1 Vpp */
444         .tun2_adc = 1,/* 1 Vpp */
445 };
446
447 static struct stv6110_config netup_stv6110_tunerconfig_a = {
448         .i2c_address = 0x60,
449         .mclk = 16000000,
450         .clk_div = 1,
451         .gain = 8, /* +16 dB  - maximum gain */
452 };
453
454 static struct stv6110_config netup_stv6110_tunerconfig_b = {
455         .i2c_address = 0x63,
456         .mclk = 16000000,
457         .clk_div = 1,
458         .gain = 8, /* +16 dB  - maximum gain */
459 };
460
461 static struct cx24116_config tbs_cx24116_config = {
462         .demod_address = 0x55,
463 };
464
465 static struct ds3000_config tevii_ds3000_config = {
466         .demod_address = 0x68,
467 };
468
469 static struct cx24116_config dvbworld_cx24116_config = {
470         .demod_address = 0x05,
471 };
472
473 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
474         .prod = LGS8GXX_PROD_LGS8GL5,
475         .demod_address = 0x19,
476         .serial_ts = 0,
477         .ts_clk_pol = 1,
478         .ts_clk_gated = 1,
479         .if_clk_freq = 30400, /* 30.4 MHz */
480         .if_freq = 5380, /* 5.38 MHz */
481         .if_neg_center = 1,
482         .ext_adc = 0,
483         .adc_signed = 0,
484         .if_neg_edge = 0,
485 };
486
487 static struct xc5000_config mygica_x8506_xc5000_config = {
488         .i2c_address = 0x61,
489         .if_khz = 5380,
490 };
491
492 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
493 {
494         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
495         struct cx23885_tsport *port = fe->dvb->priv;
496         struct cx23885_dev *dev = port->dev;
497
498         switch (dev->board) {
499         case CX23885_BOARD_HAUPPAUGE_HVR1275:
500                 switch (p->modulation) {
501                 case VSB_8:
502                         cx23885_gpio_clear(dev, GPIO_5);
503                         break;
504                 case QAM_64:
505                 case QAM_256:
506                 default:
507                         cx23885_gpio_set(dev, GPIO_5);
508                         break;
509                 }
510                 break;
511         case CX23885_BOARD_MYGICA_X8506:
512         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
513                 /* Select Digital TV */
514                 cx23885_gpio_set(dev, GPIO_0);
515                 break;
516         }
517         return 0;
518 }
519
520 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
521         .prod = LGS8GXX_PROD_LGS8G75,
522         .demod_address = 0x19,
523         .serial_ts = 0,
524         .ts_clk_pol = 1,
525         .ts_clk_gated = 1,
526         .if_clk_freq = 30400, /* 30.4 MHz */
527         .if_freq = 6500, /* 6.50 MHz */
528         .if_neg_center = 1,
529         .ext_adc = 0,
530         .adc_signed = 1,
531         .adc_vpp = 2, /* 1.6 Vpp */
532         .if_neg_edge = 1,
533 };
534
535 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
536         .i2c_address = 0x61,
537         .if_khz = 6500,
538 };
539
540 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
541         .prod = ATBM8830_PROD_8830,
542         .demod_address = 0x44,
543         .serial_ts = 0,
544         .ts_sampling_edge = 1,
545         .ts_clk_gated = 0,
546         .osc_clk_freq = 30400, /* in kHz */
547         .if_freq = 0, /* zero IF */
548         .zif_swap_iq = 1,
549         .agc_min = 0x2E,
550         .agc_max = 0xFF,
551         .agc_hold_loop = 0,
552 };
553
554 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
555         .i2c_address = 0x60,
556         .osc_clk = 20
557 };
558
559 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
560         .prod = ATBM8830_PROD_8830,
561         .demod_address = 0x44,
562         .serial_ts = 1,
563         .ts_sampling_edge = 1,
564         .ts_clk_gated = 0,
565         .osc_clk_freq = 30400, /* in kHz */
566         .if_freq = 0, /* zero IF */
567         .zif_swap_iq = 1,
568         .agc_min = 0x2E,
569         .agc_max = 0xFF,
570         .agc_hold_loop = 0,
571 };
572
573 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
574         .i2c_address = 0x60,
575         .osc_clk = 20
576 };
577 static struct stv0367_config netup_stv0367_config[] = {
578         {
579                 .demod_address = 0x1c,
580                 .xtal = 27000000,
581                 .if_khz = 4500,
582                 .if_iq_mode = 0,
583                 .ts_mode = 1,
584                 .clk_pol = 0,
585         }, {
586                 .demod_address = 0x1d,
587                 .xtal = 27000000,
588                 .if_khz = 4500,
589                 .if_iq_mode = 0,
590                 .ts_mode = 1,
591                 .clk_pol = 0,
592         },
593 };
594
595 static struct xc5000_config netup_xc5000_config[] = {
596         {
597                 .i2c_address = 0x61,
598                 .if_khz = 4500,
599         }, {
600                 .i2c_address = 0x64,
601                 .if_khz = 4500,
602         },
603 };
604
605 static struct drxk_config terratec_drxk_config[] = {
606         {
607                 .adr = 0x29,
608                 .no_i2c_bridge = 1,
609         }, {
610                 .adr = 0x2a,
611                 .no_i2c_bridge = 1,
612         },
613 };
614
615 static struct mt2063_config terratec_mt2063_config[] = {
616         {
617                 .tuner_address = 0x60,
618         }, {
619                 .tuner_address = 0x67,
620         },
621 };
622
623 int netup_altera_fpga_rw(void *device, int flag, int data, int read)
624 {
625         struct cx23885_dev *dev = (struct cx23885_dev *)device;
626         unsigned long timeout = jiffies + msecs_to_jiffies(1);
627         uint32_t mem = 0;
628
629         mem = cx_read(MC417_RWD);
630         if (read)
631                 cx_set(MC417_OEN, ALT_DATA);
632         else {
633                 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
634                 mem &= ~ALT_DATA;
635                 mem |= (data & ALT_DATA);
636         }
637
638         if (flag)
639                 mem |= ALT_AD_RG;
640         else
641                 mem &= ~ALT_AD_RG;
642
643         mem &= ~ALT_CS;
644         if (read)
645                 mem = (mem & ~ALT_RD) | ALT_WR;
646         else
647                 mem = (mem & ~ALT_WR) | ALT_RD;
648
649         cx_write(MC417_RWD, mem);  /* start RW cycle */
650
651         for (;;) {
652                 mem = cx_read(MC417_RWD);
653                 if ((mem & ALT_RDY) == 0)
654                         break;
655                 if (time_after(jiffies, timeout))
656                         break;
657                 udelay(1);
658         }
659
660         cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
661         if (read)
662                 return mem & ALT_DATA;
663
664         return 0;
665 };
666
667 static int dvb_register(struct cx23885_tsport *port)
668 {
669         struct cx23885_dev *dev = port->dev;
670         struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
671         struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
672         int mfe_shared = 0; /* bus not shared by default */
673         int ret;
674
675         /* Get the first frontend */
676         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
677         if (!fe0)
678                 return -EINVAL;
679
680         /* init struct videobuf_dvb */
681         fe0->dvb.name = dev->name;
682
683         /* multi-frontend gate control is undefined or defaults to fe0 */
684         port->frontends.gate = 0;
685
686         /* Sets the gate control callback to be used by i2c command calls */
687         port->gate_ctrl = cx23885_dvb_gate_ctrl;
688
689         /* init frontend */
690         switch (dev->board) {
691         case CX23885_BOARD_HAUPPAUGE_HVR1250:
692                 i2c_bus = &dev->i2c_bus[0];
693                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
694                                                 &hauppauge_generic_config,
695                                                 &i2c_bus->i2c_adap);
696                 if (fe0->dvb.frontend != NULL) {
697                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
698                                    &i2c_bus->i2c_adap,
699                                    &hauppauge_generic_tunerconfig, 0);
700                 }
701                 break;
702         case CX23885_BOARD_HAUPPAUGE_HVR1270:
703         case CX23885_BOARD_HAUPPAUGE_HVR1275:
704                 i2c_bus = &dev->i2c_bus[0];
705                 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
706                                                &hauppauge_lgdt3305_config,
707                                                &i2c_bus->i2c_adap);
708                 if (fe0->dvb.frontend != NULL) {
709                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
710                                    0x60, &dev->i2c_bus[1].i2c_adap,
711                                    &hauppauge_hvr127x_config);
712                 }
713                 break;
714         case CX23885_BOARD_HAUPPAUGE_HVR1255:
715                 i2c_bus = &dev->i2c_bus[0];
716                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
717                                                &hcw_s5h1411_config,
718                                                &i2c_bus->i2c_adap);
719                 if (fe0->dvb.frontend != NULL) {
720                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
721                                    0x60, &dev->i2c_bus[1].i2c_adap,
722                                    &hauppauge_tda18271_config);
723                 }
724                 break;
725         case CX23885_BOARD_HAUPPAUGE_HVR1800:
726                 i2c_bus = &dev->i2c_bus[0];
727                 switch (alt_tuner) {
728                 case 1:
729                         fe0->dvb.frontend =
730                                 dvb_attach(s5h1409_attach,
731                                            &hauppauge_ezqam_config,
732                                            &i2c_bus->i2c_adap);
733                         if (fe0->dvb.frontend != NULL) {
734                                 dvb_attach(tda829x_attach, fe0->dvb.frontend,
735                                            &dev->i2c_bus[1].i2c_adap, 0x42,
736                                            &tda829x_no_probe);
737                                 dvb_attach(tda18271_attach, fe0->dvb.frontend,
738                                            0x60, &dev->i2c_bus[1].i2c_adap,
739                                            &hauppauge_tda18271_config);
740                         }
741                         break;
742                 case 0:
743                 default:
744                         fe0->dvb.frontend =
745                                 dvb_attach(s5h1409_attach,
746                                            &hauppauge_generic_config,
747                                            &i2c_bus->i2c_adap);
748                         if (fe0->dvb.frontend != NULL)
749                                 dvb_attach(mt2131_attach, fe0->dvb.frontend,
750                                            &i2c_bus->i2c_adap,
751                                            &hauppauge_generic_tunerconfig, 0);
752                         break;
753                 }
754                 break;
755         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
756                 i2c_bus = &dev->i2c_bus[0];
757                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
758                                                 &hauppauge_hvr1800lp_config,
759                                                 &i2c_bus->i2c_adap);
760                 if (fe0->dvb.frontend != NULL) {
761                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
762                                    &i2c_bus->i2c_adap,
763                                    &hauppauge_generic_tunerconfig, 0);
764                 }
765                 break;
766         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
767                 i2c_bus = &dev->i2c_bus[0];
768                 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
769                                                 &fusionhdtv_5_express,
770                                                 &i2c_bus->i2c_adap);
771                 if (fe0->dvb.frontend != NULL) {
772                         dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
773                                    &i2c_bus->i2c_adap, 0x61,
774                                    TUNER_LG_TDVS_H06XF);
775                 }
776                 break;
777         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
778                 i2c_bus = &dev->i2c_bus[1];
779                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
780                                                 &hauppauge_hvr1500q_config,
781                                                 &dev->i2c_bus[0].i2c_adap);
782                 if (fe0->dvb.frontend != NULL)
783                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
784                                    &i2c_bus->i2c_adap,
785                                    &hauppauge_hvr1500q_tunerconfig);
786                 break;
787         case CX23885_BOARD_HAUPPAUGE_HVR1500:
788                 i2c_bus = &dev->i2c_bus[1];
789                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
790                                                 &hauppauge_hvr1500_config,
791                                                 &dev->i2c_bus[0].i2c_adap);
792                 if (fe0->dvb.frontend != NULL) {
793                         struct dvb_frontend *fe;
794                         struct xc2028_config cfg = {
795                                 .i2c_adap  = &i2c_bus->i2c_adap,
796                                 .i2c_addr  = 0x61,
797                         };
798                         static struct xc2028_ctrl ctl = {
799                                 .fname       = XC2028_DEFAULT_FIRMWARE,
800                                 .max_len     = 64,
801                                 .demod       = XC3028_FE_OREN538,
802                         };
803
804                         fe = dvb_attach(xc2028_attach,
805                                         fe0->dvb.frontend, &cfg);
806                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
807                                 fe->ops.tuner_ops.set_config(fe, &ctl);
808                 }
809                 break;
810         case CX23885_BOARD_HAUPPAUGE_HVR1200:
811         case CX23885_BOARD_HAUPPAUGE_HVR1700:
812                 i2c_bus = &dev->i2c_bus[0];
813                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
814                         &hauppauge_hvr1200_config,
815                         &i2c_bus->i2c_adap);
816                 if (fe0->dvb.frontend != NULL) {
817                         dvb_attach(tda829x_attach, fe0->dvb.frontend,
818                                 &dev->i2c_bus[1].i2c_adap, 0x42,
819                                 &tda829x_no_probe);
820                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
821                                 0x60, &dev->i2c_bus[1].i2c_adap,
822                                 &hauppauge_hvr1200_tuner_config);
823                 }
824                 break;
825         case CX23885_BOARD_HAUPPAUGE_HVR1210:
826                 i2c_bus = &dev->i2c_bus[0];
827                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
828                         &hauppauge_hvr1210_config,
829                         &i2c_bus->i2c_adap);
830                 if (fe0->dvb.frontend != NULL) {
831                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
832                                 0x60, &dev->i2c_bus[1].i2c_adap,
833                                 &hauppauge_hvr1210_tuner_config);
834                 }
835                 break;
836         case CX23885_BOARD_HAUPPAUGE_HVR1400:
837                 i2c_bus = &dev->i2c_bus[0];
838                 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
839                         &i2c_bus->i2c_adap,
840                         0x12, &hauppauge_hvr1400_dib7000_config);
841                 if (fe0->dvb.frontend != NULL) {
842                         struct dvb_frontend *fe;
843                         struct xc2028_config cfg = {
844                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
845                                 .i2c_addr  = 0x64,
846                         };
847                         static struct xc2028_ctrl ctl = {
848                                 .fname   = XC3028L_DEFAULT_FIRMWARE,
849                                 .max_len = 64,
850                                 .demod   = XC3028_FE_DIBCOM52,
851                                 /* This is true for all demods with
852                                         v36 firmware? */
853                                 .type    = XC2028_D2633,
854                         };
855
856                         fe = dvb_attach(xc2028_attach,
857                                         fe0->dvb.frontend, &cfg);
858                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
859                                 fe->ops.tuner_ops.set_config(fe, &ctl);
860                 }
861                 break;
862         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
863                 i2c_bus = &dev->i2c_bus[port->nr - 1];
864
865                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
866                                                 &dvico_s5h1409_config,
867                                                 &i2c_bus->i2c_adap);
868                 if (fe0->dvb.frontend == NULL)
869                         fe0->dvb.frontend = dvb_attach(s5h1411_attach,
870                                                         &dvico_s5h1411_config,
871                                                         &i2c_bus->i2c_adap);
872                 if (fe0->dvb.frontend != NULL)
873                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
874                                    &i2c_bus->i2c_adap,
875                                    &dvico_xc5000_tunerconfig);
876                 break;
877         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
878                 i2c_bus = &dev->i2c_bus[port->nr - 1];
879
880                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
881                                                &dvico_fusionhdtv_xc3028,
882                                                &i2c_bus->i2c_adap);
883                 if (fe0->dvb.frontend != NULL) {
884                         struct dvb_frontend      *fe;
885                         struct xc2028_config      cfg = {
886                                 .i2c_adap  = &i2c_bus->i2c_adap,
887                                 .i2c_addr  = 0x61,
888                         };
889                         static struct xc2028_ctrl ctl = {
890                                 .fname       = XC2028_DEFAULT_FIRMWARE,
891                                 .max_len     = 64,
892                                 .demod       = XC3028_FE_ZARLINK456,
893                         };
894
895                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
896                                         &cfg);
897                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
898                                 fe->ops.tuner_ops.set_config(fe, &ctl);
899                 }
900                 break;
901         }
902         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
903         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
904         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
905                 i2c_bus = &dev->i2c_bus[0];
906
907                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
908                         &dvico_fusionhdtv_xc3028,
909                         &i2c_bus->i2c_adap);
910                 if (fe0->dvb.frontend != NULL) {
911                         struct dvb_frontend      *fe;
912                         struct xc2028_config      cfg = {
913                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
914                                 .i2c_addr  = 0x61,
915                         };
916                         static struct xc2028_ctrl ctl = {
917                                 .fname       = XC2028_DEFAULT_FIRMWARE,
918                                 .max_len     = 64,
919                                 .demod       = XC3028_FE_ZARLINK456,
920                         };
921
922                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
923                                 &cfg);
924                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
925                                 fe->ops.tuner_ops.set_config(fe, &ctl);
926                 }
927                 break;
928         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
929                 i2c_bus = &dev->i2c_bus[0];
930
931                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
932                                                &dvico_fusionhdtv_xc3028,
933                                                &i2c_bus->i2c_adap);
934                 if (fe0->dvb.frontend != NULL) {
935                         struct dvb_frontend     *fe;
936                         struct xc4000_config    cfg = {
937                                 .i2c_address      = 0x61,
938                                 .default_pm       = 0,
939                                 .dvb_amplitude    = 134,
940                                 .set_smoothedcvbs = 1,
941                                 .if_khz           = 4560
942                         };
943
944                         fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
945                                         &dev->i2c_bus[1].i2c_adap, &cfg);
946                         if (!fe) {
947                                 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
948                                        dev->name);
949                                 goto frontend_detach;
950                         }
951                 }
952                 break;
953         case CX23885_BOARD_TBS_6920:
954                 i2c_bus = &dev->i2c_bus[1];
955
956                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
957                                         &tbs_cx24116_config,
958                                         &i2c_bus->i2c_adap);
959                 if (fe0->dvb.frontend != NULL)
960                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
961
962                 break;
963         case CX23885_BOARD_TEVII_S470:
964                 i2c_bus = &dev->i2c_bus[1];
965
966                 fe0->dvb.frontend = dvb_attach(ds3000_attach,
967                                         &tevii_ds3000_config,
968                                         &i2c_bus->i2c_adap);
969                 if (fe0->dvb.frontend != NULL)
970                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
971
972                 break;
973         case CX23885_BOARD_DVBWORLD_2005:
974                 i2c_bus = &dev->i2c_bus[1];
975
976                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
977                         &dvbworld_cx24116_config,
978                         &i2c_bus->i2c_adap);
979                 break;
980         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
981                 i2c_bus = &dev->i2c_bus[0];
982                 switch (port->nr) {
983                 /* port B */
984                 case 1:
985                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
986                                                         &netup_stv0900_config,
987                                                         &i2c_bus->i2c_adap, 0);
988                         if (fe0->dvb.frontend != NULL) {
989                                 if (dvb_attach(stv6110_attach,
990                                                 fe0->dvb.frontend,
991                                                 &netup_stv6110_tunerconfig_a,
992                                                 &i2c_bus->i2c_adap)) {
993                                         if (!dvb_attach(lnbh24_attach,
994                                                         fe0->dvb.frontend,
995                                                         &i2c_bus->i2c_adap,
996                                                         LNBH24_PCL | LNBH24_TTX,
997                                                         LNBH24_TEN, 0x09))
998                                                 printk(KERN_ERR
999                                                         "No LNBH24 found!\n");
1000
1001                                 }
1002                         }
1003                         break;
1004                 /* port C */
1005                 case 2:
1006                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
1007                                                         &netup_stv0900_config,
1008                                                         &i2c_bus->i2c_adap, 1);
1009                         if (fe0->dvb.frontend != NULL) {
1010                                 if (dvb_attach(stv6110_attach,
1011                                                 fe0->dvb.frontend,
1012                                                 &netup_stv6110_tunerconfig_b,
1013                                                 &i2c_bus->i2c_adap)) {
1014                                         if (!dvb_attach(lnbh24_attach,
1015                                                         fe0->dvb.frontend,
1016                                                         &i2c_bus->i2c_adap,
1017                                                         LNBH24_PCL | LNBH24_TTX,
1018                                                         LNBH24_TEN, 0x0a))
1019                                                 printk(KERN_ERR
1020                                                         "No LNBH24 found!\n");
1021
1022                                 }
1023                         }
1024                         break;
1025                 }
1026                 break;
1027         case CX23885_BOARD_MYGICA_X8506:
1028                 i2c_bus = &dev->i2c_bus[0];
1029                 i2c_bus2 = &dev->i2c_bus[1];
1030                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1031                         &mygica_x8506_lgs8gl5_config,
1032                         &i2c_bus->i2c_adap);
1033                 if (fe0->dvb.frontend != NULL) {
1034                         dvb_attach(xc5000_attach,
1035                                 fe0->dvb.frontend,
1036                                 &i2c_bus2->i2c_adap,
1037                                 &mygica_x8506_xc5000_config);
1038                 }
1039                 break;
1040         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1041                 i2c_bus = &dev->i2c_bus[0];
1042                 i2c_bus2 = &dev->i2c_bus[1];
1043                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1044                         &magicpro_prohdtve2_lgs8g75_config,
1045                         &i2c_bus->i2c_adap);
1046                 if (fe0->dvb.frontend != NULL) {
1047                         dvb_attach(xc5000_attach,
1048                                 fe0->dvb.frontend,
1049                                 &i2c_bus2->i2c_adap,
1050                                 &magicpro_prohdtve2_xc5000_config);
1051                 }
1052                 break;
1053         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1054                 i2c_bus = &dev->i2c_bus[0];
1055                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1056                         &hcw_s5h1411_config,
1057                         &i2c_bus->i2c_adap);
1058                 if (fe0->dvb.frontend != NULL)
1059                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
1060                                 0x60, &dev->i2c_bus[0].i2c_adap,
1061                                 &hauppauge_tda18271_config);
1062
1063                 tda18271_attach(&dev->ts1.analog_fe,
1064                         0x60, &dev->i2c_bus[1].i2c_adap,
1065                         &hauppauge_tda18271_config);
1066
1067                 break;
1068         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1069                 i2c_bus = &dev->i2c_bus[0];
1070                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1071                         &hcw_s5h1411_config,
1072                         &i2c_bus->i2c_adap);
1073                 if (fe0->dvb.frontend != NULL)
1074                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
1075                                 0x60, &dev->i2c_bus[0].i2c_adap,
1076                                 &hauppauge_tda18271_config);
1077                 break;
1078         case CX23885_BOARD_MYGICA_X8558PRO:
1079                 switch (port->nr) {
1080                 /* port B */
1081                 case 1:
1082                         i2c_bus = &dev->i2c_bus[0];
1083                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1084                                 &mygica_x8558pro_atbm8830_cfg1,
1085                                 &i2c_bus->i2c_adap);
1086                         if (fe0->dvb.frontend != NULL) {
1087                                 dvb_attach(max2165_attach,
1088                                         fe0->dvb.frontend,
1089                                         &i2c_bus->i2c_adap,
1090                                         &mygic_x8558pro_max2165_cfg1);
1091                         }
1092                         break;
1093                 /* port C */
1094                 case 2:
1095                         i2c_bus = &dev->i2c_bus[1];
1096                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1097                                 &mygica_x8558pro_atbm8830_cfg2,
1098                                 &i2c_bus->i2c_adap);
1099                         if (fe0->dvb.frontend != NULL) {
1100                                 dvb_attach(max2165_attach,
1101                                         fe0->dvb.frontend,
1102                                         &i2c_bus->i2c_adap,
1103                                         &mygic_x8558pro_max2165_cfg2);
1104                         }
1105                         break;
1106                 }
1107                 break;
1108         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1109                 i2c_bus = &dev->i2c_bus[0];
1110                 mfe_shared = 1;/* MFE */
1111                 port->frontends.gate = 0;/* not clear for me yet */
1112                 /* ports B, C */
1113                 /* MFE frontend 1 DVB-T */
1114                 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1115                                         &netup_stv0367_config[port->nr - 1],
1116                                         &i2c_bus->i2c_adap);
1117                 if (fe0->dvb.frontend != NULL) {
1118                         if (NULL == dvb_attach(xc5000_attach,
1119                                         fe0->dvb.frontend,
1120                                         &i2c_bus->i2c_adap,
1121                                         &netup_xc5000_config[port->nr - 1]))
1122                                 goto frontend_detach;
1123                         /* load xc5000 firmware */
1124                         fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1125                 }
1126                 /* MFE frontend 2 */
1127                 fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
1128                 if (fe1 == NULL)
1129                         goto frontend_detach;
1130                 /* DVB-C init */
1131                 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1132                                         &netup_stv0367_config[port->nr - 1],
1133                                         &i2c_bus->i2c_adap);
1134                 if (fe1->dvb.frontend != NULL) {
1135                         fe1->dvb.frontend->id = 1;
1136                         if (NULL == dvb_attach(xc5000_attach,
1137                                         fe1->dvb.frontend,
1138                                         &i2c_bus->i2c_adap,
1139                                         &netup_xc5000_config[port->nr - 1]))
1140                                 goto frontend_detach;
1141                 }
1142                 break;
1143         case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1144                 i2c_bus = &dev->i2c_bus[0];
1145                 i2c_bus2 = &dev->i2c_bus[1];
1146
1147                 switch (port->nr) {
1148                 /* port b */
1149                 case 1:
1150                         fe0->dvb.frontend = dvb_attach(drxk_attach,
1151                                         &terratec_drxk_config[0],
1152                                         &i2c_bus->i2c_adap);
1153                         if (fe0->dvb.frontend != NULL) {
1154                                 if (!dvb_attach(mt2063_attach,
1155                                                 fe0->dvb.frontend,
1156                                                 &terratec_mt2063_config[0],
1157                                                 &i2c_bus2->i2c_adap))
1158                                         goto frontend_detach;
1159                         }
1160                         break;
1161                 /* port c */
1162                 case 2:
1163                         fe0->dvb.frontend = dvb_attach(drxk_attach,
1164                                         &terratec_drxk_config[1],
1165                                         &i2c_bus->i2c_adap);
1166                         if (fe0->dvb.frontend != NULL) {
1167                                 if (!dvb_attach(mt2063_attach,
1168                                                 fe0->dvb.frontend,
1169                                                 &terratec_mt2063_config[1],
1170                                                 &i2c_bus2->i2c_adap))
1171                                         goto frontend_detach;
1172                         }
1173                         break;
1174                 }
1175                 break;
1176         default:
1177                 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1178                         " isn't supported yet\n",
1179                        dev->name);
1180                 break;
1181         }
1182
1183         if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1184                 printk(KERN_ERR "%s: frontend initialization failed\n",
1185                        dev->name);
1186                 goto frontend_detach;
1187         }
1188
1189         /* define general-purpose callback pointer */
1190         fe0->dvb.frontend->callback = cx23885_tuner_callback;
1191         if (fe1)
1192                 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1193 #if 0
1194         /* Ensure all frontends negotiate bus access */
1195         fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1196         if (fe1)
1197                 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1198 #endif
1199
1200         /* Put the analog decoder in standby to keep it quiet */
1201         call_all(dev, core, s_power, 0);
1202
1203         if (fe0->dvb.frontend->ops.analog_ops.standby)
1204                 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1205
1206         /* register everything */
1207         ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1208                                         &dev->pci->dev, adapter_nr, mfe_shared,
1209                                         NULL);
1210         if (ret)
1211                 goto frontend_detach;
1212
1213         /* init CI & MAC */
1214         switch (dev->board) {
1215         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1216                 static struct netup_card_info cinfo;
1217
1218                 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1219                 memcpy(port->frontends.adapter.proposed_mac,
1220                                 cinfo.port[port->nr - 1].mac, 6);
1221                 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1222                         port->nr, port->frontends.adapter.proposed_mac);
1223
1224                 netup_ci_init(port);
1225                 break;
1226                 }
1227         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1228                 struct altera_ci_config netup_ci_cfg = {
1229                         .dev = dev,/* magic number to identify*/
1230                         .adapter = &port->frontends.adapter,/* for CI */
1231                         .demux = &fe0->dvb.demux,/* for hw pid filter */
1232                         .fpga_rw = netup_altera_fpga_rw,
1233                 };
1234
1235                 altera_ci_init(&netup_ci_cfg, port->nr);
1236                 break;
1237                 }
1238         case CX23885_BOARD_TEVII_S470: {
1239                 u8 eeprom[256]; /* 24C02 i2c eeprom */
1240
1241                 if (port->nr != 1)
1242                         break;
1243
1244                 /* Read entire EEPROM */
1245                 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1246                 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1247                 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1248                 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1249                 break;
1250                 }
1251         }
1252
1253         return ret;
1254
1255 frontend_detach:
1256         port->gate_ctrl = NULL;
1257         videobuf_dvb_dealloc_frontends(&port->frontends);
1258         return -EINVAL;
1259 }
1260
1261 int cx23885_dvb_register(struct cx23885_tsport *port)
1262 {
1263
1264         struct videobuf_dvb_frontend *fe0;
1265         struct cx23885_dev *dev = port->dev;
1266         int err, i;
1267
1268         /* Here we need to allocate the correct number of frontends,
1269          * as reflected in the cards struct. The reality is that currently
1270          * no cx23885 boards support this - yet. But, if we don't modify this
1271          * code then the second frontend would never be allocated (later)
1272          * and fail with error before the attach in dvb_register().
1273          * Without these changes we risk an OOPS later. The changes here
1274          * are for safety, and should provide a good foundation for the
1275          * future addition of any multi-frontend cx23885 based boards.
1276          */
1277         printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
1278                 port->num_frontends);
1279
1280         for (i = 1; i <= port->num_frontends; i++) {
1281                 if (videobuf_dvb_alloc_frontend(
1282                         &port->frontends, i) == NULL) {
1283                         printk(KERN_ERR "%s() failed to alloc\n", __func__);
1284                         return -ENOMEM;
1285                 }
1286
1287                 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
1288                 if (!fe0)
1289                         err = -EINVAL;
1290
1291                 dprintk(1, "%s\n", __func__);
1292                 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1293                         dev->board,
1294                         dev->name,
1295                         dev->pci_bus,
1296                         dev->pci_slot);
1297
1298                 err = -ENODEV;
1299
1300                 /* dvb stuff */
1301                 /* We have to init the queue for each frontend on a port. */
1302                 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1303                 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
1304                             &dev->pci->dev, &port->slock,
1305                             V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1306                             sizeof(struct cx23885_buffer), port, NULL);
1307         }
1308         err = dvb_register(port);
1309         if (err != 0)
1310                 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1311                         __func__, err);
1312
1313         return err;
1314 }
1315
1316 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1317 {
1318         struct videobuf_dvb_frontend *fe0;
1319
1320         /* FIXME: in an error condition where the we have
1321          * an expected number of frontends (attach problem)
1322          * then this might not clean up correctly, if 1
1323          * is invalid.
1324          * This comment only applies to future boards IF they
1325          * implement MFE support.
1326          */
1327         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1328         if (fe0 && fe0->dvb.frontend)
1329                 videobuf_dvb_unregister_bus(&port->frontends);
1330
1331         switch (port->dev->board) {
1332         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1333                 netup_ci_exit(port);
1334                 break;
1335         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1336                 altera_ci_release(port->dev, port->nr);
1337                 break;
1338         }
1339
1340         port->gate_ctrl = NULL;
1341
1342         return 0;
1343 }
1344