2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27 #include <linux/firmware.h>
28 #include <misc/altera.h>
31 #include "tuner-xc2028.h"
32 #include "netup-eeprom.h"
33 #include "netup-init.h"
34 #include "altera-ci.h"
37 #include "cx23888-ir.h"
39 static unsigned int netup_card_rev = 1;
40 module_param(netup_card_rev, int, 0644);
41 MODULE_PARM_DESC(netup_card_rev,
42 "NetUP Dual DVB-T/C CI card revision");
43 static unsigned int enable_885_ir;
44 module_param(enable_885_ir, int, 0644);
45 MODULE_PARM_DESC(enable_885_ir,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
49 "\t\t\tTeVii S470 (reported unsafe)\n"
50 "\t\t This can cause an interrupt storm with some cards.\n"
51 "\t\t Default: 0 [Disabled]");
53 /* ------------------------------------------------------------------ */
54 /* board config info */
56 struct cx23885_board cx23885_boards[] = {
57 [CX23885_BOARD_UNKNOWN] = {
58 .name = "UNKNOWN/GENERIC",
59 /* Ensure safe default for unknown boards */
62 .type = CX23885_VMUX_COMPOSITE1,
65 .type = CX23885_VMUX_COMPOSITE2,
68 .type = CX23885_VMUX_COMPOSITE3,
71 .type = CX23885_VMUX_COMPOSITE4,
75 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
76 .name = "Hauppauge WinTV-HVR1800lp",
77 .portc = CX23885_MPEG_DVB,
79 .type = CX23885_VMUX_TELEVISION,
83 .type = CX23885_VMUX_DEBUG,
87 .type = CX23885_VMUX_COMPOSITE1,
91 .type = CX23885_VMUX_SVIDEO,
96 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
97 .name = "Hauppauge WinTV-HVR1800",
98 .porta = CX23885_ANALOG_VIDEO,
99 .portb = CX23885_MPEG_ENCODER,
100 .portc = CX23885_MPEG_DVB,
101 .tuner_type = TUNER_PHILIPS_TDA8290,
102 .tuner_addr = 0x42, /* 0x84 >> 1 */
105 .type = CX23885_VMUX_TELEVISION,
106 .vmux = CX25840_VIN7_CH3 |
109 .amux = CX25840_AUDIO8,
112 .type = CX23885_VMUX_COMPOSITE1,
113 .vmux = CX25840_VIN7_CH3 |
116 .amux = CX25840_AUDIO7,
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = CX25840_VIN7_CH3 |
124 .amux = CX25840_AUDIO7,
128 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
129 .name = "Hauppauge WinTV-HVR1250",
130 .portc = CX23885_MPEG_DVB,
132 .type = CX23885_VMUX_TELEVISION,
136 .type = CX23885_VMUX_DEBUG,
140 .type = CX23885_VMUX_COMPOSITE1,
144 .type = CX23885_VMUX_SVIDEO,
149 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
150 .name = "DViCO FusionHDTV5 Express",
151 .portb = CX23885_MPEG_DVB,
153 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
154 .name = "Hauppauge WinTV-HVR1500Q",
155 .portc = CX23885_MPEG_DVB,
157 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
158 .name = "Hauppauge WinTV-HVR1500",
159 .porta = CX23885_ANALOG_VIDEO,
160 .portc = CX23885_MPEG_DVB,
161 .tuner_type = TUNER_XC2028,
162 .tuner_addr = 0x61, /* 0xc2 >> 1 */
164 .type = CX23885_VMUX_TELEVISION,
165 .vmux = CX25840_VIN7_CH3 |
170 .type = CX23885_VMUX_COMPOSITE1,
171 .vmux = CX25840_VIN7_CH3 |
176 .type = CX23885_VMUX_SVIDEO,
177 .vmux = CX25840_VIN7_CH3 |
184 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
185 .name = "Hauppauge WinTV-HVR1200",
186 .portc = CX23885_MPEG_DVB,
188 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
189 .name = "Hauppauge WinTV-HVR1700",
190 .portc = CX23885_MPEG_DVB,
192 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
193 .name = "Hauppauge WinTV-HVR1400",
194 .portc = CX23885_MPEG_DVB,
196 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
197 .name = "DViCO FusionHDTV7 Dual Express",
198 .portb = CX23885_MPEG_DVB,
199 .portc = CX23885_MPEG_DVB,
201 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
202 .name = "DViCO FusionHDTV DVB-T Dual Express",
203 .portb = CX23885_MPEG_DVB,
204 .portc = CX23885_MPEG_DVB,
206 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
207 .name = "Leadtek Winfast PxDVR3200 H",
208 .portc = CX23885_MPEG_DVB,
210 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
211 .name = "Leadtek Winfast PxDVR3200 H XC4000",
212 .porta = CX23885_ANALOG_VIDEO,
213 .portc = CX23885_MPEG_DVB,
214 .tuner_type = TUNER_XC4000,
217 .radio_addr = ADDR_UNSET,
219 .type = CX23885_VMUX_TELEVISION,
220 .vmux = CX25840_VIN2_CH1 |
224 .type = CX23885_VMUX_COMPOSITE1,
225 .vmux = CX25840_COMPOSITE1,
227 .type = CX23885_VMUX_SVIDEO,
228 .vmux = CX25840_SVIDEO_LUMA3 |
229 CX25840_SVIDEO_CHROMA4,
231 .type = CX23885_VMUX_COMPONENT,
232 .vmux = CX25840_VIN7_CH1 |
235 CX25840_COMPONENT_ON,
238 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
239 .name = "Compro VideoMate E650F",
240 .portc = CX23885_MPEG_DVB,
242 [CX23885_BOARD_TBS_6920] = {
243 .name = "TurboSight TBS 6920",
244 .portb = CX23885_MPEG_DVB,
246 [CX23885_BOARD_TEVII_S470] = {
247 .name = "TeVii S470",
248 .portb = CX23885_MPEG_DVB,
250 [CX23885_BOARD_DVBWORLD_2005] = {
251 .name = "DVBWorld DVB-S2 2005",
252 .portb = CX23885_MPEG_DVB,
254 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
256 .name = "NetUP Dual DVB-S2 CI",
257 .portb = CX23885_MPEG_DVB,
258 .portc = CX23885_MPEG_DVB,
260 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
261 .name = "Hauppauge WinTV-HVR1270",
262 .portc = CX23885_MPEG_DVB,
264 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
265 .name = "Hauppauge WinTV-HVR1275",
266 .portc = CX23885_MPEG_DVB,
268 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
269 .name = "Hauppauge WinTV-HVR1255",
270 .portc = CX23885_MPEG_DVB,
272 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
273 .name = "Hauppauge WinTV-HVR1210",
274 .portc = CX23885_MPEG_DVB,
276 [CX23885_BOARD_MYGICA_X8506] = {
277 .name = "Mygica X8506 DMB-TH",
278 .tuner_type = TUNER_XC5000,
281 .porta = CX23885_ANALOG_VIDEO,
282 .portb = CX23885_MPEG_DVB,
285 .type = CX23885_VMUX_TELEVISION,
286 .vmux = CX25840_COMPOSITE2,
289 .type = CX23885_VMUX_COMPOSITE1,
290 .vmux = CX25840_COMPOSITE8,
293 .type = CX23885_VMUX_SVIDEO,
294 .vmux = CX25840_SVIDEO_LUMA3 |
295 CX25840_SVIDEO_CHROMA4,
298 .type = CX23885_VMUX_COMPONENT,
299 .vmux = CX25840_COMPONENT_ON |
306 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
307 .name = "Magic-Pro ProHDTV Extreme 2",
308 .tuner_type = TUNER_XC5000,
311 .porta = CX23885_ANALOG_VIDEO,
312 .portb = CX23885_MPEG_DVB,
315 .type = CX23885_VMUX_TELEVISION,
316 .vmux = CX25840_COMPOSITE2,
319 .type = CX23885_VMUX_COMPOSITE1,
320 .vmux = CX25840_COMPOSITE8,
323 .type = CX23885_VMUX_SVIDEO,
324 .vmux = CX25840_SVIDEO_LUMA3 |
325 CX25840_SVIDEO_CHROMA4,
328 .type = CX23885_VMUX_COMPONENT,
329 .vmux = CX25840_COMPONENT_ON |
336 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
337 .name = "Hauppauge WinTV-HVR1850",
338 .porta = CX23885_ANALOG_VIDEO,
339 .portb = CX23885_MPEG_ENCODER,
340 .portc = CX23885_MPEG_DVB,
341 .tuner_type = TUNER_ABSENT,
342 .tuner_addr = 0x42, /* 0x84 >> 1 */
345 .type = CX23885_VMUX_TELEVISION,
346 .vmux = CX25840_VIN7_CH3 |
350 .amux = CX25840_AUDIO8,
352 .type = CX23885_VMUX_COMPOSITE1,
353 .vmux = CX25840_VIN7_CH3 |
356 .amux = CX25840_AUDIO7,
358 .type = CX23885_VMUX_SVIDEO,
359 .vmux = CX25840_VIN7_CH3 |
363 .amux = CX25840_AUDIO7,
366 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
367 .name = "Compro VideoMate E800",
368 .portc = CX23885_MPEG_DVB,
370 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
371 .name = "Hauppauge WinTV-HVR1290",
372 .portc = CX23885_MPEG_DVB,
374 [CX23885_BOARD_MYGICA_X8558PRO] = {
375 .name = "Mygica X8558 PRO DMB-TH",
376 .portb = CX23885_MPEG_DVB,
377 .portc = CX23885_MPEG_DVB,
379 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
380 .name = "LEADTEK WinFast PxTV1200",
381 .porta = CX23885_ANALOG_VIDEO,
382 .tuner_type = TUNER_XC2028,
386 .type = CX23885_VMUX_TELEVISION,
387 .vmux = CX25840_VIN2_CH1 |
391 .type = CX23885_VMUX_COMPOSITE1,
392 .vmux = CX25840_COMPOSITE1,
394 .type = CX23885_VMUX_SVIDEO,
395 .vmux = CX25840_SVIDEO_LUMA3 |
396 CX25840_SVIDEO_CHROMA4,
398 .type = CX23885_VMUX_COMPONENT,
399 .vmux = CX25840_VIN7_CH1 |
402 CX25840_COMPONENT_ON,
405 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
406 .name = "GoTView X5 3D Hybrid",
407 .tuner_type = TUNER_XC5000,
410 .porta = CX23885_ANALOG_VIDEO,
411 .portb = CX23885_MPEG_DVB,
413 .type = CX23885_VMUX_TELEVISION,
414 .vmux = CX25840_VIN2_CH1 |
418 .type = CX23885_VMUX_COMPOSITE1,
419 .vmux = CX23885_VMUX_COMPOSITE1,
421 .type = CX23885_VMUX_SVIDEO,
422 .vmux = CX25840_SVIDEO_LUMA3 |
423 CX25840_SVIDEO_CHROMA4,
426 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
428 .name = "NetUP Dual DVB-T/C-CI RF",
429 .porta = CX23885_ANALOG_VIDEO,
430 .portb = CX23885_MPEG_DVB,
431 .portc = CX23885_MPEG_DVB,
434 .tuner_type = TUNER_XC5000,
437 .type = CX23885_VMUX_TELEVISION,
438 .vmux = CX25840_COMPOSITE1,
441 [CX23885_BOARD_MPX885] = {
443 .porta = CX23885_ANALOG_VIDEO,
445 .type = CX23885_VMUX_COMPOSITE1,
446 .vmux = CX25840_COMPOSITE1,
447 .amux = CX25840_AUDIO6,
450 .type = CX23885_VMUX_COMPOSITE2,
451 .vmux = CX25840_COMPOSITE2,
452 .amux = CX25840_AUDIO6,
455 .type = CX23885_VMUX_COMPOSITE3,
456 .vmux = CX25840_COMPOSITE3,
457 .amux = CX25840_AUDIO7,
460 .type = CX23885_VMUX_COMPOSITE4,
461 .vmux = CX25840_COMPOSITE4,
462 .amux = CX25840_AUDIO7,
466 [CX23885_BOARD_MYGICA_X8507] = {
467 .name = "Mygica X8507",
468 .tuner_type = TUNER_XC5000,
471 .porta = CX23885_ANALOG_VIDEO,
474 .type = CX23885_VMUX_TELEVISION,
475 .vmux = CX25840_COMPOSITE2,
476 .amux = CX25840_AUDIO8,
479 .type = CX23885_VMUX_COMPOSITE1,
480 .vmux = CX25840_COMPOSITE8,
483 .type = CX23885_VMUX_SVIDEO,
484 .vmux = CX25840_SVIDEO_LUMA3 |
485 CX25840_SVIDEO_CHROMA4,
488 .type = CX23885_VMUX_COMPONENT,
489 .vmux = CX25840_COMPONENT_ON |
496 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
497 .name = "TerraTec Cinergy T PCIe Dual",
498 .portb = CX23885_MPEG_DVB,
499 .portc = CX23885_MPEG_DVB,
502 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
504 /* ------------------------------------------------------------------ */
505 /* PCI subsystem IDs */
507 struct cx23885_subid cx23885_subids[] = {
511 .card = CX23885_BOARD_UNKNOWN,
515 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
519 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
523 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
527 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
531 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
535 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
539 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
543 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
547 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
551 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
555 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
559 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
563 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
567 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
571 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
575 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
579 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
583 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
587 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
591 .card = CX23885_BOARD_TBS_6920,
595 .card = CX23885_BOARD_TEVII_S470,
599 .card = CX23885_BOARD_DVBWORLD_2005,
603 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
607 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
611 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
615 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
619 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
623 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
627 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
631 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
635 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
639 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
643 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
647 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
651 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
655 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
659 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
663 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
667 .card = CX23885_BOARD_MYGICA_X8506,
671 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
675 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
679 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
683 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
687 .card = CX23885_BOARD_MYGICA_X8558PRO,
691 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
695 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
699 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
703 .card = CX23885_BOARD_MYGICA_X8507,
707 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
710 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
712 void cx23885_card_list(struct cx23885_dev *dev)
716 if (0 == dev->pci->subsystem_vendor &&
717 0 == dev->pci->subsystem_device) {
719 "%s: Board has no valid PCIe Subsystem ID and can't\n"
720 "%s: be autodetected. Pass card=<n> insmod option\n"
721 "%s: to workaround that. Redirect complaints to the\n"
722 "%s: vendor of the TV card. Best regards,\n"
724 dev->name, dev->name, dev->name, dev->name, dev->name);
727 "%s: Your board isn't known (yet) to the driver.\n"
728 "%s: Try to pick one of the existing card configs via\n"
729 "%s: card=<n> insmod option. Updating to the latest\n"
730 "%s: version might help as well.\n",
731 dev->name, dev->name, dev->name, dev->name);
733 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
735 for (i = 0; i < cx23885_bcount; i++)
736 printk(KERN_INFO "%s: card=%d -> %s\n",
737 dev->name, i, cx23885_boards[i].name);
740 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
744 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
747 /* Make sure we support the board model */
750 /* WinTV-HVR1270 (PCIe, Retail, half height)
751 * ATSC/QAM and basic analog, IR Blast */
753 /* WinTV-HVR1210 (PCIe, Retail, half height)
754 * DVB-T and basic analog, IR Blast */
756 /* WinTV-HVR1270 (PCIe, Retail, half height)
757 * ATSC/QAM and basic analog, IR Recv */
759 /* WinTV-HVR1210 (PCIe, Retail, half height)
760 * DVB-T and basic analog, IR Recv */
762 /* WinTV-HVR1275 (PCIe, Retail, half height)
763 * ATSC/QAM and basic analog, IR Recv */
765 /* WinTV-HVR1210 (PCIe, Retail, half height)
766 * DVB-T and basic analog, IR Recv */
768 /* WinTV-HVR1270 (PCIe, Retail, full height)
769 * ATSC/QAM and basic analog, IR Blast */
771 /* WinTV-HVR1210 (PCIe, Retail, full height)
772 * DVB-T and basic analog, IR Blast */
774 /* WinTV-HVR1270 (PCIe, Retail, full height)
775 * ATSC/QAM and basic analog, IR Recv */
777 /* WinTV-HVR1210 (PCIe, Retail, full height)
778 * DVB-T and basic analog, IR Recv */
780 /* WinTV-HVR1275 (PCIe, Retail, full height)
781 * ATSC/QAM and basic analog, IR Recv */
783 /* WinTV-HVR1210 (PCIe, Retail, full height)
784 * DVB-T and basic analog, IR Recv */
786 /* WinTV-HVR1200 (PCIe, Retail, full height)
787 * DVB-T and basic analog */
789 /* WinTV-HVR1200 (PCIe, OEM, half height)
790 * DVB-T and basic analog */
792 /* WinTV-HVR1200 (PCIe, OEM, half height)
793 * DVB-T and basic analog */
795 /* WinTV-HVR1200 (PCIe, OEM, full height)
796 * DVB-T and basic analog */
798 /* WinTV-HVR1200 (PCIe, OEM, half height)
799 * DVB-T and basic analog */
801 /* WinTV-HVR1200 (PCIe, OEM, full height)
802 * DVB-T and basic analog */
804 /* WinTV-HVR1200 (PCIe, OEM, full height)
805 * DVB-T and basic analog */
807 /* WinTV-HVR1200 (PCIe, OEM, half height)
808 * DVB-T and basic analog */
810 /* WinTV-HVR1200 (PCIe, OEM, full height)
811 * DVB-T and basic analog */
813 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
814 channel ATSC and MPEG2 HW Encoder */
816 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
819 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
822 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
825 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
828 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
829 Dual channel ATSC and MPEG2 HW Encoder */
831 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
832 Dual channel ATSC and MPEG2 HW Encoder */
834 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
835 Dual channel ATSC and MPEG2 HW Encoder */
837 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
838 Dual channel ATSC and MPEG2 HW Encoder */
840 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
841 Dual channel ATSC and MPEG2 HW Encoder */
843 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
844 ATSC and Basic analog */
846 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
847 ATSC and Basic analog */
849 /* WinTV-HVR1250 (PCIe, No IR, half height,
850 ATSC [at least] and Basic analog) */
852 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
853 ATSC and Basic analog */
855 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
856 ATSC and Basic analog */
858 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
859 ATSC and Basic analog */
861 /* WinTV-HVR1400 (Express Card, Retail, IR,
862 * DVB-T and Basic analog */
864 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
865 * DVB-T and MPEG2 HW Encoder */
867 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
868 * DVB-T and MPEG2 HW Encoder */
871 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
872 Dual channel ATSC and MPEG2 HW Encoder */
875 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
876 Dual channel ATSC and Basic analog */
879 printk(KERN_WARNING "%s: warning: "
880 "unknown hauppauge model #%d\n",
881 dev->name, tv.model);
885 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
886 dev->name, tv.model);
889 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
891 struct cx23885_tsport *port = priv;
892 struct cx23885_dev *dev = port->dev;
895 if (command == XC2028_RESET_CLK)
899 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
904 switch (dev->board) {
905 case CX23885_BOARD_HAUPPAUGE_HVR1400:
906 case CX23885_BOARD_HAUPPAUGE_HVR1500:
907 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
908 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
909 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
910 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
911 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
912 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
913 /* Tuner Reset Command */
916 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
917 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
918 /* Two identical tuners on two different i2c buses,
919 * we need to reset the correct gpio. */
922 else if (port->nr == 2)
925 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
926 /* Tuner Reset Command */
929 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
930 altera_ci_tuner_reset(dev, port->nr);
935 /* Drive the tuner into reset and back out */
936 cx_clear(GP0_IO, bitmask);
938 cx_set(GP0_IO, bitmask);
944 void cx23885_gpio_setup(struct cx23885_dev *dev)
946 switch (dev->board) {
947 case CX23885_BOARD_HAUPPAUGE_HVR1250:
948 /* GPIO-0 cx24227 demodulator reset */
949 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
951 case CX23885_BOARD_HAUPPAUGE_HVR1500:
952 /* GPIO-0 cx24227 demodulator */
953 /* GPIO-2 xc3028 tuner */
955 /* Put the parts into reset */
956 cx_set(GP0_IO, 0x00050000);
957 cx_clear(GP0_IO, 0x00000005);
960 /* Bring the parts out of reset */
961 cx_set(GP0_IO, 0x00050005);
963 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
964 /* GPIO-0 cx24227 demodulator reset */
965 /* GPIO-2 xc5000 tuner reset */
966 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
968 case CX23885_BOARD_HAUPPAUGE_HVR1800:
971 /* GPIO-2 8295A Reset */
972 /* GPIO-3-10 cx23417 data0-7 */
973 /* GPIO-11-14 cx23417 addr0-3 */
974 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
978 /* EIO15 Zilog Reset */
979 /* EIO14 S5H1409/CX24227 Reset */
980 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
982 /* Put the demod into reset and protect the eeprom */
983 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
986 /* Bring the demod and blaster out of reset */
987 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
990 /* Force the TDA8295A into reset and back */
991 cx23885_gpio_enable(dev, GPIO_2, 1);
992 cx23885_gpio_set(dev, GPIO_2);
994 cx23885_gpio_clear(dev, GPIO_2);
996 cx23885_gpio_set(dev, GPIO_2);
999 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1000 /* GPIO-0 tda10048 demodulator reset */
1001 /* GPIO-2 tda18271 tuner reset */
1003 /* Put the parts into reset and back */
1004 cx_set(GP0_IO, 0x00050000);
1006 cx_clear(GP0_IO, 0x00000005);
1008 cx_set(GP0_IO, 0x00050005);
1010 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1011 /* GPIO-0 TDA10048 demodulator reset */
1012 /* GPIO-2 TDA8295A Reset */
1013 /* GPIO-3-10 cx23417 data0-7 */
1014 /* GPIO-11-14 cx23417 addr0-3 */
1015 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1017 /* The following GPIO's are on the interna AVCore (cx25840) */
1019 /* GPIO-20 IR_TX 416/DVBT Select */
1020 /* GPIO-21 IIS DAT */
1021 /* GPIO-22 IIS WCLK */
1022 /* GPIO-23 IIS BCLK */
1024 /* Put the parts into reset and back */
1025 cx_set(GP0_IO, 0x00050000);
1027 cx_clear(GP0_IO, 0x00000005);
1029 cx_set(GP0_IO, 0x00050005);
1031 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1032 /* GPIO-0 Dibcom7000p demodulator reset */
1033 /* GPIO-2 xc3028L tuner reset */
1036 /* Put the parts into reset and back */
1037 cx_set(GP0_IO, 0x00050000);
1039 cx_clear(GP0_IO, 0x00000005);
1041 cx_set(GP0_IO, 0x00050005);
1043 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1044 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1045 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1046 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1047 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1049 /* Put the parts into reset and back */
1050 cx_set(GP0_IO, 0x000f0000);
1052 cx_clear(GP0_IO, 0x0000000f);
1054 cx_set(GP0_IO, 0x000f000f);
1056 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1057 /* GPIO-0 portb xc3028 reset */
1058 /* GPIO-1 portb zl10353 reset */
1059 /* GPIO-2 portc xc3028 reset */
1060 /* GPIO-3 portc zl10353 reset */
1062 /* Put the parts into reset and back */
1063 cx_set(GP0_IO, 0x000f0000);
1065 cx_clear(GP0_IO, 0x0000000f);
1067 cx_set(GP0_IO, 0x000f000f);
1069 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1070 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1071 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1072 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1073 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1074 /* GPIO-2 xc3028 tuner reset */
1076 /* The following GPIO's are on the internal AVCore (cx25840) */
1077 /* GPIO-? zl10353 demod reset */
1079 /* Put the parts into reset and back */
1080 cx_set(GP0_IO, 0x00040000);
1082 cx_clear(GP0_IO, 0x00000004);
1084 cx_set(GP0_IO, 0x00040004);
1086 case CX23885_BOARD_TBS_6920:
1087 cx_write(MC417_CTL, 0x00000036);
1088 cx_write(MC417_OEN, 0x00001000);
1089 cx_set(MC417_RWD, 0x00000002);
1091 cx_clear(MC417_RWD, 0x00000800);
1093 cx_set(MC417_RWD, 0x00000800);
1096 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1097 /* GPIO-0 INTA from CiMax1
1098 GPIO-1 INTB from CiMax2
1100 GPIO-3 to GPIO-10 data/addr for CA
1101 GPIO-11 ~CS0 to CiMax1
1102 GPIO-12 ~CS1 to CiMax2
1103 GPIO-13 ADL0 load LSB addr
1104 GPIO-14 ADL1 load MSB addr
1105 GPIO-15 ~RDY from CiMax
1106 GPIO-17 ~RD to CiMax
1107 GPIO-18 ~WR to CiMax
1109 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1110 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1111 cx_clear(GP0_IO, 0x00030004);
1112 mdelay(100);/* reset delay */
1113 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1114 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1115 /* GPIO-15 IN as ~ACK, rest as OUT */
1116 cx_write(MC417_OEN, 0x00001000);
1117 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1118 cx_write(MC417_RWD, 0x0000c300);
1120 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1122 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1123 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1124 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1125 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1126 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1127 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1128 /* GPIO-9 Demod reset */
1130 /* Put the parts into reset and back */
1131 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1132 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1133 cx23885_gpio_clear(dev, GPIO_9);
1135 cx23885_gpio_set(dev, GPIO_9);
1137 case CX23885_BOARD_MYGICA_X8506:
1138 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1139 case CX23885_BOARD_MYGICA_X8507:
1140 /* GPIO-0 (0)Analog / (1)Digital TV */
1141 /* GPIO-1 reset XC5000 */
1142 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1143 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1144 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1146 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1149 case CX23885_BOARD_MYGICA_X8558PRO:
1150 /* GPIO-0 reset first ATBM8830 */
1151 /* GPIO-1 reset second ATBM8830 */
1152 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1153 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1155 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1158 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1159 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1160 /* GPIO-0 656_CLK */
1163 /* GPIO-3-10 cx23417 data0-7 */
1164 /* GPIO-11-14 cx23417 addr0-3 */
1165 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1167 /* GPIO-20 C_IR_TX */
1168 /* GPIO-21 I2S DAT */
1169 /* GPIO-22 I2S WCLK */
1170 /* GPIO-23 I2S BCLK */
1171 /* ALT GPIO: EXP GPIO LATCH */
1173 /* CX23417 GPIO's */
1174 /* GPIO-14 S5H1411/CX24228 Reset */
1175 /* GPIO-13 EEPROM write protect */
1176 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1178 /* Put the demod into reset and protect the eeprom */
1179 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1182 /* Bring the demod out of reset */
1183 mc417_gpio_set(dev, GPIO_14);
1187 /* Connected to IF / Mux */
1189 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1190 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1192 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1195 GPIO-2 ~reset chips out
1196 GPIO-3 to GPIO-10 data/addr for CA in/out
1206 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1207 /* GPIO-0 as INT, reset & TMS low */
1208 cx_clear(GP0_IO, 0x00010006);
1209 mdelay(100);/* reset delay */
1210 cx_set(GP0_IO, 0x00000004); /* reset high */
1211 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1212 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1213 cx_write(MC417_OEN, 0x00005000);
1214 /* ~RD, ~WR high; ADDR low; ~CS high */
1215 cx_write(MC417_RWD, 0x00000d00);
1217 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1222 int cx23885_ir_init(struct cx23885_dev *dev)
1224 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1226 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1227 .pin = CX23885_PIN_IR_RX_GPIO19,
1228 .function = CX23885_PAD_IR_RX,
1230 .strength = CX25840_PIN_DRIVE_MEDIUM,
1232 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1233 .pin = CX23885_PIN_IR_TX_GPIO20,
1234 .function = CX23885_PAD_IR_TX,
1236 .strength = CX25840_PIN_DRIVE_MEDIUM,
1239 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1241 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1243 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1244 .pin = CX23885_PIN_IR_RX_GPIO19,
1245 .function = CX23885_PAD_IR_RX,
1247 .strength = CX25840_PIN_DRIVE_MEDIUM,
1250 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1252 struct v4l2_subdev_ir_parameters params;
1254 switch (dev->board) {
1255 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1256 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1257 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1258 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1259 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1260 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1261 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1262 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1263 /* FIXME: Implement me */
1265 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1266 ret = cx23888_ir_probe(dev);
1269 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1270 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1271 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1273 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1274 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1275 ret = cx23888_ir_probe(dev);
1278 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1279 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1280 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1282 * For these boards we need to invert the Tx output via the
1283 * IR controller to have the LED off while idle
1285 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1286 params.enable = false;
1287 params.shutdown = false;
1288 params.invert_level = true;
1289 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1290 params.shutdown = true;
1291 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1293 case CX23885_BOARD_TEVII_S470:
1296 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1297 if (dev->sd_ir == NULL) {
1301 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1302 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1304 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1307 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1308 if (dev->sd_ir == NULL) {
1312 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1313 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1315 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1316 request_module("ir-kbd-i2c");
1323 void cx23885_ir_fini(struct cx23885_dev *dev)
1325 switch (dev->board) {
1326 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1327 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1328 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1329 cx23885_irq_remove(dev, PCI_MSK_IR);
1330 cx23888_ir_remove(dev);
1333 case CX23885_BOARD_TEVII_S470:
1334 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1335 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1336 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1342 int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1346 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1348 data = ((cx_read(GP0_IO)) & (~0x00000002));
1349 data |= (tms ? 0x00020002 : 0x00020000);
1350 cx_write(GP0_IO, data);
1353 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1354 data |= (tdi ? 0x00008000 : 0);
1355 cx_write(MC417_RWD, data);
1357 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1359 cx_write(MC417_RWD, data | 0x00002000);
1362 cx_write(MC417_RWD, data);
1367 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1369 switch (dev->board) {
1370 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1371 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1372 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1374 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1376 case CX23885_BOARD_TEVII_S470:
1377 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1379 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1384 void cx23885_card_setup(struct cx23885_dev *dev)
1386 struct cx23885_tsport *ts1 = &dev->ts1;
1387 struct cx23885_tsport *ts2 = &dev->ts2;
1389 static u8 eeprom[256];
1391 if (dev->i2c_bus[0].i2c_rc == 0) {
1392 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1393 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1394 eeprom, sizeof(eeprom));
1397 switch (dev->board) {
1398 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1399 if (dev->i2c_bus[0].i2c_rc == 0) {
1400 if (eeprom[0x80] != 0x84)
1401 hauppauge_eeprom(dev, eeprom+0xc0);
1403 hauppauge_eeprom(dev, eeprom+0x80);
1406 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1407 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1408 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1409 if (dev->i2c_bus[0].i2c_rc == 0)
1410 hauppauge_eeprom(dev, eeprom+0x80);
1412 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1413 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1414 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1415 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1416 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1417 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1418 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1419 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1420 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1421 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1422 if (dev->i2c_bus[0].i2c_rc == 0)
1423 hauppauge_eeprom(dev, eeprom+0xc0);
1427 switch (dev->board) {
1428 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1429 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1430 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1431 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1432 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1433 /* break omitted intentionally */
1434 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1435 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1436 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1437 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1439 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1440 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1441 /* Defaults for VID B - Analog encoder */
1442 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1443 ts1->gen_ctrl_val = 0x10e;
1444 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1445 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1447 /* APB_TSVALERR_POL (active low)*/
1448 ts1->vld_misc_val = 0x2000;
1449 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1450 cx_write(0x130184, 0xc);
1452 /* Defaults for VID C */
1453 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1454 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1455 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1457 case CX23885_BOARD_TBS_6920:
1458 ts1->gen_ctrl_val = 0x4; /* Parallel */
1459 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1460 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1462 case CX23885_BOARD_TEVII_S470:
1463 case CX23885_BOARD_DVBWORLD_2005:
1464 ts1->gen_ctrl_val = 0x5; /* Parallel */
1465 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1466 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1468 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1469 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1470 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1471 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1472 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1473 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1474 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1475 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1476 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1478 case CX23885_BOARD_MYGICA_X8506:
1479 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1480 ts1->gen_ctrl_val = 0x5; /* Parallel */
1481 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1482 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1484 case CX23885_BOARD_MYGICA_X8558PRO:
1485 ts1->gen_ctrl_val = 0x5; /* Parallel */
1486 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1487 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1488 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1489 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1490 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1492 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1493 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1494 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1495 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1496 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1497 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1498 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1499 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1500 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1501 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1502 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1503 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1504 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1505 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1506 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1507 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1508 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1510 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1511 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1512 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1515 /* Certain boards support analog, or require the avcore to be
1516 * loaded, ensure this happens.
1518 switch (dev->board) {
1519 case CX23885_BOARD_TEVII_S470:
1520 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1521 /* Currently only enabled for the integrated IR controller */
1524 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1525 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1526 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1527 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1528 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1529 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1530 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1531 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1532 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1533 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1534 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1535 case CX23885_BOARD_MYGICA_X8506:
1536 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1537 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1538 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1539 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1540 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1541 case CX23885_BOARD_MPX885:
1542 case CX23885_BOARD_MYGICA_X8507:
1543 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1544 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1545 &dev->i2c_bus[2].i2c_adap,
1546 "cx25840", 0x88 >> 1, NULL);
1547 if (dev->sd_cx25840) {
1548 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1549 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1554 /* AUX-PLL 27MHz CLK */
1555 switch (dev->board) {
1556 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1557 netup_initialize(dev);
1559 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1561 const struct firmware *fw;
1562 const char *filename = "dvb-netup-altera-01.fw";
1563 char *action = "configure";
1564 static struct netup_card_info cinfo;
1565 struct altera_config netup_config = {
1568 .jtag_io = netup_jtag_io,
1571 netup_initialize(dev);
1573 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1575 cinfo.rev = netup_card_rev;
1577 switch (cinfo.rev) {
1579 filename = "dvb-netup-altera-04.fw";
1582 filename = "dvb-netup-altera-01.fw";
1585 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1586 cinfo.rev, filename);
1588 ret = request_firmware(&fw, filename, &dev->pci->dev);
1590 printk(KERN_ERR "did not find the firmware file. (%s) "
1591 "Please see linux/Documentation/dvb/ for more details "
1592 "on firmware-problems.", filename);
1594 altera_init(&netup_config, fw);
1596 release_firmware(fw);
1602 /* ------------------------------------------------------------------ */