2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27 #include <linux/firmware.h>
28 #include <misc/altera.h>
31 #include "tuner-xc2028.h"
32 #include "netup-eeprom.h"
33 #include "netup-init.h"
34 #include "altera-ci.h"
37 #include "cx23888-ir.h"
39 static unsigned int netup_card_rev = 1;
40 module_param(netup_card_rev, int, 0644);
41 MODULE_PARM_DESC(netup_card_rev,
42 "NetUP Dual DVB-T/C CI card revision");
43 static unsigned int enable_885_ir;
44 module_param(enable_885_ir, int, 0644);
45 MODULE_PARM_DESC(enable_885_ir,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
49 "\t\t\tTeVii S470 (reported unsafe)\n"
50 "\t\t This can cause an interrupt storm with some cards.\n"
51 "\t\t Default: 0 [Disabled]");
53 /* ------------------------------------------------------------------ */
54 /* board config info */
56 struct cx23885_board cx23885_boards[] = {
57 [CX23885_BOARD_UNKNOWN] = {
58 .name = "UNKNOWN/GENERIC",
59 /* Ensure safe default for unknown boards */
62 .type = CX23885_VMUX_COMPOSITE1,
65 .type = CX23885_VMUX_COMPOSITE2,
68 .type = CX23885_VMUX_COMPOSITE3,
71 .type = CX23885_VMUX_COMPOSITE4,
75 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
76 .name = "Hauppauge WinTV-HVR1800lp",
77 .portc = CX23885_MPEG_DVB,
79 .type = CX23885_VMUX_TELEVISION,
83 .type = CX23885_VMUX_DEBUG,
87 .type = CX23885_VMUX_COMPOSITE1,
91 .type = CX23885_VMUX_SVIDEO,
96 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
97 .name = "Hauppauge WinTV-HVR1800",
98 .porta = CX23885_ANALOG_VIDEO,
99 .portb = CX23885_MPEG_ENCODER,
100 .portc = CX23885_MPEG_DVB,
101 .tuner_type = TUNER_PHILIPS_TDA8290,
102 .tuner_addr = 0x42, /* 0x84 >> 1 */
105 .type = CX23885_VMUX_TELEVISION,
106 .vmux = CX25840_VIN7_CH3 |
109 .amux = CX25840_AUDIO8,
112 .type = CX23885_VMUX_COMPOSITE1,
113 .vmux = CX25840_VIN7_CH3 |
116 .amux = CX25840_AUDIO7,
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = CX25840_VIN7_CH3 |
124 .amux = CX25840_AUDIO7,
128 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
129 .name = "Hauppauge WinTV-HVR1250",
130 .portc = CX23885_MPEG_DVB,
132 .type = CX23885_VMUX_TELEVISION,
136 .type = CX23885_VMUX_DEBUG,
140 .type = CX23885_VMUX_COMPOSITE1,
144 .type = CX23885_VMUX_SVIDEO,
149 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
150 .name = "DViCO FusionHDTV5 Express",
151 .portb = CX23885_MPEG_DVB,
153 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
154 .name = "Hauppauge WinTV-HVR1500Q",
155 .portc = CX23885_MPEG_DVB,
157 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
158 .name = "Hauppauge WinTV-HVR1500",
159 .porta = CX23885_ANALOG_VIDEO,
160 .portc = CX23885_MPEG_DVB,
161 .tuner_type = TUNER_XC2028,
162 .tuner_addr = 0x61, /* 0xc2 >> 1 */
164 .type = CX23885_VMUX_TELEVISION,
165 .vmux = CX25840_VIN7_CH3 |
170 .type = CX23885_VMUX_COMPOSITE1,
171 .vmux = CX25840_VIN7_CH3 |
176 .type = CX23885_VMUX_SVIDEO,
177 .vmux = CX25840_VIN7_CH3 |
184 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
185 .name = "Hauppauge WinTV-HVR1200",
186 .portc = CX23885_MPEG_DVB,
188 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
189 .name = "Hauppauge WinTV-HVR1700",
190 .portc = CX23885_MPEG_DVB,
192 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
193 .name = "Hauppauge WinTV-HVR1400",
194 .portc = CX23885_MPEG_DVB,
196 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
197 .name = "DViCO FusionHDTV7 Dual Express",
198 .portb = CX23885_MPEG_DVB,
199 .portc = CX23885_MPEG_DVB,
201 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
202 .name = "DViCO FusionHDTV DVB-T Dual Express",
203 .portb = CX23885_MPEG_DVB,
204 .portc = CX23885_MPEG_DVB,
206 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
207 .name = "Leadtek Winfast PxDVR3200 H",
208 .portc = CX23885_MPEG_DVB,
210 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
211 .name = "Leadtek Winfast PxDVR3200 H XC4000",
212 .porta = CX23885_ANALOG_VIDEO,
213 .portc = CX23885_MPEG_DVB,
214 .tuner_type = TUNER_XC4000,
217 .radio_addr = ADDR_UNSET,
219 .type = CX23885_VMUX_TELEVISION,
220 .vmux = CX25840_VIN2_CH1 |
224 .type = CX23885_VMUX_COMPOSITE1,
225 .vmux = CX25840_COMPOSITE1,
227 .type = CX23885_VMUX_SVIDEO,
228 .vmux = CX25840_SVIDEO_LUMA3 |
229 CX25840_SVIDEO_CHROMA4,
231 .type = CX23885_VMUX_COMPONENT,
232 .vmux = CX25840_VIN7_CH1 |
235 CX25840_COMPONENT_ON,
238 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
239 .name = "Compro VideoMate E650F",
240 .portc = CX23885_MPEG_DVB,
242 [CX23885_BOARD_TBS_6920] = {
243 .name = "TurboSight TBS 6920",
244 .portb = CX23885_MPEG_DVB,
246 [CX23885_BOARD_TEVII_S470] = {
247 .name = "TeVii S470",
248 .portb = CX23885_MPEG_DVB,
250 [CX23885_BOARD_DVBWORLD_2005] = {
251 .name = "DVBWorld DVB-S2 2005",
252 .portb = CX23885_MPEG_DVB,
254 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
256 .name = "NetUP Dual DVB-S2 CI",
257 .portb = CX23885_MPEG_DVB,
258 .portc = CX23885_MPEG_DVB,
260 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
261 .name = "Hauppauge WinTV-HVR1270",
262 .portc = CX23885_MPEG_DVB,
264 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
265 .name = "Hauppauge WinTV-HVR1275",
266 .portc = CX23885_MPEG_DVB,
268 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
269 .name = "Hauppauge WinTV-HVR1255",
270 .portc = CX23885_MPEG_DVB,
272 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
273 .name = "Hauppauge WinTV-HVR1210",
274 .portc = CX23885_MPEG_DVB,
276 [CX23885_BOARD_MYGICA_X8506] = {
277 .name = "Mygica X8506 DMB-TH",
278 .tuner_type = TUNER_XC5000,
281 .porta = CX23885_ANALOG_VIDEO,
282 .portb = CX23885_MPEG_DVB,
285 .type = CX23885_VMUX_TELEVISION,
286 .vmux = CX25840_COMPOSITE2,
289 .type = CX23885_VMUX_COMPOSITE1,
290 .vmux = CX25840_COMPOSITE8,
293 .type = CX23885_VMUX_SVIDEO,
294 .vmux = CX25840_SVIDEO_LUMA3 |
295 CX25840_SVIDEO_CHROMA4,
298 .type = CX23885_VMUX_COMPONENT,
299 .vmux = CX25840_COMPONENT_ON |
306 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
307 .name = "Magic-Pro ProHDTV Extreme 2",
308 .tuner_type = TUNER_XC5000,
311 .porta = CX23885_ANALOG_VIDEO,
312 .portb = CX23885_MPEG_DVB,
315 .type = CX23885_VMUX_TELEVISION,
316 .vmux = CX25840_COMPOSITE2,
319 .type = CX23885_VMUX_COMPOSITE1,
320 .vmux = CX25840_COMPOSITE8,
323 .type = CX23885_VMUX_SVIDEO,
324 .vmux = CX25840_SVIDEO_LUMA3 |
325 CX25840_SVIDEO_CHROMA4,
328 .type = CX23885_VMUX_COMPONENT,
329 .vmux = CX25840_COMPONENT_ON |
336 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
337 .name = "Hauppauge WinTV-HVR1850",
338 .porta = CX23885_ANALOG_VIDEO,
339 .portb = CX23885_MPEG_ENCODER,
340 .portc = CX23885_MPEG_DVB,
341 .tuner_type = TUNER_ABSENT,
342 .tuner_addr = 0x42, /* 0x84 >> 1 */
345 .type = CX23885_VMUX_TELEVISION,
346 .vmux = CX25840_VIN7_CH3 |
350 .amux = CX25840_AUDIO8,
352 .type = CX23885_VMUX_COMPOSITE1,
353 .vmux = CX25840_VIN7_CH3 |
356 .amux = CX25840_AUDIO7,
358 .type = CX23885_VMUX_SVIDEO,
359 .vmux = CX25840_VIN7_CH3 |
363 .amux = CX25840_AUDIO7,
366 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
367 .name = "Compro VideoMate E800",
368 .portc = CX23885_MPEG_DVB,
370 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
371 .name = "Hauppauge WinTV-HVR1290",
372 .portc = CX23885_MPEG_DVB,
374 [CX23885_BOARD_MYGICA_X8558PRO] = {
375 .name = "Mygica X8558 PRO DMB-TH",
376 .portb = CX23885_MPEG_DVB,
377 .portc = CX23885_MPEG_DVB,
379 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
380 .name = "LEADTEK WinFast PxTV1200",
381 .porta = CX23885_ANALOG_VIDEO,
382 .tuner_type = TUNER_XC2028,
386 .type = CX23885_VMUX_TELEVISION,
387 .vmux = CX25840_VIN2_CH1 |
391 .type = CX23885_VMUX_COMPOSITE1,
392 .vmux = CX25840_COMPOSITE1,
394 .type = CX23885_VMUX_SVIDEO,
395 .vmux = CX25840_SVIDEO_LUMA3 |
396 CX25840_SVIDEO_CHROMA4,
398 .type = CX23885_VMUX_COMPONENT,
399 .vmux = CX25840_VIN7_CH1 |
402 CX25840_COMPONENT_ON,
405 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
406 .name = "GoTView X5 3D Hybrid",
407 .tuner_type = TUNER_XC5000,
410 .porta = CX23885_ANALOG_VIDEO,
411 .portb = CX23885_MPEG_DVB,
413 .type = CX23885_VMUX_TELEVISION,
414 .vmux = CX25840_VIN2_CH1 |
418 .type = CX23885_VMUX_COMPOSITE1,
419 .vmux = CX23885_VMUX_COMPOSITE1,
421 .type = CX23885_VMUX_SVIDEO,
422 .vmux = CX25840_SVIDEO_LUMA3 |
423 CX25840_SVIDEO_CHROMA4,
426 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
428 .name = "NetUP Dual DVB-T/C-CI RF",
429 .porta = CX23885_ANALOG_VIDEO,
430 .portb = CX23885_MPEG_DVB,
431 .portc = CX23885_MPEG_DVB,
434 .tuner_type = TUNER_XC5000,
437 .type = CX23885_VMUX_TELEVISION,
438 .vmux = CX25840_COMPOSITE1,
441 [CX23885_BOARD_MPX885] = {
443 .porta = CX23885_ANALOG_VIDEO,
445 .type = CX23885_VMUX_COMPOSITE1,
446 .vmux = CX25840_COMPOSITE1,
447 .amux = CX25840_AUDIO6,
450 .type = CX23885_VMUX_COMPOSITE2,
451 .vmux = CX25840_COMPOSITE2,
452 .amux = CX25840_AUDIO6,
455 .type = CX23885_VMUX_COMPOSITE3,
456 .vmux = CX25840_COMPOSITE3,
457 .amux = CX25840_AUDIO7,
460 .type = CX23885_VMUX_COMPOSITE4,
461 .vmux = CX25840_COMPOSITE4,
462 .amux = CX25840_AUDIO7,
466 [CX23885_BOARD_MYGICA_X8507] = {
467 .name = "Mygica X8507",
468 .tuner_type = TUNER_XC5000,
471 .porta = CX23885_ANALOG_VIDEO,
474 .type = CX23885_VMUX_TELEVISION,
475 .vmux = CX25840_COMPOSITE2,
476 .amux = CX25840_AUDIO8,
479 .type = CX23885_VMUX_COMPOSITE1,
480 .vmux = CX25840_COMPOSITE8,
483 .type = CX23885_VMUX_SVIDEO,
484 .vmux = CX25840_SVIDEO_LUMA3 |
485 CX25840_SVIDEO_CHROMA4,
488 .type = CX23885_VMUX_COMPONENT,
489 .vmux = CX25840_COMPONENT_ON |
496 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
497 .name = "TerraTec Cinergy T PCIe Dual",
498 .portb = CX23885_MPEG_DVB,
499 .portc = CX23885_MPEG_DVB,
501 [CX23885_BOARD_TEVII_S471] = {
502 .name = "TeVii S471",
503 .portb = CX23885_MPEG_DVB,
506 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
508 /* ------------------------------------------------------------------ */
509 /* PCI subsystem IDs */
511 struct cx23885_subid cx23885_subids[] = {
515 .card = CX23885_BOARD_UNKNOWN,
519 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
523 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
527 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
531 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
535 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
539 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
543 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
547 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
551 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
555 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
559 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
563 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
567 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
571 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
575 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
579 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
583 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
587 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
591 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
595 .card = CX23885_BOARD_TBS_6920,
599 .card = CX23885_BOARD_TEVII_S470,
603 .card = CX23885_BOARD_DVBWORLD_2005,
607 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
611 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
615 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
619 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
623 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
627 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
631 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
635 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
639 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
643 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
647 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
651 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
655 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
659 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
663 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
667 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
671 .card = CX23885_BOARD_MYGICA_X8506,
675 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
679 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
683 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
687 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
691 .card = CX23885_BOARD_MYGICA_X8558PRO,
695 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
699 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
703 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
707 .card = CX23885_BOARD_MYGICA_X8507,
711 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
715 .card = CX23885_BOARD_TEVII_S471,
718 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
720 void cx23885_card_list(struct cx23885_dev *dev)
724 if (0 == dev->pci->subsystem_vendor &&
725 0 == dev->pci->subsystem_device) {
727 "%s: Board has no valid PCIe Subsystem ID and can't\n"
728 "%s: be autodetected. Pass card=<n> insmod option\n"
729 "%s: to workaround that. Redirect complaints to the\n"
730 "%s: vendor of the TV card. Best regards,\n"
732 dev->name, dev->name, dev->name, dev->name, dev->name);
735 "%s: Your board isn't known (yet) to the driver.\n"
736 "%s: Try to pick one of the existing card configs via\n"
737 "%s: card=<n> insmod option. Updating to the latest\n"
738 "%s: version might help as well.\n",
739 dev->name, dev->name, dev->name, dev->name);
741 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
743 for (i = 0; i < cx23885_bcount; i++)
744 printk(KERN_INFO "%s: card=%d -> %s\n",
745 dev->name, i, cx23885_boards[i].name);
748 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
752 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
755 /* Make sure we support the board model */
758 /* WinTV-HVR1270 (PCIe, Retail, half height)
759 * ATSC/QAM and basic analog, IR Blast */
761 /* WinTV-HVR1210 (PCIe, Retail, half height)
762 * DVB-T and basic analog, IR Blast */
764 /* WinTV-HVR1270 (PCIe, Retail, half height)
765 * ATSC/QAM and basic analog, IR Recv */
767 /* WinTV-HVR1210 (PCIe, Retail, half height)
768 * DVB-T and basic analog, IR Recv */
770 /* WinTV-HVR1275 (PCIe, Retail, half height)
771 * ATSC/QAM and basic analog, IR Recv */
773 /* WinTV-HVR1210 (PCIe, Retail, half height)
774 * DVB-T and basic analog, IR Recv */
776 /* WinTV-HVR1270 (PCIe, Retail, full height)
777 * ATSC/QAM and basic analog, IR Blast */
779 /* WinTV-HVR1210 (PCIe, Retail, full height)
780 * DVB-T and basic analog, IR Blast */
782 /* WinTV-HVR1270 (PCIe, Retail, full height)
783 * ATSC/QAM and basic analog, IR Recv */
785 /* WinTV-HVR1210 (PCIe, Retail, full height)
786 * DVB-T and basic analog, IR Recv */
788 /* WinTV-HVR1275 (PCIe, Retail, full height)
789 * ATSC/QAM and basic analog, IR Recv */
791 /* WinTV-HVR1210 (PCIe, Retail, full height)
792 * DVB-T and basic analog, IR Recv */
794 /* WinTV-HVR1200 (PCIe, Retail, full height)
795 * DVB-T and basic analog */
797 /* WinTV-HVR1200 (PCIe, OEM, half height)
798 * DVB-T and basic analog */
800 /* WinTV-HVR1200 (PCIe, OEM, half height)
801 * DVB-T and basic analog */
803 /* WinTV-HVR1200 (PCIe, OEM, full height)
804 * DVB-T and basic analog */
806 /* WinTV-HVR1200 (PCIe, OEM, half height)
807 * DVB-T and basic analog */
809 /* WinTV-HVR1200 (PCIe, OEM, full height)
810 * DVB-T and basic analog */
812 /* WinTV-HVR1200 (PCIe, OEM, full height)
813 * DVB-T and basic analog */
815 /* WinTV-HVR1200 (PCIe, OEM, half height)
816 * DVB-T and basic analog */
818 /* WinTV-HVR1200 (PCIe, OEM, full height)
819 * DVB-T and basic analog */
821 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
822 channel ATSC and MPEG2 HW Encoder */
824 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
827 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
830 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
833 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
836 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
837 Dual channel ATSC and MPEG2 HW Encoder */
839 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
840 Dual channel ATSC and MPEG2 HW Encoder */
842 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
843 Dual channel ATSC and MPEG2 HW Encoder */
845 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
846 Dual channel ATSC and MPEG2 HW Encoder */
848 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
849 Dual channel ATSC and MPEG2 HW Encoder */
851 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
852 ATSC and Basic analog */
854 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
855 ATSC and Basic analog */
857 /* WinTV-HVR1250 (PCIe, No IR, half height,
858 ATSC [at least] and Basic analog) */
860 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
861 ATSC and Basic analog */
863 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
864 ATSC and Basic analog */
866 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
867 ATSC and Basic analog */
869 /* WinTV-HVR1400 (Express Card, Retail, IR,
870 * DVB-T and Basic analog */
872 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
873 * DVB-T and MPEG2 HW Encoder */
875 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
876 * DVB-T and MPEG2 HW Encoder */
879 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
880 Dual channel ATSC and MPEG2 HW Encoder */
883 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
884 Dual channel ATSC and Basic analog */
887 printk(KERN_WARNING "%s: warning: "
888 "unknown hauppauge model #%d\n",
889 dev->name, tv.model);
893 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
894 dev->name, tv.model);
897 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
899 struct cx23885_tsport *port = priv;
900 struct cx23885_dev *dev = port->dev;
903 if (command == XC2028_RESET_CLK)
907 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
912 switch (dev->board) {
913 case CX23885_BOARD_HAUPPAUGE_HVR1400:
914 case CX23885_BOARD_HAUPPAUGE_HVR1500:
915 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
916 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
917 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
918 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
919 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
920 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
921 /* Tuner Reset Command */
924 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
925 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
926 /* Two identical tuners on two different i2c buses,
927 * we need to reset the correct gpio. */
930 else if (port->nr == 2)
933 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
934 /* Tuner Reset Command */
937 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
938 altera_ci_tuner_reset(dev, port->nr);
943 /* Drive the tuner into reset and back out */
944 cx_clear(GP0_IO, bitmask);
946 cx_set(GP0_IO, bitmask);
952 void cx23885_gpio_setup(struct cx23885_dev *dev)
954 switch (dev->board) {
955 case CX23885_BOARD_HAUPPAUGE_HVR1250:
956 /* GPIO-0 cx24227 demodulator reset */
957 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
959 case CX23885_BOARD_HAUPPAUGE_HVR1500:
960 /* GPIO-0 cx24227 demodulator */
961 /* GPIO-2 xc3028 tuner */
963 /* Put the parts into reset */
964 cx_set(GP0_IO, 0x00050000);
965 cx_clear(GP0_IO, 0x00000005);
968 /* Bring the parts out of reset */
969 cx_set(GP0_IO, 0x00050005);
971 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
972 /* GPIO-0 cx24227 demodulator reset */
973 /* GPIO-2 xc5000 tuner reset */
974 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
976 case CX23885_BOARD_HAUPPAUGE_HVR1800:
979 /* GPIO-2 8295A Reset */
980 /* GPIO-3-10 cx23417 data0-7 */
981 /* GPIO-11-14 cx23417 addr0-3 */
982 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
986 /* EIO15 Zilog Reset */
987 /* EIO14 S5H1409/CX24227 Reset */
988 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
990 /* Put the demod into reset and protect the eeprom */
991 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
994 /* Bring the demod and blaster out of reset */
995 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
998 /* Force the TDA8295A into reset and back */
999 cx23885_gpio_enable(dev, GPIO_2, 1);
1000 cx23885_gpio_set(dev, GPIO_2);
1002 cx23885_gpio_clear(dev, GPIO_2);
1004 cx23885_gpio_set(dev, GPIO_2);
1007 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1008 /* GPIO-0 tda10048 demodulator reset */
1009 /* GPIO-2 tda18271 tuner reset */
1011 /* Put the parts into reset and back */
1012 cx_set(GP0_IO, 0x00050000);
1014 cx_clear(GP0_IO, 0x00000005);
1016 cx_set(GP0_IO, 0x00050005);
1018 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1019 /* GPIO-0 TDA10048 demodulator reset */
1020 /* GPIO-2 TDA8295A Reset */
1021 /* GPIO-3-10 cx23417 data0-7 */
1022 /* GPIO-11-14 cx23417 addr0-3 */
1023 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1025 /* The following GPIO's are on the interna AVCore (cx25840) */
1027 /* GPIO-20 IR_TX 416/DVBT Select */
1028 /* GPIO-21 IIS DAT */
1029 /* GPIO-22 IIS WCLK */
1030 /* GPIO-23 IIS BCLK */
1032 /* Put the parts into reset and back */
1033 cx_set(GP0_IO, 0x00050000);
1035 cx_clear(GP0_IO, 0x00000005);
1037 cx_set(GP0_IO, 0x00050005);
1039 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1040 /* GPIO-0 Dibcom7000p demodulator reset */
1041 /* GPIO-2 xc3028L tuner reset */
1044 /* Put the parts into reset and back */
1045 cx_set(GP0_IO, 0x00050000);
1047 cx_clear(GP0_IO, 0x00000005);
1049 cx_set(GP0_IO, 0x00050005);
1051 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1052 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1053 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1054 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1055 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1057 /* Put the parts into reset and back */
1058 cx_set(GP0_IO, 0x000f0000);
1060 cx_clear(GP0_IO, 0x0000000f);
1062 cx_set(GP0_IO, 0x000f000f);
1064 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1065 /* GPIO-0 portb xc3028 reset */
1066 /* GPIO-1 portb zl10353 reset */
1067 /* GPIO-2 portc xc3028 reset */
1068 /* GPIO-3 portc zl10353 reset */
1070 /* Put the parts into reset and back */
1071 cx_set(GP0_IO, 0x000f0000);
1073 cx_clear(GP0_IO, 0x0000000f);
1075 cx_set(GP0_IO, 0x000f000f);
1077 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1078 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1079 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1080 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1081 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1082 /* GPIO-2 xc3028 tuner reset */
1084 /* The following GPIO's are on the internal AVCore (cx25840) */
1085 /* GPIO-? zl10353 demod reset */
1087 /* Put the parts into reset and back */
1088 cx_set(GP0_IO, 0x00040000);
1090 cx_clear(GP0_IO, 0x00000004);
1092 cx_set(GP0_IO, 0x00040004);
1094 case CX23885_BOARD_TBS_6920:
1095 cx_write(MC417_CTL, 0x00000036);
1096 cx_write(MC417_OEN, 0x00001000);
1097 cx_set(MC417_RWD, 0x00000002);
1099 cx_clear(MC417_RWD, 0x00000800);
1101 cx_set(MC417_RWD, 0x00000800);
1104 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1105 /* GPIO-0 INTA from CiMax1
1106 GPIO-1 INTB from CiMax2
1108 GPIO-3 to GPIO-10 data/addr for CA
1109 GPIO-11 ~CS0 to CiMax1
1110 GPIO-12 ~CS1 to CiMax2
1111 GPIO-13 ADL0 load LSB addr
1112 GPIO-14 ADL1 load MSB addr
1113 GPIO-15 ~RDY from CiMax
1114 GPIO-17 ~RD to CiMax
1115 GPIO-18 ~WR to CiMax
1117 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1118 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1119 cx_clear(GP0_IO, 0x00030004);
1120 mdelay(100);/* reset delay */
1121 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1122 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1123 /* GPIO-15 IN as ~ACK, rest as OUT */
1124 cx_write(MC417_OEN, 0x00001000);
1125 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1126 cx_write(MC417_RWD, 0x0000c300);
1128 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1130 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1131 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1132 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1133 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1134 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1135 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1136 /* GPIO-9 Demod reset */
1138 /* Put the parts into reset and back */
1139 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1140 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1141 cx23885_gpio_clear(dev, GPIO_9);
1143 cx23885_gpio_set(dev, GPIO_9);
1145 case CX23885_BOARD_MYGICA_X8506:
1146 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1147 case CX23885_BOARD_MYGICA_X8507:
1148 /* GPIO-0 (0)Analog / (1)Digital TV */
1149 /* GPIO-1 reset XC5000 */
1150 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1151 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1152 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1154 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1157 case CX23885_BOARD_MYGICA_X8558PRO:
1158 /* GPIO-0 reset first ATBM8830 */
1159 /* GPIO-1 reset second ATBM8830 */
1160 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1161 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1163 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1166 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1167 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1168 /* GPIO-0 656_CLK */
1171 /* GPIO-3-10 cx23417 data0-7 */
1172 /* GPIO-11-14 cx23417 addr0-3 */
1173 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1175 /* GPIO-20 C_IR_TX */
1176 /* GPIO-21 I2S DAT */
1177 /* GPIO-22 I2S WCLK */
1178 /* GPIO-23 I2S BCLK */
1179 /* ALT GPIO: EXP GPIO LATCH */
1181 /* CX23417 GPIO's */
1182 /* GPIO-14 S5H1411/CX24228 Reset */
1183 /* GPIO-13 EEPROM write protect */
1184 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1186 /* Put the demod into reset and protect the eeprom */
1187 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1190 /* Bring the demod out of reset */
1191 mc417_gpio_set(dev, GPIO_14);
1195 /* Connected to IF / Mux */
1197 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1198 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1200 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1203 GPIO-2 ~reset chips out
1204 GPIO-3 to GPIO-10 data/addr for CA in/out
1214 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1215 /* GPIO-0 as INT, reset & TMS low */
1216 cx_clear(GP0_IO, 0x00010006);
1217 mdelay(100);/* reset delay */
1218 cx_set(GP0_IO, 0x00000004); /* reset high */
1219 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1220 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1221 cx_write(MC417_OEN, 0x00005000);
1222 /* ~RD, ~WR high; ADDR low; ~CS high */
1223 cx_write(MC417_RWD, 0x00000d00);
1225 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1230 int cx23885_ir_init(struct cx23885_dev *dev)
1232 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1234 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1235 .pin = CX23885_PIN_IR_RX_GPIO19,
1236 .function = CX23885_PAD_IR_RX,
1238 .strength = CX25840_PIN_DRIVE_MEDIUM,
1240 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1241 .pin = CX23885_PIN_IR_TX_GPIO20,
1242 .function = CX23885_PAD_IR_TX,
1244 .strength = CX25840_PIN_DRIVE_MEDIUM,
1247 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1249 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1251 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1252 .pin = CX23885_PIN_IR_RX_GPIO19,
1253 .function = CX23885_PAD_IR_RX,
1255 .strength = CX25840_PIN_DRIVE_MEDIUM,
1258 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1260 struct v4l2_subdev_ir_parameters params;
1262 switch (dev->board) {
1263 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1264 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1265 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1266 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1267 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1268 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1269 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1270 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1271 /* FIXME: Implement me */
1273 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1274 ret = cx23888_ir_probe(dev);
1277 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1278 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1279 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1281 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1282 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1283 ret = cx23888_ir_probe(dev);
1286 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1287 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1288 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1290 * For these boards we need to invert the Tx output via the
1291 * IR controller to have the LED off while idle
1293 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1294 params.enable = false;
1295 params.shutdown = false;
1296 params.invert_level = true;
1297 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1298 params.shutdown = true;
1299 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1301 case CX23885_BOARD_TEVII_S470:
1304 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1305 if (dev->sd_ir == NULL) {
1309 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1310 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1312 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1315 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1316 if (dev->sd_ir == NULL) {
1320 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1321 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1323 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1324 request_module("ir-kbd-i2c");
1331 void cx23885_ir_fini(struct cx23885_dev *dev)
1333 switch (dev->board) {
1334 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1335 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1336 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1337 cx23885_irq_remove(dev, PCI_MSK_IR);
1338 cx23888_ir_remove(dev);
1341 case CX23885_BOARD_TEVII_S470:
1342 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1343 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1344 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1350 int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1354 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1356 data = ((cx_read(GP0_IO)) & (~0x00000002));
1357 data |= (tms ? 0x00020002 : 0x00020000);
1358 cx_write(GP0_IO, data);
1361 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1362 data |= (tdi ? 0x00008000 : 0);
1363 cx_write(MC417_RWD, data);
1365 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1367 cx_write(MC417_RWD, data | 0x00002000);
1370 cx_write(MC417_RWD, data);
1375 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1377 switch (dev->board) {
1378 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1379 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1380 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1382 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1384 case CX23885_BOARD_TEVII_S470:
1385 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1387 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1392 void cx23885_card_setup(struct cx23885_dev *dev)
1394 struct cx23885_tsport *ts1 = &dev->ts1;
1395 struct cx23885_tsport *ts2 = &dev->ts2;
1397 static u8 eeprom[256];
1399 if (dev->i2c_bus[0].i2c_rc == 0) {
1400 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1401 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1402 eeprom, sizeof(eeprom));
1405 switch (dev->board) {
1406 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1407 if (dev->i2c_bus[0].i2c_rc == 0) {
1408 if (eeprom[0x80] != 0x84)
1409 hauppauge_eeprom(dev, eeprom+0xc0);
1411 hauppauge_eeprom(dev, eeprom+0x80);
1414 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1415 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1416 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1417 if (dev->i2c_bus[0].i2c_rc == 0)
1418 hauppauge_eeprom(dev, eeprom+0x80);
1420 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1421 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1422 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1423 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1424 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1425 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1426 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1427 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1428 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1429 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1430 if (dev->i2c_bus[0].i2c_rc == 0)
1431 hauppauge_eeprom(dev, eeprom+0xc0);
1435 switch (dev->board) {
1436 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1437 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1438 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1439 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1440 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1441 /* break omitted intentionally */
1442 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1443 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1444 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1445 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1447 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1448 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1449 /* Defaults for VID B - Analog encoder */
1450 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1451 ts1->gen_ctrl_val = 0x10e;
1452 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1453 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1455 /* APB_TSVALERR_POL (active low)*/
1456 ts1->vld_misc_val = 0x2000;
1457 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1458 cx_write(0x130184, 0xc);
1460 /* Defaults for VID C */
1461 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1462 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1463 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1465 case CX23885_BOARD_TBS_6920:
1466 ts1->gen_ctrl_val = 0x4; /* Parallel */
1467 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1468 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1470 case CX23885_BOARD_TEVII_S470:
1471 case CX23885_BOARD_TEVII_S471:
1472 case CX23885_BOARD_DVBWORLD_2005:
1473 ts1->gen_ctrl_val = 0x5; /* Parallel */
1474 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1475 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1477 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1478 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1479 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1480 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1481 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1482 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1483 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1484 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1485 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1487 case CX23885_BOARD_MYGICA_X8506:
1488 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1489 ts1->gen_ctrl_val = 0x5; /* Parallel */
1490 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1491 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1493 case CX23885_BOARD_MYGICA_X8558PRO:
1494 ts1->gen_ctrl_val = 0x5; /* Parallel */
1495 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1496 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1497 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1498 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1499 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1501 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1502 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1503 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1504 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1505 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1506 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1507 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1508 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1509 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1510 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1511 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1512 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1513 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1514 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1515 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1516 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1517 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1519 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1520 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1521 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1524 /* Certain boards support analog, or require the avcore to be
1525 * loaded, ensure this happens.
1527 switch (dev->board) {
1528 case CX23885_BOARD_TEVII_S470:
1529 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1530 /* Currently only enabled for the integrated IR controller */
1533 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1534 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1535 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1536 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1537 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1538 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1539 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1540 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1541 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1542 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1543 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1544 case CX23885_BOARD_MYGICA_X8506:
1545 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1546 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1547 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1548 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1549 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1550 case CX23885_BOARD_MPX885:
1551 case CX23885_BOARD_MYGICA_X8507:
1552 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1553 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1554 &dev->i2c_bus[2].i2c_adap,
1555 "cx25840", 0x88 >> 1, NULL);
1556 if (dev->sd_cx25840) {
1557 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1558 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1563 /* AUX-PLL 27MHz CLK */
1564 switch (dev->board) {
1565 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1566 netup_initialize(dev);
1568 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1570 const struct firmware *fw;
1571 const char *filename = "dvb-netup-altera-01.fw";
1572 char *action = "configure";
1573 static struct netup_card_info cinfo;
1574 struct altera_config netup_config = {
1577 .jtag_io = netup_jtag_io,
1580 netup_initialize(dev);
1582 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1584 cinfo.rev = netup_card_rev;
1586 switch (cinfo.rev) {
1588 filename = "dvb-netup-altera-04.fw";
1591 filename = "dvb-netup-altera-01.fw";
1594 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1595 cinfo.rev, filename);
1597 ret = request_firmware(&fw, filename, &dev->pci->dev);
1599 printk(KERN_ERR "did not find the firmware file. (%s) "
1600 "Please see linux/Documentation/dvb/ for more details "
1601 "on firmware-problems.", filename);
1603 altera_init(&netup_config, fw);
1605 release_firmware(fw);
1611 /* ------------------------------------------------------------------ */