2 * Rockchip VPU codec driver
4 * Copyright (C) 2014 Google, Inc.
5 * Tomasz Figa <tfiga@chromium.org>
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef ROCKCHIP_VPU_HW_H_
18 #define ROCKCHIP_VPU_HW_H_
20 #include <media/videobuf2-core.h>
22 #define ROCKCHIP_HEADER_SIZE 1280
23 #define ROCKCHIP_HW_PARAMS_SIZE 5487
24 #define ROCKCHIP_RET_PARAMS_SIZE 488
26 struct rockchip_vpu_dev;
27 struct rockchip_vpu_ctx;
28 struct rockchip_vpu_buf;
31 * enum rockchip_vpu_enc_fmt - source format ID for hardware registers.
33 enum rockchip_vpu_enc_fmt {
34 ROCKCHIP_VPU_ENC_FMT_YUV420P = 0,
35 ROCKCHIP_VPU_ENC_FMT_YUV420SP = 1,
36 ROCKCHIP_VPU_ENC_FMT_YUYV422 = 2,
37 ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3,
41 * struct rk3288_vp8e_reg_params - low level encoding parameters
42 * TODO: Create abstract structures for more generic controls or just
43 * remove unused fields.
45 struct rk3288_vp8e_reg_params {
80 u32 dmv_4p_1p_penalty[32];
81 u32 dmv_qpel_penalty[32];
84 u32 loop_flt_delta[2];
88 * struct rk3288_h264e_reg_params - low level encoding parameters
89 * TODO: Create abstract structures for more generic controls or just
90 * remove unused fields.
92 struct rk3288_h264e_reg_params {
93 u32 frame_coding_type;
95 s32 slice_alpha_offset;
96 s32 slice_beta_offset;
97 s32 chroma_qp_index_offset;
102 s32 slice_size_mb_rows;
103 s32 h264_inter4x4_disabled;
105 s32 transform8x8_mode;
108 /* rate control relevant */
121 * struct rockchip_reg_params - low level encoding parameters
123 struct rockchip_reg_params {
124 /* Mode-specific data. */
126 const struct rk3288_h264e_reg_params rk3288_h264e;
127 const struct rk3288_vp8e_reg_params rk3288_vp8e;
131 struct rockchip_vpu_h264e_feedback {
139 * struct rockchip_vpu_aux_buf - auxiliary DMA buffer for hardware data
140 * @cpu: CPU pointer to the buffer.
141 * @dma: DMA address of the buffer.
142 * @size: Size of the buffer.
144 struct rockchip_vpu_aux_buf {
151 * struct rockchip_vpu_vp8e_hw_ctx - Context private data specific to codec mode.
152 * @ctrl_buf: VP8 control buffer.
153 * @ext_buf: VP8 ext data buffer.
154 * @mv_buf: VP8 motion vector buffer.
155 * @ref_rec_ptr: Bit flag for swapping ref and rec buffers every frame.
157 struct rockchip_vpu_vp8e_hw_ctx {
158 struct rockchip_vpu_aux_buf ctrl_buf;
159 struct rockchip_vpu_aux_buf ext_buf;
160 struct rockchip_vpu_aux_buf mv_buf;
165 * struct rockchip_vpu_vp8d_hw_ctx - Context private data of VP8 decoder.
166 * @segment_map: Segment map buffer.
167 * @prob_tbl: Probability table buffer.
169 struct rockchip_vpu_vp8d_hw_ctx {
170 struct rockchip_vpu_aux_buf segment_map;
171 struct rockchip_vpu_aux_buf prob_tbl;
175 * struct rockchip_vpu_h264d_hw_ctx - Per context data specific to H264 decoding.
176 * @priv_tbl: Private auxiliary buffer for hardware.
178 struct rockchip_vpu_h264d_hw_ctx {
179 struct rockchip_vpu_aux_buf priv_tbl;
183 * struct rockchip_vpu_h264e_hw_ctx - Context private data specific to codec mode.
184 * @ctrl_buf: H264 control buffer.
185 * @ext_buf: H264 ext data buffer.
186 * @ref_rec_ptr: Bit flag for swapping ref and rec buffers every frame.
188 struct rockchip_vpu_h264e_hw_ctx {
189 struct rockchip_vpu_aux_buf cabac_tbl[3];
190 struct rockchip_vpu_aux_buf ext_buf;
195 * struct rockchip_vpu_hw_ctx - Context private data of hardware code.
196 * @codec_ops: Set of operations associated with current codec mode.
198 struct rockchip_vpu_hw_ctx {
199 const struct rockchip_vpu_codec_ops *codec_ops;
201 /* Specific for particular codec modes. */
203 struct rockchip_vpu_vp8e_hw_ctx vp8e;
204 struct rockchip_vpu_vp8d_hw_ctx vp8d;
205 struct rockchip_vpu_h264e_hw_ctx h264e;
206 struct rockchip_vpu_h264d_hw_ctx h264d;
207 /* Other modes will need different data. */
211 int rockchip_vpu_hw_probe(struct rockchip_vpu_dev *vpu);
212 void rockchip_vpu_hw_remove(struct rockchip_vpu_dev *vpu);
214 void rockchip_vpu_power_on(struct rockchip_vpu_dev *vpu);
216 int rockchip_vpu_init(struct rockchip_vpu_ctx *ctx);
217 void rockchip_vpu_deinit(struct rockchip_vpu_ctx *ctx);
219 void rockchip_vpu_run(struct rockchip_vpu_ctx *ctx);
221 /* Ops for rk3288 vpu */
222 int rk3288_vpu_enc_irq(int irq, struct rockchip_vpu_dev *vpu);
223 int rk3288_vpu_dec_irq(int irq, struct rockchip_vpu_dev *vpu);
224 void rk3288_vpu_enc_reset(struct rockchip_vpu_ctx *ctx);
225 void rk3288_vpu_dec_reset(struct rockchip_vpu_ctx *ctx);
227 /* Run ops for rk3288 H264 decoder */
228 int rk3288_vpu_h264d_init(struct rockchip_vpu_ctx *ctx);
229 void rk3288_vpu_h264d_exit(struct rockchip_vpu_ctx *ctx);
230 void rk3288_vpu_h264d_run(struct rockchip_vpu_ctx *ctx);
232 /* Run ops for rk3288 h264 encoder */
233 int rk3288_vpu_h264e_init(struct rockchip_vpu_ctx *ctx);
234 void rk3288_vpu_h264e_exit(struct rockchip_vpu_ctx *ctx);
235 void rk3288_vpu_h264e_run(struct rockchip_vpu_ctx *ctx);
236 void rk3288_vpu_h264e_done(struct rockchip_vpu_ctx *ctx,
237 enum vb2_buffer_state result);
239 /* Run ops for rk3288 VP8 decoder */
240 int rk3288_vpu_vp8d_init(struct rockchip_vpu_ctx *ctx);
241 void rk3288_vpu_vp8d_exit(struct rockchip_vpu_ctx *ctx);
242 void rk3288_vpu_vp8d_run(struct rockchip_vpu_ctx *ctx);
244 /* Run ops for rk3288 VP8 encoder */
245 int rk3288_vpu_vp8e_init(struct rockchip_vpu_ctx *ctx);
246 void rk3288_vpu_vp8e_exit(struct rockchip_vpu_ctx *ctx);
247 void rk3288_vpu_vp8e_run(struct rockchip_vpu_ctx *ctx);
248 void rk3288_vpu_vp8e_done(struct rockchip_vpu_ctx *ctx,
249 enum vb2_buffer_state result);
251 const struct rockchip_reg_params *rk3288_vpu_vp8e_get_dummy_params(void);
253 void rockchip_vpu_vp8e_assemble_bitstream(struct rockchip_vpu_ctx *ctx,
254 struct rockchip_vpu_buf *dst_buf);
255 void rockchip_vpu_h264e_assemble_bitstream(struct rockchip_vpu_ctx *ctx,
256 struct rockchip_vpu_buf *dst_buf);
258 #endif /* ROCKCHIP_VPU_HW_H_ */