drivers/media/platform/rockchip-vpu/rockchip_vpu.c

   1 /*
   2  * Rockchip VPU codec driver
   3  *
   4  * Copyright (C) 2014 Google, Inc.
   5  *      Tomasz Figa <tfiga@chromium.org>
   6  *
   7  * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
   8  *
   9  * Copyright (C) 2011 Samsung Electronics Co., Ltd.
  10  *
  11  * This software is licensed under the terms of the GNU General Public
  12  * License version 2, as published by the Free Software Foundation, and
  13  * may be copied, distributed, and modified under those terms.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  */
  20
  21 #include "rockchip_vpu_common.h"
  22
  23 #include <linux/module.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/sched.h>
  26 #include <linux/slab.h>
  27 #include <linux/videodev2.h>
  28 #include <media/v4l2-event.h>
  29 #include <linux/workqueue.h>
  30 #include <linux/of.h>
  31 #include <media/videobuf2-core.h>
  32 #include <media/videobuf2-dma-contig.h>
  33
  34 #include "rockchip_vpu_dec.h"
  35 #include "rockchip_vpu_enc.h"
  36 #include "rockchip_vpu_hw.h"
  37
  38 int debug;
  39 module_param(debug, int, S_IRUGO | S_IWUSR);
  40 MODULE_PARM_DESC(debug,
  41                  "Debug level - higher value produces more verbose messages");
  42
  43 /*
  44  * DMA coherent helpers.
  45  */
  46
  47 int rockchip_vpu_aux_buf_alloc(struct rockchip_vpu_dev *vpu,
  48                             struct rockchip_vpu_aux_buf *buf, size_t size)
  49 {
  50         buf->cpu = dma_alloc_coherent(vpu->dev, size, &buf->dma, GFP_KERNEL);
  51         if (!buf->cpu)
  52                 return -ENOMEM;
  53
  54         buf->size = size;
  55         return 0;
  56 }
  57
  58 void rockchip_vpu_aux_buf_free(struct rockchip_vpu_dev *vpu,
  59                              struct rockchip_vpu_aux_buf *buf)
  60 {
  61         dma_free_coherent(vpu->dev, buf->size, buf->cpu, buf->dma);
  62
  63         buf->cpu = NULL;
  64         buf->dma = 0;
  65         buf->size = 0;
  66 }
  67
  68 /*
  69  * Context scheduling.
  70  */
  71
  72 static void rockchip_vpu_prepare_run(struct rockchip_vpu_ctx *ctx)
  73 {
  74         if (ctx->run_ops->prepare_run)
  75                 ctx->run_ops->prepare_run(ctx);
  76 }
  77
  78 static void __rockchip_vpu_dequeue_run_locked(struct rockchip_vpu_ctx *ctx)
  79 {
  80         struct rockchip_vpu_buf *src, *dst;
  81
  82         /*
  83          * Since ctx was dequeued from ready_ctxs list, we know that it has
  84          * at least one buffer in each queue.
  85          */
  86         src = list_first_entry(&ctx->src_queue, struct rockchip_vpu_buf, list);
  87         dst = list_first_entry(&ctx->dst_queue, struct rockchip_vpu_buf, list);
  88
  89         list_del(&src->list);
  90         list_del(&dst->list);
  91
  92         ctx->run.src = src;
  93         ctx->run.dst = dst;
  94 }
  95
  96 static struct rockchip_vpu_ctx *
  97 rockchip_vpu_encode_after_decode_war(struct rockchip_vpu_ctx *ctx)
  98 {
  99         struct rockchip_vpu_dev *dev = ctx->dev;
 100
 101         if (dev->dummy_encode_ctx &&
 102                         dev->was_decoding && rockchip_vpu_ctx_is_encoder(ctx))
 103                 return dev->dummy_encode_ctx;
 104
 105         return ctx;
 106 }
 107
 108 static void rockchip_vpu_try_run(struct rockchip_vpu_dev *dev)
 109 {
 110         struct rockchip_vpu_ctx *ctx = NULL;
 111         unsigned long flags;
 112
 113         vpu_debug_enter();
 114
 115         spin_lock_irqsave(&dev->irqlock, flags);
 116
 117         if (list_empty(&dev->ready_ctxs) ||
 118             test_bit(VPU_SUSPENDED, &dev->state))
 119                 /* Nothing to do. */
 120                 goto out;
 121
 122         if (test_and_set_bit(VPU_RUNNING, &dev->state))
 123                 /*
 124                 * The hardware is already running. We will pick another
 125                 * run after we get the notification in rockchip_vpu_run_done().
 126                 */
 127                 goto out;
 128
 129         ctx = list_entry(dev->ready_ctxs.next, struct rockchip_vpu_ctx, list);
 130
 131         /*
 132          * WAR for corrupted hardware state when encoding directly after
 133          * certain decoding runs.
 134          *
 135          * If previous context was decoding and currently picked one is
 136          * encoding then we need to execute a dummy encode with proper
 137          * settings to reinitialize certain internal hardware state.
 138          */
 139         ctx = rockchip_vpu_encode_after_decode_war(ctx);
 140
 141         if (!rockchip_vpu_ctx_is_dummy_encode(ctx)) {
 142                 list_del_init(&ctx->list);
 143                 __rockchip_vpu_dequeue_run_locked(ctx);
 144         }
 145
 146         dev->current_ctx = ctx;
 147         dev->was_decoding = !rockchip_vpu_ctx_is_encoder(ctx);
 148
 149 out:
 150         spin_unlock_irqrestore(&dev->irqlock, flags);
 151
 152         if (ctx) {
 153                 rockchip_vpu_prepare_run(ctx);
 154                 rockchip_vpu_run(ctx);
 155         }
 156
 157         vpu_debug_leave();
 158 }
 159
 160 static void __rockchip_vpu_try_context_locked(struct rockchip_vpu_dev *dev,
 161                                             struct rockchip_vpu_ctx *ctx)
 162 {
 163         if (!list_empty(&ctx->list))
 164                 /* Context already queued. */
 165                 return;
 166
 167         if (!list_empty(&ctx->dst_queue) && !list_empty(&ctx->src_queue))
 168                 list_add_tail(&ctx->list, &dev->ready_ctxs);
 169 }
 170
 171 void rockchip_vpu_run_done(struct rockchip_vpu_ctx *ctx,
 172                          enum vb2_buffer_state result)
 173 {
 174         struct rockchip_vpu_dev *dev = ctx->dev;
 175         unsigned long flags;
 176
 177         vpu_debug_enter();
 178
 179         if (ctx->run_ops->run_done)
 180                 ctx->run_ops->run_done(ctx, result);
 181
 182         if (!rockchip_vpu_ctx_is_dummy_encode(ctx)) {
 183                 struct vb2_v4l2_buffer *src =
 184                         to_vb2_v4l2_buffer(&ctx->run.src->vb.vb2_buf);
 185                 struct vb2_v4l2_buffer *dst =
 186                         to_vb2_v4l2_buffer(&ctx->run.dst->vb.vb2_buf);
 187
 188                 dst->timestamp = src->timestamp;
 189                 vb2_buffer_done(&ctx->run.src->vb.vb2_buf, result);
 190                 vb2_buffer_done(&ctx->run.dst->vb.vb2_buf, result);
 191         }
 192
 193         dev->current_ctx = NULL;
 194         wake_up_all(&dev->run_wq);
 195
 196         spin_lock_irqsave(&dev->irqlock, flags);
 197
 198         __rockchip_vpu_try_context_locked(dev, ctx);
 199         clear_bit(VPU_RUNNING, &dev->state);
 200
 201         spin_unlock_irqrestore(&dev->irqlock, flags);
 202
 203         /* Try scheduling another run to see if we have anything left to do. */
 204         rockchip_vpu_try_run(dev);
 205
 206         vpu_debug_leave();
 207 }
 208
 209 void rockchip_vpu_try_context(struct rockchip_vpu_dev *dev,
 210                             struct rockchip_vpu_ctx *ctx)
 211 {
 212         unsigned long flags;
 213
 214         vpu_debug_enter();
 215
 216         spin_lock_irqsave(&dev->irqlock, flags);
 217
 218         __rockchip_vpu_try_context_locked(dev, ctx);
 219
 220         spin_unlock_irqrestore(&dev->irqlock, flags);
 221
 222         rockchip_vpu_try_run(dev);
 223
 224         vpu_debug_enter();
 225 }
 226
 227 /*
 228  * bit stream assembler
 229  */
 230
 231 static int stream_buffer_status(struct stream_s *stream)
 232 {
 233         if (stream->byte_cnt + 5 > stream->size) {
 234                 stream->overflow = 1;
 235                 return -1;
 236         }
 237
 238         return 0;
 239 }
 240
 241 void stream_put_bits(struct stream_s *buffer, s32 value, s32 number,
 242                      const char *name)
 243 {
 244         s32 bits;
 245         u32 byte_buffer = buffer->byte_buffer;
 246         u8 *stream = buffer->stream;
 247
 248         if (stream_buffer_status(buffer) != 0)
 249                 return;
 250
 251         vpu_debug(0, "assemble %s value %x, bits %d\n", name, value, number);
 252
 253         BUG_ON(value >= (1 << number));
 254         BUG_ON(number >= 25);
 255
 256         bits = number + buffer->buffered_bits;
 257         value <<= (32 - bits);
 258         byte_buffer = byte_buffer | value;
 259
 260         while (bits > 7) {
 261                 *stream = (u8)(byte_buffer >> 24);
 262
 263                 bits -= 8;
 264                 byte_buffer <<= 8;
 265                 stream++;
 266                 buffer->byte_cnt++;
 267         }
 268
 269         buffer->byte_buffer = byte_buffer;
 270         buffer->buffered_bits = (u8)bits;
 271         buffer->stream = stream;
 272
 273         return;
 274 }
 275
 276 void stream_buffer_reset(struct stream_s *buffer)
 277 {
 278         buffer->stream = buffer->buffer;
 279         buffer->byte_cnt = 0;
 280         buffer->overflow = 0;
 281         buffer->byte_buffer = 0;
 282         buffer->buffered_bits = 0;
 283 }
 284
 285 int stream_buffer_init(struct stream_s *buffer, u8 *stream, s32 size)
 286 {
 287         if (stream == NULL) {
 288                 buffer->stream = kzalloc(size, GFP_KERNEL);
 289         }
 290
 291         if (buffer->stream == NULL) {
 292                 vpu_err("allocate stream buffer failed\n");
 293                 return -1;
 294         }
 295
 296         buffer->buffer = buffer->stream;
 297         buffer->size = size;
 298
 299         stream_buffer_reset(buffer);
 300
 301         if (stream_buffer_status(buffer) != 0)
 302                 return -1;
 303
 304         return 0;
 305 }
 306
 307 /*
 308  * Control registration.
 309  */
 310
 311 #define IS_VPU_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_MPEG) && \
 312                           V4L2_CTRL_DRIVER_PRIV(x))
 313
 314 int rockchip_vpu_ctrls_setup(struct rockchip_vpu_ctx *ctx,
 315                            const struct v4l2_ctrl_ops *ctrl_ops,
 316                            struct rockchip_vpu_control *controls,
 317                            unsigned num_ctrls,
 318                            const char *const *(*get_menu)(u32))
 319 {
 320         struct v4l2_ctrl_config cfg;
 321         int i;
 322
 323         if (num_ctrls > ARRAY_SIZE(ctx->ctrls)) {
 324                 vpu_err("context control array not large enough\n");
 325                 return -ENOSPC;
 326         }
 327
 328         v4l2_ctrl_handler_init(&ctx->ctrl_handler, num_ctrls);
 329         if (ctx->ctrl_handler.error) {
 330                 vpu_err("v4l2_ctrl_handler_init failed\n");
 331                 return ctx->ctrl_handler.error;
 332         }
 333
 334         for (i = 0; i < num_ctrls; i++) {
 335                 if (IS_VPU_PRIV(controls[i].id)
 336                     || controls[i].id >= V4L2_CID_CUSTOM_BASE
 337                     || controls[i].type == V4L2_CTRL_TYPE_PRIVATE) {
 338                         memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
 339
 340                         cfg.ops = ctrl_ops;
 341                         cfg.id = controls[i].id;
 342                         cfg.min = controls[i].minimum;
 343                         cfg.max = controls[i].maximum;
 344                         cfg.max_stores = controls[i].max_stores;
 345                         cfg.def = controls[i].default_value;
 346                         cfg.name = controls[i].name;
 347                         cfg.type = controls[i].type;
 348                         cfg.elem_size = controls[i].elem_size;
 349                         memcpy(cfg.dims, controls[i].dims, sizeof(cfg.dims));
 350
 351                         if (cfg.type == V4L2_CTRL_TYPE_MENU) {
 352                                 cfg.menu_skip_mask = cfg.menu_skip_mask;
 353                                 cfg.qmenu = get_menu(cfg.id);
 354                         } else {
 355                                 cfg.step = controls[i].step;
 356                         }
 357
 358                         ctx->ctrls[i] = v4l2_ctrl_new_custom(
 359                                 &ctx->ctrl_handler, &cfg, NULL);
 360                 } else {
 361                         if (controls[i].type == V4L2_CTRL_TYPE_MENU) {
 362                                 ctx->ctrls[i] =
 363                                     v4l2_ctrl_new_std_menu
 364                                         (&ctx->ctrl_handler,
 365                                          ctrl_ops,
 366                                          controls[i].id,
 367                                          controls[i].maximum,
 368                                          0,
 369                                          controls[i].
 370                                          default_value);
 371                         } else {
 372                                 ctx->ctrls[i] =
 373                                     v4l2_ctrl_new_std(&ctx->ctrl_handler,
 374                                                       ctrl_ops,
 375                                                       controls[i].id,
 376                                                       controls[i].minimum,
 377                                                       controls[i].maximum,
 378                                                       controls[i].step,
 379                                                       controls[i].
 380                                                       default_value);
 381                         }
 382                 }
 383
 384                 if (ctx->ctrl_handler.error) {
 385                         vpu_err("Adding control (%d) failed\n", i);
 386                         return ctx->ctrl_handler.error;
 387                 }
 388
 389                 if (controls[i].is_volatile && ctx->ctrls[i])
 390                         ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
 391                 if (controls[i].is_read_only && ctx->ctrls[i])
 392                         ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 393                 if (controls[i].can_store && ctx->ctrls[i])
 394                         ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_CAN_STORE;
 395         }
 396
 397         v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
 398         ctx->num_ctrls = num_ctrls;
 399         return 0;
 400 }
 401
 402 void rockchip_vpu_ctrls_delete(struct rockchip_vpu_ctx *ctx)
 403 {
 404         int i;
 405
 406         v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 407         for (i = 0; i < ctx->num_ctrls; i++)
 408                 ctx->ctrls[i] = NULL;
 409 }
 410
 411 /*
 412  * V4L2 file operations.
 413  */
 414
 415 static int rockchip_vpu_open(struct file *filp)
 416 {
 417         struct video_device *vdev = video_devdata(filp);
 418         struct rockchip_vpu_dev *dev = video_drvdata(filp);
 419         struct rockchip_vpu_ctx *ctx = NULL;
 420         struct vb2_queue *q;
 421         int ret = 0;
 422
 423         /*
 424          * We do not need any extra locking here, because we operate only
 425          * on local data here, except reading few fields from dev, which
 426          * do not change through device's lifetime (which is guaranteed by
 427          * reference on module from open()) and V4L2 internal objects (such
 428          * as vdev and ctx->fh), which have proper locking done in respective
 429          * helper functions used here.
 430          */
 431
 432         vpu_debug_enter();
 433
 434         /* Allocate memory for context */
 435         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 436         if (!ctx) {
 437                 ret = -ENOMEM;
 438                 goto err_leave;
 439         }
 440
 441         v4l2_fh_init(&ctx->fh, video_devdata(filp));
 442         filp->private_data = &ctx->fh;
 443         v4l2_fh_add(&ctx->fh);
 444         ctx->dev = dev;
 445         INIT_LIST_HEAD(&ctx->src_queue);
 446         INIT_LIST_HEAD(&ctx->dst_queue);
 447         INIT_LIST_HEAD(&ctx->list);
 448
 449         if (vdev == dev->vfd_enc) {
 450                 /* only for encoder */
 451                 ret = rockchip_vpu_enc_init(ctx);
 452                 if (ret) {
 453                         vpu_err("Failed to initialize encoder context\n");
 454                         goto err_fh_free;
 455                 }
 456         } else if (vdev == dev->vfd_dec) {
 457                 /* only for decoder */
 458                 ret = rockchip_vpu_dec_init(ctx);
 459                 if (ret) {
 460                         vpu_err("Failed to initialize decoder context\n");
 461                         goto err_fh_free;
 462                 }
 463         } else {
 464                 ret = -ENOENT;
 465                 goto err_fh_free;
 466         }
 467         ctx->fh.ctrl_handler = &ctx->ctrl_handler;
 468
 469         /* Init videobuf2 queue for CAPTURE */
 470         q = &ctx->vq_dst;
 471         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
 472         q->drv_priv = &ctx->fh;
 473         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
 474         q->lock = &dev->vpu_mutex;
 475         q->buf_struct_size = sizeof(struct rockchip_vpu_buf);
 476
 477         if (vdev == dev->vfd_enc) {
 478                 q->ops = get_enc_queue_ops();
 479         } else if (vdev == dev->vfd_dec) {
 480                 q->ops = get_dec_queue_ops();
 481                 q->use_dma_bidirectional = 1;
 482         }
 483
 484         q->mem_ops = &vb2_dma_contig_memops;
 485         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 486
 487         ret = vb2_queue_init(q);
 488         if (ret) {
 489                 vpu_err("Failed to initialize videobuf2 queue(capture)\n");
 490                 goto err_enc_dec_exit;
 491         }
 492
 493         /* Init videobuf2 queue for OUTPUT */
 494         q = &ctx->vq_src;
 495         q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
 496         q->drv_priv = &ctx->fh;
 497         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
 498         q->lock = &dev->vpu_mutex;
 499         q->buf_struct_size = sizeof(struct rockchip_vpu_buf);
 500
 501         if (vdev == dev->vfd_enc)
 502                 q->ops = get_enc_queue_ops();
 503         else if (vdev == dev->vfd_dec)
 504                 q->ops = get_dec_queue_ops();
 505
 506         q->mem_ops = &vb2_dma_contig_memops;
 507         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 508
 509         ret = vb2_queue_init(q);
 510         if (ret) {
 511                 vpu_err("Failed to initialize videobuf2 queue(output)\n");
 512                 goto err_vq_dst_release;
 513         }
 514
 515         vpu_debug_leave();
 516
 517         return 0;
 518
 519 err_vq_dst_release:
 520         vb2_queue_release(&ctx->vq_dst);
 521 err_enc_dec_exit:
 522         if (vdev == dev->vfd_enc)
 523                 rockchip_vpu_enc_exit(ctx);
 524         else if (vdev == dev->vfd_dec)
 525                 rockchip_vpu_dec_exit(ctx);
 526 err_fh_free:
 527         v4l2_fh_del(&ctx->fh);
 528         v4l2_fh_exit(&ctx->fh);
 529         kfree(ctx);
 530 err_leave:
 531         vpu_debug_leave();
 532
 533         return ret;
 534 }
 535
 536 static int rockchip_vpu_release(struct file *filp)
 537 {
 538         struct rockchip_vpu_ctx *ctx = fh_to_ctx(filp->private_data);
 539         struct video_device *vdev = video_devdata(filp);
 540         struct rockchip_vpu_dev *dev = ctx->dev;
 541
 542         /*
 543          * No need for extra locking because this was the last reference
 544          * to this file.
 545          */
 546
 547         vpu_debug_enter();
 548
 549         /*
 550          * vb2_queue_release() ensures that streaming is stopped, which
 551          * in turn means that there are no frames still being processed
 552          * by hardware.
 553          */
 554         vb2_queue_release(&ctx->vq_src);
 555         vb2_queue_release(&ctx->vq_dst);
 556
 557         v4l2_fh_del(&ctx->fh);
 558         v4l2_fh_exit(&ctx->fh);
 559
 560         if (vdev == dev->vfd_enc)
 561                 rockchip_vpu_enc_exit(ctx);
 562         else if (vdev == dev->vfd_dec)
 563                 rockchip_vpu_dec_exit(ctx);
 564
 565         kfree(ctx);
 566
 567         vpu_debug_leave();
 568
 569         return 0;
 570 }
 571
 572 static unsigned int rockchip_vpu_poll(struct file *filp,
 573                                     struct poll_table_struct *wait)
 574 {
 575         struct rockchip_vpu_ctx *ctx = fh_to_ctx(filp->private_data);
 576         struct vb2_queue *src_q, *dst_q;
 577         struct vb2_buffer *src_vb = NULL, *dst_vb = NULL;
 578         unsigned int rc = 0;
 579         unsigned long flags;
 580
 581         vpu_debug_enter();
 582
 583         src_q = &ctx->vq_src;
 584         dst_q = &ctx->vq_dst;
 585
 586         /*
 587          * There has to be at least one buffer queued on each queued_list, which
 588          * means either in driver already or waiting for driver to claim it
 589          * and start processing.
 590          */
 591         if ((!vb2_is_streaming(src_q) || list_empty(&src_q->queued_list)) &&
 592             (!vb2_is_streaming(dst_q) || list_empty(&dst_q->queued_list))) {
 593                 vpu_debug(0, "src q streaming %d, dst q streaming %d, src list empty(%d), dst list empty(%d)\n",
 594                                 src_q->streaming, dst_q->streaming,
 595                                 list_empty(&src_q->queued_list),
 596                                 list_empty(&dst_q->queued_list));
 597                 return POLLERR;
 598         }
 599
 600         poll_wait(filp, &ctx->fh.wait, wait);
 601         poll_wait(filp, &src_q->done_wq, wait);
 602         poll_wait(filp, &dst_q->done_wq, wait);
 603
 604         if (v4l2_event_pending(&ctx->fh))
 605                 rc |= POLLPRI;
 606
 607         spin_lock_irqsave(&src_q->done_lock, flags);
 608
 609         if (!list_empty(&src_q->done_list))
 610                 src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer,
 611                                                 done_entry);
 612
 613         if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE ||
 614                         src_vb->state == VB2_BUF_STATE_ERROR))
 615                 rc |= POLLOUT | POLLWRNORM;
 616
 617         spin_unlock_irqrestore(&src_q->done_lock, flags);
 618
 619         spin_lock_irqsave(&dst_q->done_lock, flags);
 620
 621         if (!list_empty(&dst_q->done_list))
 622                 dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer,
 623                                                 done_entry);
 624
 625         if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE ||
 626                         dst_vb->state == VB2_BUF_STATE_ERROR))
 627                 rc |= POLLIN | POLLRDNORM;
 628
 629         spin_unlock_irqrestore(&dst_q->done_lock, flags);
 630
 631         return rc;
 632 }
 633
 634 static int rockchip_vpu_mmap(struct file *filp, struct vm_area_struct *vma)
 635 {
 636         struct rockchip_vpu_ctx *ctx = fh_to_ctx(filp->private_data);
 637         unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
 638         int ret;
 639
 640         vpu_debug_enter();
 641
 642         if (offset < DST_QUEUE_OFF_BASE) {
 643                 vpu_debug(4, "mmaping source\n");
 644
 645                 ret = vb2_mmap(&ctx->vq_src, vma);
 646         } else {                /* capture */
 647                 vpu_debug(4, "mmaping destination\n");
 648
 649                 vma->vm_pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT);
 650                 ret = vb2_mmap(&ctx->vq_dst, vma);
 651         }
 652
 653         vpu_debug_leave();
 654
 655         return ret;
 656 }
 657
 658 static const struct v4l2_file_operations rockchip_vpu_fops = {
 659         .owner = THIS_MODULE,
 660         .open = rockchip_vpu_open,
 661         .release = rockchip_vpu_release,
 662         .poll = rockchip_vpu_poll,
 663         .unlocked_ioctl = video_ioctl2,
 664         .mmap = rockchip_vpu_mmap,
 665 };
 666
 667 /*
 668  * Platform driver.
 669  */
 670
 671 static void* rockchip_get_drv_data(struct platform_device *pdev);
 672
 673 static int rockchip_vpu_probe(struct platform_device *pdev)
 674 {
 675         struct rockchip_vpu_dev *vpu = NULL;
 676         DEFINE_DMA_ATTRS(attrs_novm);
 677         DEFINE_DMA_ATTRS(attrs_nohugepage);
 678         struct video_device *vfd;
 679         int ret = 0;
 680
 681         vpu_debug_enter();
 682
 683         vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
 684         if (!vpu)
 685                 return -ENOMEM;
 686
 687         vpu->dev = &pdev->dev;
 688         vpu->pdev = pdev;
 689         mutex_init(&vpu->vpu_mutex);
 690         spin_lock_init(&vpu->irqlock);
 691         INIT_LIST_HEAD(&vpu->ready_ctxs);
 692         init_waitqueue_head(&vpu->run_wq);
 693
 694         vpu->variant = rockchip_get_drv_data(pdev);
 695
 696         ret = rockchip_vpu_hw_probe(vpu);
 697         if (ret) {
 698                 dev_err(&pdev->dev, "rockchip_vpu_hw_probe failed\n");
 699                 goto err_hw_probe;
 700         }
 701
 702         /*
 703          * We'll do mostly sequential access, so sacrifice TLB efficiency for
 704          * faster allocation.
 705          */
 706         dma_set_attr(DMA_ATTR_ALLOC_SINGLE_PAGES, &attrs_novm);
 707
 708         dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs_novm);
 709         vpu->alloc_ctx = vb2_dma_contig_init_ctx_attrs(&pdev->dev,
 710                                                                 &attrs_novm);
 711         if (IS_ERR(vpu->alloc_ctx)) {
 712                 ret = PTR_ERR(vpu->alloc_ctx);
 713                 goto err_dma_contig;
 714         }
 715
 716         dma_set_attr(DMA_ATTR_ALLOC_SINGLE_PAGES, &attrs_nohugepage);
 717         vpu->alloc_ctx_vm = vb2_dma_contig_init_ctx_attrs(&pdev->dev,
 718                                                           &attrs_nohugepage);
 719         if (IS_ERR(vpu->alloc_ctx_vm)) {
 720                 ret = PTR_ERR(vpu->alloc_ctx_vm);
 721                 goto err_dma_contig_vm;
 722         }
 723
 724         ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
 725         if (ret) {
 726                 dev_err(&pdev->dev, "Failed to register v4l2 device\n");
 727                 goto err_v4l2_dev_reg;
 728         }
 729
 730         platform_set_drvdata(pdev, vpu);
 731
 732         /* workaround for rk3288 codecs */
 733         if (vpu->variant->codecs == RK3288_CODECS) {
 734                 ret = rockchip_vpu_enc_init_dummy_ctx(vpu);
 735                 if (ret) {
 736                         dev_err(&pdev->dev,
 737                                 "Failed to create dummy encode context\n");
 738                         goto err_dummy_enc;
 739                 }
 740         }
 741
 742         /* encoder */
 743         if (!(vpu->variant->codecs & ROCKCHIP_VPU_ENCODERS))
 744                 goto no_encoder;
 745
 746         vfd = video_device_alloc();
 747         if (!vfd) {
 748                 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n");
 749                 ret = -ENOMEM;
 750                 goto err_enc_alloc;
 751         }
 752
 753         vfd->fops = &rockchip_vpu_fops;
 754         vfd->ioctl_ops = get_enc_v4l2_ioctl_ops();
 755         vfd->release = video_device_release;
 756         vfd->lock = &vpu->vpu_mutex;
 757         vfd->v4l2_dev = &vpu->v4l2_dev;
 758         vfd->vfl_dir = VFL_DIR_M2M;
 759         snprintf(vfd->name, sizeof(vfd->name), "%s", ROCKCHIP_VPU_ENC_NAME);
 760         vpu->vfd_enc = vfd;
 761
 762         video_set_drvdata(vfd, vpu);
 763
 764         ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
 765         if (ret) {
 766                 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n");
 767                 video_device_release(vfd);
 768                 goto err_enc_reg;
 769         }
 770
 771         v4l2_info(&vpu->v4l2_dev,
 772                 "Rockchip VPU encoder registered as /vpu/video%d\n",
 773                 vfd->num);
 774
 775 no_encoder:
 776         /* decoder */
 777         if (!(vpu->variant->codecs & ROCKCHIP_VPU_DECODERS))
 778                 goto no_decoder;
 779
 780         vfd = video_device_alloc();
 781         if (!vfd) {
 782                 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n");
 783                 ret = -ENOMEM;
 784                 goto err_dec_alloc;
 785         }
 786
 787         vfd->fops = &rockchip_vpu_fops;
 788         vfd->ioctl_ops = get_dec_v4l2_ioctl_ops();
 789         vfd->release = video_device_release;
 790         vfd->lock = &vpu->vpu_mutex;
 791         vfd->v4l2_dev = &vpu->v4l2_dev;
 792         vfd->vfl_dir = VFL_DIR_M2M;
 793         snprintf(vfd->name, sizeof(vfd->name), "%s", ROCKCHIP_VPU_DEC_NAME);
 794         vpu->vfd_dec = vfd;
 795
 796         video_set_drvdata(vfd, vpu);
 797
 798         ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
 799         if (ret) {
 800                 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n");
 801                 video_device_release(vfd);
 802                 goto err_dec_reg;
 803         }
 804
 805         v4l2_info(&vpu->v4l2_dev,
 806                 "Rockchip VPU decoder registered as /vpu/video%d\n",
 807                 vfd->num);
 808
 809 no_decoder:
 810         vpu_debug_leave();
 811
 812         return 0;
 813
 814 err_dec_reg:
 815         video_device_release(vpu->vfd_dec);
 816 err_dec_alloc:
 817         video_unregister_device(vpu->vfd_enc);
 818 err_enc_reg:
 819         video_device_release(vpu->vfd_enc);
 820 err_enc_alloc:
 821         rockchip_vpu_enc_free_dummy_ctx(vpu);
 822 err_dummy_enc:
 823         v4l2_device_unregister(&vpu->v4l2_dev);
 824 err_v4l2_dev_reg:
 825         vb2_dma_contig_cleanup_ctx(vpu->alloc_ctx_vm);
 826 err_dma_contig_vm:
 827         vb2_dma_contig_cleanup_ctx(vpu->alloc_ctx);
 828 err_dma_contig:
 829         rockchip_vpu_hw_remove(vpu);
 830 err_hw_probe:
 831         pr_debug("%s-- with error\n", __func__);
 832         vpu_debug_leave();
 833
 834         return ret;
 835 }
 836
 837 static int rockchip_vpu_remove(struct platform_device *pdev)
 838 {
 839         struct rockchip_vpu_dev *vpu = platform_get_drvdata(pdev);
 840
 841         vpu_debug_enter();
 842
 843         v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name);
 844
 845         /*
 846          * We are safe here assuming that .remove() got called as
 847          * a result of module removal, which guarantees that all
 848          * contexts have been released.
 849          */
 850
 851         video_unregister_device(vpu->vfd_dec);
 852         video_unregister_device(vpu->vfd_enc);
 853         rockchip_vpu_enc_free_dummy_ctx(vpu);
 854         v4l2_device_unregister(&vpu->v4l2_dev);
 855         vb2_dma_contig_cleanup_ctx(vpu->alloc_ctx_vm);
 856         vb2_dma_contig_cleanup_ctx(vpu->alloc_ctx);
 857         rockchip_vpu_hw_remove(vpu);
 858
 859         vpu_debug_leave();
 860
 861         return 0;
 862 }
 863
 864 /* Supported VPU variants. */
 865 static const struct rockchip_vpu_variant rk3288_vpu_variant = {
 866         .name = "Rk3288 vpu",
 867         .codecs = RK3288_CODECS,
 868         .enc_offset = 0x0,
 869         .enc_reg_num = 164,
 870         .dec_offset = 0x400,
 871         .dec_reg_num = 60 + 41,
 872 };
 873
 874 static struct platform_device_id vpu_driver_ids[] = {
 875         {
 876                 .name = "rk3288-vpu",
 877                 .driver_data = (unsigned long)&rk3288_vpu_variant,
 878         },
 879         { /* sentinel */ }
 880 };
 881
 882 MODULE_DEVICE_TABLE(platform, vpu_driver_ids);
 883
 884 #ifdef CONFIG_OF
 885 static const struct of_device_id of_rockchip_vpu_match[] = {
 886         { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
 887         { /* sentinel */ }
 888 };
 889 MODULE_DEVICE_TABLE(of, of_rockchip_vpu_match);
 890 #endif
 891
 892 static void* rockchip_get_drv_data(struct platform_device *pdev)
 893 {
 894 #ifdef CONFIG_OF
 895         if (pdev->dev.of_node) {
 896                 const struct of_device_id *match;
 897                 match = of_match_node(of_rockchip_vpu_match,
 898                                                           pdev->dev.of_node);
 899                 if (match)
 900                         return (void *)match->data;
 901         }
 902 #endif
 903
 904         return (void *)platform_get_device_id(pdev)->driver_data;
 905 }
 906
 907 #ifdef CONFIG_PM_SLEEP
 908 static int rockchip_vpu_suspend(struct device *dev)
 909 {
 910         struct rockchip_vpu_dev *vpu = dev_get_drvdata(dev);
 911
 912         set_bit(VPU_SUSPENDED, &vpu->state);
 913         wait_event(vpu->run_wq, vpu->current_ctx == NULL);
 914
 915         return 0;
 916 }
 917
 918 static int rockchip_vpu_resume(struct device *dev)
 919 {
 920         struct rockchip_vpu_dev *vpu = dev_get_drvdata(dev);
 921
 922         clear_bit(VPU_SUSPENDED, &vpu->state);
 923         rockchip_vpu_try_run(vpu);
 924
 925         return 0;
 926 }
 927 #endif
 928
 929 static const struct dev_pm_ops rockchip_vpu_pm_ops = {
 930         SET_SYSTEM_SLEEP_PM_OPS(rockchip_vpu_suspend, rockchip_vpu_resume)
 931 };
 932
 933 static struct platform_driver rockchip_vpu_driver = {
 934         .probe = rockchip_vpu_probe,
 935         .remove = rockchip_vpu_remove,
 936         .id_table = vpu_driver_ids,
 937         .driver = {
 938                    .name = ROCKCHIP_VPU_NAME,
 939                    .owner = THIS_MODULE,
 940 #ifdef CONFIG_OF
 941                    .of_match_table = of_match_ptr(of_rockchip_vpu_match),
 942 #endif
 943                    .pm = &rockchip_vpu_pm_ops,
 944         },
 945 };
 946 module_platform_driver(rockchip_vpu_driver);
 947
 948 MODULE_LICENSE("GPL v2");
 949 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");
 950 MODULE_AUTHOR("Tomasz Figa <tfiga@chromium.org>");
 951 MODULE_DESCRIPTION("Rockchip VPU codec driver");