drivers/media/platform/omap3isp/isppreview.c

   1 /*
   2  * isppreview.c
   3  *
   4  * TI OMAP3 ISP driver - Preview module
   5  *
   6  * Copyright (C) 2010 Nokia Corporation
   7  * Copyright (C) 2009 Texas Instruments, Inc.
   8  *
   9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10  *           Sakari Ailus <sakari.ailus@iki.fi>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/device.h>
  18 #include <linux/mm.h>
  19 #include <linux/module.h>
  20 #include <linux/mutex.h>
  21 #include <linux/uaccess.h>
  22
  23 #include "isp.h"
  24 #include "ispreg.h"
  25 #include "isppreview.h"
  26
  27 /* Default values in Office Fluorescent Light for RGBtoRGB Blending */
  28 static struct omap3isp_prev_rgbtorgb flr_rgb2rgb = {
  29         {       /* RGB-RGB Matrix */
  30                 {0x01E2, 0x0F30, 0x0FEE},
  31                 {0x0F9B, 0x01AC, 0x0FB9},
  32                 {0x0FE0, 0x0EC0, 0x0260}
  33         },      /* RGB Offset */
  34         {0x0000, 0x0000, 0x0000}
  35 };
  36
  37 /* Default values in Office Fluorescent Light for RGB to YUV Conversion*/
  38 static struct omap3isp_prev_csc flr_prev_csc = {
  39         {       /* CSC Coef Matrix */
  40                 {66, 129, 25},
  41                 {-38, -75, 112},
  42                 {112, -94 , -18}
  43         },      /* CSC Offset */
  44         {0x0, 0x0, 0x0}
  45 };
  46
  47 /* Default values in Office Fluorescent Light for CFA Gradient*/
  48 #define FLR_CFA_GRADTHRS_HORZ   0x28
  49 #define FLR_CFA_GRADTHRS_VERT   0x28
  50
  51 /* Default values in Office Fluorescent Light for Chroma Suppression*/
  52 #define FLR_CSUP_GAIN           0x0D
  53 #define FLR_CSUP_THRES          0xEB
  54
  55 /* Default values in Office Fluorescent Light for Noise Filter*/
  56 #define FLR_NF_STRGTH           0x03
  57
  58 /* Default values for White Balance */
  59 #define FLR_WBAL_DGAIN          0x100
  60 #define FLR_WBAL_COEF           0x20
  61
  62 /* Default values in Office Fluorescent Light for Black Adjustment*/
  63 #define FLR_BLKADJ_BLUE         0x0
  64 #define FLR_BLKADJ_GREEN        0x0
  65 #define FLR_BLKADJ_RED          0x0
  66
  67 #define DEF_DETECT_CORRECT_VAL  0xe
  68
  69 /*
  70  * Margins and image size limits.
  71  *
  72  * The preview engine crops several rows and columns internally depending on
  73  * which filters are enabled. To avoid format changes when the filters are
  74  * enabled or disabled (which would prevent them from being turned on or off
  75  * during streaming), the driver assumes all filters that can be configured
  76  * during streaming are enabled when computing sink crop and source format
  77  * limits.
  78  *
  79  * If a filter is disabled, additional cropping is automatically added at the
  80  * preview engine input by the driver to avoid overflow at line and frame end.
  81  * This is completely transparent for applications.
  82  *
  83  * Median filter                4 pixels
  84  * Noise filter,
  85  * Faulty pixels correction     4 pixels, 4 lines
  86  * Color suppression            2 pixels
  87  * or luma enhancement
  88  * -------------------------------------------------------------
  89  * Maximum total                10 pixels, 4 lines
  90  *
  91  * The color suppression and luma enhancement filters are applied after bayer to
  92  * YUV conversion. They thus can crop one pixel on the left and one pixel on the
  93  * right side of the image without changing the color pattern. When both those
  94  * filters are disabled, the driver must crop the two pixels on the same side of
  95  * the image to avoid changing the bayer pattern. The left margin is thus set to
  96  * 6 pixels and the right margin to 4 pixels.
  97  */
  98
  99 #define PREV_MARGIN_LEFT        6
 100 #define PREV_MARGIN_RIGHT       4
 101 #define PREV_MARGIN_TOP         2
 102 #define PREV_MARGIN_BOTTOM      2
 103
 104 #define PREV_MIN_IN_WIDTH       64
 105 #define PREV_MIN_IN_HEIGHT      8
 106 #define PREV_MAX_IN_HEIGHT      16384
 107
 108 #define PREV_MIN_OUT_WIDTH              0
 109 #define PREV_MIN_OUT_HEIGHT             0
 110 #define PREV_MAX_OUT_WIDTH_REV_1        1280
 111 #define PREV_MAX_OUT_WIDTH_REV_2        3300
 112 #define PREV_MAX_OUT_WIDTH_REV_15       4096
 113
 114 /*
 115  * Coefficient Tables for the submodules in Preview.
 116  * Array is initialised with the values from.the tables text file.
 117  */
 118
 119 /*
 120  * CFA Filter Coefficient Table
 121  *
 122  */
 123 static u32 cfa_coef_table[4][OMAP3ISP_PREV_CFA_BLK_SIZE] = {
 124 #include "cfa_coef_table.h"
 125 };
 126
 127 /*
 128  * Default Gamma Correction Table - All components
 129  */
 130 static u32 gamma_table[] = {
 131 #include "gamma_table.h"
 132 };
 133
 134 /*
 135  * Noise Filter Threshold table
 136  */
 137 static u32 noise_filter_table[] = {
 138 #include "noise_filter_table.h"
 139 };
 140
 141 /*
 142  * Luminance Enhancement Table
 143  */
 144 static u32 luma_enhance_table[] = {
 145 #include "luma_enhance_table.h"
 146 };
 147
 148 /*
 149  * preview_config_luma_enhancement - Configure the Luminance Enhancement table
 150  */
 151 static void
 152 preview_config_luma_enhancement(struct isp_prev_device *prev,
 153                                 const struct prev_params *params)
 154 {
 155         struct isp_device *isp = to_isp_device(prev);
 156         const struct omap3isp_prev_luma *yt = &params->luma;
 157         unsigned int i;
 158
 159         isp_reg_writel(isp, ISPPRV_YENH_TABLE_ADDR,
 160                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 161         for (i = 0; i < OMAP3ISP_PREV_YENH_TBL_SIZE; i++) {
 162                 isp_reg_writel(isp, yt->table[i],
 163                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 164         }
 165 }
 166
 167 /*
 168  * preview_enable_luma_enhancement - Enable/disable Luminance Enhancement
 169  */
 170 static void
 171 preview_enable_luma_enhancement(struct isp_prev_device *prev, bool enable)
 172 {
 173         struct isp_device *isp = to_isp_device(prev);
 174
 175         if (enable)
 176                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 177                             ISPPRV_PCR_YNENHEN);
 178         else
 179                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 180                             ISPPRV_PCR_YNENHEN);
 181 }
 182
 183 /*
 184  * preview_enable_invalaw - Enable/disable Inverse A-Law decompression
 185  */
 186 static void preview_enable_invalaw(struct isp_prev_device *prev, bool enable)
 187 {
 188         struct isp_device *isp = to_isp_device(prev);
 189
 190         if (enable)
 191                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 192                             ISPPRV_PCR_INVALAW);
 193         else
 194                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 195                             ISPPRV_PCR_INVALAW);
 196 }
 197
 198 /*
 199  * preview_config_hmed - Configure the Horizontal Median Filter
 200  */
 201 static void preview_config_hmed(struct isp_prev_device *prev,
 202                                 const struct prev_params *params)
 203 {
 204         struct isp_device *isp = to_isp_device(prev);
 205         const struct omap3isp_prev_hmed *hmed = &params->hmed;
 206
 207         isp_reg_writel(isp, (hmed->odddist == 1 ? 0 : ISPPRV_HMED_ODDDIST) |
 208                        (hmed->evendist == 1 ? 0 : ISPPRV_HMED_EVENDIST) |
 209                        (hmed->thres << ISPPRV_HMED_THRESHOLD_SHIFT),
 210                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HMED);
 211 }
 212
 213 /*
 214  * preview_enable_hmed - Enable/disable the Horizontal Median Filter
 215  */
 216 static void preview_enable_hmed(struct isp_prev_device *prev, bool enable)
 217 {
 218         struct isp_device *isp = to_isp_device(prev);
 219
 220         if (enable)
 221                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 222                             ISPPRV_PCR_HMEDEN);
 223         else
 224                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 225                             ISPPRV_PCR_HMEDEN);
 226 }
 227
 228 /*
 229  * preview_config_cfa - Configure CFA Interpolation for Bayer formats
 230  *
 231  * The CFA table is organised in four blocks, one per Bayer component. The
 232  * hardware expects blocks to follow the Bayer order of the input data, while
 233  * the driver stores the table in GRBG order in memory. The blocks need to be
 234  * reordered to support non-GRBG Bayer patterns.
 235  */
 236 static void preview_config_cfa(struct isp_prev_device *prev,
 237                                const struct prev_params *params)
 238 {
 239         static const unsigned int cfa_coef_order[4][4] = {
 240                 { 0, 1, 2, 3 }, /* GRBG */
 241                 { 1, 0, 3, 2 }, /* RGGB */
 242                 { 2, 3, 0, 1 }, /* BGGR */
 243                 { 3, 2, 1, 0 }, /* GBRG */
 244         };
 245         const unsigned int *order = cfa_coef_order[prev->params.cfa_order];
 246         const struct omap3isp_prev_cfa *cfa = &params->cfa;
 247         struct isp_device *isp = to_isp_device(prev);
 248         unsigned int i;
 249         unsigned int j;
 250
 251         isp_reg_writel(isp,
 252                 (cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
 253                 (cfa->gradthrs_horz << ISPPRV_CFA_GRADTH_HOR_SHIFT),
 254                 OMAP3_ISP_IOMEM_PREV, ISPPRV_CFA);
 255
 256         isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
 257                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 258
 259         for (i = 0; i < 4; ++i) {
 260                 const __u32 *block = cfa->table[order[i]];
 261
 262                 for (j = 0; j < OMAP3ISP_PREV_CFA_BLK_SIZE; ++j)
 263                         isp_reg_writel(isp, block[j], OMAP3_ISP_IOMEM_PREV,
 264                                        ISPPRV_SET_TBL_DATA);
 265         }
 266 }
 267
 268 /*
 269  * preview_config_chroma_suppression - Configure Chroma Suppression
 270  */
 271 static void
 272 preview_config_chroma_suppression(struct isp_prev_device *prev,
 273                                   const struct prev_params *params)
 274 {
 275         struct isp_device *isp = to_isp_device(prev);
 276         const struct omap3isp_prev_csup *cs = &params->csup;
 277
 278         isp_reg_writel(isp,
 279                        cs->gain | (cs->thres << ISPPRV_CSUP_THRES_SHIFT) |
 280                        (cs->hypf_en << ISPPRV_CSUP_HPYF_SHIFT),
 281                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CSUP);
 282 }
 283
 284 /*
 285  * preview_enable_chroma_suppression - Enable/disable Chrominance Suppression
 286  */
 287 static void
 288 preview_enable_chroma_suppression(struct isp_prev_device *prev, bool enable)
 289 {
 290         struct isp_device *isp = to_isp_device(prev);
 291
 292         if (enable)
 293                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 294                             ISPPRV_PCR_SUPEN);
 295         else
 296                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 297                             ISPPRV_PCR_SUPEN);
 298 }
 299
 300 /*
 301  * preview_config_whitebalance - Configure White Balance parameters
 302  *
 303  * Coefficient matrix always with default values.
 304  */
 305 static void
 306 preview_config_whitebalance(struct isp_prev_device *prev,
 307                             const struct prev_params *params)
 308 {
 309         struct isp_device *isp = to_isp_device(prev);
 310         const struct omap3isp_prev_wbal *wbal = &params->wbal;
 311         u32 val;
 312
 313         isp_reg_writel(isp, wbal->dgain, OMAP3_ISP_IOMEM_PREV, ISPPRV_WB_DGAIN);
 314
 315         val = wbal->coef0 << ISPPRV_WBGAIN_COEF0_SHIFT;
 316         val |= wbal->coef1 << ISPPRV_WBGAIN_COEF1_SHIFT;
 317         val |= wbal->coef2 << ISPPRV_WBGAIN_COEF2_SHIFT;
 318         val |= wbal->coef3 << ISPPRV_WBGAIN_COEF3_SHIFT;
 319         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_WBGAIN);
 320
 321         isp_reg_writel(isp,
 322                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_0_SHIFT |
 323                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_1_SHIFT |
 324                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_2_SHIFT |
 325                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_3_SHIFT |
 326                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_0_SHIFT |
 327                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_1_SHIFT |
 328                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_2_SHIFT |
 329                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_3_SHIFT |
 330                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_0_SHIFT |
 331                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_1_SHIFT |
 332                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_2_SHIFT |
 333                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_3_SHIFT |
 334                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_0_SHIFT |
 335                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_1_SHIFT |
 336                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_2_SHIFT |
 337                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_3_SHIFT,
 338                        OMAP3_ISP_IOMEM_PREV, ISPPRV_WBSEL);
 339 }
 340
 341 /*
 342  * preview_config_blkadj - Configure Black Adjustment
 343  */
 344 static void
 345 preview_config_blkadj(struct isp_prev_device *prev,
 346                       const struct prev_params *params)
 347 {
 348         struct isp_device *isp = to_isp_device(prev);
 349         const struct omap3isp_prev_blkadj *blkadj = &params->blkadj;
 350
 351         isp_reg_writel(isp, (blkadj->blue << ISPPRV_BLKADJOFF_B_SHIFT) |
 352                        (blkadj->green << ISPPRV_BLKADJOFF_G_SHIFT) |
 353                        (blkadj->red << ISPPRV_BLKADJOFF_R_SHIFT),
 354                        OMAP3_ISP_IOMEM_PREV, ISPPRV_BLKADJOFF);
 355 }
 356
 357 /*
 358  * preview_config_rgb_blending - Configure RGB-RGB Blending
 359  */
 360 static void
 361 preview_config_rgb_blending(struct isp_prev_device *prev,
 362                             const struct prev_params *params)
 363 {
 364         struct isp_device *isp = to_isp_device(prev);
 365         const struct omap3isp_prev_rgbtorgb *rgbrgb = &params->rgb2rgb;
 366         u32 val;
 367
 368         val = (rgbrgb->matrix[0][0] & 0xfff) << ISPPRV_RGB_MAT1_MTX_RR_SHIFT;
 369         val |= (rgbrgb->matrix[0][1] & 0xfff) << ISPPRV_RGB_MAT1_MTX_GR_SHIFT;
 370         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT1);
 371
 372         val = (rgbrgb->matrix[0][2] & 0xfff) << ISPPRV_RGB_MAT2_MTX_BR_SHIFT;
 373         val |= (rgbrgb->matrix[1][0] & 0xfff) << ISPPRV_RGB_MAT2_MTX_RG_SHIFT;
 374         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT2);
 375
 376         val = (rgbrgb->matrix[1][1] & 0xfff) << ISPPRV_RGB_MAT3_MTX_GG_SHIFT;
 377         val |= (rgbrgb->matrix[1][2] & 0xfff) << ISPPRV_RGB_MAT3_MTX_BG_SHIFT;
 378         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT3);
 379
 380         val = (rgbrgb->matrix[2][0] & 0xfff) << ISPPRV_RGB_MAT4_MTX_RB_SHIFT;
 381         val |= (rgbrgb->matrix[2][1] & 0xfff) << ISPPRV_RGB_MAT4_MTX_GB_SHIFT;
 382         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT4);
 383
 384         val = (rgbrgb->matrix[2][2] & 0xfff) << ISPPRV_RGB_MAT5_MTX_BB_SHIFT;
 385         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT5);
 386
 387         val = (rgbrgb->offset[0] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT;
 388         val |= (rgbrgb->offset[1] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT;
 389         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF1);
 390
 391         val = (rgbrgb->offset[2] & 0x3ff) << ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT;
 392         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF2);
 393 }
 394
 395 /*
 396  * preview_config_csc - Configure Color Space Conversion (RGB to YCbYCr)
 397  */
 398 static void
 399 preview_config_csc(struct isp_prev_device *prev,
 400                    const struct prev_params *params)
 401 {
 402         struct isp_device *isp = to_isp_device(prev);
 403         const struct omap3isp_prev_csc *csc = &params->csc;
 404         u32 val;
 405
 406         val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT;
 407         val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT;
 408         val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT;
 409         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC0);
 410
 411         val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT;
 412         val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT;
 413         val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT;
 414         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC1);
 415
 416         val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT;
 417         val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT;
 418         val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT;
 419         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC2);
 420
 421         val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT;
 422         val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT;
 423         val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT;
 424         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC_OFFSET);
 425 }
 426
 427 /*
 428  * preview_config_yc_range - Configure the max and min Y and C values
 429  */
 430 static void
 431 preview_config_yc_range(struct isp_prev_device *prev,
 432                         const struct prev_params *params)
 433 {
 434         struct isp_device *isp = to_isp_device(prev);
 435         const struct omap3isp_prev_yclimit *yc = &params->yclimit;
 436
 437         isp_reg_writel(isp,
 438                        yc->maxC << ISPPRV_SETUP_YC_MAXC_SHIFT |
 439                        yc->maxY << ISPPRV_SETUP_YC_MAXY_SHIFT |
 440                        yc->minC << ISPPRV_SETUP_YC_MINC_SHIFT |
 441                        yc->minY << ISPPRV_SETUP_YC_MINY_SHIFT,
 442                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SETUP_YC);
 443 }
 444
 445 /*
 446  * preview_config_dcor - Configure Couplet Defect Correction
 447  */
 448 static void
 449 preview_config_dcor(struct isp_prev_device *prev,
 450                     const struct prev_params *params)
 451 {
 452         struct isp_device *isp = to_isp_device(prev);
 453         const struct omap3isp_prev_dcor *dcor = &params->dcor;
 454
 455         isp_reg_writel(isp, dcor->detect_correct[0],
 456                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR0);
 457         isp_reg_writel(isp, dcor->detect_correct[1],
 458                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR1);
 459         isp_reg_writel(isp, dcor->detect_correct[2],
 460                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR2);
 461         isp_reg_writel(isp, dcor->detect_correct[3],
 462                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR3);
 463         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 464                         ISPPRV_PCR_DCCOUP,
 465                         dcor->couplet_mode_en ? ISPPRV_PCR_DCCOUP : 0);
 466 }
 467
 468 /*
 469  * preview_enable_dcor - Enable/disable Couplet Defect Correction
 470  */
 471 static void preview_enable_dcor(struct isp_prev_device *prev, bool enable)
 472 {
 473         struct isp_device *isp = to_isp_device(prev);
 474
 475         if (enable)
 476                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 477                             ISPPRV_PCR_DCOREN);
 478         else
 479                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 480                             ISPPRV_PCR_DCOREN);
 481 }
 482
 483 /*
 484  * preview_enable_drkframe_capture - Enable/disable Dark Frame Capture
 485  */
 486 static void
 487 preview_enable_drkframe_capture(struct isp_prev_device *prev, bool enable)
 488 {
 489         struct isp_device *isp = to_isp_device(prev);
 490
 491         if (enable)
 492                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 493                             ISPPRV_PCR_DRKFCAP);
 494         else
 495                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 496                             ISPPRV_PCR_DRKFCAP);
 497 }
 498
 499 /*
 500  * preview_enable_drkframe - Enable/disable Dark Frame Subtraction
 501  */
 502 static void preview_enable_drkframe(struct isp_prev_device *prev, bool enable)
 503 {
 504         struct isp_device *isp = to_isp_device(prev);
 505
 506         if (enable)
 507                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 508                             ISPPRV_PCR_DRKFEN);
 509         else
 510                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 511                             ISPPRV_PCR_DRKFEN);
 512 }
 513
 514 /*
 515  * preview_config_noisefilter - Configure the Noise Filter
 516  */
 517 static void
 518 preview_config_noisefilter(struct isp_prev_device *prev,
 519                            const struct prev_params *params)
 520 {
 521         struct isp_device *isp = to_isp_device(prev);
 522         const struct omap3isp_prev_nf *nf = &params->nf;
 523         unsigned int i;
 524
 525         isp_reg_writel(isp, nf->spread, OMAP3_ISP_IOMEM_PREV, ISPPRV_NF);
 526         isp_reg_writel(isp, ISPPRV_NF_TABLE_ADDR,
 527                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 528         for (i = 0; i < OMAP3ISP_PREV_NF_TBL_SIZE; i++) {
 529                 isp_reg_writel(isp, nf->table[i],
 530                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 531         }
 532 }
 533
 534 /*
 535  * preview_enable_noisefilter - Enable/disable the Noise Filter
 536  */
 537 static void
 538 preview_enable_noisefilter(struct isp_prev_device *prev, bool enable)
 539 {
 540         struct isp_device *isp = to_isp_device(prev);
 541
 542         if (enable)
 543                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 544                             ISPPRV_PCR_NFEN);
 545         else
 546                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 547                             ISPPRV_PCR_NFEN);
 548 }
 549
 550 /*
 551  * preview_config_gammacorrn - Configure the Gamma Correction tables
 552  */
 553 static void
 554 preview_config_gammacorrn(struct isp_prev_device *prev,
 555                           const struct prev_params *params)
 556 {
 557         struct isp_device *isp = to_isp_device(prev);
 558         const struct omap3isp_prev_gtables *gt = &params->gamma;
 559         unsigned int i;
 560
 561         isp_reg_writel(isp, ISPPRV_REDGAMMA_TABLE_ADDR,
 562                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 563         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 564                 isp_reg_writel(isp, gt->red[i], OMAP3_ISP_IOMEM_PREV,
 565                                ISPPRV_SET_TBL_DATA);
 566
 567         isp_reg_writel(isp, ISPPRV_GREENGAMMA_TABLE_ADDR,
 568                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 569         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 570                 isp_reg_writel(isp, gt->green[i], OMAP3_ISP_IOMEM_PREV,
 571                                ISPPRV_SET_TBL_DATA);
 572
 573         isp_reg_writel(isp, ISPPRV_BLUEGAMMA_TABLE_ADDR,
 574                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 575         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 576                 isp_reg_writel(isp, gt->blue[i], OMAP3_ISP_IOMEM_PREV,
 577                                ISPPRV_SET_TBL_DATA);
 578 }
 579
 580 /*
 581  * preview_enable_gammacorrn - Enable/disable Gamma Correction
 582  *
 583  * When gamma correction is disabled, the module is bypassed and its output is
 584  * the 8 MSB of the 10-bit input .
 585  */
 586 static void
 587 preview_enable_gammacorrn(struct isp_prev_device *prev, bool enable)
 588 {
 589         struct isp_device *isp = to_isp_device(prev);
 590
 591         if (enable)
 592                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 593                             ISPPRV_PCR_GAMMA_BYPASS);
 594         else
 595                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 596                             ISPPRV_PCR_GAMMA_BYPASS);
 597 }
 598
 599 /*
 600  * preview_config_contrast - Configure the Contrast
 601  *
 602  * Value should be programmed before enabling the module.
 603  */
 604 static void
 605 preview_config_contrast(struct isp_prev_device *prev,
 606                         const struct prev_params *params)
 607 {
 608         struct isp_device *isp = to_isp_device(prev);
 609
 610         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 611                         0xff << ISPPRV_CNT_BRT_CNT_SHIFT,
 612                         params->contrast << ISPPRV_CNT_BRT_CNT_SHIFT);
 613 }
 614
 615 /*
 616  * preview_config_brightness - Configure the Brightness
 617  */
 618 static void
 619 preview_config_brightness(struct isp_prev_device *prev,
 620                           const struct prev_params *params)
 621 {
 622         struct isp_device *isp = to_isp_device(prev);
 623
 624         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 625                         0xff << ISPPRV_CNT_BRT_BRT_SHIFT,
 626                         params->brightness << ISPPRV_CNT_BRT_BRT_SHIFT);
 627 }
 628
 629 /*
 630  * preview_update_contrast - Updates the contrast.
 631  * @contrast: Pointer to hold the current programmed contrast value.
 632  *
 633  * Value should be programmed before enabling the module.
 634  */
 635 static void
 636 preview_update_contrast(struct isp_prev_device *prev, u8 contrast)
 637 {
 638         struct prev_params *params;
 639         unsigned long flags;
 640
 641         spin_lock_irqsave(&prev->params.lock, flags);
 642         params = (prev->params.active & OMAP3ISP_PREV_CONTRAST)
 643                ? &prev->params.params[0] : &prev->params.params[1];
 644
 645         if (params->contrast != (contrast * ISPPRV_CONTRAST_UNITS)) {
 646                 params->contrast = contrast * ISPPRV_CONTRAST_UNITS;
 647                 params->update |= OMAP3ISP_PREV_CONTRAST;
 648         }
 649         spin_unlock_irqrestore(&prev->params.lock, flags);
 650 }
 651
 652 /*
 653  * preview_update_brightness - Updates the brightness in preview module.
 654  * @brightness: Pointer to hold the current programmed brightness value.
 655  *
 656  */
 657 static void
 658 preview_update_brightness(struct isp_prev_device *prev, u8 brightness)
 659 {
 660         struct prev_params *params;
 661         unsigned long flags;
 662
 663         spin_lock_irqsave(&prev->params.lock, flags);
 664         params = (prev->params.active & OMAP3ISP_PREV_BRIGHTNESS)
 665                ? &prev->params.params[0] : &prev->params.params[1];
 666
 667         if (params->brightness != (brightness * ISPPRV_BRIGHT_UNITS)) {
 668                 params->brightness = brightness * ISPPRV_BRIGHT_UNITS;
 669                 params->update |= OMAP3ISP_PREV_BRIGHTNESS;
 670         }
 671         spin_unlock_irqrestore(&prev->params.lock, flags);
 672 }
 673
 674 static u32
 675 preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow)
 676 {
 677         u32 active = prev->params.active;
 678
 679         if (shadow) {
 680                 /* Mark all shadow parameters we are going to touch as busy. */
 681                 prev->params.params[0].busy |= ~active & update;
 682                 prev->params.params[1].busy |= active & update;
 683         } else {
 684                 /* Mark all active parameters we are going to touch as busy. */
 685                 update = (prev->params.params[0].update & active)
 686                        | (prev->params.params[1].update & ~active);
 687
 688                 prev->params.params[0].busy |= active & update;
 689                 prev->params.params[1].busy |= ~active & update;
 690         }
 691
 692         return update;
 693 }
 694
 695 static void
 696 preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow)
 697 {
 698         u32 active = prev->params.active;
 699
 700         if (shadow) {
 701                 /* Set the update flag for shadow parameters that have been
 702                  * updated and clear the busy flag for all shadow parameters.
 703                  */
 704                 prev->params.params[0].update |= (~active & update);
 705                 prev->params.params[1].update |= (active & update);
 706                 prev->params.params[0].busy &= active;
 707                 prev->params.params[1].busy &= ~active;
 708         } else {
 709                 /* Clear the update flag for active parameters that have been
 710                  * applied and the busy flag for all active parameters.
 711                  */
 712                 prev->params.params[0].update &= ~(active & update);
 713                 prev->params.params[1].update &= ~(~active & update);
 714                 prev->params.params[0].busy &= ~active;
 715                 prev->params.params[1].busy &= active;
 716         }
 717 }
 718
 719 static void preview_params_switch(struct isp_prev_device *prev)
 720 {
 721         u32 to_switch;
 722
 723         /* Switch active parameters with updated shadow parameters when the
 724          * shadow parameter has been updated and neither the active not the
 725          * shadow parameter is busy.
 726          */
 727         to_switch = (prev->params.params[0].update & ~prev->params.active)
 728                   | (prev->params.params[1].update & prev->params.active);
 729         to_switch &= ~(prev->params.params[0].busy |
 730                        prev->params.params[1].busy);
 731         if (to_switch == 0)
 732                 return;
 733
 734         prev->params.active ^= to_switch;
 735
 736         /* Remove the update flag for the shadow copy of parameters we have
 737          * switched.
 738          */
 739         prev->params.params[0].update &= ~(~prev->params.active & to_switch);
 740         prev->params.params[1].update &= ~(prev->params.active & to_switch);
 741 }
 742
 743 /* preview parameters update structure */
 744 struct preview_update {
 745         void (*config)(struct isp_prev_device *, const struct prev_params *);
 746         void (*enable)(struct isp_prev_device *, bool);
 747         unsigned int param_offset;
 748         unsigned int param_size;
 749         unsigned int config_offset;
 750         bool skip;
 751 };
 752
 753 /* Keep the array indexed by the OMAP3ISP_PREV_* bit number. */
 754 static const struct preview_update update_attrs[] = {
 755         /* OMAP3ISP_PREV_LUMAENH */ {
 756                 preview_config_luma_enhancement,
 757                 preview_enable_luma_enhancement,
 758                 offsetof(struct prev_params, luma),
 759                 FIELD_SIZEOF(struct prev_params, luma),
 760                 offsetof(struct omap3isp_prev_update_config, luma),
 761         }, /* OMAP3ISP_PREV_INVALAW */ {
 762                 NULL,
 763                 preview_enable_invalaw,
 764         }, /* OMAP3ISP_PREV_HRZ_MED */ {
 765                 preview_config_hmed,
 766                 preview_enable_hmed,
 767                 offsetof(struct prev_params, hmed),
 768                 FIELD_SIZEOF(struct prev_params, hmed),
 769                 offsetof(struct omap3isp_prev_update_config, hmed),
 770         }, /* OMAP3ISP_PREV_CFA */ {
 771                 preview_config_cfa,
 772                 NULL,
 773                 offsetof(struct prev_params, cfa),
 774                 FIELD_SIZEOF(struct prev_params, cfa),
 775                 offsetof(struct omap3isp_prev_update_config, cfa),
 776         }, /* OMAP3ISP_PREV_CHROMA_SUPP */ {
 777                 preview_config_chroma_suppression,
 778                 preview_enable_chroma_suppression,
 779                 offsetof(struct prev_params, csup),
 780                 FIELD_SIZEOF(struct prev_params, csup),
 781                 offsetof(struct omap3isp_prev_update_config, csup),
 782         }, /* OMAP3ISP_PREV_WB */ {
 783                 preview_config_whitebalance,
 784                 NULL,
 785                 offsetof(struct prev_params, wbal),
 786                 FIELD_SIZEOF(struct prev_params, wbal),
 787                 offsetof(struct omap3isp_prev_update_config, wbal),
 788         }, /* OMAP3ISP_PREV_BLKADJ */ {
 789                 preview_config_blkadj,
 790                 NULL,
 791                 offsetof(struct prev_params, blkadj),
 792                 FIELD_SIZEOF(struct prev_params, blkadj),
 793                 offsetof(struct omap3isp_prev_update_config, blkadj),
 794         }, /* OMAP3ISP_PREV_RGB2RGB */ {
 795                 preview_config_rgb_blending,
 796                 NULL,
 797                 offsetof(struct prev_params, rgb2rgb),
 798                 FIELD_SIZEOF(struct prev_params, rgb2rgb),
 799                 offsetof(struct omap3isp_prev_update_config, rgb2rgb),
 800         }, /* OMAP3ISP_PREV_COLOR_CONV */ {
 801                 preview_config_csc,
 802                 NULL,
 803                 offsetof(struct prev_params, csc),
 804                 FIELD_SIZEOF(struct prev_params, csc),
 805                 offsetof(struct omap3isp_prev_update_config, csc),
 806         }, /* OMAP3ISP_PREV_YC_LIMIT */ {
 807                 preview_config_yc_range,
 808                 NULL,
 809                 offsetof(struct prev_params, yclimit),
 810                 FIELD_SIZEOF(struct prev_params, yclimit),
 811                 offsetof(struct omap3isp_prev_update_config, yclimit),
 812         }, /* OMAP3ISP_PREV_DEFECT_COR */ {
 813                 preview_config_dcor,
 814                 preview_enable_dcor,
 815                 offsetof(struct prev_params, dcor),
 816                 FIELD_SIZEOF(struct prev_params, dcor),
 817                 offsetof(struct omap3isp_prev_update_config, dcor),
 818         }, /* Previously OMAP3ISP_PREV_GAMMABYPASS, not used anymore */ {
 819                 NULL,
 820                 NULL,
 821         }, /* OMAP3ISP_PREV_DRK_FRM_CAPTURE */ {
 822                 NULL,
 823                 preview_enable_drkframe_capture,
 824         }, /* OMAP3ISP_PREV_DRK_FRM_SUBTRACT */ {
 825                 NULL,
 826                 preview_enable_drkframe,
 827         }, /* OMAP3ISP_PREV_LENS_SHADING */ {
 828                 NULL,
 829                 preview_enable_drkframe,
 830         }, /* OMAP3ISP_PREV_NF */ {
 831                 preview_config_noisefilter,
 832                 preview_enable_noisefilter,
 833                 offsetof(struct prev_params, nf),
 834                 FIELD_SIZEOF(struct prev_params, nf),
 835                 offsetof(struct omap3isp_prev_update_config, nf),
 836         }, /* OMAP3ISP_PREV_GAMMA */ {
 837                 preview_config_gammacorrn,
 838                 preview_enable_gammacorrn,
 839                 offsetof(struct prev_params, gamma),
 840                 FIELD_SIZEOF(struct prev_params, gamma),
 841                 offsetof(struct omap3isp_prev_update_config, gamma),
 842         }, /* OMAP3ISP_PREV_CONTRAST */ {
 843                 preview_config_contrast,
 844                 NULL,
 845                 0, 0, 0, true,
 846         }, /* OMAP3ISP_PREV_BRIGHTNESS */ {
 847                 preview_config_brightness,
 848                 NULL,
 849                 0, 0, 0, true,
 850         },
 851 };
 852
 853 /*
 854  * preview_config - Copy and update local structure with userspace preview
 855  *                  configuration.
 856  * @prev: ISP preview engine
 857  * @cfg: Configuration
 858  *
 859  * Return zero if success or -EFAULT if the configuration can't be copied from
 860  * userspace.
 861  */
 862 static int preview_config(struct isp_prev_device *prev,
 863                           struct omap3isp_prev_update_config *cfg)
 864 {
 865         unsigned long flags;
 866         unsigned int i;
 867         int rval = 0;
 868         u32 update;
 869         u32 active;
 870
 871         if (cfg->update == 0)
 872                 return 0;
 873
 874         /* Mark the shadow parameters we're going to update as busy. */
 875         spin_lock_irqsave(&prev->params.lock, flags);
 876         preview_params_lock(prev, cfg->update, true);
 877         active = prev->params.active;
 878         spin_unlock_irqrestore(&prev->params.lock, flags);
 879
 880         update = 0;
 881
 882         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
 883                 const struct preview_update *attr = &update_attrs[i];
 884                 struct prev_params *params;
 885                 unsigned int bit = 1 << i;
 886
 887                 if (attr->skip || !(cfg->update & bit))
 888                         continue;
 889
 890                 params = &prev->params.params[!!(active & bit)];
 891
 892                 if (cfg->flag & bit) {
 893                         void __user *from = *(void * __user *)
 894                                 ((void *)cfg + attr->config_offset);
 895                         void *to = (void *)params + attr->param_offset;
 896                         size_t size = attr->param_size;
 897
 898                         if (to && from && size) {
 899                                 if (copy_from_user(to, from, size)) {
 900                                         rval = -EFAULT;
 901                                         break;
 902                                 }
 903                         }
 904                         params->features |= bit;
 905                 } else {
 906                         params->features &= ~bit;
 907                 }
 908
 909                 update |= bit;
 910         }
 911
 912         spin_lock_irqsave(&prev->params.lock, flags);
 913         preview_params_unlock(prev, update, true);
 914         preview_params_switch(prev);
 915         spin_unlock_irqrestore(&prev->params.lock, flags);
 916
 917         return rval;
 918 }
 919
 920 /*
 921  * preview_setup_hw - Setup preview registers and/or internal memory
 922  * @prev: pointer to preview private structure
 923  * @update: Bitmask of parameters to setup
 924  * @active: Bitmask of parameters active in set 0
 925  * Note: can be called from interrupt context
 926  * Return none
 927  */
 928 static void preview_setup_hw(struct isp_prev_device *prev, u32 update,
 929                              u32 active)
 930 {
 931         unsigned int i;
 932         u32 features;
 933
 934         if (update == 0)
 935                 return;
 936
 937         features = (prev->params.params[0].features & active)
 938                  | (prev->params.params[1].features & ~active);
 939
 940         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
 941                 const struct preview_update *attr = &update_attrs[i];
 942                 struct prev_params *params;
 943                 unsigned int bit = 1 << i;
 944
 945                 if (!(update & bit))
 946                         continue;
 947
 948                 params = &prev->params.params[!(active & bit)];
 949
 950                 if (params->features & bit) {
 951                         if (attr->config)
 952                                 attr->config(prev, params);
 953                         if (attr->enable)
 954                                 attr->enable(prev, true);
 955                 } else {
 956                         if (attr->enable)
 957                                 attr->enable(prev, false);
 958                 }
 959         }
 960 }
 961
 962 /*
 963  * preview_config_ycpos - Configure byte layout of YUV image.
 964  * @prev: pointer to previewer private structure
 965  * @pixelcode: pixel code
 966  */
 967 static void
 968 preview_config_ycpos(struct isp_prev_device *prev,
 969                      enum v4l2_mbus_pixelcode pixelcode)
 970 {
 971         struct isp_device *isp = to_isp_device(prev);
 972         enum preview_ycpos_mode mode;
 973
 974         switch (pixelcode) {
 975         case V4L2_MBUS_FMT_YUYV8_1X16:
 976                 mode = YCPOS_CrYCbY;
 977                 break;
 978         case V4L2_MBUS_FMT_UYVY8_1X16:
 979                 mode = YCPOS_YCrYCb;
 980                 break;
 981         default:
 982                 return;
 983         }
 984
 985         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 986                         ISPPRV_PCR_YCPOS_CrYCbY,
 987                         mode << ISPPRV_PCR_YCPOS_SHIFT);
 988 }
 989
 990 /*
 991  * preview_config_averager - Enable / disable / configure averager
 992  * @average: Average value to be configured.
 993  */
 994 static void preview_config_averager(struct isp_prev_device *prev, u8 average)
 995 {
 996         struct isp_device *isp = to_isp_device(prev);
 997
 998         isp_reg_writel(isp, ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
 999                        ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
1000                        average, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
1001 }
1002
1003
1004 /*
1005  * preview_config_input_format - Configure the input format
1006  * @prev: The preview engine
1007  * @info: Sink pad format information
1008  *
1009  * Enable and configure CFA interpolation for Bayer formats and disable it for
1010  * greyscale formats.
1011  *
1012  * The CFA table is organised in four blocks, one per Bayer component. The
1013  * hardware expects blocks to follow the Bayer order of the input data, while
1014  * the driver stores the table in GRBG order in memory. The blocks need to be
1015  * reordered to support non-GRBG Bayer patterns.
1016  */
1017 static void preview_config_input_format(struct isp_prev_device *prev,
1018                                         const struct isp_format_info *info)
1019 {
1020         struct isp_device *isp = to_isp_device(prev);
1021         struct prev_params *params;
1022
1023         if (info->width == 8)
1024                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1025                             ISPPRV_PCR_WIDTH);
1026         else
1027                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1028                             ISPPRV_PCR_WIDTH);
1029
1030         switch (info->flavor) {
1031         case V4L2_MBUS_FMT_SGRBG8_1X8:
1032                 prev->params.cfa_order = 0;
1033                 break;
1034         case V4L2_MBUS_FMT_SRGGB8_1X8:
1035                 prev->params.cfa_order = 1;
1036                 break;
1037         case V4L2_MBUS_FMT_SBGGR8_1X8:
1038                 prev->params.cfa_order = 2;
1039                 break;
1040         case V4L2_MBUS_FMT_SGBRG8_1X8:
1041                 prev->params.cfa_order = 3;
1042                 break;
1043         default:
1044                 /* Disable CFA for non-Bayer formats. */
1045                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1046                             ISPPRV_PCR_CFAEN);
1047                 return;
1048         }
1049
1050         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, ISPPRV_PCR_CFAEN);
1051         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1052                         ISPPRV_PCR_CFAFMT_MASK, ISPPRV_PCR_CFAFMT_BAYER);
1053
1054         params = (prev->params.active & OMAP3ISP_PREV_CFA)
1055                ? &prev->params.params[0] : &prev->params.params[1];
1056
1057         preview_config_cfa(prev, params);
1058 }
1059
1060 /*
1061  * preview_config_input_size - Configure the input frame size
1062  *
1063  * The preview engine crops several rows and columns internally depending on
1064  * which processing blocks are enabled. The driver assumes all those blocks are
1065  * enabled when reporting source pad formats to userspace. If this assumption is
1066  * not true, rows and columns must be manually cropped at the preview engine
1067  * input to avoid overflows at the end of lines and frames.
1068  *
1069  * See the explanation at the PREV_MARGIN_* definitions for more details.
1070  */
1071 static void preview_config_input_size(struct isp_prev_device *prev, u32 active)
1072 {
1073         const struct v4l2_mbus_framefmt *format = &prev->formats[PREV_PAD_SINK];
1074         struct isp_device *isp = to_isp_device(prev);
1075         unsigned int sph = prev->crop.left;
1076         unsigned int eph = prev->crop.left + prev->crop.width - 1;
1077         unsigned int slv = prev->crop.top;
1078         unsigned int elv = prev->crop.top + prev->crop.height - 1;
1079         u32 features;
1080
1081         if (format->code != V4L2_MBUS_FMT_Y8_1X8 &&
1082             format->code != V4L2_MBUS_FMT_Y10_1X10) {
1083                 sph -= 2;
1084                 eph += 2;
1085                 slv -= 2;
1086                 elv += 2;
1087         }
1088
1089         features = (prev->params.params[0].features & active)
1090                  | (prev->params.params[1].features & ~active);
1091
1092         if (features & (OMAP3ISP_PREV_DEFECT_COR | OMAP3ISP_PREV_NF)) {
1093                 sph -= 2;
1094                 eph += 2;
1095                 slv -= 2;
1096                 elv += 2;
1097         }
1098         if (features & OMAP3ISP_PREV_HRZ_MED) {
1099                 sph -= 2;
1100                 eph += 2;
1101         }
1102         if (features & (OMAP3ISP_PREV_CHROMA_SUPP | OMAP3ISP_PREV_LUMAENH))
1103                 sph -= 2;
1104
1105         isp_reg_writel(isp, (sph << ISPPRV_HORZ_INFO_SPH_SHIFT) | eph,
1106                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HORZ_INFO);
1107         isp_reg_writel(isp, (slv << ISPPRV_VERT_INFO_SLV_SHIFT) | elv,
1108                        OMAP3_ISP_IOMEM_PREV, ISPPRV_VERT_INFO);
1109 }
1110
1111 /*
1112  * preview_config_inlineoffset - Configures the Read address line offset.
1113  * @prev: Preview module
1114  * @offset: Line offset
1115  *
1116  * According to the TRM, the line offset must be aligned on a 32 bytes boundary.
1117  * However, a hardware bug requires the memory start address to be aligned on a
1118  * 64 bytes boundary, so the offset probably should be aligned on 64 bytes as
1119  * well.
1120  */
1121 static void
1122 preview_config_inlineoffset(struct isp_prev_device *prev, u32 offset)
1123 {
1124         struct isp_device *isp = to_isp_device(prev);
1125
1126         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1127                        ISPPRV_RADR_OFFSET);
1128 }
1129
1130 /*
1131  * preview_set_inaddr - Sets memory address of input frame.
1132  * @addr: 32bit memory address aligned on 32byte boundary.
1133  *
1134  * Configures the memory address from which the input frame is to be read.
1135  */
1136 static void preview_set_inaddr(struct isp_prev_device *prev, u32 addr)
1137 {
1138         struct isp_device *isp = to_isp_device(prev);
1139
1140         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_RSDR_ADDR);
1141 }
1142
1143 /*
1144  * preview_config_outlineoffset - Configures the Write address line offset.
1145  * @offset: Line Offset for the preview output.
1146  *
1147  * The offset must be a multiple of 32 bytes.
1148  */
1149 static void preview_config_outlineoffset(struct isp_prev_device *prev,
1150                                     u32 offset)
1151 {
1152         struct isp_device *isp = to_isp_device(prev);
1153
1154         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1155                        ISPPRV_WADD_OFFSET);
1156 }
1157
1158 /*
1159  * preview_set_outaddr - Sets the memory address to store output frame
1160  * @addr: 32bit memory address aligned on 32byte boundary.
1161  *
1162  * Configures the memory address to which the output frame is written.
1163  */
1164 static void preview_set_outaddr(struct isp_prev_device *prev, u32 addr)
1165 {
1166         struct isp_device *isp = to_isp_device(prev);
1167
1168         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_WSDR_ADDR);
1169 }
1170
1171 static void preview_adjust_bandwidth(struct isp_prev_device *prev)
1172 {
1173         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1174         struct isp_device *isp = to_isp_device(prev);
1175         const struct v4l2_mbus_framefmt *ifmt = &prev->formats[PREV_PAD_SINK];
1176         unsigned long l3_ick = pipe->l3_ick;
1177         struct v4l2_fract *timeperframe;
1178         unsigned int cycles_per_frame;
1179         unsigned int requests_per_frame;
1180         unsigned int cycles_per_request;
1181         unsigned int minimum;
1182         unsigned int maximum;
1183         unsigned int value;
1184
1185         if (prev->input != PREVIEW_INPUT_MEMORY) {
1186                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1187                             ISPSBL_SDR_REQ_PRV_EXP_MASK);
1188                 return;
1189         }
1190
1191         /* Compute the minimum number of cycles per request, based on the
1192          * pipeline maximum data rate. This is an absolute lower bound if we
1193          * don't want SBL overflows, so round the value up.
1194          */
1195         cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
1196                                      pipe->max_rate);
1197         minimum = DIV_ROUND_UP(cycles_per_request, 32);
1198
1199         /* Compute the maximum number of cycles per request, based on the
1200          * requested frame rate. This is a soft upper bound to achieve a frame
1201          * rate equal or higher than the requested value, so round the value
1202          * down.
1203          */
1204         timeperframe = &pipe->max_timeperframe;
1205
1206         requests_per_frame = DIV_ROUND_UP(ifmt->width * 2, 256) * ifmt->height;
1207         cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
1208                                    timeperframe->denominator);
1209         cycles_per_request = cycles_per_frame / requests_per_frame;
1210
1211         maximum = cycles_per_request / 32;
1212
1213         value = max(minimum, maximum);
1214
1215         dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
1216         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1217                         ISPSBL_SDR_REQ_PRV_EXP_MASK,
1218                         value << ISPSBL_SDR_REQ_PRV_EXP_SHIFT);
1219 }
1220
1221 /*
1222  * omap3isp_preview_busy - Gets busy state of preview module.
1223  */
1224 int omap3isp_preview_busy(struct isp_prev_device *prev)
1225 {
1226         struct isp_device *isp = to_isp_device(prev);
1227
1228         return isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR)
1229                 & ISPPRV_PCR_BUSY;
1230 }
1231
1232 /*
1233  * omap3isp_preview_restore_context - Restores the values of preview registers
1234  */
1235 void omap3isp_preview_restore_context(struct isp_device *isp)
1236 {
1237         struct isp_prev_device *prev = &isp->isp_prev;
1238         const u32 update = OMAP3ISP_PREV_FEATURES_END - 1;
1239
1240         prev->params.params[0].update = prev->params.active & update;
1241         prev->params.params[1].update = ~prev->params.active & update;
1242
1243         preview_setup_hw(prev, update, prev->params.active);
1244
1245         prev->params.params[0].update = 0;
1246         prev->params.params[1].update = 0;
1247 }
1248
1249 /*
1250  * preview_print_status - Dump preview module registers to the kernel log
1251  */
1252 #define PREV_PRINT_REGISTER(isp, name)\
1253         dev_dbg(isp->dev, "###PRV " #name "=0x%08x\n", \
1254                 isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_##name))
1255
1256 static void preview_print_status(struct isp_prev_device *prev)
1257 {
1258         struct isp_device *isp = to_isp_device(prev);
1259
1260         dev_dbg(isp->dev, "-------------Preview Register dump----------\n");
1261
1262         PREV_PRINT_REGISTER(isp, PCR);
1263         PREV_PRINT_REGISTER(isp, HORZ_INFO);
1264         PREV_PRINT_REGISTER(isp, VERT_INFO);
1265         PREV_PRINT_REGISTER(isp, RSDR_ADDR);
1266         PREV_PRINT_REGISTER(isp, RADR_OFFSET);
1267         PREV_PRINT_REGISTER(isp, DSDR_ADDR);
1268         PREV_PRINT_REGISTER(isp, DRKF_OFFSET);
1269         PREV_PRINT_REGISTER(isp, WSDR_ADDR);
1270         PREV_PRINT_REGISTER(isp, WADD_OFFSET);
1271         PREV_PRINT_REGISTER(isp, AVE);
1272         PREV_PRINT_REGISTER(isp, HMED);
1273         PREV_PRINT_REGISTER(isp, NF);
1274         PREV_PRINT_REGISTER(isp, WB_DGAIN);
1275         PREV_PRINT_REGISTER(isp, WBGAIN);
1276         PREV_PRINT_REGISTER(isp, WBSEL);
1277         PREV_PRINT_REGISTER(isp, CFA);
1278         PREV_PRINT_REGISTER(isp, BLKADJOFF);
1279         PREV_PRINT_REGISTER(isp, RGB_MAT1);
1280         PREV_PRINT_REGISTER(isp, RGB_MAT2);
1281         PREV_PRINT_REGISTER(isp, RGB_MAT3);
1282         PREV_PRINT_REGISTER(isp, RGB_MAT4);
1283         PREV_PRINT_REGISTER(isp, RGB_MAT5);
1284         PREV_PRINT_REGISTER(isp, RGB_OFF1);
1285         PREV_PRINT_REGISTER(isp, RGB_OFF2);
1286         PREV_PRINT_REGISTER(isp, CSC0);
1287         PREV_PRINT_REGISTER(isp, CSC1);
1288         PREV_PRINT_REGISTER(isp, CSC2);
1289         PREV_PRINT_REGISTER(isp, CSC_OFFSET);
1290         PREV_PRINT_REGISTER(isp, CNT_BRT);
1291         PREV_PRINT_REGISTER(isp, CSUP);
1292         PREV_PRINT_REGISTER(isp, SETUP_YC);
1293         PREV_PRINT_REGISTER(isp, SET_TBL_ADDR);
1294         PREV_PRINT_REGISTER(isp, CDC_THR0);
1295         PREV_PRINT_REGISTER(isp, CDC_THR1);
1296         PREV_PRINT_REGISTER(isp, CDC_THR2);
1297         PREV_PRINT_REGISTER(isp, CDC_THR3);
1298
1299         dev_dbg(isp->dev, "--------------------------------------------\n");
1300 }
1301
1302 /*
1303  * preview_init_params - init image processing parameters.
1304  * @prev: pointer to previewer private structure
1305  */
1306 static void preview_init_params(struct isp_prev_device *prev)
1307 {
1308         struct prev_params *params;
1309         unsigned int i;
1310
1311         spin_lock_init(&prev->params.lock);
1312
1313         prev->params.active = ~0;
1314         prev->params.params[0].busy = 0;
1315         prev->params.params[0].update = OMAP3ISP_PREV_FEATURES_END - 1;
1316         prev->params.params[1].busy = 0;
1317         prev->params.params[1].update = 0;
1318
1319         params = &prev->params.params[0];
1320
1321         /* Init values */
1322         params->contrast = ISPPRV_CONTRAST_DEF * ISPPRV_CONTRAST_UNITS;
1323         params->brightness = ISPPRV_BRIGHT_DEF * ISPPRV_BRIGHT_UNITS;
1324         params->cfa.format = OMAP3ISP_CFAFMT_BAYER;
1325         memcpy(params->cfa.table, cfa_coef_table,
1326                sizeof(params->cfa.table));
1327         params->cfa.gradthrs_horz = FLR_CFA_GRADTHRS_HORZ;
1328         params->cfa.gradthrs_vert = FLR_CFA_GRADTHRS_VERT;
1329         params->csup.gain = FLR_CSUP_GAIN;
1330         params->csup.thres = FLR_CSUP_THRES;
1331         params->csup.hypf_en = 0;
1332         memcpy(params->luma.table, luma_enhance_table,
1333                sizeof(params->luma.table));
1334         params->nf.spread = FLR_NF_STRGTH;
1335         memcpy(params->nf.table, noise_filter_table, sizeof(params->nf.table));
1336         params->dcor.couplet_mode_en = 1;
1337         for (i = 0; i < OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS; i++)
1338                 params->dcor.detect_correct[i] = DEF_DETECT_CORRECT_VAL;
1339         memcpy(params->gamma.blue, gamma_table, sizeof(params->gamma.blue));
1340         memcpy(params->gamma.green, gamma_table, sizeof(params->gamma.green));
1341         memcpy(params->gamma.red, gamma_table, sizeof(params->gamma.red));
1342         params->wbal.dgain = FLR_WBAL_DGAIN;
1343         params->wbal.coef0 = FLR_WBAL_COEF;
1344         params->wbal.coef1 = FLR_WBAL_COEF;
1345         params->wbal.coef2 = FLR_WBAL_COEF;
1346         params->wbal.coef3 = FLR_WBAL_COEF;
1347         params->blkadj.red = FLR_BLKADJ_RED;
1348         params->blkadj.green = FLR_BLKADJ_GREEN;
1349         params->blkadj.blue = FLR_BLKADJ_BLUE;
1350         params->rgb2rgb = flr_rgb2rgb;
1351         params->csc = flr_prev_csc;
1352         params->yclimit.minC = ISPPRV_YC_MIN;
1353         params->yclimit.maxC = ISPPRV_YC_MAX;
1354         params->yclimit.minY = ISPPRV_YC_MIN;
1355         params->yclimit.maxY = ISPPRV_YC_MAX;
1356
1357         params->features = OMAP3ISP_PREV_CFA | OMAP3ISP_PREV_DEFECT_COR
1358                          | OMAP3ISP_PREV_NF | OMAP3ISP_PREV_GAMMA
1359                          | OMAP3ISP_PREV_BLKADJ | OMAP3ISP_PREV_YC_LIMIT
1360                          | OMAP3ISP_PREV_RGB2RGB | OMAP3ISP_PREV_COLOR_CONV
1361                          | OMAP3ISP_PREV_WB | OMAP3ISP_PREV_BRIGHTNESS
1362                          | OMAP3ISP_PREV_CONTRAST;
1363 }
1364
1365 /*
1366  * preview_max_out_width - Handle previewer hardware output limitations
1367  * @prev: pointer to previewer private structure
1368  * returns maximum width output for current isp revision
1369  */
1370 static unsigned int preview_max_out_width(struct isp_prev_device *prev)
1371 {
1372         struct isp_device *isp = to_isp_device(prev);
1373
1374         switch (isp->revision) {
1375         case ISP_REVISION_1_0:
1376                 return PREV_MAX_OUT_WIDTH_REV_1;
1377
1378         case ISP_REVISION_2_0:
1379         default:
1380                 return PREV_MAX_OUT_WIDTH_REV_2;
1381
1382         case ISP_REVISION_15_0:
1383                 return PREV_MAX_OUT_WIDTH_REV_15;
1384         }
1385 }
1386
1387 static void preview_configure(struct isp_prev_device *prev)
1388 {
1389         struct isp_device *isp = to_isp_device(prev);
1390         const struct isp_format_info *info;
1391         struct v4l2_mbus_framefmt *format;
1392         unsigned long flags;
1393         u32 update;
1394         u32 active;
1395
1396         spin_lock_irqsave(&prev->params.lock, flags);
1397         /* Mark all active parameters we are going to touch as busy. */
1398         update = preview_params_lock(prev, 0, false);
1399         active = prev->params.active;
1400         spin_unlock_irqrestore(&prev->params.lock, flags);
1401
1402         /* PREV_PAD_SINK */
1403         format = &prev->formats[PREV_PAD_SINK];
1404         info = omap3isp_video_format_info(format->code);
1405
1406         preview_adjust_bandwidth(prev);
1407
1408         preview_config_input_format(prev, info);
1409         preview_config_input_size(prev, active);
1410
1411         if (prev->input == PREVIEW_INPUT_CCDC)
1412                 preview_config_inlineoffset(prev, 0);
1413         else
1414                 preview_config_inlineoffset(prev, ALIGN(format->width, 0x20) *
1415                                             info->bpp);
1416
1417         preview_setup_hw(prev, update, active);
1418
1419         /* PREV_PAD_SOURCE */
1420         format = &prev->formats[PREV_PAD_SOURCE];
1421
1422         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1423                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1424                             ISPPRV_PCR_SDRPORT);
1425         else
1426                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1427                             ISPPRV_PCR_SDRPORT);
1428
1429         if (prev->output & PREVIEW_OUTPUT_RESIZER)
1430                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1431                             ISPPRV_PCR_RSZPORT);
1432         else
1433                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1434                             ISPPRV_PCR_RSZPORT);
1435
1436         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1437                 preview_config_outlineoffset(prev,
1438                                 ALIGN(format->width, 0x10) * 2);
1439
1440         preview_config_averager(prev, 0);
1441         preview_config_ycpos(prev, format->code);
1442
1443         spin_lock_irqsave(&prev->params.lock, flags);
1444         preview_params_unlock(prev, update, false);
1445         spin_unlock_irqrestore(&prev->params.lock, flags);
1446 }
1447
1448 /* -----------------------------------------------------------------------------
1449  * Interrupt handling
1450  */
1451
1452 static void preview_enable_oneshot(struct isp_prev_device *prev)
1453 {
1454         struct isp_device *isp = to_isp_device(prev);
1455
1456         /* The PCR.SOURCE bit is automatically reset to 0 when the PCR.ENABLE
1457          * bit is set. As the preview engine is used in single-shot mode, we
1458          * need to set PCR.SOURCE before enabling the preview engine.
1459          */
1460         if (prev->input == PREVIEW_INPUT_MEMORY)
1461                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1462                             ISPPRV_PCR_SOURCE);
1463
1464         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1465                     ISPPRV_PCR_EN | ISPPRV_PCR_ONESHOT);
1466 }
1467
1468 void omap3isp_preview_isr_frame_sync(struct isp_prev_device *prev)
1469 {
1470         /*
1471          * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
1472          * condition, the module was paused and now we have a buffer queued
1473          * on the output again. Restart the pipeline if running in continuous
1474          * mode.
1475          */
1476         if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1477             prev->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1478                 preview_enable_oneshot(prev);
1479                 isp_video_dmaqueue_flags_clr(&prev->video_out);
1480         }
1481 }
1482
1483 static void preview_isr_buffer(struct isp_prev_device *prev)
1484 {
1485         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1486         struct isp_buffer *buffer;
1487         int restart = 0;
1488
1489         if (prev->input == PREVIEW_INPUT_MEMORY) {
1490                 buffer = omap3isp_video_buffer_next(&prev->video_in);
1491                 if (buffer != NULL)
1492                         preview_set_inaddr(prev, buffer->dma);
1493                 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1494         }
1495
1496         if (prev->output & PREVIEW_OUTPUT_MEMORY) {
1497                 buffer = omap3isp_video_buffer_next(&prev->video_out);
1498                 if (buffer != NULL) {
1499                         preview_set_outaddr(prev, buffer->dma);
1500                         restart = 1;
1501                 }
1502                 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1503         }
1504
1505         switch (prev->state) {
1506         case ISP_PIPELINE_STREAM_SINGLESHOT:
1507                 if (isp_pipeline_ready(pipe))
1508                         omap3isp_pipeline_set_stream(pipe,
1509                                                 ISP_PIPELINE_STREAM_SINGLESHOT);
1510                 break;
1511
1512         case ISP_PIPELINE_STREAM_CONTINUOUS:
1513                 /* If an underrun occurs, the video queue operation handler will
1514                  * restart the preview engine. Otherwise restart it immediately.
1515                  */
1516                 if (restart)
1517                         preview_enable_oneshot(prev);
1518                 break;
1519
1520         case ISP_PIPELINE_STREAM_STOPPED:
1521         default:
1522                 return;
1523         }
1524 }
1525
1526 /*
1527  * omap3isp_preview_isr - ISP preview engine interrupt handler
1528  *
1529  * Manage the preview engine video buffers and configure shadowed registers.
1530  */
1531 void omap3isp_preview_isr(struct isp_prev_device *prev)
1532 {
1533         unsigned long flags;
1534         u32 update;
1535         u32 active;
1536
1537         if (omap3isp_module_sync_is_stopping(&prev->wait, &prev->stopping))
1538                 return;
1539
1540         spin_lock_irqsave(&prev->params.lock, flags);
1541         preview_params_switch(prev);
1542         update = preview_params_lock(prev, 0, false);
1543         active = prev->params.active;
1544         spin_unlock_irqrestore(&prev->params.lock, flags);
1545
1546         preview_setup_hw(prev, update, active);
1547         preview_config_input_size(prev, active);
1548
1549         if (prev->input == PREVIEW_INPUT_MEMORY ||
1550             prev->output & PREVIEW_OUTPUT_MEMORY)
1551                 preview_isr_buffer(prev);
1552         else if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1553                 preview_enable_oneshot(prev);
1554
1555         spin_lock_irqsave(&prev->params.lock, flags);
1556         preview_params_unlock(prev, update, false);
1557         spin_unlock_irqrestore(&prev->params.lock, flags);
1558 }
1559
1560 /* -----------------------------------------------------------------------------
1561  * ISP video operations
1562  */
1563
1564 static int preview_video_queue(struct isp_video *video,
1565                                struct isp_buffer *buffer)
1566 {
1567         struct isp_prev_device *prev = &video->isp->isp_prev;
1568
1569         if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1570                 preview_set_inaddr(prev, buffer->dma);
1571
1572         if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1573                 preview_set_outaddr(prev, buffer->dma);
1574
1575         return 0;
1576 }
1577
1578 static const struct isp_video_operations preview_video_ops = {
1579         .queue = preview_video_queue,
1580 };
1581
1582 /* -----------------------------------------------------------------------------
1583  * V4L2 subdev operations
1584  */
1585
1586 /*
1587  * preview_s_ctrl - Handle set control subdev method
1588  * @ctrl: pointer to v4l2 control structure
1589  */
1590 static int preview_s_ctrl(struct v4l2_ctrl *ctrl)
1591 {
1592         struct isp_prev_device *prev =
1593                 container_of(ctrl->handler, struct isp_prev_device, ctrls);
1594
1595         switch (ctrl->id) {
1596         case V4L2_CID_BRIGHTNESS:
1597                 preview_update_brightness(prev, ctrl->val);
1598                 break;
1599         case V4L2_CID_CONTRAST:
1600                 preview_update_contrast(prev, ctrl->val);
1601                 break;
1602         }
1603
1604         return 0;
1605 }
1606
1607 static const struct v4l2_ctrl_ops preview_ctrl_ops = {
1608         .s_ctrl = preview_s_ctrl,
1609 };
1610
1611 /*
1612  * preview_ioctl - Handle preview module private ioctl's
1613  * @sd: pointer to v4l2 subdev structure
1614  * @cmd: configuration command
1615  * @arg: configuration argument
1616  * return -EINVAL or zero on success
1617  */
1618 static long preview_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1619 {
1620         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1621
1622         switch (cmd) {
1623         case VIDIOC_OMAP3ISP_PRV_CFG:
1624                 return preview_config(prev, arg);
1625
1626         default:
1627                 return -ENOIOCTLCMD;
1628         }
1629 }
1630
1631 /*
1632  * preview_set_stream - Enable/Disable streaming on preview subdev
1633  * @sd    : pointer to v4l2 subdev structure
1634  * @enable: 1 == Enable, 0 == Disable
1635  * return -EINVAL or zero on success
1636  */
1637 static int preview_set_stream(struct v4l2_subdev *sd, int enable)
1638 {
1639         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1640         struct isp_video *video_out = &prev->video_out;
1641         struct isp_device *isp = to_isp_device(prev);
1642         struct device *dev = to_device(prev);
1643
1644         if (prev->state == ISP_PIPELINE_STREAM_STOPPED) {
1645                 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1646                         return 0;
1647
1648                 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1649                 preview_configure(prev);
1650                 atomic_set(&prev->stopping, 0);
1651                 preview_print_status(prev);
1652         }
1653
1654         switch (enable) {
1655         case ISP_PIPELINE_STREAM_CONTINUOUS:
1656                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1657                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1658
1659                 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED ||
1660                     !(prev->output & PREVIEW_OUTPUT_MEMORY))
1661                         preview_enable_oneshot(prev);
1662
1663                 isp_video_dmaqueue_flags_clr(video_out);
1664                 break;
1665
1666         case ISP_PIPELINE_STREAM_SINGLESHOT:
1667                 if (prev->input == PREVIEW_INPUT_MEMORY)
1668                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1669                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1670                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1671
1672                 preview_enable_oneshot(prev);
1673                 break;
1674
1675         case ISP_PIPELINE_STREAM_STOPPED:
1676                 if (omap3isp_module_sync_idle(&sd->entity, &prev->wait,
1677                                               &prev->stopping))
1678                         dev_dbg(dev, "%s: stop timeout.\n", sd->name);
1679                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1680                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1681                 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1682                 isp_video_dmaqueue_flags_clr(video_out);
1683                 break;
1684         }
1685
1686         prev->state = enable;
1687         return 0;
1688 }
1689
1690 static struct v4l2_mbus_framefmt *
1691 __preview_get_format(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1692                      unsigned int pad, enum v4l2_subdev_format_whence which)
1693 {
1694         if (which == V4L2_SUBDEV_FORMAT_TRY)
1695                 return v4l2_subdev_get_try_format(fh, pad);
1696         else
1697                 return &prev->formats[pad];
1698 }
1699
1700 static struct v4l2_rect *
1701 __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1702                    enum v4l2_subdev_format_whence which)
1703 {
1704         if (which == V4L2_SUBDEV_FORMAT_TRY)
1705                 return v4l2_subdev_get_try_crop(fh, PREV_PAD_SINK);
1706         else
1707                 return &prev->crop;
1708 }
1709
1710 /* previewer format descriptions */
1711 static const unsigned int preview_input_fmts[] = {
1712         V4L2_MBUS_FMT_Y8_1X8,
1713         V4L2_MBUS_FMT_SGRBG8_1X8,
1714         V4L2_MBUS_FMT_SRGGB8_1X8,
1715         V4L2_MBUS_FMT_SBGGR8_1X8,
1716         V4L2_MBUS_FMT_SGBRG8_1X8,
1717         V4L2_MBUS_FMT_Y10_1X10,
1718         V4L2_MBUS_FMT_SGRBG10_1X10,
1719         V4L2_MBUS_FMT_SRGGB10_1X10,
1720         V4L2_MBUS_FMT_SBGGR10_1X10,
1721         V4L2_MBUS_FMT_SGBRG10_1X10,
1722 };
1723
1724 static const unsigned int preview_output_fmts[] = {
1725         V4L2_MBUS_FMT_UYVY8_1X16,
1726         V4L2_MBUS_FMT_YUYV8_1X16,
1727 };
1728
1729 /*
1730  * preview_try_format - Validate a format
1731  * @prev: ISP preview engine
1732  * @fh: V4L2 subdev file handle
1733  * @pad: pad number
1734  * @fmt: format to be validated
1735  * @which: try/active format selector
1736  *
1737  * Validate and adjust the given format for the given pad based on the preview
1738  * engine limits and the format and crop rectangles on other pads.
1739  */
1740 static void preview_try_format(struct isp_prev_device *prev,
1741                                struct v4l2_subdev_fh *fh, unsigned int pad,
1742                                struct v4l2_mbus_framefmt *fmt,
1743                                enum v4l2_subdev_format_whence which)
1744 {
1745         enum v4l2_mbus_pixelcode pixelcode;
1746         struct v4l2_rect *crop;
1747         unsigned int i;
1748
1749         switch (pad) {
1750         case PREV_PAD_SINK:
1751                 /* When reading data from the CCDC, the input size has already
1752                  * been mangled by the CCDC output pad so it can be accepted
1753                  * as-is.
1754                  *
1755                  * When reading data from memory, clamp the requested width and
1756                  * height. The TRM doesn't specify a minimum input height, make
1757                  * sure we got enough lines to enable the noise filter and color
1758                  * filter array interpolation.
1759                  */
1760                 if (prev->input == PREVIEW_INPUT_MEMORY) {
1761                         fmt->width = clamp_t(u32, fmt->width, PREV_MIN_IN_WIDTH,
1762                                              preview_max_out_width(prev));
1763                         fmt->height = clamp_t(u32, fmt->height,
1764                                               PREV_MIN_IN_HEIGHT,
1765                                               PREV_MAX_IN_HEIGHT);
1766                 }
1767
1768                 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1769
1770                 for (i = 0; i < ARRAY_SIZE(preview_input_fmts); i++) {
1771                         if (fmt->code == preview_input_fmts[i])
1772                                 break;
1773                 }
1774
1775                 /* If not found, use SGRBG10 as default */
1776                 if (i >= ARRAY_SIZE(preview_input_fmts))
1777                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1778                 break;
1779
1780         case PREV_PAD_SOURCE:
1781                 pixelcode = fmt->code;
1782                 *fmt = *__preview_get_format(prev, fh, PREV_PAD_SINK, which);
1783
1784                 switch (pixelcode) {
1785                 case V4L2_MBUS_FMT_YUYV8_1X16:
1786                 case V4L2_MBUS_FMT_UYVY8_1X16:
1787                         fmt->code = pixelcode;
1788                         break;
1789
1790                 default:
1791                         fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1792                         break;
1793                 }
1794
1795                 /* The preview module output size is configurable through the
1796                  * averager (horizontal scaling by 1/1, 1/2, 1/4 or 1/8). This
1797                  * is not supported yet, hardcode the output size to the crop
1798                  * rectangle size.
1799                  */
1800                 crop = __preview_get_crop(prev, fh, which);
1801                 fmt->width = crop->width;
1802                 fmt->height = crop->height;
1803
1804                 fmt->colorspace = V4L2_COLORSPACE_JPEG;
1805                 break;
1806         }
1807
1808         fmt->field = V4L2_FIELD_NONE;
1809 }
1810
1811 /*
1812  * preview_try_crop - Validate a crop rectangle
1813  * @prev: ISP preview engine
1814  * @sink: format on the sink pad
1815  * @crop: crop rectangle to be validated
1816  *
1817  * The preview engine crops lines and columns for its internal operation,
1818  * depending on which filters are enabled. Enforce minimum crop margins to
1819  * handle that transparently for userspace.
1820  *
1821  * See the explanation at the PREV_MARGIN_* definitions for more details.
1822  */
1823 static void preview_try_crop(struct isp_prev_device *prev,
1824                              const struct v4l2_mbus_framefmt *sink,
1825                              struct v4l2_rect *crop)
1826 {
1827         unsigned int left = PREV_MARGIN_LEFT;
1828         unsigned int right = sink->width - PREV_MARGIN_RIGHT;
1829         unsigned int top = PREV_MARGIN_TOP;
1830         unsigned int bottom = sink->height - PREV_MARGIN_BOTTOM;
1831
1832         /* When processing data on-the-fly from the CCDC, at least 2 pixels must
1833          * be cropped from the left and right sides of the image. As we don't
1834          * know which filters will be enabled, increase the left and right
1835          * margins by two.
1836          */
1837         if (prev->input == PREVIEW_INPUT_CCDC) {
1838                 left += 2;
1839                 right -= 2;
1840         }
1841
1842         /* The CFA filter crops 4 lines and 4 columns in Bayer mode, and 2 lines
1843          * and no columns in other modes. Increase the margins based on the sink
1844          * format.
1845          */
1846         if (sink->code != V4L2_MBUS_FMT_Y8_1X8 &&
1847             sink->code != V4L2_MBUS_FMT_Y10_1X10) {
1848                 left += 2;
1849                 right -= 2;
1850                 top += 2;
1851                 bottom -= 2;
1852         }
1853
1854         /* Restrict left/top to even values to keep the Bayer pattern. */
1855         crop->left &= ~1;
1856         crop->top &= ~1;
1857
1858         crop->left = clamp_t(u32, crop->left, left, right - PREV_MIN_OUT_WIDTH);
1859         crop->top = clamp_t(u32, crop->top, top, bottom - PREV_MIN_OUT_HEIGHT);
1860         crop->width = clamp_t(u32, crop->width, PREV_MIN_OUT_WIDTH,
1861                               right - crop->left);
1862         crop->height = clamp_t(u32, crop->height, PREV_MIN_OUT_HEIGHT,
1863                                bottom - crop->top);
1864 }
1865
1866 /*
1867  * preview_enum_mbus_code - Handle pixel format enumeration
1868  * @sd     : pointer to v4l2 subdev structure
1869  * @fh     : V4L2 subdev file handle
1870  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
1871  * return -EINVAL or zero on success
1872  */
1873 static int preview_enum_mbus_code(struct v4l2_subdev *sd,
1874                                   struct v4l2_subdev_fh *fh,
1875                                   struct v4l2_subdev_mbus_code_enum *code)
1876 {
1877         switch (code->pad) {
1878         case PREV_PAD_SINK:
1879                 if (code->index >= ARRAY_SIZE(preview_input_fmts))
1880                         return -EINVAL;
1881
1882                 code->code = preview_input_fmts[code->index];
1883                 break;
1884         case PREV_PAD_SOURCE:
1885                 if (code->index >= ARRAY_SIZE(preview_output_fmts))
1886                         return -EINVAL;
1887
1888                 code->code = preview_output_fmts[code->index];
1889                 break;
1890         default:
1891                 return -EINVAL;
1892         }
1893
1894         return 0;
1895 }
1896
1897 static int preview_enum_frame_size(struct v4l2_subdev *sd,
1898                                    struct v4l2_subdev_fh *fh,
1899                                    struct v4l2_subdev_frame_size_enum *fse)
1900 {
1901         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1902         struct v4l2_mbus_framefmt format;
1903
1904         if (fse->index != 0)
1905                 return -EINVAL;
1906
1907         format.code = fse->code;
1908         format.width = 1;
1909         format.height = 1;
1910         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1911         fse->min_width = format.width;
1912         fse->min_height = format.height;
1913
1914         if (format.code != fse->code)
1915                 return -EINVAL;
1916
1917         format.code = fse->code;
1918         format.width = -1;
1919         format.height = -1;
1920         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1921         fse->max_width = format.width;
1922         fse->max_height = format.height;
1923
1924         return 0;
1925 }
1926
1927 /*
1928  * preview_get_selection - Retrieve a selection rectangle on a pad
1929  * @sd: ISP preview V4L2 subdevice
1930  * @fh: V4L2 subdev file handle
1931  * @sel: Selection rectangle
1932  *
1933  * The only supported rectangles are the crop rectangles on the sink pad.
1934  *
1935  * Return 0 on success or a negative error code otherwise.
1936  */
1937 static int preview_get_selection(struct v4l2_subdev *sd,
1938                                  struct v4l2_subdev_fh *fh,
1939                                  struct v4l2_subdev_selection *sel)
1940 {
1941         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1942         struct v4l2_mbus_framefmt *format;
1943
1944         if (sel->pad != PREV_PAD_SINK)
1945                 return -EINVAL;
1946
1947         switch (sel->target) {
1948         case V4L2_SEL_TGT_CROP_BOUNDS:
1949                 sel->r.left = 0;
1950                 sel->r.top = 0;
1951                 sel->r.width = INT_MAX;
1952                 sel->r.height = INT_MAX;
1953
1954                 format = __preview_get_format(prev, fh, PREV_PAD_SINK,
1955                                               sel->which);
1956                 preview_try_crop(prev, format, &sel->r);
1957                 break;
1958
1959         case V4L2_SEL_TGT_CROP:
1960                 sel->r = *__preview_get_crop(prev, fh, sel->which);
1961                 break;
1962
1963         default:
1964                 return -EINVAL;
1965         }
1966
1967         return 0;
1968 }
1969
1970 /*
1971  * preview_set_selection - Set a selection rectangle on a pad
1972  * @sd: ISP preview V4L2 subdevice
1973  * @fh: V4L2 subdev file handle
1974  * @sel: Selection rectangle
1975  *
1976  * The only supported rectangle is the actual crop rectangle on the sink pad.
1977  *
1978  * Return 0 on success or a negative error code otherwise.
1979  */
1980 static int preview_set_selection(struct v4l2_subdev *sd,
1981                                  struct v4l2_subdev_fh *fh,
1982                                  struct v4l2_subdev_selection *sel)
1983 {
1984         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1985         struct v4l2_mbus_framefmt *format;
1986
1987         if (sel->target != V4L2_SEL_TGT_CROP ||
1988             sel->pad != PREV_PAD_SINK)
1989                 return -EINVAL;
1990
1991         /* The crop rectangle can't be changed while streaming. */
1992         if (prev->state != ISP_PIPELINE_STREAM_STOPPED)
1993                 return -EBUSY;
1994
1995         /* Modifying the crop rectangle always changes the format on the source
1996          * pad. If the KEEP_CONFIG flag is set, just return the current crop
1997          * rectangle.
1998          */
1999         if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2000                 sel->r = *__preview_get_crop(prev, fh, sel->which);
2001                 return 0;
2002         }
2003
2004         format = __preview_get_format(prev, fh, PREV_PAD_SINK, sel->which);
2005         preview_try_crop(prev, format, &sel->r);
2006         *__preview_get_crop(prev, fh, sel->which) = sel->r;
2007
2008         /* Update the source format. */
2009         format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, sel->which);
2010         preview_try_format(prev, fh, PREV_PAD_SOURCE, format, sel->which);
2011
2012         return 0;
2013 }
2014
2015 /*
2016  * preview_get_format - Handle get format by pads subdev method
2017  * @sd : pointer to v4l2 subdev structure
2018  * @fh : V4L2 subdev file handle
2019  * @fmt: pointer to v4l2 subdev format structure
2020  * return -EINVAL or zero on success
2021  */
2022 static int preview_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2023                               struct v4l2_subdev_format *fmt)
2024 {
2025         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2026         struct v4l2_mbus_framefmt *format;
2027
2028         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2029         if (format == NULL)
2030                 return -EINVAL;
2031
2032         fmt->format = *format;
2033         return 0;
2034 }
2035
2036 /*
2037  * preview_set_format - Handle set format by pads subdev method
2038  * @sd : pointer to v4l2 subdev structure
2039  * @fh : V4L2 subdev file handle
2040  * @fmt: pointer to v4l2 subdev format structure
2041  * return -EINVAL or zero on success
2042  */
2043 static int preview_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2044                               struct v4l2_subdev_format *fmt)
2045 {
2046         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2047         struct v4l2_mbus_framefmt *format;
2048         struct v4l2_rect *crop;
2049
2050         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2051         if (format == NULL)
2052                 return -EINVAL;
2053
2054         preview_try_format(prev, fh, fmt->pad, &fmt->format, fmt->which);
2055         *format = fmt->format;
2056
2057         /* Propagate the format from sink to source */
2058         if (fmt->pad == PREV_PAD_SINK) {
2059                 /* Reset the crop rectangle. */
2060                 crop = __preview_get_crop(prev, fh, fmt->which);
2061                 crop->left = 0;
2062                 crop->top = 0;
2063                 crop->width = fmt->format.width;
2064                 crop->height = fmt->format.height;
2065
2066                 preview_try_crop(prev, &fmt->format, crop);
2067
2068                 /* Update the source format. */
2069                 format = __preview_get_format(prev, fh, PREV_PAD_SOURCE,
2070                                               fmt->which);
2071                 preview_try_format(prev, fh, PREV_PAD_SOURCE, format,
2072                                    fmt->which);
2073         }
2074
2075         return 0;
2076 }
2077
2078 /*
2079  * preview_init_formats - Initialize formats on all pads
2080  * @sd: ISP preview V4L2 subdevice
2081  * @fh: V4L2 subdev file handle
2082  *
2083  * Initialize all pad formats with default values. If fh is not NULL, try
2084  * formats are initialized on the file handle. Otherwise active formats are
2085  * initialized on the device.
2086  */
2087 static int preview_init_formats(struct v4l2_subdev *sd,
2088                                 struct v4l2_subdev_fh *fh)
2089 {
2090         struct v4l2_subdev_format format;
2091
2092         memset(&format, 0, sizeof(format));
2093         format.pad = PREV_PAD_SINK;
2094         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2095         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2096         format.format.width = 4096;
2097         format.format.height = 4096;
2098         preview_set_format(sd, fh, &format);
2099
2100         return 0;
2101 }
2102
2103 /* subdev core operations */
2104 static const struct v4l2_subdev_core_ops preview_v4l2_core_ops = {
2105         .ioctl = preview_ioctl,
2106 };
2107
2108 /* subdev video operations */
2109 static const struct v4l2_subdev_video_ops preview_v4l2_video_ops = {
2110         .s_stream = preview_set_stream,
2111 };
2112
2113 /* subdev pad operations */
2114 static const struct v4l2_subdev_pad_ops preview_v4l2_pad_ops = {
2115         .enum_mbus_code = preview_enum_mbus_code,
2116         .enum_frame_size = preview_enum_frame_size,
2117         .get_fmt = preview_get_format,
2118         .set_fmt = preview_set_format,
2119         .get_selection = preview_get_selection,
2120         .set_selection = preview_set_selection,
2121 };
2122
2123 /* subdev operations */
2124 static const struct v4l2_subdev_ops preview_v4l2_ops = {
2125         .core = &preview_v4l2_core_ops,
2126         .video = &preview_v4l2_video_ops,
2127         .pad = &preview_v4l2_pad_ops,
2128 };
2129
2130 /* subdev internal operations */
2131 static const struct v4l2_subdev_internal_ops preview_v4l2_internal_ops = {
2132         .open = preview_init_formats,
2133 };
2134
2135 /* -----------------------------------------------------------------------------
2136  * Media entity operations
2137  */
2138
2139 /*
2140  * preview_link_setup - Setup previewer connections.
2141  * @entity : Pointer to media entity structure
2142  * @local  : Pointer to local pad array
2143  * @remote : Pointer to remote pad array
2144  * @flags  : Link flags
2145  * return -EINVAL or zero on success
2146  */
2147 static int preview_link_setup(struct media_entity *entity,
2148                               const struct media_pad *local,
2149                               const struct media_pad *remote, u32 flags)
2150 {
2151         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2152         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2153
2154         switch (local->index | media_entity_type(remote->entity)) {
2155         case PREV_PAD_SINK | MEDIA_ENT_T_DEVNODE:
2156                 /* read from memory */
2157                 if (flags & MEDIA_LNK_FL_ENABLED) {
2158                         if (prev->input == PREVIEW_INPUT_CCDC)
2159                                 return -EBUSY;
2160                         prev->input = PREVIEW_INPUT_MEMORY;
2161                 } else {
2162                         if (prev->input == PREVIEW_INPUT_MEMORY)
2163                                 prev->input = PREVIEW_INPUT_NONE;
2164                 }
2165                 break;
2166
2167         case PREV_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2168                 /* read from ccdc */
2169                 if (flags & MEDIA_LNK_FL_ENABLED) {
2170                         if (prev->input == PREVIEW_INPUT_MEMORY)
2171                                 return -EBUSY;
2172                         prev->input = PREVIEW_INPUT_CCDC;
2173                 } else {
2174                         if (prev->input == PREVIEW_INPUT_CCDC)
2175                                 prev->input = PREVIEW_INPUT_NONE;
2176                 }
2177                 break;
2178
2179         /*
2180          * The ISP core doesn't support pipelines with multiple video outputs.
2181          * Revisit this when it will be implemented, and return -EBUSY for now.
2182          */
2183
2184         case PREV_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
2185                 /* write to memory */
2186                 if (flags & MEDIA_LNK_FL_ENABLED) {
2187                         if (prev->output & ~PREVIEW_OUTPUT_MEMORY)
2188                                 return -EBUSY;
2189                         prev->output |= PREVIEW_OUTPUT_MEMORY;
2190                 } else {
2191                         prev->output &= ~PREVIEW_OUTPUT_MEMORY;
2192                 }
2193                 break;
2194
2195         case PREV_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
2196                 /* write to resizer */
2197                 if (flags & MEDIA_LNK_FL_ENABLED) {
2198                         if (prev->output & ~PREVIEW_OUTPUT_RESIZER)
2199                                 return -EBUSY;
2200                         prev->output |= PREVIEW_OUTPUT_RESIZER;
2201                 } else {
2202                         prev->output &= ~PREVIEW_OUTPUT_RESIZER;
2203                 }
2204                 break;
2205
2206         default:
2207                 return -EINVAL;
2208         }
2209
2210         return 0;
2211 }
2212
2213 /* media operations */
2214 static const struct media_entity_operations preview_media_ops = {
2215         .link_setup = preview_link_setup,
2216         .link_validate = v4l2_subdev_link_validate,
2217 };
2218
2219 void omap3isp_preview_unregister_entities(struct isp_prev_device *prev)
2220 {
2221         v4l2_device_unregister_subdev(&prev->subdev);
2222         omap3isp_video_unregister(&prev->video_in);
2223         omap3isp_video_unregister(&prev->video_out);
2224 }
2225
2226 int omap3isp_preview_register_entities(struct isp_prev_device *prev,
2227         struct v4l2_device *vdev)
2228 {
2229         int ret;
2230
2231         /* Register the subdev and video nodes. */
2232         ret = v4l2_device_register_subdev(vdev, &prev->subdev);
2233         if (ret < 0)
2234                 goto error;
2235
2236         ret = omap3isp_video_register(&prev->video_in, vdev);
2237         if (ret < 0)
2238                 goto error;
2239
2240         ret = omap3isp_video_register(&prev->video_out, vdev);
2241         if (ret < 0)
2242                 goto error;
2243
2244         return 0;
2245
2246 error:
2247         omap3isp_preview_unregister_entities(prev);
2248         return ret;
2249 }
2250
2251 /* -----------------------------------------------------------------------------
2252  * ISP previewer initialisation and cleanup
2253  */
2254
2255 /*
2256  * preview_init_entities - Initialize subdev and media entity.
2257  * @prev : Pointer to preview structure
2258  * return -ENOMEM or zero on success
2259  */
2260 static int preview_init_entities(struct isp_prev_device *prev)
2261 {
2262         struct v4l2_subdev *sd = &prev->subdev;
2263         struct media_pad *pads = prev->pads;
2264         struct media_entity *me = &sd->entity;
2265         int ret;
2266
2267         prev->input = PREVIEW_INPUT_NONE;
2268
2269         v4l2_subdev_init(sd, &preview_v4l2_ops);
2270         sd->internal_ops = &preview_v4l2_internal_ops;
2271         strlcpy(sd->name, "OMAP3 ISP preview", sizeof(sd->name));
2272         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
2273         v4l2_set_subdevdata(sd, prev);
2274         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2275
2276         v4l2_ctrl_handler_init(&prev->ctrls, 2);
2277         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_BRIGHTNESS,
2278                           ISPPRV_BRIGHT_LOW, ISPPRV_BRIGHT_HIGH,
2279                           ISPPRV_BRIGHT_STEP, ISPPRV_BRIGHT_DEF);
2280         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_CONTRAST,
2281                           ISPPRV_CONTRAST_LOW, ISPPRV_CONTRAST_HIGH,
2282                           ISPPRV_CONTRAST_STEP, ISPPRV_CONTRAST_DEF);
2283         v4l2_ctrl_handler_setup(&prev->ctrls);
2284         sd->ctrl_handler = &prev->ctrls;
2285
2286         pads[PREV_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2287                                     | MEDIA_PAD_FL_MUST_CONNECT;
2288         pads[PREV_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
2289
2290         me->ops = &preview_media_ops;
2291         ret = media_entity_init(me, PREV_PADS_NUM, pads, 0);
2292         if (ret < 0)
2293                 return ret;
2294
2295         preview_init_formats(sd, NULL);
2296
2297         /* According to the OMAP34xx TRM, video buffers need to be aligned on a
2298          * 32 bytes boundary. However, an undocumented hardware bug requires a
2299          * 64 bytes boundary at the preview engine input.
2300          */
2301         prev->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2302         prev->video_in.ops = &preview_video_ops;
2303         prev->video_in.isp = to_isp_device(prev);
2304         prev->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2305         prev->video_in.bpl_alignment = 64;
2306         prev->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2307         prev->video_out.ops = &preview_video_ops;
2308         prev->video_out.isp = to_isp_device(prev);
2309         prev->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2310         prev->video_out.bpl_alignment = 32;
2311
2312         ret = omap3isp_video_init(&prev->video_in, "preview");
2313         if (ret < 0)
2314                 goto error_video_in;
2315
2316         ret = omap3isp_video_init(&prev->video_out, "preview");
2317         if (ret < 0)
2318                 goto error_video_out;
2319
2320         /* Connect the video nodes to the previewer subdev. */
2321         ret = media_entity_create_link(&prev->video_in.video.entity, 0,
2322                         &prev->subdev.entity, PREV_PAD_SINK, 0);
2323         if (ret < 0)
2324                 goto error_link;
2325
2326         ret = media_entity_create_link(&prev->subdev.entity, PREV_PAD_SOURCE,
2327                         &prev->video_out.video.entity, 0, 0);
2328         if (ret < 0)
2329                 goto error_link;
2330
2331         return 0;
2332
2333 error_link:
2334         omap3isp_video_cleanup(&prev->video_out);
2335 error_video_out:
2336         omap3isp_video_cleanup(&prev->video_in);
2337 error_video_in:
2338         media_entity_cleanup(&prev->subdev.entity);
2339         return ret;
2340 }
2341
2342 /*
2343  * omap3isp_preview_init - Previewer initialization.
2344  * @isp : Pointer to ISP device
2345  * return -ENOMEM or zero on success
2346  */
2347 int omap3isp_preview_init(struct isp_device *isp)
2348 {
2349         struct isp_prev_device *prev = &isp->isp_prev;
2350
2351         init_waitqueue_head(&prev->wait);
2352
2353         preview_init_params(prev);
2354
2355         return preview_init_entities(prev);
2356 }
2357
2358 void omap3isp_preview_cleanup(struct isp_device *isp)
2359 {
2360         struct isp_prev_device *prev = &isp->isp_prev;
2361
2362         v4l2_ctrl_handler_free(&prev->ctrls);
2363         omap3isp_video_cleanup(&prev->video_in);
2364         omap3isp_video_cleanup(&prev->video_out);
2365         media_entity_cleanup(&prev->subdev.entity);
2366 }