2 * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
4 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
6 * Authors: Sylwester Nawrocki <s.nawrocki@samsung.com>
7 * Younghwan Joo <yhwan.joo@samsung.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
15 #include <linux/device.h>
16 #include <linux/debugfs.h>
17 #include <linux/delay.h>
18 #include <linux/dma-contiguous.h>
19 #include <linux/errno.h>
20 #include <linux/firmware.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/i2c.h>
25 #include <linux/of_irq.h>
26 #include <linux/of_address.h>
27 #include <linux/of_graph.h>
28 #include <linux/of_platform.h>
29 #include <linux/platform_device.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/slab.h>
32 #include <linux/types.h>
33 #include <linux/videodev2.h>
34 #include <media/videobuf2-dma-contig.h>
36 #include "media-dev.h"
38 #include "fimc-is-command.h"
39 #include "fimc-is-errno.h"
40 #include "fimc-is-i2c.h"
41 #include "fimc-is-param.h"
42 #include "fimc-is-regs.h"
45 static char *fimc_is_clocks[ISS_CLKS_MAX] = {
46 [ISS_CLK_PPMUISPX] = "ppmuispx",
47 [ISS_CLK_PPMUISPMX] = "ppmuispmx",
48 [ISS_CLK_LITE0] = "lite0",
49 [ISS_CLK_LITE1] = "lite1",
50 [ISS_CLK_MPLL] = "mpll",
51 [ISS_CLK_ISP] = "isp",
52 [ISS_CLK_DRC] = "drc",
54 [ISS_CLK_MCUISP] = "mcuisp",
55 [ISS_CLK_UART] = "uart",
56 [ISS_CLK_ISP_DIV0] = "ispdiv0",
57 [ISS_CLK_ISP_DIV1] = "ispdiv1",
58 [ISS_CLK_MCUISP_DIV0] = "mcuispdiv0",
59 [ISS_CLK_MCUISP_DIV1] = "mcuispdiv1",
60 [ISS_CLK_ACLK200] = "aclk200",
61 [ISS_CLK_ACLK200_DIV] = "div_aclk200",
62 [ISS_CLK_ACLK400MCUISP] = "aclk400mcuisp",
63 [ISS_CLK_ACLK400MCUISP_DIV] = "div_aclk400mcuisp",
66 static void fimc_is_put_clocks(struct fimc_is *is)
70 for (i = 0; i < ISS_CLKS_MAX; i++) {
71 if (IS_ERR(is->clocks[i]))
73 clk_put(is->clocks[i]);
74 is->clocks[i] = ERR_PTR(-EINVAL);
78 static int fimc_is_get_clocks(struct fimc_is *is)
82 for (i = 0; i < ISS_CLKS_MAX; i++)
83 is->clocks[i] = ERR_PTR(-EINVAL);
85 for (i = 0; i < ISS_CLKS_MAX; i++) {
86 is->clocks[i] = clk_get(&is->pdev->dev, fimc_is_clocks[i]);
87 if (IS_ERR(is->clocks[i])) {
88 ret = PTR_ERR(is->clocks[i]);
95 fimc_is_put_clocks(is);
96 dev_err(&is->pdev->dev, "failed to get clock: %s\n",
101 static int fimc_is_setup_clocks(struct fimc_is *is)
105 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK200],
106 is->clocks[ISS_CLK_ACLK200_DIV]);
110 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK400MCUISP],
111 is->clocks[ISS_CLK_ACLK400MCUISP_DIV]);
115 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV0], ACLK_AXI_FREQUENCY);
119 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV1], ACLK_AXI_FREQUENCY);
123 ret = clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV0],
124 ATCLK_MCUISP_FREQUENCY);
128 return clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV1],
129 ATCLK_MCUISP_FREQUENCY);
132 static int fimc_is_enable_clocks(struct fimc_is *is)
136 for (i = 0; i < ISS_GATE_CLKS_MAX; i++) {
137 if (IS_ERR(is->clocks[i]))
139 ret = clk_prepare_enable(is->clocks[i]);
141 dev_err(&is->pdev->dev, "clock %s enable failed\n",
143 for (--i; i >= 0; i--)
144 clk_disable(is->clocks[i]);
147 pr_debug("enabled clock: %s\n", fimc_is_clocks[i]);
152 static void fimc_is_disable_clocks(struct fimc_is *is)
156 for (i = 0; i < ISS_GATE_CLKS_MAX; i++) {
157 if (!IS_ERR(is->clocks[i])) {
158 clk_disable_unprepare(is->clocks[i]);
159 pr_debug("disabled clock: %s\n", fimc_is_clocks[i]);
164 static int fimc_is_parse_sensor_config(struct fimc_is *is, unsigned int index,
165 struct device_node *node)
167 struct fimc_is_sensor *sensor = &is->sensor[index];
171 sensor->drvdata = fimc_is_sensor_get_drvdata(node);
172 if (!sensor->drvdata) {
173 dev_err(&is->pdev->dev, "no driver data found for: %s\n",
178 node = of_graph_get_next_endpoint(node, NULL);
182 node = of_graph_get_remote_port(node);
186 /* Use MIPI-CSIS channel id to determine the ISP I2C bus index. */
187 ret = of_property_read_u32(node, "reg", &tmp);
189 dev_err(&is->pdev->dev, "reg property not found at: %s\n",
194 sensor->i2c_bus = tmp - FIMC_INPUT_MIPI_CSI2_0;
198 static int fimc_is_register_subdevs(struct fimc_is *is)
200 struct device_node *i2c_bus, *child;
203 ret = fimc_isp_subdev_create(&is->isp);
207 /* Initialize memory allocator context for the ISP DMA. */
208 is->isp.alloc_ctx = is->alloc_ctx;
210 for_each_compatible_node(i2c_bus, NULL, FIMC_IS_I2C_COMPATIBLE) {
211 for_each_available_child_of_node(i2c_bus, child) {
212 ret = fimc_is_parse_sensor_config(is, index, child);
214 if (ret < 0 || index >= FIMC_IS_SENSORS_NUM) {
224 static int fimc_is_unregister_subdevs(struct fimc_is *is)
226 fimc_isp_subdev_destroy(&is->isp);
230 static int fimc_is_load_setfile(struct fimc_is *is, char *file_name)
232 const struct firmware *fw;
236 ret = request_firmware(&fw, file_name, &is->pdev->dev);
238 dev_err(&is->pdev->dev, "firmware request failed (%d)\n", ret);
241 buf = is->memory.vaddr + is->setfile.base;
242 memcpy(buf, fw->data, fw->size);
243 fimc_is_mem_barrier();
244 is->setfile.size = fw->size;
246 pr_debug("mem vaddr: %p, setfile buf: %p\n", is->memory.vaddr, buf);
248 memcpy(is->fw.setfile_info,
249 fw->data + fw->size - FIMC_IS_SETFILE_INFO_LEN,
250 FIMC_IS_SETFILE_INFO_LEN - 1);
252 is->fw.setfile_info[FIMC_IS_SETFILE_INFO_LEN - 1] = '\0';
253 is->setfile.state = 1;
255 pr_debug("FIMC-IS setfile loaded: base: %#x, size: %zu B\n",
256 is->setfile.base, fw->size);
258 release_firmware(fw);
262 int fimc_is_cpu_set_power(struct fimc_is *is, int on)
264 unsigned int timeout = FIMC_IS_POWER_ON_TIMEOUT;
267 /* Disable watchdog */
268 mcuctl_write(0, is, REG_WDT_ISP);
270 /* Cortex-A5 start address setting */
271 mcuctl_write(is->memory.paddr, is, MCUCTL_REG_BBOAR);
273 /* Enable and start Cortex-A5 */
274 pmuisp_write(0x18000, is, REG_PMU_ISP_ARM_OPTION);
275 pmuisp_write(0x1, is, REG_PMU_ISP_ARM_CONFIGURATION);
278 pmuisp_write(0x10000, is, REG_PMU_ISP_ARM_OPTION);
279 pmuisp_write(0x0, is, REG_PMU_ISP_ARM_CONFIGURATION);
281 while (pmuisp_read(is, REG_PMU_ISP_ARM_STATUS) & 1) {
292 /* Wait until @bit of @is->state is set to @state in the interrupt handler. */
293 int fimc_is_wait_event(struct fimc_is *is, unsigned long bit,
294 unsigned int state, unsigned int timeout)
297 int ret = wait_event_timeout(is->irq_queue,
298 !state ^ test_bit(bit, &is->state),
301 dev_WARN(&is->pdev->dev, "%s() timed out\n", __func__);
307 int fimc_is_start_firmware(struct fimc_is *is)
309 struct device *dev = &is->pdev->dev;
312 if (is->fw.f_w == NULL) {
313 dev_err(dev, "firmware is not loaded\n");
317 memcpy(is->memory.vaddr, is->fw.f_w->data, is->fw.f_w->size);
320 ret = fimc_is_cpu_set_power(is, 1);
324 ret = fimc_is_wait_event(is, IS_ST_A5_PWR_ON, 1,
325 msecs_to_jiffies(FIMC_IS_FW_LOAD_TIMEOUT));
327 dev_err(dev, "FIMC-IS CPU power on failed\n");
332 /* Allocate working memory for the FIMC-IS CPU. */
333 static int fimc_is_alloc_cpu_memory(struct fimc_is *is)
335 struct device *dev = &is->pdev->dev;
337 is->memory.vaddr = dma_alloc_coherent(dev, FIMC_IS_CPU_MEM_SIZE,
338 &is->memory.paddr, GFP_KERNEL);
339 if (is->memory.vaddr == NULL)
342 is->memory.size = FIMC_IS_CPU_MEM_SIZE;
343 memset(is->memory.vaddr, 0, is->memory.size);
345 dev_info(dev, "FIMC-IS CPU memory base: %#x\n", (u32)is->memory.paddr);
347 if (((u32)is->memory.paddr) & FIMC_IS_FW_ADDR_MASK) {
348 dev_err(dev, "invalid firmware memory alignment: %#x\n",
349 (u32)is->memory.paddr);
350 dma_free_coherent(dev, is->memory.size, is->memory.vaddr,
355 is->is_p_region = (struct is_region *)(is->memory.vaddr +
356 FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE);
358 is->is_dma_p_region = is->memory.paddr +
359 FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE;
361 is->is_shared_region = (struct is_share_region *)(is->memory.vaddr +
362 FIMC_IS_SHARED_REGION_OFFSET);
366 static void fimc_is_free_cpu_memory(struct fimc_is *is)
368 struct device *dev = &is->pdev->dev;
370 if (is->memory.vaddr == NULL)
373 dma_free_coherent(dev, is->memory.size, is->memory.vaddr,
377 static void fimc_is_load_firmware(const struct firmware *fw, void *context)
379 struct fimc_is *is = context;
380 struct device *dev = &is->pdev->dev;
385 dev_err(dev, "firmware request failed\n");
388 mutex_lock(&is->lock);
390 if (fw->size < FIMC_IS_FW_SIZE_MIN || fw->size > FIMC_IS_FW_SIZE_MAX) {
391 dev_err(dev, "wrong firmware size: %d\n", fw->size);
395 is->fw.size = fw->size;
397 ret = fimc_is_alloc_cpu_memory(is);
399 dev_err(dev, "failed to allocate FIMC-IS CPU memory\n");
403 memcpy(is->memory.vaddr, fw->data, fw->size);
406 /* Read firmware description. */
407 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_DESC_LEN);
408 memcpy(&is->fw.info, buf, FIMC_IS_FW_INFO_LEN);
409 is->fw.info[FIMC_IS_FW_INFO_LEN] = 0;
411 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_VER_LEN);
412 memcpy(&is->fw.version, buf, FIMC_IS_FW_VER_LEN);
413 is->fw.version[FIMC_IS_FW_VER_LEN - 1] = 0;
417 dev_info(dev, "loaded firmware: %s, rev. %s\n",
418 is->fw.info, is->fw.version);
419 dev_dbg(dev, "FW size: %d, paddr: %#x\n", fw->size, is->memory.paddr);
421 is->is_shared_region->chip_id = 0xe4412;
422 is->is_shared_region->chip_rev_no = 1;
424 fimc_is_mem_barrier();
427 * FIXME: The firmware is not being released for now, as it is
428 * needed around for copying to the IS working memory every
429 * time before the Cortex-A5 is restarted.
432 release_firmware(is->fw.f_w);
435 mutex_unlock(&is->lock);
438 static int fimc_is_request_firmware(struct fimc_is *is, const char *fw_name)
440 return request_firmware_nowait(THIS_MODULE,
441 FW_ACTION_HOTPLUG, fw_name, &is->pdev->dev,
442 GFP_KERNEL, is, fimc_is_load_firmware);
445 /* General IS interrupt handler */
446 static void fimc_is_general_irq_handler(struct fimc_is *is)
448 is->i2h_cmd.cmd = mcuctl_read(is, MCUCTL_REG_ISSR(10));
450 switch (is->i2h_cmd.cmd) {
451 case IHC_GET_SENSOR_NUM:
452 fimc_is_hw_get_params(is, 1);
453 fimc_is_hw_wait_intmsr0_intmsd0(is);
454 fimc_is_hw_set_sensor_num(is);
455 pr_debug("ISP FW version: %#x\n", is->i2h_cmd.args[0]);
457 case IHC_SET_FACE_MARK:
459 fimc_is_hw_get_params(is, 2);
461 case IHC_SET_SHOT_MARK:
464 fimc_is_hw_get_params(is, 3);
466 case IH_REPLY_NOT_DONE:
467 fimc_is_hw_get_params(is, 4);
472 pr_info("unknown command: %#x\n", is->i2h_cmd.cmd);
475 fimc_is_fw_clear_irq1(is, FIMC_IS_INT_GENERAL);
477 switch (is->i2h_cmd.cmd) {
478 case IHC_GET_SENSOR_NUM:
479 fimc_is_hw_set_intgr0_gd0(is);
480 set_bit(IS_ST_A5_PWR_ON, &is->state);
483 case IHC_SET_SHOT_MARK:
486 case IHC_SET_FACE_MARK:
487 is->fd_header.count = is->i2h_cmd.args[0];
488 is->fd_header.index = is->i2h_cmd.args[1];
489 is->fd_header.offset = 0;
496 pr_debug("AA_DONE - %d, %d, %d\n", is->i2h_cmd.args[0],
497 is->i2h_cmd.args[1], is->i2h_cmd.args[2]);
501 pr_debug("ISR_DONE: args[0]: %#x\n", is->i2h_cmd.args[0]);
503 switch (is->i2h_cmd.args[0]) {
504 case HIC_PREVIEW_STILL...HIC_CAPTURE_VIDEO:
506 set_bit(IS_ST_CHANGE_MODE, &is->state);
507 is->isp.cac_margin_x = is->i2h_cmd.args[1];
508 is->isp.cac_margin_y = is->i2h_cmd.args[2];
509 pr_debug("CAC margin (x,y): (%d,%d)\n",
510 is->isp.cac_margin_x, is->isp.cac_margin_y);
514 clear_bit(IS_ST_STREAM_OFF, &is->state);
515 set_bit(IS_ST_STREAM_ON, &is->state);
519 clear_bit(IS_ST_STREAM_ON, &is->state);
520 set_bit(IS_ST_STREAM_OFF, &is->state);
523 case HIC_SET_PARAMETER:
524 is->config[is->config_index].p_region_index[0] = 0;
525 is->config[is->config_index].p_region_index[1] = 0;
526 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state);
527 pr_debug("HIC_SET_PARAMETER\n");
530 case HIC_GET_PARAMETER:
539 case HIC_OPEN_SENSOR:
540 set_bit(IS_ST_OPEN_SENSOR, &is->state);
541 pr_debug("data lanes: %d, settle line: %d\n",
542 is->i2h_cmd.args[2], is->i2h_cmd.args[1]);
545 case HIC_CLOSE_SENSOR:
546 clear_bit(IS_ST_OPEN_SENSOR, &is->state);
547 is->sensor_index = 0;
551 pr_debug("config MSG level completed\n");
555 clear_bit(IS_ST_PWR_SUBIP_ON, &is->state);
558 case HIC_GET_SET_FILE_ADDR:
559 is->setfile.base = is->i2h_cmd.args[1];
560 set_bit(IS_ST_SETFILE_LOADED, &is->state);
563 case HIC_LOAD_SET_FILE:
564 set_bit(IS_ST_SETFILE_LOADED, &is->state);
569 case IH_REPLY_NOT_DONE:
570 pr_err("ISR_NDONE: %d: %#x, %s\n", is->i2h_cmd.args[0],
572 fimc_is_strerr(is->i2h_cmd.args[1]));
574 if (is->i2h_cmd.args[1] & IS_ERROR_TIME_OUT_FLAG)
575 pr_err("IS_ERROR_TIME_OUT\n");
577 switch (is->i2h_cmd.args[1]) {
578 case IS_ERROR_SET_PARAMETER:
579 fimc_is_mem_barrier();
582 switch (is->i2h_cmd.args[0]) {
583 case HIC_SET_PARAMETER:
584 is->config[is->config_index].p_region_index[0] = 0;
585 is->config[is->config_index].p_region_index[1] = 0;
586 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state);
592 pr_err("IS control sequence error: Not Ready\n");
596 wake_up(&is->irq_queue);
599 static irqreturn_t fimc_is_irq_handler(int irq, void *priv)
601 struct fimc_is *is = priv;
605 spin_lock_irqsave(&is->slock, flags);
606 status = mcuctl_read(is, MCUCTL_REG_INTSR1);
608 if (status & (1UL << FIMC_IS_INT_GENERAL))
609 fimc_is_general_irq_handler(is);
611 if (status & (1UL << FIMC_IS_INT_FRAME_DONE_ISP))
612 fimc_isp_irq_handler(is);
614 spin_unlock_irqrestore(&is->slock, flags);
618 static int fimc_is_hw_open_sensor(struct fimc_is *is,
619 struct fimc_is_sensor *sensor)
621 struct sensor_open_extended *soe = (void *)&is->is_p_region->shared;
623 fimc_is_hw_wait_intmsr0_intmsd0(is);
625 soe->self_calibration_mode = 1;
626 soe->actuator_type = 0;
627 soe->mipi_lane_num = 0;
630 soe->fast_open_sensor = 0;
631 soe->i2c_sclk = 88000000;
633 fimc_is_mem_barrier();
635 mcuctl_write(HIC_OPEN_SENSOR, is, MCUCTL_REG_ISSR(0));
636 mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
637 mcuctl_write(sensor->drvdata->id, is, MCUCTL_REG_ISSR(2));
638 mcuctl_write(sensor->i2c_bus, is, MCUCTL_REG_ISSR(3));
639 mcuctl_write(is->is_dma_p_region, is, MCUCTL_REG_ISSR(4));
641 fimc_is_hw_set_intgr0_gd0(is);
643 return fimc_is_wait_event(is, IS_ST_OPEN_SENSOR, 1,
644 sensor->drvdata->open_timeout);
648 int fimc_is_hw_initialize(struct fimc_is *is)
650 const int config_ids[] = {
651 IS_SC_PREVIEW_STILL, IS_SC_PREVIEW_VIDEO,
652 IS_SC_CAPTURE_STILL, IS_SC_CAPTURE_VIDEO
654 struct device *dev = &is->pdev->dev;
658 /* Sensor initialization. Only one sensor is currently supported. */
659 ret = fimc_is_hw_open_sensor(is, &is->sensor[0]);
663 /* Get the setfile address. */
664 fimc_is_hw_get_setfile_addr(is);
666 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1,
667 FIMC_IS_CONFIG_TIMEOUT);
669 dev_err(dev, "get setfile address timed out\n");
672 pr_debug("setfile.base: %#x\n", is->setfile.base);
674 /* Load the setfile. */
675 fimc_is_load_setfile(is, FIMC_IS_SETFILE_6A3);
676 clear_bit(IS_ST_SETFILE_LOADED, &is->state);
677 fimc_is_hw_load_setfile(is);
678 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1,
679 FIMC_IS_CONFIG_TIMEOUT);
681 dev_err(dev, "loading setfile timed out\n");
685 pr_debug("setfile: base: %#x, size: %d\n",
686 is->setfile.base, is->setfile.size);
687 pr_info("FIMC-IS Setfile info: %s\n", is->fw.setfile_info);
689 /* Check magic number. */
690 if (is->is_p_region->shared[MAX_SHARED_COUNT - 1] !=
691 FIMC_IS_MAGIC_NUMBER) {
692 dev_err(dev, "magic number error!\n");
696 pr_debug("shared region: %#x, parameter region: %#x\n",
697 is->memory.paddr + FIMC_IS_SHARED_REGION_OFFSET,
698 is->is_dma_p_region);
700 is->setfile.sub_index = 0;
703 fimc_is_hw_stream_off(is);
704 ret = fimc_is_wait_event(is, IS_ST_STREAM_OFF, 1,
705 FIMC_IS_CONFIG_TIMEOUT);
707 dev_err(dev, "stream off timeout\n");
711 /* Preserve previous mode. */
712 prev_id = is->config_index;
714 /* Set initial parameter values. */
715 for (i = 0; i < ARRAY_SIZE(config_ids); i++) {
716 is->config_index = config_ids[i];
717 fimc_is_set_initial_params(is);
718 ret = fimc_is_itf_s_param(is, true);
720 is->config_index = prev_id;
724 is->config_index = prev_id;
726 set_bit(IS_ST_INIT_DONE, &is->state);
727 dev_info(dev, "initialization sequence completed (%d)\n",
732 static int fimc_is_log_show(struct seq_file *s, void *data)
734 struct fimc_is *is = s->private;
735 const u8 *buf = is->memory.vaddr + FIMC_IS_DEBUG_REGION_OFFSET;
737 if (is->memory.vaddr == NULL) {
738 dev_err(&is->pdev->dev, "firmware memory is not initialized\n");
742 seq_printf(s, "%s\n", buf);
746 static int fimc_is_debugfs_open(struct inode *inode, struct file *file)
748 return single_open(file, fimc_is_log_show, inode->i_private);
751 static const struct file_operations fimc_is_debugfs_fops = {
752 .open = fimc_is_debugfs_open,
755 .release = single_release,
758 static void fimc_is_debugfs_remove(struct fimc_is *is)
760 debugfs_remove_recursive(is->debugfs_entry);
761 is->debugfs_entry = NULL;
764 static int fimc_is_debugfs_create(struct fimc_is *is)
766 struct dentry *dentry;
768 is->debugfs_entry = debugfs_create_dir("fimc_is", NULL);
770 dentry = debugfs_create_file("fw_log", S_IRUGO, is->debugfs_entry,
771 is, &fimc_is_debugfs_fops);
773 fimc_is_debugfs_remove(is);
775 return is->debugfs_entry == NULL ? -EIO : 0;
778 static int fimc_is_runtime_resume(struct device *dev);
779 static int fimc_is_runtime_suspend(struct device *dev);
781 static int fimc_is_probe(struct platform_device *pdev)
783 struct device *dev = &pdev->dev;
786 struct device_node *node;
789 is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
796 init_waitqueue_head(&is->irq_queue);
797 spin_lock_init(&is->slock);
798 mutex_init(&is->lock);
800 ret = of_address_to_resource(dev->of_node, 0, &res);
804 is->regs = devm_ioremap_resource(dev, &res);
805 if (IS_ERR(is->regs))
806 return PTR_ERR(is->regs);
808 node = of_get_child_by_name(dev->of_node, "pmu");
812 is->pmu_regs = of_iomap(node, 0);
816 is->irq = irq_of_parse_and_map(dev->of_node, 0);
818 dev_err(dev, "no irq found\n");
822 ret = fimc_is_get_clocks(is);
826 platform_set_drvdata(pdev, is);
828 ret = request_irq(is->irq, fimc_is_irq_handler, 0, dev_name(dev), is);
830 dev_err(dev, "irq request failed\n");
833 pm_runtime_enable(dev);
835 if (!pm_runtime_enabled(dev)) {
836 ret = fimc_is_runtime_resume(dev);
841 ret = pm_runtime_get_sync(dev);
845 is->alloc_ctx = vb2_dma_contig_init_ctx(dev);
846 if (IS_ERR(is->alloc_ctx)) {
847 ret = PTR_ERR(is->alloc_ctx);
851 * Register FIMC-IS V4L2 subdevs to this driver. The video nodes
852 * will be created within the subdev's registered() callback.
854 ret = fimc_is_register_subdevs(is);
858 ret = fimc_is_debugfs_create(is);
862 ret = fimc_is_request_firmware(is, FIMC_IS_FW_FILENAME);
866 pm_runtime_put_sync(dev);
868 dev_dbg(dev, "FIMC-IS registered successfully\n");
872 fimc_is_debugfs_remove(is);
874 fimc_is_unregister_subdevs(is);
876 vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
878 if (!pm_runtime_enabled(dev))
879 fimc_is_runtime_suspend(dev);
881 free_irq(is->irq, is);
883 fimc_is_put_clocks(is);
887 static int fimc_is_runtime_resume(struct device *dev)
889 struct fimc_is *is = dev_get_drvdata(dev);
892 ret = fimc_is_setup_clocks(is);
896 return fimc_is_enable_clocks(is);
899 static int fimc_is_runtime_suspend(struct device *dev)
901 struct fimc_is *is = dev_get_drvdata(dev);
903 fimc_is_disable_clocks(is);
907 #ifdef CONFIG_PM_SLEEP
908 static int fimc_is_resume(struct device *dev)
914 static int fimc_is_suspend(struct device *dev)
916 struct fimc_is *is = dev_get_drvdata(dev);
919 if (test_bit(IS_ST_A5_PWR_ON, &is->state))
924 #endif /* CONFIG_PM_SLEEP */
926 static int fimc_is_remove(struct platform_device *pdev)
928 struct device *dev = &pdev->dev;
929 struct fimc_is *is = dev_get_drvdata(dev);
931 pm_runtime_disable(dev);
932 pm_runtime_set_suspended(dev);
933 if (!pm_runtime_status_suspended(dev))
934 fimc_is_runtime_suspend(dev);
935 free_irq(is->irq, is);
936 fimc_is_unregister_subdevs(is);
937 vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
938 fimc_is_put_clocks(is);
939 fimc_is_debugfs_remove(is);
941 release_firmware(is->fw.f_w);
942 fimc_is_free_cpu_memory(is);
947 static const struct of_device_id fimc_is_of_match[] = {
948 { .compatible = "samsung,exynos4212-fimc-is" },
951 MODULE_DEVICE_TABLE(of, fimc_is_of_match);
953 static const struct dev_pm_ops fimc_is_pm_ops = {
954 SET_SYSTEM_SLEEP_PM_OPS(fimc_is_suspend, fimc_is_resume)
955 SET_RUNTIME_PM_OPS(fimc_is_runtime_suspend, fimc_is_runtime_resume,
959 static struct platform_driver fimc_is_driver = {
960 .probe = fimc_is_probe,
961 .remove = fimc_is_remove,
963 .of_match_table = fimc_is_of_match,
964 .name = FIMC_IS_DRV_NAME,
965 .owner = THIS_MODULE,
966 .pm = &fimc_is_pm_ops,
970 static int fimc_is_module_init(void)
974 ret = fimc_is_register_i2c_driver();
978 ret = platform_driver_register(&fimc_is_driver);
981 fimc_is_unregister_i2c_driver();
986 static void fimc_is_module_exit(void)
988 fimc_is_unregister_i2c_driver();
989 platform_driver_unregister(&fimc_is_driver);
992 module_init(fimc_is_module_init);
993 module_exit(fimc_is_module_exit);
995 MODULE_ALIAS("platform:" FIMC_IS_DRV_NAME);
996 MODULE_AUTHOR("Younghwan Joo <yhwan.joo@samsung.com>");
997 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
998 MODULE_LICENSE("GPL v2");