drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/genalloc.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/module.h>
  22 #include <linux/of_device.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/slab.h>
  25 #include <linux/videodev2.h>
  26 #include <linux/of.h>
  27 #include <linux/platform_data/coda.h>
  28
  29 #include <media/v4l2-ctrls.h>
  30 #include <media/v4l2-device.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-mem2mem.h>
  33 #include <media/videobuf2-core.h>
  34 #include <media/videobuf2-dma-contig.h>
  35
  36 #include "coda.h"
  37
  38 #define CODA_NAME               "coda"
  39
  40 #define CODA_MAX_INSTANCES      4
  41
  42 #define CODA_FMO_BUF_SIZE       32
  43 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  45 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  46 #define CODA_ISRAM_SIZE (2048 * 2)
  47 #define CODADX6_IRAM_SIZE       0xb000
  48 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  49
  50 #define CODA_MAX_FRAMEBUFFERS   2
  51
  52 #define MAX_W           720
  53 #define MAX_H           576
  54 #define CODA_MAX_FRAME_SIZE     0x90000
  55 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  56 #define CODA_DEFAULT_GAMMA              4096
  57
  58 #define MIN_W 176
  59 #define MIN_H 144
  60 #define MAX_W 720
  61 #define MAX_H 576
  62
  63 #define S_ALIGN         1 /* multiple of 2 */
  64 #define W_ALIGN         1 /* multiple of 2 */
  65 #define H_ALIGN         1 /* multiple of 2 */
  66
  67 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  68
  69 static int coda_debug;
  70 module_param(coda_debug, int, 0);
  71 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  72
  73 enum {
  74         V4L2_M2M_SRC = 0,
  75         V4L2_M2M_DST = 1,
  76 };
  77
  78 enum coda_fmt_type {
  79         CODA_FMT_ENC,
  80         CODA_FMT_RAW,
  81 };
  82
  83 enum coda_inst_type {
  84         CODA_INST_ENCODER,
  85         CODA_INST_DECODER,
  86 };
  87
  88 enum coda_product {
  89         CODA_DX6 = 0xf001,
  90         CODA_7541 = 0xf012,
  91 };
  92
  93 struct coda_fmt {
  94         char *name;
  95         u32 fourcc;
  96         enum coda_fmt_type type;
  97 };
  98
  99 struct coda_devtype {
 100         char                    *firmware;
 101         enum coda_product       product;
 102         struct coda_fmt         *formats;
 103         unsigned int            num_formats;
 104         size_t                  workbuf_size;
 105 };
 106
 107 /* Per-queue, driver-specific private data */
 108 struct coda_q_data {
 109         unsigned int            width;
 110         unsigned int            height;
 111         unsigned int            sizeimage;
 112         struct coda_fmt *fmt;
 113 };
 114
 115 struct coda_aux_buf {
 116         void                    *vaddr;
 117         dma_addr_t              paddr;
 118         u32                     size;
 119 };
 120
 121 struct coda_dev {
 122         struct v4l2_device      v4l2_dev;
 123         struct video_device     vfd;
 124         struct platform_device  *plat_dev;
 125         const struct coda_devtype *devtype;
 126
 127         void __iomem            *regs_base;
 128         struct clk              *clk_per;
 129         struct clk              *clk_ahb;
 130
 131         struct coda_aux_buf     codebuf;
 132         struct coda_aux_buf     workbuf;
 133         struct gen_pool         *iram_pool;
 134         long unsigned int       iram_vaddr;
 135         long unsigned int       iram_paddr;
 136         unsigned long           iram_size;
 137
 138         spinlock_t              irqlock;
 139         struct mutex            dev_mutex;
 140         struct v4l2_m2m_dev     *m2m_dev;
 141         struct vb2_alloc_ctx    *alloc_ctx;
 142         struct list_head        instances;
 143         unsigned long           instance_mask;
 144         struct delayed_work     timeout;
 145         struct completion       done;
 146 };
 147
 148 struct coda_params {
 149         u8                      rot_mode;
 150         u8                      h264_intra_qp;
 151         u8                      h264_inter_qp;
 152         u8                      mpeg4_intra_qp;
 153         u8                      mpeg4_inter_qp;
 154         u8                      gop_size;
 155         int                     codec_mode;
 156         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 157         u32                     framerate;
 158         u16                     bitrate;
 159         u32                     slice_max_bits;
 160         u32                     slice_max_mb;
 161 };
 162
 163 struct coda_ctx {
 164         struct coda_dev                 *dev;
 165         struct list_head                list;
 166         int                             aborting;
 167         int                             rawstreamon;
 168         int                             compstreamon;
 169         u32                             isequence;
 170         struct coda_q_data              q_data[2];
 171         enum coda_inst_type             inst_type;
 172         enum v4l2_colorspace            colorspace;
 173         struct coda_params              params;
 174         struct v4l2_m2m_ctx             *m2m_ctx;
 175         struct v4l2_ctrl_handler        ctrls;
 176         struct v4l2_fh                  fh;
 177         int                             gopcounter;
 178         char                            vpu_header[3][64];
 179         int                             vpu_header_size[3];
 180         struct coda_aux_buf             parabuf;
 181         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 182         int                             num_internal_frames;
 183         int                             idx;
 184 };
 185
 186 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 187                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 188 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 189
 190 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 191 {
 192         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 193                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 194         writel(data, dev->regs_base + reg);
 195 }
 196
 197 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 198 {
 199         u32 data;
 200         data = readl(dev->regs_base + reg);
 201         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 202                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 203         return data;
 204 }
 205
 206 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 207 {
 208         return coda_read(dev, CODA_REG_BIT_BUSY);
 209 }
 210
 211 static inline int coda_is_initialized(struct coda_dev *dev)
 212 {
 213         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 214 }
 215
 216 static int coda_wait_timeout(struct coda_dev *dev)
 217 {
 218         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 219
 220         while (coda_isbusy(dev)) {
 221                 if (time_after(jiffies, timeout))
 222                         return -ETIMEDOUT;
 223         }
 224         return 0;
 225 }
 226
 227 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 228 {
 229         struct coda_dev *dev = ctx->dev;
 230         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 231
 232         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 233         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 234         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 235 }
 236
 237 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 238 {
 239         struct coda_dev *dev = ctx->dev;
 240
 241         coda_command_async(ctx, cmd);
 242         return coda_wait_timeout(dev);
 243 }
 244
 245 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 246                                          enum v4l2_buf_type type)
 247 {
 248         switch (type) {
 249         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 250                 return &(ctx->q_data[V4L2_M2M_SRC]);
 251         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 252                 return &(ctx->q_data[V4L2_M2M_DST]);
 253         default:
 254                 BUG();
 255         }
 256         return NULL;
 257 }
 258
 259 /*
 260  * Add one array of supported formats for each version of Coda:
 261  *  i.MX27 -> codadx6
 262  *  i.MX51 -> coda7
 263  *  i.MX6  -> coda960
 264  */
 265 static struct coda_fmt codadx6_formats[] = {
 266         {
 267                 .name = "YUV 4:2:0 Planar",
 268                 .fourcc = V4L2_PIX_FMT_YUV420,
 269                 .type = CODA_FMT_RAW,
 270         },
 271         {
 272                 .name = "H264 Encoded Stream",
 273                 .fourcc = V4L2_PIX_FMT_H264,
 274                 .type = CODA_FMT_ENC,
 275         },
 276         {
 277                 .name = "MPEG4 Encoded Stream",
 278                 .fourcc = V4L2_PIX_FMT_MPEG4,
 279                 .type = CODA_FMT_ENC,
 280         },
 281 };
 282
 283 static struct coda_fmt coda7_formats[] = {
 284         {
 285                 .name = "YUV 4:2:0 Planar",
 286                 .fourcc = V4L2_PIX_FMT_YUV420,
 287                 .type = CODA_FMT_RAW,
 288         },
 289         {
 290                 .name = "H264 Encoded Stream",
 291                 .fourcc = V4L2_PIX_FMT_H264,
 292                 .type = CODA_FMT_ENC,
 293         },
 294         {
 295                 .name = "MPEG4 Encoded Stream",
 296                 .fourcc = V4L2_PIX_FMT_MPEG4,
 297                 .type = CODA_FMT_ENC,
 298         },
 299 };
 300
 301 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
 302 {
 303         struct coda_fmt *formats = dev->devtype->formats;
 304         int num_formats = dev->devtype->num_formats;
 305         unsigned int k;
 306
 307         for (k = 0; k < num_formats; k++) {
 308                 if (formats[k].fourcc == f->fmt.pix.pixelformat)
 309                         break;
 310         }
 311
 312         if (k == num_formats)
 313                 return NULL;
 314
 315         return &formats[k];
 316 }
 317
 318 /*
 319  * V4L2 ioctl() operations.
 320  */
 321 static int vidioc_querycap(struct file *file, void *priv,
 322                            struct v4l2_capability *cap)
 323 {
 324         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 325         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 326         strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
 327         /*
 328          * This is only a mem-to-mem video device. The capture and output
 329          * device capability flags are left only for backward compatibility
 330          * and are scheduled for removal.
 331          */
 332         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 333                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 334         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 335
 336         return 0;
 337 }
 338
 339 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 340                         enum coda_fmt_type type)
 341 {
 342         struct coda_ctx *ctx = fh_to_ctx(priv);
 343         struct coda_dev *dev = ctx->dev;
 344         struct coda_fmt *formats = dev->devtype->formats;
 345         struct coda_fmt *fmt;
 346         int num_formats = dev->devtype->num_formats;
 347         int i, num = 0;
 348
 349         for (i = 0; i < num_formats; i++) {
 350                 if (formats[i].type == type) {
 351                         if (num == f->index)
 352                                 break;
 353                         ++num;
 354                 }
 355         }
 356
 357         if (i < num_formats) {
 358                 fmt = &formats[i];
 359                 strlcpy(f->description, fmt->name, sizeof(f->description));
 360                 f->pixelformat = fmt->fourcc;
 361                 return 0;
 362         }
 363
 364         /* Format not found */
 365         return -EINVAL;
 366 }
 367
 368 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 369                                    struct v4l2_fmtdesc *f)
 370 {
 371         return enum_fmt(priv, f, CODA_FMT_ENC);
 372 }
 373
 374 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 375                                    struct v4l2_fmtdesc *f)
 376 {
 377         return enum_fmt(priv, f, CODA_FMT_RAW);
 378 }
 379
 380 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 381 {
 382         struct vb2_queue *vq;
 383         struct coda_q_data *q_data;
 384         struct coda_ctx *ctx = fh_to_ctx(priv);
 385
 386         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 387         if (!vq)
 388                 return -EINVAL;
 389
 390         q_data = get_q_data(ctx, f->type);
 391
 392         f->fmt.pix.field        = V4L2_FIELD_NONE;
 393         f->fmt.pix.pixelformat  = q_data->fmt->fourcc;
 394         f->fmt.pix.width        = q_data->width;
 395         f->fmt.pix.height       = q_data->height;
 396         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
 397                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 398         else /* encoded formats h.264/mpeg4 */
 399                 f->fmt.pix.bytesperline = 0;
 400
 401         f->fmt.pix.sizeimage    = q_data->sizeimage;
 402         f->fmt.pix.colorspace   = ctx->colorspace;
 403
 404         return 0;
 405 }
 406
 407 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
 408 {
 409         enum v4l2_field field;
 410
 411         field = f->fmt.pix.field;
 412         if (field == V4L2_FIELD_ANY)
 413                 field = V4L2_FIELD_NONE;
 414         else if (V4L2_FIELD_NONE != field)
 415                 return -EINVAL;
 416
 417         /* V4L2 specification suggests the driver corrects the format struct
 418          * if any of the dimensions is unsupported */
 419         f->fmt.pix.field = field;
 420
 421         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
 422                 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
 423                                       W_ALIGN, &f->fmt.pix.height,
 424                                       MIN_H, MAX_H, H_ALIGN, S_ALIGN);
 425                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 426                 f->fmt.pix.sizeimage = f->fmt.pix.width *
 427                                         f->fmt.pix.height * 3 / 2;
 428         } else { /*encoded formats h.264/mpeg4 */
 429                 f->fmt.pix.bytesperline = 0;
 430                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 431         }
 432
 433         return 0;
 434 }
 435
 436 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 437                                   struct v4l2_format *f)
 438 {
 439         int ret;
 440         struct coda_fmt *fmt;
 441         struct coda_ctx *ctx = fh_to_ctx(priv);
 442
 443         fmt = find_format(ctx->dev, f);
 444         /*
 445          * Since decoding support is not implemented yet do not allow
 446          * CODA_FMT_RAW formats in the capture interface.
 447          */
 448         if (!fmt || !(fmt->type == CODA_FMT_ENC))
 449                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
 450
 451         f->fmt.pix.colorspace = ctx->colorspace;
 452
 453         ret = vidioc_try_fmt(ctx->dev, f);
 454         if (ret < 0)
 455                 return ret;
 456
 457         return 0;
 458 }
 459
 460 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 461                                   struct v4l2_format *f)
 462 {
 463         struct coda_ctx *ctx = fh_to_ctx(priv);
 464         struct coda_fmt *fmt;
 465         int ret;
 466
 467         fmt = find_format(ctx->dev, f);
 468         /*
 469          * Since decoding support is not implemented yet do not allow
 470          * CODA_FMT formats in the capture interface.
 471          */
 472         if (!fmt || !(fmt->type == CODA_FMT_RAW))
 473                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
 474
 475         if (!f->fmt.pix.colorspace)
 476                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 477
 478         ret = vidioc_try_fmt(ctx->dev, f);
 479         if (ret < 0)
 480                 return ret;
 481
 482         return 0;
 483 }
 484
 485 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 486 {
 487         struct coda_q_data *q_data;
 488         struct vb2_queue *vq;
 489         int ret;
 490
 491         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 492         if (!vq)
 493                 return -EINVAL;
 494
 495         q_data = get_q_data(ctx, f->type);
 496         if (!q_data)
 497                 return -EINVAL;
 498
 499         if (vb2_is_busy(vq)) {
 500                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 501                 return -EBUSY;
 502         }
 503
 504         ret = vidioc_try_fmt(ctx->dev, f);
 505         if (ret)
 506                 return ret;
 507
 508         q_data->fmt = find_format(ctx->dev, f);
 509         q_data->width = f->fmt.pix.width;
 510         q_data->height = f->fmt.pix.height;
 511         q_data->sizeimage = f->fmt.pix.sizeimage;
 512
 513         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 514                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 515                 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
 516
 517         return 0;
 518 }
 519
 520 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 521                                 struct v4l2_format *f)
 522 {
 523         int ret;
 524
 525         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 526         if (ret)
 527                 return ret;
 528
 529         return vidioc_s_fmt(fh_to_ctx(priv), f);
 530 }
 531
 532 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 533                                 struct v4l2_format *f)
 534 {
 535         struct coda_ctx *ctx = fh_to_ctx(priv);
 536         int ret;
 537
 538         ret = vidioc_try_fmt_vid_out(file, priv, f);
 539         if (ret)
 540                 return ret;
 541
 542         ret = vidioc_s_fmt(ctx, f);
 543         if (ret)
 544                 ctx->colorspace = f->fmt.pix.colorspace;
 545
 546         return ret;
 547 }
 548
 549 static int vidioc_reqbufs(struct file *file, void *priv,
 550                           struct v4l2_requestbuffers *reqbufs)
 551 {
 552         struct coda_ctx *ctx = fh_to_ctx(priv);
 553
 554         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 555 }
 556
 557 static int vidioc_querybuf(struct file *file, void *priv,
 558                            struct v4l2_buffer *buf)
 559 {
 560         struct coda_ctx *ctx = fh_to_ctx(priv);
 561
 562         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 563 }
 564
 565 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 566 {
 567         struct coda_ctx *ctx = fh_to_ctx(priv);
 568
 569         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 570 }
 571
 572 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 573 {
 574         struct coda_ctx *ctx = fh_to_ctx(priv);
 575
 576         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 577 }
 578
 579 static int vidioc_streamon(struct file *file, void *priv,
 580                            enum v4l2_buf_type type)
 581 {
 582         struct coda_ctx *ctx = fh_to_ctx(priv);
 583
 584         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 585 }
 586
 587 static int vidioc_streamoff(struct file *file, void *priv,
 588                             enum v4l2_buf_type type)
 589 {
 590         struct coda_ctx *ctx = fh_to_ctx(priv);
 591
 592         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 593 }
 594
 595 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 596         .vidioc_querycap        = vidioc_querycap,
 597
 598         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 599         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 600         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 601         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 602
 603         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 604         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 605         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 606         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 607
 608         .vidioc_reqbufs         = vidioc_reqbufs,
 609         .vidioc_querybuf        = vidioc_querybuf,
 610
 611         .vidioc_qbuf            = vidioc_qbuf,
 612         .vidioc_dqbuf           = vidioc_dqbuf,
 613
 614         .vidioc_streamon        = vidioc_streamon,
 615         .vidioc_streamoff       = vidioc_streamoff,
 616 };
 617
 618 /*
 619  * Mem-to-mem operations.
 620  */
 621 static void coda_device_run(void *m2m_priv)
 622 {
 623         struct coda_ctx *ctx = m2m_priv;
 624         struct coda_q_data *q_data_src, *q_data_dst;
 625         struct vb2_buffer *src_buf, *dst_buf;
 626         struct coda_dev *dev = ctx->dev;
 627         int force_ipicture;
 628         int quant_param = 0;
 629         u32 picture_y, picture_cb, picture_cr;
 630         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 631         u32 dst_fourcc;
 632
 633         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 634         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 635         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 636         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 637         dst_fourcc = q_data_dst->fmt->fourcc;
 638
 639         src_buf->v4l2_buf.sequence = ctx->isequence;
 640         dst_buf->v4l2_buf.sequence = ctx->isequence;
 641         ctx->isequence++;
 642
 643         /*
 644          * Workaround coda firmware BUG that only marks the first
 645          * frame as IDR. This is a problem for some decoders that can't
 646          * recover when a frame is lost.
 647          */
 648         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 649                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 650                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 651         } else {
 652                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 653                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 654         }
 655
 656         /*
 657          * Copy headers at the beginning of the first frame for H.264 only.
 658          * In MPEG4 they are already copied by the coda.
 659          */
 660         if (src_buf->v4l2_buf.sequence == 0) {
 661                 pic_stream_buffer_addr =
 662                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 663                         ctx->vpu_header_size[0] +
 664                         ctx->vpu_header_size[1] +
 665                         ctx->vpu_header_size[2];
 666                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 667                         ctx->vpu_header_size[0] -
 668                         ctx->vpu_header_size[1] -
 669                         ctx->vpu_header_size[2];
 670                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 671                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 672                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 673                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 674                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 675                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 676                         ctx->vpu_header_size[2]);
 677         } else {
 678                 pic_stream_buffer_addr =
 679                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 680                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 681         }
 682
 683         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 684                 force_ipicture = 1;
 685                 switch (dst_fourcc) {
 686                 case V4L2_PIX_FMT_H264:
 687                         quant_param = ctx->params.h264_intra_qp;
 688                         break;
 689                 case V4L2_PIX_FMT_MPEG4:
 690                         quant_param = ctx->params.mpeg4_intra_qp;
 691                         break;
 692                 default:
 693                         v4l2_warn(&ctx->dev->v4l2_dev,
 694                                 "cannot set intra qp, fmt not supported\n");
 695                         break;
 696                 }
 697         } else {
 698                 force_ipicture = 0;
 699                 switch (dst_fourcc) {
 700                 case V4L2_PIX_FMT_H264:
 701                         quant_param = ctx->params.h264_inter_qp;
 702                         break;
 703                 case V4L2_PIX_FMT_MPEG4:
 704                         quant_param = ctx->params.mpeg4_inter_qp;
 705                         break;
 706                 default:
 707                         v4l2_warn(&ctx->dev->v4l2_dev,
 708                                 "cannot set inter qp, fmt not supported\n");
 709                         break;
 710                 }
 711         }
 712
 713         /* submit */
 714         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
 715         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 716
 717
 718         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 719         picture_cb = picture_y + q_data_src->width * q_data_src->height;
 720         picture_cr = picture_cb + q_data_src->width / 2 *
 721                         q_data_src->height / 2;
 722
 723         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 724         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 725         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 726         coda_write(dev, force_ipicture << 1 & 0x2,
 727                    CODA_CMD_ENC_PIC_OPTION);
 728
 729         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 730         coda_write(dev, pic_stream_buffer_size / 1024,
 731                    CODA_CMD_ENC_PIC_BB_SIZE);
 732
 733         if (dev->devtype->product == CODA_7541) {
 734                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 735                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 736                                 CODA7_REG_BIT_AXI_SRAM_USE);
 737         }
 738
 739         /* 1 second timeout in case CODA locks up */
 740         schedule_delayed_work(&dev->timeout, HZ);
 741
 742         INIT_COMPLETION(dev->done);
 743         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 744 }
 745
 746 static int coda_job_ready(void *m2m_priv)
 747 {
 748         struct coda_ctx *ctx = m2m_priv;
 749
 750         /*
 751          * For both 'P' and 'key' frame cases 1 picture
 752          * and 1 frame are needed.
 753          */
 754         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 755                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 756                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 757                          "not ready: not enough video buffers.\n");
 758                 return 0;
 759         }
 760
 761         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 762                         "job ready\n");
 763         return 1;
 764 }
 765
 766 static void coda_job_abort(void *priv)
 767 {
 768         struct coda_ctx *ctx = priv;
 769         struct coda_dev *dev = ctx->dev;
 770
 771         ctx->aborting = 1;
 772
 773         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 774                  "Aborting task\n");
 775
 776         v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
 777 }
 778
 779 static void coda_lock(void *m2m_priv)
 780 {
 781         struct coda_ctx *ctx = m2m_priv;
 782         struct coda_dev *pcdev = ctx->dev;
 783         mutex_lock(&pcdev->dev_mutex);
 784 }
 785
 786 static void coda_unlock(void *m2m_priv)
 787 {
 788         struct coda_ctx *ctx = m2m_priv;
 789         struct coda_dev *pcdev = ctx->dev;
 790         mutex_unlock(&pcdev->dev_mutex);
 791 }
 792
 793 static struct v4l2_m2m_ops coda_m2m_ops = {
 794         .device_run     = coda_device_run,
 795         .job_ready      = coda_job_ready,
 796         .job_abort      = coda_job_abort,
 797         .lock           = coda_lock,
 798         .unlock         = coda_unlock,
 799 };
 800
 801 static void set_default_params(struct coda_ctx *ctx)
 802 {
 803         struct coda_dev *dev = ctx->dev;
 804
 805         ctx->params.codec_mode = CODA_MODE_INVALID;
 806         ctx->colorspace = V4L2_COLORSPACE_REC709;
 807         ctx->params.framerate = 30;
 808         ctx->aborting = 0;
 809
 810         /* Default formats for output and input queues */
 811         ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
 812         ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
 813         ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
 814         ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
 815         ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
 816         ctx->q_data[V4L2_M2M_DST].width = MAX_W;
 817         ctx->q_data[V4L2_M2M_DST].height = MAX_H;
 818         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 819 }
 820
 821 /*
 822  * Queue operations
 823  */
 824 static int coda_queue_setup(struct vb2_queue *vq,
 825                                 const struct v4l2_format *fmt,
 826                                 unsigned int *nbuffers, unsigned int *nplanes,
 827                                 unsigned int sizes[], void *alloc_ctxs[])
 828 {
 829         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 830         struct coda_q_data *q_data;
 831         unsigned int size;
 832
 833         q_data = get_q_data(ctx, vq->type);
 834         size = q_data->sizeimage;
 835
 836         *nplanes = 1;
 837         sizes[0] = size;
 838
 839         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 840
 841         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 842                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 843
 844         return 0;
 845 }
 846
 847 static int coda_buf_prepare(struct vb2_buffer *vb)
 848 {
 849         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 850         struct coda_q_data *q_data;
 851
 852         q_data = get_q_data(ctx, vb->vb2_queue->type);
 853
 854         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 855                 v4l2_warn(&ctx->dev->v4l2_dev,
 856                           "%s data will not fit into plane (%lu < %lu)\n",
 857                           __func__, vb2_plane_size(vb, 0),
 858                           (long)q_data->sizeimage);
 859                 return -EINVAL;
 860         }
 861
 862         vb2_set_plane_payload(vb, 0, q_data->sizeimage);
 863
 864         return 0;
 865 }
 866
 867 static void coda_buf_queue(struct vb2_buffer *vb)
 868 {
 869         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 870         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 871 }
 872
 873 static void coda_wait_prepare(struct vb2_queue *q)
 874 {
 875         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 876         coda_unlock(ctx);
 877 }
 878
 879 static void coda_wait_finish(struct vb2_queue *q)
 880 {
 881         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 882         coda_lock(ctx);
 883 }
 884
 885 static void coda_free_framebuffers(struct coda_ctx *ctx)
 886 {
 887         int i;
 888
 889         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 890                 if (ctx->internal_frames[i].vaddr) {
 891                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 892                                 ctx->internal_frames[i].size,
 893                                 ctx->internal_frames[i].vaddr,
 894                                 ctx->internal_frames[i].paddr);
 895                         ctx->internal_frames[i].vaddr = NULL;
 896                 }
 897         }
 898 }
 899
 900 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 901 {
 902         struct coda_dev *dev = ctx->dev;
 903
 904         int height = q_data->height;
 905         int width = q_data->width;
 906         u32 *p;
 907         int i;
 908
 909         /* Allocate frame buffers */
 910         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 911         for (i = 0; i < ctx->num_internal_frames; i++) {
 912                 ctx->internal_frames[i].size = q_data->sizeimage;
 913                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 914                         ctx->internal_frames[i].size += width / 2 * height / 2;
 915                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 916                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 917                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
 918                 if (!ctx->internal_frames[i].vaddr) {
 919                         coda_free_framebuffers(ctx);
 920                         return -ENOMEM;
 921                 }
 922         }
 923
 924         /* Register frame buffers in the parameter buffer */
 925         p = ctx->parabuf.vaddr;
 926
 927         if (dev->devtype->product == CODA_DX6) {
 928                 for (i = 0; i < ctx->num_internal_frames; i++) {
 929                         p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
 930                         p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
 931                         p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
 932                 }
 933         } else {
 934                 for (i = 0; i < ctx->num_internal_frames; i += 2) {
 935                         p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
 936                         p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
 937                         p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
 938
 939                         if (fourcc == V4L2_PIX_FMT_H264)
 940                                 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
 941
 942                         if (i + 1 < ctx->num_internal_frames) {
 943                                 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
 944                                 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
 945                                 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
 946
 947                                 if (fourcc == V4L2_PIX_FMT_H264)
 948                                         p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
 949                         }
 950                 }
 951         }
 952
 953         return 0;
 954 }
 955
 956 static int coda_h264_padding(int size, char *p)
 957 {
 958         int nal_size;
 959         int diff;
 960
 961         diff = size - (size & ~0x7);
 962         if (diff == 0)
 963                 return 0;
 964
 965         nal_size = coda_filler_size[diff];
 966         memcpy(p, coda_filler_nal, nal_size);
 967
 968         /* Add rbsp stop bit and trailing at the end */
 969         *(p + nal_size - 1) = 0x80;
 970
 971         return nal_size;
 972 }
 973
 974 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
 975 {
 976         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 977         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
 978         u32 bitstream_buf, bitstream_size;
 979         struct coda_dev *dev = ctx->dev;
 980         struct coda_q_data *q_data_src, *q_data_dst;
 981         struct vb2_buffer *buf;
 982         u32 dst_fourcc;
 983         u32 value;
 984         int ret;
 985
 986         if (count < 1)
 987                 return -EINVAL;
 988
 989         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 990                 ctx->rawstreamon = 1;
 991         else
 992                 ctx->compstreamon = 1;
 993
 994         /* Don't start the coda unless both queues are on */
 995         if (!(ctx->rawstreamon & ctx->compstreamon))
 996                 return 0;
 997
 998         if (coda_isbusy(dev))
 999                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
1000                         return -EBUSY;
1001
1002         ctx->gopcounter = ctx->params.gop_size - 1;
1003
1004         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1005         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1006         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1007         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1008         bitstream_size = q_data_dst->sizeimage;
1009         dst_fourcc = q_data_dst->fmt->fourcc;
1010
1011         /* Find out whether coda must encode or decode */
1012         if (q_data_src->fmt->type == CODA_FMT_RAW &&
1013             q_data_dst->fmt->type == CODA_FMT_ENC) {
1014                 ctx->inst_type = CODA_INST_ENCODER;
1015         } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
1016                    q_data_dst->fmt->type == CODA_FMT_RAW) {
1017                 ctx->inst_type = CODA_INST_DECODER;
1018                 v4l2_err(v4l2_dev, "decoding not supported.\n");
1019                 return -EINVAL;
1020         } else {
1021                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1022                 return -EINVAL;
1023         }
1024
1025         if (!coda_is_initialized(dev)) {
1026                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1027                 return -EFAULT;
1028         }
1029         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1030         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1031         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1032         switch (dev->devtype->product) {
1033         case CODA_DX6:
1034                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1035                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1036                 break;
1037         default:
1038                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1039                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1040         }
1041
1042         if (dev->devtype->product == CODA_DX6) {
1043                 /* Configure the coda */
1044                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1045         }
1046
1047         /* Could set rotation here if needed */
1048         switch (dev->devtype->product) {
1049         case CODA_DX6:
1050                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1051                 break;
1052         default:
1053                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1054         }
1055         value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1056         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1057         coda_write(dev, ctx->params.framerate,
1058                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1059
1060         switch (dst_fourcc) {
1061         case V4L2_PIX_FMT_MPEG4:
1062                 if (dev->devtype->product == CODA_DX6)
1063                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1064                 else
1065                         ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1066
1067                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1068                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1069                 break;
1070         case V4L2_PIX_FMT_H264:
1071                 if (dev->devtype->product == CODA_DX6)
1072                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1073                 else
1074                         ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1075
1076                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1077                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1078                 break;
1079         default:
1080                 v4l2_err(v4l2_dev,
1081                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1082                 return -EINVAL;
1083         }
1084
1085         switch (ctx->params.slice_mode) {
1086         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1087                 value = 0;
1088                 break;
1089         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1090                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1091                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1092                 value |=  1 & CODA_SLICING_MODE_MASK;
1093                 break;
1094         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1095                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1096                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1097                 value |=  1 & CODA_SLICING_MODE_MASK;
1098                 break;
1099         }
1100         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1101         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1102         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1103
1104         if (ctx->params.bitrate) {
1105                 /* Rate control enabled */
1106                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1107                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1108         } else {
1109                 value = 0;
1110         }
1111         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1112
1113         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1114         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1115
1116         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1117         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1118
1119         /* set default gamma */
1120         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1121         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1122
1123         value  = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1124         value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1125         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1126
1127         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1128                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1129                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1130                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1131                 if (dev->devtype->product == CODA_DX6) {
1132                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1133                 } else {
1134                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1135                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1136                 }
1137         }
1138
1139         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1140                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1141                 return -ETIMEDOUT;
1142         }
1143
1144         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1145                 return -EFAULT;
1146
1147         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1148         if (ret < 0)
1149                 return ret;
1150
1151         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1152         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1153         if (dev->devtype->product != CODA_DX6) {
1154                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1155                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1156                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1157                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1158                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1159                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1160         }
1161         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1162                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1163                 return -ETIMEDOUT;
1164         }
1165
1166         /* Save stream headers */
1167         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1168         switch (dst_fourcc) {
1169         case V4L2_PIX_FMT_H264:
1170                 /*
1171                  * Get SPS in the first frame and copy it to an
1172                  * intermediate buffer.
1173                  */
1174                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1175                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1176                 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1177                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1178                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1179                         return -ETIMEDOUT;
1180                 }
1181                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1182                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1183                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1184                        ctx->vpu_header_size[0]);
1185
1186                 /*
1187                  * Get PPS in the first frame and copy it to an
1188                  * intermediate buffer.
1189                  */
1190                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1191                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1192                 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1193                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1194                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1195                         return -ETIMEDOUT;
1196                 }
1197                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1198                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1199                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1200                        ctx->vpu_header_size[1]);
1201                 /*
1202                  * Length of H.264 headers is variable and thus it might not be
1203                  * aligned for the coda to append the encoded frame. In that is
1204                  * the case a filler NAL must be added to header 2.
1205                  */
1206                 ctx->vpu_header_size[2] = coda_h264_padding(
1207                                         (ctx->vpu_header_size[0] +
1208                                          ctx->vpu_header_size[1]),
1209                                          ctx->vpu_header[2]);
1210                 break;
1211         case V4L2_PIX_FMT_MPEG4:
1212                 /*
1213                  * Get VOS in the first frame and copy it to an
1214                  * intermediate buffer
1215                  */
1216                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1217                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1218                 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1219                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1220                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1221                         return -ETIMEDOUT;
1222                 }
1223                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1224                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1225                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1226                        ctx->vpu_header_size[0]);
1227
1228                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1229                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1230                 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1231                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1232                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1233                         return -ETIMEDOUT;
1234                 }
1235                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1236                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1237                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1238                        ctx->vpu_header_size[1]);
1239
1240                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1241                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1242                 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1243                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1244                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1245                         return -ETIMEDOUT;
1246                 }
1247                 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1248                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1249                 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1250                        ctx->vpu_header_size[2]);
1251                 break;
1252         default:
1253                 /* No more formats need to save headers at the moment */
1254                 break;
1255         }
1256
1257         return 0;
1258 }
1259
1260 static int coda_stop_streaming(struct vb2_queue *q)
1261 {
1262         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1263         struct coda_dev *dev = ctx->dev;
1264
1265         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1266                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1267                          "%s: output\n", __func__);
1268                 ctx->rawstreamon = 0;
1269         } else {
1270                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1271                          "%s: capture\n", __func__);
1272                 ctx->compstreamon = 0;
1273         }
1274
1275         /* Don't stop the coda unless both queues are off */
1276         if (ctx->rawstreamon || ctx->compstreamon)
1277                 return 0;
1278
1279         if (coda_isbusy(dev)) {
1280                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1281                         v4l2_warn(&dev->v4l2_dev,
1282                                   "%s: timeout, sending SEQ_END anyway\n", __func__);
1283                 }
1284         }
1285
1286         cancel_delayed_work(&dev->timeout);
1287
1288         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1289                  "%s: sent command 'SEQ_END' to coda\n", __func__);
1290         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1291                 v4l2_err(&dev->v4l2_dev,
1292                          "CODA_COMMAND_SEQ_END failed\n");
1293                 return -ETIMEDOUT;
1294         }
1295
1296         coda_free_framebuffers(ctx);
1297
1298         return 0;
1299 }
1300
1301 static struct vb2_ops coda_qops = {
1302         .queue_setup            = coda_queue_setup,
1303         .buf_prepare            = coda_buf_prepare,
1304         .buf_queue              = coda_buf_queue,
1305         .wait_prepare           = coda_wait_prepare,
1306         .wait_finish            = coda_wait_finish,
1307         .start_streaming        = coda_start_streaming,
1308         .stop_streaming         = coda_stop_streaming,
1309 };
1310
1311 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1312 {
1313         struct coda_ctx *ctx =
1314                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1315
1316         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1317                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1318
1319         switch (ctrl->id) {
1320         case V4L2_CID_HFLIP:
1321                 if (ctrl->val)
1322                         ctx->params.rot_mode |= CODA_MIR_HOR;
1323                 else
1324                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
1325                 break;
1326         case V4L2_CID_VFLIP:
1327                 if (ctrl->val)
1328                         ctx->params.rot_mode |= CODA_MIR_VER;
1329                 else
1330                         ctx->params.rot_mode &= ~CODA_MIR_VER;
1331                 break;
1332         case V4L2_CID_MPEG_VIDEO_BITRATE:
1333                 ctx->params.bitrate = ctrl->val / 1000;
1334                 break;
1335         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1336                 ctx->params.gop_size = ctrl->val;
1337                 break;
1338         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1339                 ctx->params.h264_intra_qp = ctrl->val;
1340                 break;
1341         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1342                 ctx->params.h264_inter_qp = ctrl->val;
1343                 break;
1344         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1345                 ctx->params.mpeg4_intra_qp = ctrl->val;
1346                 break;
1347         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1348                 ctx->params.mpeg4_inter_qp = ctrl->val;
1349                 break;
1350         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1351                 ctx->params.slice_mode = ctrl->val;
1352                 break;
1353         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1354                 ctx->params.slice_max_mb = ctrl->val;
1355                 break;
1356         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1357                 ctx->params.slice_max_bits = ctrl->val * 8;
1358                 break;
1359         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1360                 break;
1361         default:
1362                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1363                         "Invalid control, id=%d, val=%d\n",
1364                         ctrl->id, ctrl->val);
1365                 return -EINVAL;
1366         }
1367
1368         return 0;
1369 }
1370
1371 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1372         .s_ctrl = coda_s_ctrl,
1373 };
1374
1375 static int coda_ctrls_setup(struct coda_ctx *ctx)
1376 {
1377         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1378
1379         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1380                 V4L2_CID_HFLIP, 0, 1, 1, 0);
1381         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1382                 V4L2_CID_VFLIP, 0, 1, 1, 0);
1383         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1384                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1385         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1386                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1387         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1388                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1389         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1390                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1391         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1392                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1393         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1394                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1395         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1396                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1397                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1398                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1399         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1400                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1401         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1402                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
1403         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1404                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1405                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1406                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1407                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1408
1409         if (ctx->ctrls.error) {
1410                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1411                         ctx->ctrls.error);
1412                 return -EINVAL;
1413         }
1414
1415         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1416 }
1417
1418 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1419                       struct vb2_queue *dst_vq)
1420 {
1421         struct coda_ctx *ctx = priv;
1422         int ret;
1423
1424         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1425         src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1426         src_vq->drv_priv = ctx;
1427         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1428         src_vq->ops = &coda_qops;
1429         src_vq->mem_ops = &vb2_dma_contig_memops;
1430         src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1431
1432         ret = vb2_queue_init(src_vq);
1433         if (ret)
1434                 return ret;
1435
1436         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1437         dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1438         dst_vq->drv_priv = ctx;
1439         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1440         dst_vq->ops = &coda_qops;
1441         dst_vq->mem_ops = &vb2_dma_contig_memops;
1442         dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1443
1444         return vb2_queue_init(dst_vq);
1445 }
1446
1447 static int coda_next_free_instance(struct coda_dev *dev)
1448 {
1449         return ffz(dev->instance_mask);
1450 }
1451
1452 static int coda_open(struct file *file)
1453 {
1454         struct coda_dev *dev = video_drvdata(file);
1455         struct coda_ctx *ctx = NULL;
1456         int ret = 0;
1457         int idx;
1458
1459         idx = coda_next_free_instance(dev);
1460         if (idx >= CODA_MAX_INSTANCES)
1461                 return -EBUSY;
1462         set_bit(idx, &dev->instance_mask);
1463
1464         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1465         if (!ctx)
1466                 return -ENOMEM;
1467
1468         v4l2_fh_init(&ctx->fh, video_devdata(file));
1469         file->private_data = &ctx->fh;
1470         v4l2_fh_add(&ctx->fh);
1471         ctx->dev = dev;
1472         ctx->idx = idx;
1473
1474         set_default_params(ctx);
1475         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1476                                          &coda_queue_init);
1477         if (IS_ERR(ctx->m2m_ctx)) {
1478                 int ret = PTR_ERR(ctx->m2m_ctx);
1479
1480                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1481                          __func__, ret);
1482                 goto err;
1483         }
1484         ret = coda_ctrls_setup(ctx);
1485         if (ret) {
1486                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1487                 goto err;
1488         }
1489
1490         ctx->fh.ctrl_handler = &ctx->ctrls;
1491
1492         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1493                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1494         if (!ctx->parabuf.vaddr) {
1495                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1496                 ret = -ENOMEM;
1497                 goto err;
1498         }
1499
1500         coda_lock(ctx);
1501         list_add(&ctx->list, &dev->instances);
1502         coda_unlock(ctx);
1503
1504         clk_prepare_enable(dev->clk_per);
1505         clk_prepare_enable(dev->clk_ahb);
1506
1507         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1508                  ctx->idx, ctx);
1509
1510         return 0;
1511
1512 err:
1513         v4l2_fh_del(&ctx->fh);
1514         v4l2_fh_exit(&ctx->fh);
1515         kfree(ctx);
1516         return ret;
1517 }
1518
1519 static int coda_release(struct file *file)
1520 {
1521         struct coda_dev *dev = video_drvdata(file);
1522         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1523
1524         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1525                  ctx);
1526
1527         coda_lock(ctx);
1528         list_del(&ctx->list);
1529         coda_unlock(ctx);
1530
1531         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1532                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1533         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1534         v4l2_ctrl_handler_free(&ctx->ctrls);
1535         clk_disable_unprepare(dev->clk_per);
1536         clk_disable_unprepare(dev->clk_ahb);
1537         v4l2_fh_del(&ctx->fh);
1538         v4l2_fh_exit(&ctx->fh);
1539         clear_bit(ctx->idx, &dev->instance_mask);
1540         kfree(ctx);
1541
1542         return 0;
1543 }
1544
1545 static unsigned int coda_poll(struct file *file,
1546                                  struct poll_table_struct *wait)
1547 {
1548         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1549         int ret;
1550
1551         coda_lock(ctx);
1552         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1553         coda_unlock(ctx);
1554         return ret;
1555 }
1556
1557 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1558 {
1559         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1560
1561         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1562 }
1563
1564 static const struct v4l2_file_operations coda_fops = {
1565         .owner          = THIS_MODULE,
1566         .open           = coda_open,
1567         .release        = coda_release,
1568         .poll           = coda_poll,
1569         .unlocked_ioctl = video_ioctl2,
1570         .mmap           = coda_mmap,
1571 };
1572
1573 static irqreturn_t coda_irq_handler(int irq, void *data)
1574 {
1575         struct vb2_buffer *src_buf, *dst_buf;
1576         struct coda_dev *dev = data;
1577         u32 wr_ptr, start_ptr;
1578         struct coda_ctx *ctx;
1579
1580         cancel_delayed_work(&dev->timeout);
1581
1582         /* read status register to attend the IRQ */
1583         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1584         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1585                       CODA_REG_BIT_INT_CLEAR);
1586
1587         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1588         if (ctx == NULL) {
1589                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1590                 return IRQ_HANDLED;
1591         }
1592
1593         if (ctx->aborting) {
1594                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1595                          "task has been aborted\n");
1596                 return IRQ_HANDLED;
1597         }
1598
1599         if (coda_isbusy(ctx->dev)) {
1600                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1601                          "coda is still busy!!!!\n");
1602                 return IRQ_NONE;
1603         }
1604
1605         complete(&dev->done);
1606
1607         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1608         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1609
1610         /* Get results from the coda */
1611         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1612         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1613         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1614         /* Calculate bytesused field */
1615         if (dst_buf->v4l2_buf.sequence == 0) {
1616                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1617                                                 ctx->vpu_header_size[0] +
1618                                                 ctx->vpu_header_size[1] +
1619                                                 ctx->vpu_header_size[2];
1620         } else {
1621                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1622         }
1623
1624         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1625                  wr_ptr - start_ptr);
1626
1627         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1628         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1629
1630         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1631                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1632                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1633         } else {
1634                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1635                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1636         }
1637
1638         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1639         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1640
1641         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1642         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1643
1644         ctx->gopcounter--;
1645         if (ctx->gopcounter < 0)
1646                 ctx->gopcounter = ctx->params.gop_size - 1;
1647
1648         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1649                 "job finished: encoding frame (%d) (%s)\n",
1650                 dst_buf->v4l2_buf.sequence,
1651                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1652                 "KEYFRAME" : "PFRAME");
1653
1654         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1655
1656         return IRQ_HANDLED;
1657 }
1658
1659 static void coda_timeout(struct work_struct *work)
1660 {
1661         struct coda_ctx *ctx;
1662         struct coda_dev *dev = container_of(to_delayed_work(work),
1663                                             struct coda_dev, timeout);
1664
1665         if (completion_done(&dev->done))
1666                 return;
1667
1668         complete(&dev->done);
1669
1670         v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1671
1672         mutex_lock(&dev->dev_mutex);
1673         list_for_each_entry(ctx, &dev->instances, list) {
1674                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1675                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1676         }
1677         mutex_unlock(&dev->dev_mutex);
1678 }
1679
1680 static u32 coda_supported_firmwares[] = {
1681         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1682         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1683 };
1684
1685 static bool coda_firmware_supported(u32 vernum)
1686 {
1687         int i;
1688
1689         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1690                 if (vernum == coda_supported_firmwares[i])
1691                         return true;
1692         return false;
1693 }
1694
1695 static char *coda_product_name(int product)
1696 {
1697         static char buf[9];
1698
1699         switch (product) {
1700         case CODA_DX6:
1701                 return "CodaDx6";
1702         case CODA_7541:
1703                 return "CODA7541";
1704         default:
1705                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1706                 return buf;
1707         }
1708 }
1709
1710 static int coda_hw_init(struct coda_dev *dev)
1711 {
1712         u16 product, major, minor, release;
1713         u32 data;
1714         u16 *p;
1715         int i;
1716
1717         clk_prepare_enable(dev->clk_per);
1718         clk_prepare_enable(dev->clk_ahb);
1719
1720         /*
1721          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1722          * The 16-bit chars in the code buffer are in memory access
1723          * order, re-sort them to CODA order for register download.
1724          * Data in this SRAM survives a reboot.
1725          */
1726         p = (u16 *)dev->codebuf.vaddr;
1727         if (dev->devtype->product == CODA_DX6) {
1728                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1729                         data = CODA_DOWN_ADDRESS_SET(i) |
1730                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1731                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1732                 }
1733         } else {
1734                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1735                         data = CODA_DOWN_ADDRESS_SET(i) |
1736                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1737                                                         3 - (i % 4)]);
1738                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1739                 }
1740         }
1741
1742         /* Tell the BIT where to find everything it needs */
1743         coda_write(dev, dev->workbuf.paddr,
1744                       CODA_REG_BIT_WORK_BUF_ADDR);
1745         coda_write(dev, dev->codebuf.paddr,
1746                       CODA_REG_BIT_CODE_BUF_ADDR);
1747         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1748
1749         /* Set default values */
1750         switch (dev->devtype->product) {
1751         case CODA_DX6:
1752                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1753                 break;
1754         default:
1755                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1756         }
1757         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1758
1759         if (dev->devtype->product != CODA_DX6)
1760                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1761
1762         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1763                       CODA_REG_BIT_INT_ENABLE);
1764
1765         /* Reset VPU and start processor */
1766         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1767         data |= CODA_REG_RESET_ENABLE;
1768         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1769         udelay(10);
1770         data &= ~CODA_REG_RESET_ENABLE;
1771         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1772         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1773
1774         /* Load firmware */
1775         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1776         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1777         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1778         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1779         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1780         if (coda_wait_timeout(dev)) {
1781                 clk_disable_unprepare(dev->clk_per);
1782                 clk_disable_unprepare(dev->clk_ahb);
1783                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1784                 return -EIO;
1785         }
1786
1787         /* Check we are compatible with the loaded firmware */
1788         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1789         product = CODA_FIRMWARE_PRODUCT(data);
1790         major = CODA_FIRMWARE_MAJOR(data);
1791         minor = CODA_FIRMWARE_MINOR(data);
1792         release = CODA_FIRMWARE_RELEASE(data);
1793
1794         clk_disable_unprepare(dev->clk_per);
1795         clk_disable_unprepare(dev->clk_ahb);
1796
1797         if (product != dev->devtype->product) {
1798                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1799                          " Version: %u.%u.%u\n",
1800                          coda_product_name(dev->devtype->product),
1801                          coda_product_name(product), major, minor, release);
1802                 return -EINVAL;
1803         }
1804
1805         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1806                   coda_product_name(product));
1807
1808         if (coda_firmware_supported(data)) {
1809                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1810                           major, minor, release);
1811         } else {
1812                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1813                           "%u.%u.%u\n", major, minor, release);
1814         }
1815
1816         return 0;
1817 }
1818
1819 static void coda_fw_callback(const struct firmware *fw, void *context)
1820 {
1821         struct coda_dev *dev = context;
1822         struct platform_device *pdev = dev->plat_dev;
1823         int ret;
1824
1825         if (!fw) {
1826                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1827                 return;
1828         }
1829
1830         /* allocate auxiliary per-device code buffer for the BIT processor */
1831         dev->codebuf.size = fw->size;
1832         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1833                                                     &dev->codebuf.paddr,
1834                                                     GFP_KERNEL);
1835         if (!dev->codebuf.vaddr) {
1836                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1837                 return;
1838         }
1839
1840         /* Copy the whole firmware image to the code buffer */
1841         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1842         release_firmware(fw);
1843
1844         ret = coda_hw_init(dev);
1845         if (ret) {
1846                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1847                 return;
1848         }
1849
1850         dev->vfd.fops   = &coda_fops,
1851         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1852         dev->vfd.release        = video_device_release_empty,
1853         dev->vfd.lock   = &dev->dev_mutex;
1854         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1855         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1856         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1857         video_set_drvdata(&dev->vfd, dev);
1858
1859         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1860         if (IS_ERR(dev->alloc_ctx)) {
1861                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1862                 return;
1863         }
1864
1865         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1866         if (IS_ERR(dev->m2m_dev)) {
1867                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1868                 goto rel_ctx;
1869         }
1870
1871         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1872         if (ret) {
1873                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1874                 goto rel_m2m;
1875         }
1876         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1877                   dev->vfd.num);
1878
1879         return;
1880
1881 rel_m2m:
1882         v4l2_m2m_release(dev->m2m_dev);
1883 rel_ctx:
1884         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1885 }
1886
1887 static int coda_firmware_request(struct coda_dev *dev)
1888 {
1889         char *fw = dev->devtype->firmware;
1890
1891         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1892                 coda_product_name(dev->devtype->product));
1893
1894         return request_firmware_nowait(THIS_MODULE, true,
1895                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1896 }
1897
1898 enum coda_platform {
1899         CODA_IMX27,
1900         CODA_IMX53,
1901 };
1902
1903 static const struct coda_devtype coda_devdata[] = {
1904         [CODA_IMX27] = {
1905                 .firmware    = "v4l-codadx6-imx27.bin",
1906                 .product     = CODA_DX6,
1907                 .formats     = codadx6_formats,
1908                 .num_formats = ARRAY_SIZE(codadx6_formats),
1909         },
1910         [CODA_IMX53] = {
1911                 .firmware    = "v4l-coda7541-imx53.bin",
1912                 .product     = CODA_7541,
1913                 .formats     = coda7_formats,
1914                 .num_formats = ARRAY_SIZE(coda7_formats),
1915         },
1916 };
1917
1918 static struct platform_device_id coda_platform_ids[] = {
1919         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1920         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
1921         { /* sentinel */ }
1922 };
1923 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1924
1925 #ifdef CONFIG_OF
1926 static const struct of_device_id coda_dt_ids[] = {
1927         { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1928         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1929         { /* sentinel */ }
1930 };
1931 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1932 #endif
1933
1934 static int coda_probe(struct platform_device *pdev)
1935 {
1936         const struct of_device_id *of_id =
1937                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1938         const struct platform_device_id *pdev_id;
1939         struct coda_platform_data *pdata = pdev->dev.platform_data;
1940         struct device_node *np = pdev->dev.of_node;
1941         struct gen_pool *pool;
1942         struct coda_dev *dev;
1943         struct resource *res;
1944         int ret, irq;
1945
1946         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1947         if (!dev) {
1948                 dev_err(&pdev->dev, "Not enough memory for %s\n",
1949                         CODA_NAME);
1950                 return -ENOMEM;
1951         }
1952
1953         spin_lock_init(&dev->irqlock);
1954         INIT_LIST_HEAD(&dev->instances);
1955         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
1956         init_completion(&dev->done);
1957         complete(&dev->done);
1958
1959         dev->plat_dev = pdev;
1960         dev->clk_per = devm_clk_get(&pdev->dev, "per");
1961         if (IS_ERR(dev->clk_per)) {
1962                 dev_err(&pdev->dev, "Could not get per clock\n");
1963                 return PTR_ERR(dev->clk_per);
1964         }
1965
1966         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1967         if (IS_ERR(dev->clk_ahb)) {
1968                 dev_err(&pdev->dev, "Could not get ahb clock\n");
1969                 return PTR_ERR(dev->clk_ahb);
1970         }
1971
1972         /* Get  memory for physical registers */
1973         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1974         if (res == NULL) {
1975                 dev_err(&pdev->dev, "failed to get memory region resource\n");
1976                 return -ENOENT;
1977         }
1978
1979         if (devm_request_mem_region(&pdev->dev, res->start,
1980                         resource_size(res), CODA_NAME) == NULL) {
1981                 dev_err(&pdev->dev, "failed to request memory region\n");
1982                 return -ENOENT;
1983         }
1984         dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1985                                       resource_size(res));
1986         if (!dev->regs_base) {
1987                 dev_err(&pdev->dev, "failed to ioremap address region\n");
1988                 return -ENOENT;
1989         }
1990
1991         /* IRQ */
1992         irq = platform_get_irq(pdev, 0);
1993         if (irq < 0) {
1994                 dev_err(&pdev->dev, "failed to get irq resource\n");
1995                 return -ENOENT;
1996         }
1997
1998         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1999                 0, CODA_NAME, dev) < 0) {
2000                 dev_err(&pdev->dev, "failed to request irq\n");
2001                 return -ENOENT;
2002         }
2003
2004         /* Get IRAM pool from device tree or platform data */
2005         pool = of_get_named_gen_pool(np, "iram", 0);
2006         if (!pool && pdata)
2007                 pool = dev_get_gen_pool(pdata->iram_dev);
2008         if (!pool) {
2009                 dev_err(&pdev->dev, "iram pool not available\n");
2010                 return -ENOMEM;
2011         }
2012         dev->iram_pool = pool;
2013
2014         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
2015         if (ret)
2016                 return ret;
2017
2018         mutex_init(&dev->dev_mutex);
2019
2020         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
2021
2022         if (of_id) {
2023                 dev->devtype = of_id->data;
2024         } else if (pdev_id) {
2025                 dev->devtype = &coda_devdata[pdev_id->driver_data];
2026         } else {
2027                 v4l2_device_unregister(&dev->v4l2_dev);
2028                 return -EINVAL;
2029         }
2030
2031         /* allocate auxiliary per-device buffers for the BIT processor */
2032         switch (dev->devtype->product) {
2033         case CODA_DX6:
2034                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
2035                 break;
2036         default:
2037                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
2038         }
2039         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
2040                                                     &dev->workbuf.paddr,
2041                                                     GFP_KERNEL);
2042         if (!dev->workbuf.vaddr) {
2043                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
2044                 v4l2_device_unregister(&dev->v4l2_dev);
2045                 return -ENOMEM;
2046         }
2047
2048         if (dev->devtype->product == CODA_DX6)
2049                 dev->iram_size = CODADX6_IRAM_SIZE;
2050         else
2051                 dev->iram_size = CODA7_IRAM_SIZE;
2052         dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
2053         if (!dev->iram_vaddr) {
2054                 dev_err(&pdev->dev, "unable to alloc iram\n");
2055                 return -ENOMEM;
2056         }
2057         dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
2058                                                 dev->iram_vaddr);
2059
2060         platform_set_drvdata(pdev, dev);
2061
2062         return coda_firmware_request(dev);
2063 }
2064
2065 static int coda_remove(struct platform_device *pdev)
2066 {
2067         struct coda_dev *dev = platform_get_drvdata(pdev);
2068
2069         video_unregister_device(&dev->vfd);
2070         if (dev->m2m_dev)
2071                 v4l2_m2m_release(dev->m2m_dev);
2072         if (dev->alloc_ctx)
2073                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2074         v4l2_device_unregister(&dev->v4l2_dev);
2075         if (dev->iram_vaddr)
2076                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
2077         if (dev->codebuf.vaddr)
2078                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2079                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
2080         if (dev->workbuf.vaddr)
2081                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2082                           dev->workbuf.paddr);
2083         return 0;
2084 }
2085
2086 static struct platform_driver coda_driver = {
2087         .probe  = coda_probe,
2088         .remove = coda_remove,
2089         .driver = {
2090                 .name   = CODA_NAME,
2091                 .owner  = THIS_MODULE,
2092                 .of_match_table = of_match_ptr(coda_dt_ids),
2093         },
2094         .id_table = coda_platform_ids,
2095 };
2096
2097 module_platform_driver(coda_driver);
2098
2099 MODULE_LICENSE("GPL");
2100 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2101 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");