2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/pci.h>
19 #include <linux/i2c.h>
20 #include <linux/kdev_t.h>
21 #include <linux/slab.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-fh.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/tuner.h>
27 #include <media/tveeprom.h>
28 #include <media/videobuf2-dma-sg.h>
29 #include <media/videobuf2-dvb.h>
30 #include <media/rc-core.h>
32 #include "cx23885-reg.h"
33 #include "media/cx2341x.h"
35 #include <linux/mutex.h>
37 #define CX23885_VERSION "0.0.4"
41 #define CX23885_MAXBOARDS 8
43 /* Max number of inputs by card */
44 #define MAX_CX23885_INPUT 8
45 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
47 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
49 #define CX23885_BOARD_NOAUTO UNSET
50 #define CX23885_BOARD_UNKNOWN 0
51 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
52 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
53 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
54 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
55 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
56 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
57 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
58 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
59 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
61 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
62 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
63 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
64 #define CX23885_BOARD_TBS_6920 14
65 #define CX23885_BOARD_TEVII_S470 15
66 #define CX23885_BOARD_DVBWORLD_2005 16
67 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
68 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
69 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
70 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
71 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
72 #define CX23885_BOARD_MYGICA_X8506 22
73 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
74 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
75 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
76 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
77 #define CX23885_BOARD_MYGICA_X8558PRO 27
78 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
79 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
80 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
81 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
82 #define CX23885_BOARD_MPX885 32
83 #define CX23885_BOARD_MYGICA_X8507 33
84 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
85 #define CX23885_BOARD_TEVII_S471 35
86 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
87 #define CX23885_BOARD_PROF_8000 37
88 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38
89 #define CX23885_BOARD_AVERMEDIA_HC81R 39
90 #define CX23885_BOARD_TBS_6981 40
91 #define CX23885_BOARD_TBS_6980 41
92 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
93 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
94 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
96 #define GPIO_0 0x00000001
97 #define GPIO_1 0x00000002
98 #define GPIO_2 0x00000004
99 #define GPIO_3 0x00000008
100 #define GPIO_4 0x00000010
101 #define GPIO_5 0x00000020
102 #define GPIO_6 0x00000040
103 #define GPIO_7 0x00000080
104 #define GPIO_8 0x00000100
105 #define GPIO_9 0x00000200
106 #define GPIO_10 0x00000400
107 #define GPIO_11 0x00000800
108 #define GPIO_12 0x00001000
109 #define GPIO_13 0x00002000
110 #define GPIO_14 0x00004000
111 #define GPIO_15 0x00008000
113 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
114 #define CX23885_NORMS (\
115 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
116 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
117 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
118 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
122 u32 fourcc; /* v4l2 format id */
128 struct cx23885_tvnorm {
136 CX23885_VMUX_COMPOSITE1 = 1,
137 CX23885_VMUX_COMPOSITE2,
138 CX23885_VMUX_COMPOSITE3,
139 CX23885_VMUX_COMPOSITE4,
141 CX23885_VMUX_COMPONENT,
142 CX23885_VMUX_TELEVISION,
149 enum cx23885_src_sel_type {
150 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
151 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
154 struct cx23885_riscmem {
161 /* buffer for one video frame */
162 struct cx23885_buffer {
163 /* common v4l buffer stuff -- must be first */
164 struct vb2_buffer vb;
165 struct list_head queue;
167 /* cx23885 specific */
169 struct cx23885_riscmem risc;
170 struct cx23885_fmt *fmt;
174 struct cx23885_input {
175 enum cx23885_itype type;
178 u32 gpio0, gpio1, gpio2, gpio3;
182 CX23885_MPEG_UNDEFINED = 0,
184 CX23885_ANALOG_VIDEO,
185 CX23885_MPEG_ENCODER,
188 struct cx23885_board {
190 port_t porta, portb, portc;
191 int num_fds_portb, num_fds_portc;
192 unsigned int tuner_type;
193 unsigned int radio_type;
194 unsigned char tuner_addr;
195 unsigned char radio_addr;
196 unsigned int tuner_bus;
198 /* Vendors can and do run the PCIe bridge at different
199 * clock rates, driven physically by crystals on the PCBs.
200 * The core has to accommodate this. This allows the user
201 * to add new boards with new frequencys. The value is
204 * The core framework will default this value based on
205 * current designs, but it can vary.
208 struct cx23885_input input[MAX_CX23885_INPUT];
209 int ci_type; /* for NetUP */
210 /* Force bottom field first during DMA (888 workaround) */
214 struct cx23885_subid {
221 struct cx23885_dev *dev;
226 struct i2c_adapter i2c_adap;
227 struct i2c_client i2c_client;
230 /* 885 registers used for raw addess */
239 struct cx23885_dmaqueue {
240 struct list_head active;
244 struct cx23885_tsport {
245 struct cx23885_dev *dev;
250 struct vb2_dvb_frontends frontends;
253 struct cx23885_dmaqueue mpegq;
269 u32 reg_bd_pkt_status;
271 u32 reg_fifo_ovfl_stat;
278 /* Default register vals */
288 /* Allow a single tsport to have multiple frontends */
290 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
293 /* Workaround for a temp dvb_frontend that the tuner can attached to */
294 struct dvb_frontend analog_fe;
296 int (*set_frontend)(struct dvb_frontend *fe);
299 struct cx23885_kernel_ir {
300 struct cx23885_dev *cx;
307 struct cx23885_audio_buffer {
309 struct cx23885_riscmem risc;
311 struct scatterlist *sglist;
316 struct cx23885_audio_dev {
317 struct cx23885_dev *dev;
321 struct snd_card *card;
327 unsigned int dma_size;
328 unsigned int period_size;
329 unsigned int num_periods;
331 struct cx23885_audio_buffer *buf;
333 struct snd_pcm_substream *substream;
338 struct v4l2_device v4l2_dev;
339 struct v4l2_ctrl_handler ctrl_handler;
343 unsigned char pci_rev, pci_lat;
344 int pci_bus, pci_slot;
348 spinlock_t pci_irqmask_lock; /* protects mask reg too */
351 /* This valud is board specific and is used to configure the
352 * AV core so we see nice clean and stable video and audio. */
355 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
356 struct cx23885_i2c i2c_bus[3];
360 struct mutex gpio_lock;
366 struct cx23885_tsport ts1, ts2;
368 /* sram configuration */
369 struct sram_channel *sram_channels;
372 CX23885_BRIDGE_UNDEFINED = 0,
373 CX23885_BRIDGE_885 = 885,
374 CX23885_BRIDGE_887 = 887,
375 CX23885_BRIDGE_888 = 888,
380 unsigned int audinput; /* Selectable audio input */
383 unsigned int tuner_type;
384 unsigned char tuner_addr;
385 unsigned int tuner_bus;
386 unsigned int radio_type;
387 unsigned char radio_addr;
388 struct v4l2_subdev *sd_cx25840;
389 struct work_struct cx25840_work;
392 struct v4l2_subdev *sd_ir;
393 struct work_struct ir_rx_work;
394 unsigned long ir_rx_notifications;
395 struct work_struct ir_tx_work;
396 unsigned long ir_tx_notifications;
398 struct cx23885_kernel_ir *kernel_ir;
399 atomic_t ir_input_stopping;
403 struct video_device *video_dev;
404 struct video_device *vbi_dev;
407 struct cx23885_fmt *fmt;
408 unsigned int width, height;
411 struct cx23885_dmaqueue vidq;
412 struct vb2_queue vb2_vidq;
413 struct cx23885_dmaqueue vbiq;
414 struct vb2_queue vb2_vbiq;
418 /* MPEG Encoder ONLY settings */
420 struct cx2341x_handler cxhdl;
421 struct video_device *v4l_device;
422 struct vb2_queue vb2_mpegq;
423 struct cx23885_tvnorm encodernorm;
425 /* Analog raw audio */
426 struct cx23885_audio_dev *audio_dev;
430 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
432 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
435 #define call_all(dev, o, f, args...) \
436 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
438 #define CX23885_HW_888_IR (1 << 0)
439 #define CX23885_HW_AV_CORE (1 << 1)
441 #define call_hw(dev, grpid, o, f, args...) \
442 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
444 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
446 #define SRAM_CH01 0 /* Video A */
447 #define SRAM_CH02 1 /* VBI A */
448 #define SRAM_CH03 2 /* Video B */
449 #define SRAM_CH04 3 /* Transport via B */
450 #define SRAM_CH05 4 /* VBI B */
451 #define SRAM_CH06 5 /* Video C */
452 #define SRAM_CH07 6 /* Transport via C */
453 #define SRAM_CH08 7 /* Audio Internal A */
454 #define SRAM_CH09 8 /* Audio Internal B */
455 #define SRAM_CH10 9 /* Audio External */
456 #define SRAM_CH11 10 /* COMB_3D_N */
457 #define SRAM_CH12 11 /* Comb 3D N1 */
458 #define SRAM_CH13 12 /* Comb 3D N2 */
459 #define SRAM_CH14 13 /* MOE Vid */
460 #define SRAM_CH15 14 /* MOE RSLT */
462 struct sram_channel {
476 /* ----------------------------------------------------------- */
478 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
479 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
481 #define cx_andor(reg, mask, value) \
482 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
483 ((value) & (mask)), dev->lmmio+((reg)>>2))
485 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
486 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
488 /* ----------------------------------------------------------- */
491 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
492 struct sram_channel *ch,
493 unsigned int bpl, u32 risc);
495 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
496 struct sram_channel *ch);
498 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
499 struct scatterlist *sglist,
500 unsigned int top_offset, unsigned int bottom_offset,
501 unsigned int bpl, unsigned int padding, unsigned int lines);
503 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
504 struct cx23885_riscmem *risc, struct scatterlist *sglist,
505 unsigned int top_offset, unsigned int bottom_offset,
506 unsigned int bpl, unsigned int padding, unsigned int lines);
508 int cx23885_start_dma(struct cx23885_tsport *port,
509 struct cx23885_dmaqueue *q,
510 struct cx23885_buffer *buf);
511 void cx23885_cancel_buffers(struct cx23885_tsport *port);
514 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
515 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
516 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
517 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
520 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
521 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
522 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
523 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
525 /* ----------------------------------------------------------- */
526 /* cx23885-cards.c */
527 extern struct cx23885_board cx23885_boards[];
528 extern const unsigned int cx23885_bcount;
530 extern struct cx23885_subid cx23885_subids[];
531 extern const unsigned int cx23885_idcount;
533 extern int cx23885_tuner_callback(void *priv, int component,
534 int command, int arg);
535 extern void cx23885_card_list(struct cx23885_dev *dev);
536 extern int cx23885_ir_init(struct cx23885_dev *dev);
537 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
538 extern void cx23885_ir_fini(struct cx23885_dev *dev);
539 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
540 extern void cx23885_card_setup(struct cx23885_dev *dev);
541 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
543 extern int cx23885_dvb_register(struct cx23885_tsport *port);
544 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
546 extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
547 struct cx23885_tsport *port);
548 extern void cx23885_buf_queue(struct cx23885_tsport *port,
549 struct cx23885_buffer *buf);
550 extern void cx23885_free_buffer(struct cx23885_dev *dev,
551 struct cx23885_buffer *buf);
553 /* ----------------------------------------------------------- */
554 /* cx23885-video.c */
556 extern int cx23885_video_register(struct cx23885_dev *dev);
557 extern void cx23885_video_unregister(struct cx23885_dev *dev);
558 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
559 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
560 struct cx23885_dmaqueue *q, u32 count);
561 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
562 int cx23885_set_input(struct file *file, void *priv, unsigned int i);
563 int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
564 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
565 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
567 /* ----------------------------------------------------------- */
569 extern int cx23885_vbi_fmt(struct file *file, void *priv,
570 struct v4l2_format *f);
571 extern void cx23885_vbi_timeout(unsigned long data);
572 extern struct vb2_ops cx23885_vbi_qops;
573 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
576 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
577 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
578 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
580 /* ----------------------------------------------------------- */
582 extern int cx23885_417_register(struct cx23885_dev *dev);
583 extern void cx23885_417_unregister(struct cx23885_dev *dev);
584 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
585 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
586 extern void cx23885_mc417_init(struct cx23885_dev *dev);
587 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
588 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
589 extern int mc417_register_read(struct cx23885_dev *dev,
590 u16 address, u32 *value);
591 extern int mc417_register_write(struct cx23885_dev *dev,
592 u16 address, u32 value);
593 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
594 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
595 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
597 /* ----------------------------------------------------------- */
599 extern struct cx23885_audio_dev *cx23885_audio_register(
600 struct cx23885_dev *dev);
601 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
602 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
603 extern int cx23885_risc_databuffer(struct pci_dev *pci,
604 struct cx23885_riscmem *risc,
605 struct scatterlist *sglist,
610 /* ----------------------------------------------------------- */
613 static inline unsigned int norm_maxw(v4l2_std_id norm)
615 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
618 static inline unsigned int norm_maxh(v4l2_std_id norm)
620 return (norm & V4L2_STD_625_50) ? 576 : 480;
623 static inline unsigned int norm_swidth(v4l2_std_id norm)
625 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;