drivers/media/i2c/adv7604.c

   1 /*
   2  * adv7604 - Analog Devices ADV7604 video decoder driver
   3  *
   4  * Copyright 2012 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
   5  *
   6  * This program is free software; you may redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  11  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  12  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  13  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  14  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  15  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  16  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  17  * SOFTWARE.
  18  *
  19  */
  20
  21 /*
  22  * References (c = chapter, p = page):
  23  * REF_01 - Analog devices, ADV7604, Register Settings Recommendations,
  24  *              Revision 2.5, June 2010
  25  * REF_02 - Analog devices, Register map documentation, Documentation of
  26  *              the register maps, Software manual, Rev. F, June 2010
  27  * REF_03 - Analog devices, ADV7604, Hardware Manual, Rev. F, August 2010
  28  */
  29
  30
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/i2c.h>
  35 #include <linux/delay.h>
  36 #include <linux/videodev2.h>
  37 #include <linux/workqueue.h>
  38 #include <linux/v4l2-dv-timings.h>
  39 #include <media/v4l2-device.h>
  40 #include <media/v4l2-ctrls.h>
  41 #include <media/v4l2-chip-ident.h>
  42 #include <media/adv7604.h>
  43
  44 static int debug;
  45 module_param(debug, int, 0644);
  46 MODULE_PARM_DESC(debug, "debug level (0-2)");
  47
  48 MODULE_DESCRIPTION("Analog Devices ADV7604 video decoder driver");
  49 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com>");
  50 MODULE_AUTHOR("Mats Randgaard <mats.randgaard@cisco.com>");
  51 MODULE_LICENSE("GPL");
  52
  53 /* ADV7604 system clock frequency */
  54 #define ADV7604_fsc (28636360)
  55
  56 #define DIGITAL_INPUT ((state->prim_mode == ADV7604_PRIM_MODE_HDMI_COMP) || \
  57                         (state->prim_mode == ADV7604_PRIM_MODE_HDMI_GR))
  58
  59 /*
  60  **********************************************************************
  61  *
  62  *  Arrays with configuration parameters for the ADV7604
  63  *
  64  **********************************************************************
  65  */
  66 struct adv7604_state {
  67         struct adv7604_platform_data pdata;
  68         struct v4l2_subdev sd;
  69         struct media_pad pad;
  70         struct v4l2_ctrl_handler hdl;
  71         enum adv7604_prim_mode prim_mode;
  72         struct v4l2_dv_timings timings;
  73         u8 edid[256];
  74         unsigned edid_blocks;
  75         struct v4l2_fract aspect_ratio;
  76         u32 rgb_quantization_range;
  77         struct workqueue_struct *work_queues;
  78         struct delayed_work delayed_work_enable_hotplug;
  79         bool connector_hdmi;
  80
  81         /* i2c clients */
  82         struct i2c_client *i2c_avlink;
  83         struct i2c_client *i2c_cec;
  84         struct i2c_client *i2c_infoframe;
  85         struct i2c_client *i2c_esdp;
  86         struct i2c_client *i2c_dpp;
  87         struct i2c_client *i2c_afe;
  88         struct i2c_client *i2c_repeater;
  89         struct i2c_client *i2c_edid;
  90         struct i2c_client *i2c_hdmi;
  91         struct i2c_client *i2c_test;
  92         struct i2c_client *i2c_cp;
  93         struct i2c_client *i2c_vdp;
  94
  95         /* controls */
  96         struct v4l2_ctrl *detect_tx_5v_ctrl;
  97         struct v4l2_ctrl *analog_sampling_phase_ctrl;
  98         struct v4l2_ctrl *free_run_color_manual_ctrl;
  99         struct v4l2_ctrl *free_run_color_ctrl;
 100         struct v4l2_ctrl *rgb_quantization_range_ctrl;
 101 };
 102
 103 /* Supported CEA and DMT timings */
 104 static const struct v4l2_dv_timings adv7604_timings[] = {
 105         V4L2_DV_BT_CEA_720X480P59_94,
 106         V4L2_DV_BT_CEA_720X576P50,
 107         V4L2_DV_BT_CEA_1280X720P24,
 108         V4L2_DV_BT_CEA_1280X720P25,
 109         V4L2_DV_BT_CEA_1280X720P30,
 110         V4L2_DV_BT_CEA_1280X720P50,
 111         V4L2_DV_BT_CEA_1280X720P60,
 112         V4L2_DV_BT_CEA_1920X1080P24,
 113         V4L2_DV_BT_CEA_1920X1080P25,
 114         V4L2_DV_BT_CEA_1920X1080P30,
 115         V4L2_DV_BT_CEA_1920X1080P50,
 116         V4L2_DV_BT_CEA_1920X1080P60,
 117
 118         V4L2_DV_BT_DMT_640X350P85,
 119         V4L2_DV_BT_DMT_640X400P85,
 120         V4L2_DV_BT_DMT_720X400P85,
 121         V4L2_DV_BT_DMT_640X480P60,
 122         V4L2_DV_BT_DMT_640X480P72,
 123         V4L2_DV_BT_DMT_640X480P75,
 124         V4L2_DV_BT_DMT_640X480P85,
 125         V4L2_DV_BT_DMT_800X600P56,
 126         V4L2_DV_BT_DMT_800X600P60,
 127         V4L2_DV_BT_DMT_800X600P72,
 128         V4L2_DV_BT_DMT_800X600P75,
 129         V4L2_DV_BT_DMT_800X600P85,
 130         V4L2_DV_BT_DMT_848X480P60,
 131         V4L2_DV_BT_DMT_1024X768P60,
 132         V4L2_DV_BT_DMT_1024X768P70,
 133         V4L2_DV_BT_DMT_1024X768P75,
 134         V4L2_DV_BT_DMT_1024X768P85,
 135         V4L2_DV_BT_DMT_1152X864P75,
 136         V4L2_DV_BT_DMT_1280X768P60_RB,
 137         V4L2_DV_BT_DMT_1280X768P60,
 138         V4L2_DV_BT_DMT_1280X768P75,
 139         V4L2_DV_BT_DMT_1280X768P85,
 140         V4L2_DV_BT_DMT_1280X800P60_RB,
 141         V4L2_DV_BT_DMT_1280X800P60,
 142         V4L2_DV_BT_DMT_1280X800P75,
 143         V4L2_DV_BT_DMT_1280X800P85,
 144         V4L2_DV_BT_DMT_1280X960P60,
 145         V4L2_DV_BT_DMT_1280X960P85,
 146         V4L2_DV_BT_DMT_1280X1024P60,
 147         V4L2_DV_BT_DMT_1280X1024P75,
 148         V4L2_DV_BT_DMT_1280X1024P85,
 149         V4L2_DV_BT_DMT_1360X768P60,
 150         V4L2_DV_BT_DMT_1400X1050P60_RB,
 151         V4L2_DV_BT_DMT_1400X1050P60,
 152         V4L2_DV_BT_DMT_1400X1050P75,
 153         V4L2_DV_BT_DMT_1400X1050P85,
 154         V4L2_DV_BT_DMT_1440X900P60_RB,
 155         V4L2_DV_BT_DMT_1440X900P60,
 156         V4L2_DV_BT_DMT_1600X1200P60,
 157         V4L2_DV_BT_DMT_1680X1050P60_RB,
 158         V4L2_DV_BT_DMT_1680X1050P60,
 159         V4L2_DV_BT_DMT_1792X1344P60,
 160         V4L2_DV_BT_DMT_1856X1392P60,
 161         V4L2_DV_BT_DMT_1920X1200P60_RB,
 162         V4L2_DV_BT_DMT_1366X768P60,
 163         V4L2_DV_BT_DMT_1920X1080P60,
 164         { },
 165 };
 166
 167 /* ----------------------------------------------------------------------- */
 168
 169 static inline struct adv7604_state *to_state(struct v4l2_subdev *sd)
 170 {
 171         return container_of(sd, struct adv7604_state, sd);
 172 }
 173
 174 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
 175 {
 176         return &container_of(ctrl->handler, struct adv7604_state, hdl)->sd;
 177 }
 178
 179 static inline unsigned hblanking(const struct v4l2_bt_timings *t)
 180 {
 181         return t->hfrontporch + t->hsync + t->hbackporch;
 182 }
 183
 184 static inline unsigned htotal(const struct v4l2_bt_timings *t)
 185 {
 186         return t->width + t->hfrontporch + t->hsync + t->hbackporch;
 187 }
 188
 189 static inline unsigned vblanking(const struct v4l2_bt_timings *t)
 190 {
 191         return t->vfrontporch + t->vsync + t->vbackporch;
 192 }
 193
 194 static inline unsigned vtotal(const struct v4l2_bt_timings *t)
 195 {
 196         return t->height + t->vfrontporch + t->vsync + t->vbackporch;
 197 }
 198
 199 /* ----------------------------------------------------------------------- */
 200
 201 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
 202                 u8 command, bool check)
 203 {
 204         union i2c_smbus_data data;
 205
 206         if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
 207                         I2C_SMBUS_READ, command,
 208                         I2C_SMBUS_BYTE_DATA, &data))
 209                 return data.byte;
 210         if (check)
 211                 v4l_err(client, "error reading %02x, %02x\n",
 212                                 client->addr, command);
 213         return -EIO;
 214 }
 215
 216 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
 217 {
 218         return adv_smbus_read_byte_data_check(client, command, true);
 219 }
 220
 221 static s32 adv_smbus_write_byte_data(struct i2c_client *client,
 222                                         u8 command, u8 value)
 223 {
 224         union i2c_smbus_data data;
 225         int err;
 226         int i;
 227
 228         data.byte = value;
 229         for (i = 0; i < 3; i++) {
 230                 err = i2c_smbus_xfer(client->adapter, client->addr,
 231                                 client->flags,
 232                                 I2C_SMBUS_WRITE, command,
 233                                 I2C_SMBUS_BYTE_DATA, &data);
 234                 if (!err)
 235                         break;
 236         }
 237         if (err < 0)
 238                 v4l_err(client, "error writing %02x, %02x, %02x\n",
 239                                 client->addr, command, value);
 240         return err;
 241 }
 242
 243 static s32 adv_smbus_write_i2c_block_data(struct i2c_client *client,
 244                u8 command, unsigned length, const u8 *values)
 245 {
 246         union i2c_smbus_data data;
 247
 248         if (length > I2C_SMBUS_BLOCK_MAX)
 249                 length = I2C_SMBUS_BLOCK_MAX;
 250         data.block[0] = length;
 251         memcpy(data.block + 1, values, length);
 252         return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
 253                               I2C_SMBUS_WRITE, command,
 254                               I2C_SMBUS_I2C_BLOCK_DATA, &data);
 255 }
 256
 257 /* ----------------------------------------------------------------------- */
 258
 259 static inline int io_read(struct v4l2_subdev *sd, u8 reg)
 260 {
 261         struct i2c_client *client = v4l2_get_subdevdata(sd);
 262
 263         return adv_smbus_read_byte_data(client, reg);
 264 }
 265
 266 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 267 {
 268         struct i2c_client *client = v4l2_get_subdevdata(sd);
 269
 270         return adv_smbus_write_byte_data(client, reg, val);
 271 }
 272
 273 static inline int io_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 274 {
 275         return io_write(sd, reg, (io_read(sd, reg) & mask) | val);
 276 }
 277
 278 static inline int avlink_read(struct v4l2_subdev *sd, u8 reg)
 279 {
 280         struct adv7604_state *state = to_state(sd);
 281
 282         return adv_smbus_read_byte_data(state->i2c_avlink, reg);
 283 }
 284
 285 static inline int avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 286 {
 287         struct adv7604_state *state = to_state(sd);
 288
 289         return adv_smbus_write_byte_data(state->i2c_avlink, reg, val);
 290 }
 291
 292 static inline int cec_read(struct v4l2_subdev *sd, u8 reg)
 293 {
 294         struct adv7604_state *state = to_state(sd);
 295
 296         return adv_smbus_read_byte_data(state->i2c_cec, reg);
 297 }
 298
 299 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 300 {
 301         struct adv7604_state *state = to_state(sd);
 302
 303         return adv_smbus_write_byte_data(state->i2c_cec, reg, val);
 304 }
 305
 306 static inline int cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 307 {
 308         return cec_write(sd, reg, (cec_read(sd, reg) & mask) | val);
 309 }
 310
 311 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg)
 312 {
 313         struct adv7604_state *state = to_state(sd);
 314
 315         return adv_smbus_read_byte_data(state->i2c_infoframe, reg);
 316 }
 317
 318 static inline int infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 319 {
 320         struct adv7604_state *state = to_state(sd);
 321
 322         return adv_smbus_write_byte_data(state->i2c_infoframe, reg, val);
 323 }
 324
 325 static inline int esdp_read(struct v4l2_subdev *sd, u8 reg)
 326 {
 327         struct adv7604_state *state = to_state(sd);
 328
 329         return adv_smbus_read_byte_data(state->i2c_esdp, reg);
 330 }
 331
 332 static inline int esdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 333 {
 334         struct adv7604_state *state = to_state(sd);
 335
 336         return adv_smbus_write_byte_data(state->i2c_esdp, reg, val);
 337 }
 338
 339 static inline int dpp_read(struct v4l2_subdev *sd, u8 reg)
 340 {
 341         struct adv7604_state *state = to_state(sd);
 342
 343         return adv_smbus_read_byte_data(state->i2c_dpp, reg);
 344 }
 345
 346 static inline int dpp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 347 {
 348         struct adv7604_state *state = to_state(sd);
 349
 350         return adv_smbus_write_byte_data(state->i2c_dpp, reg, val);
 351 }
 352
 353 static inline int afe_read(struct v4l2_subdev *sd, u8 reg)
 354 {
 355         struct adv7604_state *state = to_state(sd);
 356
 357         return adv_smbus_read_byte_data(state->i2c_afe, reg);
 358 }
 359
 360 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 361 {
 362         struct adv7604_state *state = to_state(sd);
 363
 364         return adv_smbus_write_byte_data(state->i2c_afe, reg, val);
 365 }
 366
 367 static inline int rep_read(struct v4l2_subdev *sd, u8 reg)
 368 {
 369         struct adv7604_state *state = to_state(sd);
 370
 371         return adv_smbus_read_byte_data(state->i2c_repeater, reg);
 372 }
 373
 374 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 375 {
 376         struct adv7604_state *state = to_state(sd);
 377
 378         return adv_smbus_write_byte_data(state->i2c_repeater, reg, val);
 379 }
 380
 381 static inline int rep_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 382 {
 383         return rep_write(sd, reg, (rep_read(sd, reg) & mask) | val);
 384 }
 385
 386 static inline int edid_read(struct v4l2_subdev *sd, u8 reg)
 387 {
 388         struct adv7604_state *state = to_state(sd);
 389
 390         return adv_smbus_read_byte_data(state->i2c_edid, reg);
 391 }
 392
 393 static inline int edid_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 394 {
 395         struct adv7604_state *state = to_state(sd);
 396
 397         return adv_smbus_write_byte_data(state->i2c_edid, reg, val);
 398 }
 399
 400 static inline int edid_read_block(struct v4l2_subdev *sd, unsigned len, u8 *val)
 401 {
 402         struct adv7604_state *state = to_state(sd);
 403         struct i2c_client *client = state->i2c_edid;
 404         u8 msgbuf0[1] = { 0 };
 405         u8 msgbuf1[256];
 406         struct i2c_msg msg[2] = { { client->addr, 0, 1, msgbuf0 },
 407                                   { client->addr, 0 | I2C_M_RD, len, msgbuf1 }
 408                                 };
 409
 410         if (i2c_transfer(client->adapter, msg, 2) < 0)
 411                 return -EIO;
 412         memcpy(val, msgbuf1, len);
 413         return 0;
 414 }
 415
 416 static void adv7604_delayed_work_enable_hotplug(struct work_struct *work)
 417 {
 418         struct delayed_work *dwork = to_delayed_work(work);
 419         struct adv7604_state *state = container_of(dwork, struct adv7604_state,
 420                                                 delayed_work_enable_hotplug);
 421         struct v4l2_subdev *sd = &state->sd;
 422
 423         v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__);
 424
 425         v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)1);
 426 }
 427
 428 static inline int edid_write_block(struct v4l2_subdev *sd,
 429                                         unsigned len, const u8 *val)
 430 {
 431         struct i2c_client *client = v4l2_get_subdevdata(sd);
 432         struct adv7604_state *state = to_state(sd);
 433         int err = 0;
 434         int i;
 435
 436         v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n", __func__, len);
 437
 438         v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)0);
 439
 440         /* Disables I2C access to internal EDID ram from DDC port */
 441         rep_write_and_or(sd, 0x77, 0xf0, 0x0);
 442
 443         for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
 444                 err = adv_smbus_write_i2c_block_data(state->i2c_edid, i,
 445                                 I2C_SMBUS_BLOCK_MAX, val + i);
 446         if (err)
 447                 return err;
 448
 449         /* adv7604 calculates the checksums and enables I2C access to internal
 450            EDID ram from DDC port. */
 451         rep_write_and_or(sd, 0x77, 0xf0, 0x1);
 452
 453         for (i = 0; i < 1000; i++) {
 454                 if (rep_read(sd, 0x7d) & 1)
 455                         break;
 456                 mdelay(1);
 457         }
 458         if (i == 1000) {
 459                 v4l_err(client, "error enabling edid\n");
 460                 return -EIO;
 461         }
 462
 463         /* enable hotplug after 100 ms */
 464         queue_delayed_work(state->work_queues,
 465                         &state->delayed_work_enable_hotplug, HZ / 10);
 466         return 0;
 467 }
 468
 469 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg)
 470 {
 471         struct adv7604_state *state = to_state(sd);
 472
 473         return adv_smbus_read_byte_data(state->i2c_hdmi, reg);
 474 }
 475
 476 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 477 {
 478         struct adv7604_state *state = to_state(sd);
 479
 480         return adv_smbus_write_byte_data(state->i2c_hdmi, reg, val);
 481 }
 482
 483 static inline int test_read(struct v4l2_subdev *sd, u8 reg)
 484 {
 485         struct adv7604_state *state = to_state(sd);
 486
 487         return adv_smbus_read_byte_data(state->i2c_test, reg);
 488 }
 489
 490 static inline int test_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 491 {
 492         struct adv7604_state *state = to_state(sd);
 493
 494         return adv_smbus_write_byte_data(state->i2c_test, reg, val);
 495 }
 496
 497 static inline int cp_read(struct v4l2_subdev *sd, u8 reg)
 498 {
 499         struct adv7604_state *state = to_state(sd);
 500
 501         return adv_smbus_read_byte_data(state->i2c_cp, reg);
 502 }
 503
 504 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 505 {
 506         struct adv7604_state *state = to_state(sd);
 507
 508         return adv_smbus_write_byte_data(state->i2c_cp, reg, val);
 509 }
 510
 511 static inline int cp_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 512 {
 513         return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);
 514 }
 515
 516 static inline int vdp_read(struct v4l2_subdev *sd, u8 reg)
 517 {
 518         struct adv7604_state *state = to_state(sd);
 519
 520         return adv_smbus_read_byte_data(state->i2c_vdp, reg);
 521 }
 522
 523 static inline int vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 524 {
 525         struct adv7604_state *state = to_state(sd);
 526
 527         return adv_smbus_write_byte_data(state->i2c_vdp, reg, val);
 528 }
 529
 530 /* ----------------------------------------------------------------------- */
 531
 532 #ifdef CONFIG_VIDEO_ADV_DEBUG
 533 static void adv7604_inv_register(struct v4l2_subdev *sd)
 534 {
 535         v4l2_info(sd, "0x000-0x0ff: IO Map\n");
 536         v4l2_info(sd, "0x100-0x1ff: AVLink Map\n");
 537         v4l2_info(sd, "0x200-0x2ff: CEC Map\n");
 538         v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n");
 539         v4l2_info(sd, "0x400-0x4ff: ESDP Map\n");
 540         v4l2_info(sd, "0x500-0x5ff: DPP Map\n");
 541         v4l2_info(sd, "0x600-0x6ff: AFE Map\n");
 542         v4l2_info(sd, "0x700-0x7ff: Repeater Map\n");
 543         v4l2_info(sd, "0x800-0x8ff: EDID Map\n");
 544         v4l2_info(sd, "0x900-0x9ff: HDMI Map\n");
 545         v4l2_info(sd, "0xa00-0xaff: Test Map\n");
 546         v4l2_info(sd, "0xb00-0xbff: CP Map\n");
 547         v4l2_info(sd, "0xc00-0xcff: VDP Map\n");
 548 }
 549
 550 static int adv7604_g_register(struct v4l2_subdev *sd,
 551                                         struct v4l2_dbg_register *reg)
 552 {
 553         struct i2c_client *client = v4l2_get_subdevdata(sd);
 554
 555         if (!v4l2_chip_match_i2c_client(client, &reg->match))
 556                 return -EINVAL;
 557         if (!capable(CAP_SYS_ADMIN))
 558                 return -EPERM;
 559         reg->size = 1;
 560         switch (reg->reg >> 8) {
 561         case 0:
 562                 reg->val = io_read(sd, reg->reg & 0xff);
 563                 break;
 564         case 1:
 565                 reg->val = avlink_read(sd, reg->reg & 0xff);
 566                 break;
 567         case 2:
 568                 reg->val = cec_read(sd, reg->reg & 0xff);
 569                 break;
 570         case 3:
 571                 reg->val = infoframe_read(sd, reg->reg & 0xff);
 572                 break;
 573         case 4:
 574                 reg->val = esdp_read(sd, reg->reg & 0xff);
 575                 break;
 576         case 5:
 577                 reg->val = dpp_read(sd, reg->reg & 0xff);
 578                 break;
 579         case 6:
 580                 reg->val = afe_read(sd, reg->reg & 0xff);
 581                 break;
 582         case 7:
 583                 reg->val = rep_read(sd, reg->reg & 0xff);
 584                 break;
 585         case 8:
 586                 reg->val = edid_read(sd, reg->reg & 0xff);
 587                 break;
 588         case 9:
 589                 reg->val = hdmi_read(sd, reg->reg & 0xff);
 590                 break;
 591         case 0xa:
 592                 reg->val = test_read(sd, reg->reg & 0xff);
 593                 break;
 594         case 0xb:
 595                 reg->val = cp_read(sd, reg->reg & 0xff);
 596                 break;
 597         case 0xc:
 598                 reg->val = vdp_read(sd, reg->reg & 0xff);
 599                 break;
 600         default:
 601                 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
 602                 adv7604_inv_register(sd);
 603                 break;
 604         }
 605         return 0;
 606 }
 607
 608 static int adv7604_s_register(struct v4l2_subdev *sd,
 609                                         struct v4l2_dbg_register *reg)
 610 {
 611         struct i2c_client *client = v4l2_get_subdevdata(sd);
 612
 613         if (!v4l2_chip_match_i2c_client(client, &reg->match))
 614                 return -EINVAL;
 615         if (!capable(CAP_SYS_ADMIN))
 616                 return -EPERM;
 617         switch (reg->reg >> 8) {
 618         case 0:
 619                 io_write(sd, reg->reg & 0xff, reg->val & 0xff);
 620                 break;
 621         case 1:
 622                 avlink_write(sd, reg->reg & 0xff, reg->val & 0xff);
 623                 break;
 624         case 2:
 625                 cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
 626                 break;
 627         case 3:
 628                 infoframe_write(sd, reg->reg & 0xff, reg->val & 0xff);
 629                 break;
 630         case 4:
 631                 esdp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 632                 break;
 633         case 5:
 634                 dpp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 635                 break;
 636         case 6:
 637                 afe_write(sd, reg->reg & 0xff, reg->val & 0xff);
 638                 break;
 639         case 7:
 640                 rep_write(sd, reg->reg & 0xff, reg->val & 0xff);
 641                 break;
 642         case 8:
 643                 edid_write(sd, reg->reg & 0xff, reg->val & 0xff);
 644                 break;
 645         case 9:
 646                 hdmi_write(sd, reg->reg & 0xff, reg->val & 0xff);
 647                 break;
 648         case 0xa:
 649                 test_write(sd, reg->reg & 0xff, reg->val & 0xff);
 650                 break;
 651         case 0xb:
 652                 cp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 653                 break;
 654         case 0xc:
 655                 vdp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 656                 break;
 657         default:
 658                 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
 659                 adv7604_inv_register(sd);
 660                 break;
 661         }
 662         return 0;
 663 }
 664 #endif
 665
 666 static int adv7604_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)
 667 {
 668         struct adv7604_state *state = to_state(sd);
 669
 670         /* port A only */
 671         return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl,
 672                                 ((io_read(sd, 0x6f) & 0x10) >> 4));
 673 }
 674
 675 static void configure_free_run(struct v4l2_subdev *sd, const struct v4l2_bt_timings *timings)
 676 {
 677         struct i2c_client *client = v4l2_get_subdevdata(sd);
 678         u32 width = htotal(timings);
 679         u32 height = vtotal(timings);
 680         u16 ch1_fr_ll = (((u32)timings->pixelclock / 100) > 0) ?
 681                 ((width * (ADV7604_fsc / 100)) / ((u32)timings->pixelclock / 100)) : 0;
 682
 683         v4l2_dbg(2, debug, sd, "%s\n", __func__);
 684
 685         cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);     /* CH1_FR_LL */
 686         cp_write(sd, 0x90, ch1_fr_ll & 0xff);           /* CH1_FR_LL */
 687         cp_write(sd, 0xab, (height >> 4) & 0xff); /* CP_LCOUNT_MAX */
 688         cp_write(sd, 0xac, (height & 0x0f) << 4); /* CP_LCOUNT_MAX */
 689         /* TODO support interlaced */
 690         cp_write(sd, 0x91, 0x10);       /* INTERLACED */
 691
 692         /* Should only be set in auto-graphics mode [REF_02 p. 91-92] */
 693         if ((io_read(sd, 0x00) == 0x07) && (io_read(sd, 0x01) == 0x02)) {
 694                 u16 cp_start_sav, cp_start_eav, cp_start_vbi, cp_end_vbi;
 695                 const u8 pll[2] = {
 696                         (0xc0 | ((width >> 8) & 0x1f)),
 697                         (width & 0xff)
 698                 };
 699
 700                 /* setup PLL_DIV_MAN_EN and PLL_DIV_RATIO */
 701                 /* IO-map reg. 0x16 and 0x17 should be written in sequence */
 702                 if (adv_smbus_write_i2c_block_data(client, 0x16, 2, pll)) {
 703                         v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");
 704                         return;
 705                 }
 706
 707                 /* active video - horizontal timing */
 708                 cp_start_sav = timings->hsync + timings->hbackporch - 4;
 709                 cp_start_eav = width - timings->hfrontporch;
 710                 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff);
 711                 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | ((cp_start_eav >> 8) & 0x0f));
 712                 cp_write(sd, 0xa4, cp_start_eav & 0xff);
 713
 714                 /* active video - vertical timing */
 715                 cp_start_vbi = height - timings->vfrontporch;
 716                 cp_end_vbi = timings->vsync + timings->vbackporch;
 717                 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);
 718                 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | ((cp_end_vbi >> 8) & 0xf));
 719                 cp_write(sd, 0xa7, cp_end_vbi & 0xff);
 720         } else {
 721                 /* reset to default values */
 722                 io_write(sd, 0x16, 0x43);
 723                 io_write(sd, 0x17, 0x5a);
 724                 cp_write(sd, 0xa2, 0x00);
 725                 cp_write(sd, 0xa3, 0x00);
 726                 cp_write(sd, 0xa4, 0x00);
 727                 cp_write(sd, 0xa5, 0x00);
 728                 cp_write(sd, 0xa6, 0x00);
 729                 cp_write(sd, 0xa7, 0x00);
 730         }
 731 }
 732
 733
 734 static void set_rgb_quantization_range(struct v4l2_subdev *sd)
 735 {
 736         struct adv7604_state *state = to_state(sd);
 737
 738         switch (state->rgb_quantization_range) {
 739         case V4L2_DV_RGB_RANGE_AUTO:
 740                 /* automatic */
 741                 if ((hdmi_read(sd, 0x05) & 0x80) ||
 742                                 (state->prim_mode == ADV7604_PRIM_MODE_COMP) ||
 743                                 (state->prim_mode == ADV7604_PRIM_MODE_RGB)) {
 744                         /* receiving HDMI or analog signal */
 745                         io_write_and_or(sd, 0x02, 0x0f, 0xf0);
 746                 } else {
 747                         /* receiving DVI-D signal */
 748
 749                         /* ADV7604 selects RGB limited range regardless of
 750                            input format (CE/IT) in automatic mode */
 751                         if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
 752                                 /* RGB limited range (16-235) */
 753                                 io_write_and_or(sd, 0x02, 0x0f, 0x00);
 754
 755                         } else {
 756                                 /* RGB full range (0-255) */
 757                                 io_write_and_or(sd, 0x02, 0x0f, 0x10);
 758                         }
 759                 }
 760                 break;
 761         case V4L2_DV_RGB_RANGE_LIMITED:
 762                 /* RGB limited range (16-235) */
 763                 io_write_and_or(sd, 0x02, 0x0f, 0x00);
 764                 break;
 765         case V4L2_DV_RGB_RANGE_FULL:
 766                 /* RGB full range (0-255) */
 767                 io_write_and_or(sd, 0x02, 0x0f, 0x10);
 768                 break;
 769         }
 770 }
 771
 772
 773 static int adv7604_s_ctrl(struct v4l2_ctrl *ctrl)
 774 {
 775         struct v4l2_subdev *sd = to_sd(ctrl);
 776         struct adv7604_state *state = to_state(sd);
 777
 778         switch (ctrl->id) {
 779         case V4L2_CID_BRIGHTNESS:
 780                 cp_write(sd, 0x3c, ctrl->val);
 781                 return 0;
 782         case V4L2_CID_CONTRAST:
 783                 cp_write(sd, 0x3a, ctrl->val);
 784                 return 0;
 785         case V4L2_CID_SATURATION:
 786                 cp_write(sd, 0x3b, ctrl->val);
 787                 return 0;
 788         case V4L2_CID_HUE:
 789                 cp_write(sd, 0x3d, ctrl->val);
 790                 return 0;
 791         case  V4L2_CID_DV_RX_RGB_RANGE:
 792                 state->rgb_quantization_range = ctrl->val;
 793                 set_rgb_quantization_range(sd);
 794                 return 0;
 795         case V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE:
 796                 /* Set the analog sampling phase. This is needed to find the
 797                    best sampling phase for analog video: an application or
 798                    driver has to try a number of phases and analyze the picture
 799                    quality before settling on the best performing phase. */
 800                 afe_write(sd, 0xc8, ctrl->val);
 801                 return 0;
 802         case V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL:
 803                 /* Use the default blue color for free running mode,
 804                    or supply your own. */
 805                 cp_write_and_or(sd, 0xbf, ~0x04, (ctrl->val << 2));
 806                 return 0;
 807         case V4L2_CID_ADV_RX_FREE_RUN_COLOR:
 808                 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16);
 809                 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8);
 810                 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff));
 811                 return 0;
 812         }
 813         return -EINVAL;
 814 }
 815
 816 static int adv7604_g_chip_ident(struct v4l2_subdev *sd,
 817                                         struct v4l2_dbg_chip_ident *chip)
 818 {
 819         struct i2c_client *client = v4l2_get_subdevdata(sd);
 820
 821         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7604, 0);
 822 }
 823
 824 /* ----------------------------------------------------------------------- */
 825
 826 static inline bool no_power(struct v4l2_subdev *sd)
 827 {
 828         /* Entire chip or CP powered off */
 829         return io_read(sd, 0x0c) & 0x24;
 830 }
 831
 832 static inline bool no_signal_tmds(struct v4l2_subdev *sd)
 833 {
 834         /* TODO port B, C and D */
 835         return !(io_read(sd, 0x6a) & 0x10);
 836 }
 837
 838 static inline bool no_lock_tmds(struct v4l2_subdev *sd)
 839 {
 840         return (io_read(sd, 0x6a) & 0xe0) != 0xe0;
 841 }
 842
 843 static inline bool no_lock_sspd(struct v4l2_subdev *sd)
 844 {
 845         /* TODO channel 2 */
 846         return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0);
 847 }
 848
 849 static inline bool no_lock_stdi(struct v4l2_subdev *sd)
 850 {
 851         /* TODO channel 2 */
 852         return !(cp_read(sd, 0xb1) & 0x80);
 853 }
 854
 855 static inline bool no_signal(struct v4l2_subdev *sd)
 856 {
 857         struct adv7604_state *state = to_state(sd);
 858         bool ret;
 859
 860         ret = no_power(sd);
 861
 862         ret |= no_lock_stdi(sd);
 863         ret |= no_lock_sspd(sd);
 864
 865         if (DIGITAL_INPUT) {
 866                 ret |= no_lock_tmds(sd);
 867                 ret |= no_signal_tmds(sd);
 868         }
 869
 870         return ret;
 871 }
 872
 873 static inline bool no_lock_cp(struct v4l2_subdev *sd)
 874 {
 875         /* CP has detected a non standard number of lines on the incoming
 876            video compared to what it is configured to receive by s_dv_timings */
 877         return io_read(sd, 0x12) & 0x01;
 878 }
 879
 880 static int adv7604_g_input_status(struct v4l2_subdev *sd, u32 *status)
 881 {
 882         struct adv7604_state *state = to_state(sd);
 883
 884         *status = 0;
 885         *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0;
 886         *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;
 887         if (no_lock_cp(sd))
 888                 *status |= DIGITAL_INPUT ? V4L2_IN_ST_NO_SYNC : V4L2_IN_ST_NO_H_LOCK;
 889
 890         v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);
 891
 892         return 0;
 893 }
 894
 895 /* ----------------------------------------------------------------------- */
 896
 897 static void adv7604_print_timings(struct v4l2_subdev *sd,
 898         struct v4l2_dv_timings *timings, const char *txt, bool detailed)
 899 {
 900         struct v4l2_bt_timings *bt = &timings->bt;
 901         u32 htot, vtot;
 902
 903         if (timings->type != V4L2_DV_BT_656_1120)
 904                 return;
 905
 906         htot = htotal(bt);
 907         vtot = vtotal(bt);
 908
 909         v4l2_info(sd, "%s %dx%d%s%d (%dx%d)",
 910                         txt, bt->width, bt->height, bt->interlaced ? "i" : "p",
 911                         (htot * vtot) > 0 ? ((u32)bt->pixelclock /
 912                                 (htot * vtot)) : 0,
 913                         htot, vtot);
 914
 915         if (detailed) {
 916                 v4l2_info(sd, "    horizontal: fp = %d, %ssync = %d, bp = %d\n",
 917                                 bt->hfrontporch,
 918                                 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
 919                                 bt->hsync, bt->hbackporch);
 920                 v4l2_info(sd, "    vertical: fp = %d, %ssync = %d, bp = %d\n",
 921                                 bt->vfrontporch,
 922                                 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
 923                                 bt->vsync, bt->vbackporch);
 924                 v4l2_info(sd, "    pixelclock: %lld, flags: 0x%x, standards: 0x%x\n",
 925                                 bt->pixelclock, bt->flags, bt->standards);
 926         }
 927 }
 928
 929 struct stdi_readback {
 930         u16 bl, lcf, lcvs;
 931         u8 hs_pol, vs_pol;
 932         bool interlaced;
 933 };
 934
 935 static int stdi2dv_timings(struct v4l2_subdev *sd,
 936                 struct stdi_readback *stdi,
 937                 struct v4l2_dv_timings *timings)
 938 {
 939         struct adv7604_state *state = to_state(sd);
 940         u32 hfreq = (ADV7604_fsc * 8) / stdi->bl;
 941         u32 pix_clk;
 942         int i;
 943
 944         for (i = 0; adv7604_timings[i].bt.height; i++) {
 945                 if (vtotal(&adv7604_timings[i].bt) != stdi->lcf + 1)
 946                         continue;
 947                 if (adv7604_timings[i].bt.vsync != stdi->lcvs)
 948                         continue;
 949
 950                 pix_clk = hfreq * htotal(&adv7604_timings[i].bt);
 951
 952                 if ((pix_clk < adv7604_timings[i].bt.pixelclock + 1000000) &&
 953                     (pix_clk > adv7604_timings[i].bt.pixelclock - 1000000)) {
 954                         *timings = adv7604_timings[i];
 955                         return 0;
 956                 }
 957         }
 958
 959         if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs,
 960                         (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
 961                         (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 962                         timings))
 963                 return 0;
 964         if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs,
 965                         (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
 966                         (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 967                         state->aspect_ratio, timings))
 968                 return 0;
 969
 970         v4l2_dbg(2, debug, sd, "%s: No format candidate found for lcf=%d, bl = %d\n",
 971                         __func__, stdi->lcf, stdi->bl);
 972         return -1;
 973 }
 974
 975 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi)
 976 {
 977         if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
 978                 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__);
 979                 return -1;
 980         }
 981
 982         /* read STDI */
 983         stdi->bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
 984         stdi->lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
 985         stdi->lcvs = cp_read(sd, 0xb3) >> 3;
 986         stdi->interlaced = io_read(sd, 0x12) & 0x10;
 987
 988         /* read SSPD */
 989         if ((cp_read(sd, 0xb5) & 0x03) == 0x01) {
 990                 stdi->hs_pol = ((cp_read(sd, 0xb5) & 0x10) ?
 991                                 ((cp_read(sd, 0xb5) & 0x08) ? '+' : '-') : 'x');
 992                 stdi->vs_pol = ((cp_read(sd, 0xb5) & 0x40) ?
 993                                 ((cp_read(sd, 0xb5) & 0x20) ? '+' : '-') : 'x');
 994         } else {
 995                 stdi->hs_pol = 'x';
 996                 stdi->vs_pol = 'x';
 997         }
 998
 999         if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
1000                 v4l2_dbg(2, debug, sd,
1001                         "%s: signal lost during readout of STDI/SSPD\n", __func__);
1002                 return -1;
1003         }
1004
1005         if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) {
1006                 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__);
1007                 memset(stdi, 0, sizeof(struct stdi_readback));
1008                 return -1;
1009         }
1010
1011         v4l2_dbg(2, debug, sd,
1012                 "%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n",
1013                 __func__, stdi->lcf, stdi->bl, stdi->lcvs,
1014                 stdi->hs_pol, stdi->vs_pol,
1015                 stdi->interlaced ? "interlaced" : "progressive");
1016
1017         return 0;
1018 }
1019
1020 static int adv7604_enum_dv_timings(struct v4l2_subdev *sd,
1021                         struct v4l2_enum_dv_timings *timings)
1022 {
1023         if (timings->index >= ARRAY_SIZE(adv7604_timings) - 1)
1024                 return -EINVAL;
1025         memset(timings->reserved, 0, sizeof(timings->reserved));
1026         timings->timings = adv7604_timings[timings->index];
1027         return 0;
1028 }
1029
1030 static int adv7604_dv_timings_cap(struct v4l2_subdev *sd,
1031                         struct v4l2_dv_timings_cap *cap)
1032 {
1033         struct adv7604_state *state = to_state(sd);
1034
1035         cap->type = V4L2_DV_BT_656_1120;
1036         cap->bt.max_width = 1920;
1037         cap->bt.max_height = 1200;
1038         cap->bt.min_pixelclock = 27000000;
1039         if (DIGITAL_INPUT)
1040                 cap->bt.max_pixelclock = 225000000;
1041         else
1042                 cap->bt.max_pixelclock = 170000000;
1043         cap->bt.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
1044                          V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT;
1045         cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
1046                 V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM;
1047         return 0;
1048 }
1049
1050 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1051    if the format is listed in adv7604_timings[] */
1052 static void adv7604_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,
1053                 struct v4l2_dv_timings *timings)
1054 {
1055         struct adv7604_state *state = to_state(sd);
1056         int i;
1057
1058         for (i = 0; adv7604_timings[i].bt.width; i++) {
1059                 if (v4l_match_dv_timings(timings, &adv7604_timings[i],
1060                                         DIGITAL_INPUT ? 250000 : 1000000)) {
1061                         *timings = adv7604_timings[i];
1062                         break;
1063                 }
1064         }
1065 }
1066
1067 static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
1068                         struct v4l2_dv_timings *timings)
1069 {
1070         struct adv7604_state *state = to_state(sd);
1071         struct v4l2_bt_timings *bt = &timings->bt;
1072         struct stdi_readback stdi;
1073
1074         if (!timings)
1075                 return -EINVAL;
1076
1077         memset(timings, 0, sizeof(struct v4l2_dv_timings));
1078
1079         if (no_signal(sd)) {
1080                 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);
1081                 return -ENOLINK;
1082         }
1083
1084         /* read STDI */
1085         if (read_stdi(sd, &stdi)) {
1086                 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__);
1087                 return -ENOLINK;
1088         }
1089         bt->interlaced = stdi.interlaced ?
1090                 V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
1091
1092         if (DIGITAL_INPUT) {
1093                 timings->type = V4L2_DV_BT_656_1120;
1094
1095                 bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);
1096                 bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);
1097                 bt->pixelclock = (hdmi_read(sd, 0x06) * 1000000) +
1098                         ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;
1099                 bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +
1100                         hdmi_read(sd, 0x21);
1101                 bt->hsync = (hdmi_read(sd, 0x22) & 0x03) * 256 +
1102                         hdmi_read(sd, 0x23);
1103                 bt->hbackporch = (hdmi_read(sd, 0x24) & 0x03) * 256 +
1104                         hdmi_read(sd, 0x25);
1105                 bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x1f) * 256 +
1106                         hdmi_read(sd, 0x2b)) / 2;
1107                 bt->vsync = ((hdmi_read(sd, 0x2e) & 0x1f) * 256 +
1108                         hdmi_read(sd, 0x2f)) / 2;
1109                 bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x1f) * 256 +
1110                         hdmi_read(sd, 0x33)) / 2;
1111                 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
1112                         ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
1113                 if (bt->interlaced == V4L2_DV_INTERLACED) {
1114                         bt->height += (hdmi_read(sd, 0x0b) & 0x0f) * 256 +
1115                                         hdmi_read(sd, 0x0c);
1116                         bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x1f) * 256 +
1117                                         hdmi_read(sd, 0x2d)) / 2;
1118                         bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 +
1119                                         hdmi_read(sd, 0x31)) / 2;
1120                         bt->vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 +
1121                                         hdmi_read(sd, 0x35)) / 2;
1122                 }
1123                 adv7604_fill_optional_dv_timings_fields(sd, timings);
1124         } else {
1125                 /* find format
1126                  * Since LCVS values are inaccurate (REF_03, page 275-276),
1127                  * stdi2dv_timings() is called with lcvs +-1 if the first attempt fails.
1128                  */
1129                 if (!stdi2dv_timings(sd, &stdi, timings))
1130                         goto found;
1131                 stdi.lcvs += 1;
1132                 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs);
1133                 if (!stdi2dv_timings(sd, &stdi, timings))
1134                         goto found;
1135                 stdi.lcvs -= 2;
1136                 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs);
1137                 if (stdi2dv_timings(sd, &stdi, timings)) {
1138                         v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);
1139                         return -ERANGE;
1140                 }
1141         }
1142 found:
1143
1144         if (no_signal(sd)) {
1145                 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__);
1146                 memset(timings, 0, sizeof(struct v4l2_dv_timings));
1147                 return -ENOLINK;
1148         }
1149
1150         if ((!DIGITAL_INPUT && bt->pixelclock > 170000000) ||
1151                         (DIGITAL_INPUT && bt->pixelclock > 225000000)) {
1152                 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",
1153                                 __func__, (u32)bt->pixelclock);
1154                 return -ERANGE;
1155         }
1156
1157         if (debug > 1)
1158                 adv7604_print_timings(sd, timings,
1159                                 "adv7604_query_dv_timings:", true);
1160
1161         return 0;
1162 }
1163
1164 static int adv7604_s_dv_timings(struct v4l2_subdev *sd,
1165                 struct v4l2_dv_timings *timings)
1166 {
1167         struct adv7604_state *state = to_state(sd);
1168         struct v4l2_bt_timings *bt;
1169
1170         if (!timings)
1171                 return -EINVAL;
1172
1173         bt = &timings->bt;
1174
1175         if ((!DIGITAL_INPUT && bt->pixelclock > 170000000) ||
1176                         (DIGITAL_INPUT && bt->pixelclock > 225000000)) {
1177                 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",
1178                                 __func__, (u32)bt->pixelclock);
1179                 return -ERANGE;
1180         }
1181         adv7604_fill_optional_dv_timings_fields(sd, timings);
1182
1183         state->timings = *timings;
1184
1185         /* freerun */
1186         configure_free_run(sd, bt);
1187
1188         set_rgb_quantization_range(sd);
1189
1190
1191         if (debug > 1)
1192                 adv7604_print_timings(sd, timings,
1193                                 "adv7604_s_dv_timings:", true);
1194         return 0;
1195 }
1196
1197 static int adv7604_g_dv_timings(struct v4l2_subdev *sd,
1198                 struct v4l2_dv_timings *timings)
1199 {
1200         struct adv7604_state *state = to_state(sd);
1201
1202         *timings = state->timings;
1203         return 0;
1204 }
1205
1206 static void enable_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
1207 {
1208         switch (prim_mode) {
1209         case ADV7604_PRIM_MODE_COMP:
1210         case ADV7604_PRIM_MODE_RGB:
1211                 /* enable */
1212                 io_write(sd, 0x15, 0xb0);   /* Disable Tristate of Pins (no audio) */
1213                 break;
1214         case ADV7604_PRIM_MODE_HDMI_COMP:
1215         case ADV7604_PRIM_MODE_HDMI_GR:
1216                 /* enable */
1217                 hdmi_write(sd, 0x1a, 0x0a); /* Unmute audio */
1218                 hdmi_write(sd, 0x01, 0x00); /* Enable HDMI clock terminators */
1219                 io_write(sd, 0x15, 0xa0);   /* Disable Tristate of Pins */
1220                 break;
1221         default:
1222                 v4l2_err(sd, "%s: reserved primary mode 0x%0x\n",
1223                                 __func__, prim_mode);
1224                 break;
1225         }
1226 }
1227
1228 static void disable_input(struct v4l2_subdev *sd)
1229 {
1230         /* disable */
1231         io_write(sd, 0x15, 0xbe);   /* Tristate all outputs from video core */
1232         hdmi_write(sd, 0x1a, 0x1a); /* Mute audio */
1233         hdmi_write(sd, 0x01, 0x78); /* Disable HDMI clock terminators */
1234 }
1235
1236 static void select_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
1237 {
1238         switch (prim_mode) {
1239         case ADV7604_PRIM_MODE_COMP:
1240         case ADV7604_PRIM_MODE_RGB:
1241                 /* set mode and select free run resolution */
1242                 io_write(sd, 0x00, 0x07); /* video std */
1243                 io_write(sd, 0x01, 0x02); /* prim mode */
1244                 /* enable embedded syncs for auto graphics mode */
1245                 cp_write_and_or(sd, 0x81, 0xef, 0x10);
1246
1247                 /* reset ADI recommended settings for HDMI: */
1248                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
1249                 hdmi_write(sd, 0x0d, 0x04); /* HDMI filter optimization */
1250                 hdmi_write(sd, 0x3d, 0x00); /* DDC bus active pull-up control */
1251                 hdmi_write(sd, 0x3e, 0x74); /* TMDS PLL optimization */
1252                 hdmi_write(sd, 0x4e, 0x3b); /* TMDS PLL optimization */
1253                 hdmi_write(sd, 0x57, 0x74); /* TMDS PLL optimization */
1254                 hdmi_write(sd, 0x58, 0x63); /* TMDS PLL optimization */
1255                 hdmi_write(sd, 0x8d, 0x18); /* equaliser */
1256                 hdmi_write(sd, 0x8e, 0x34); /* equaliser */
1257                 hdmi_write(sd, 0x93, 0x88); /* equaliser */
1258                 hdmi_write(sd, 0x94, 0x2e); /* equaliser */
1259                 hdmi_write(sd, 0x96, 0x00); /* enable automatic EQ changing */
1260
1261                 afe_write(sd, 0x00, 0x08); /* power up ADC */
1262                 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */
1263                 afe_write(sd, 0xc8, 0x00); /* phase control */
1264
1265                 /* set ADI recommended settings for digitizer */
1266                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 17. */
1267                 afe_write(sd, 0x12, 0x7b); /* ADC noise shaping filter controls */
1268                 afe_write(sd, 0x0c, 0x1f); /* CP core gain controls */
1269                 cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */
1270                 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
1271                 cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */
1272                 break;
1273
1274         case ADV7604_PRIM_MODE_HDMI_COMP:
1275         case ADV7604_PRIM_MODE_HDMI_GR:
1276                 /* set mode and select free run resolution */
1277                 /* video std */
1278                 io_write(sd, 0x00,
1279                         (prim_mode == ADV7604_PRIM_MODE_HDMI_GR) ? 0x02 : 0x1e);
1280                 io_write(sd, 0x01, prim_mode); /* prim mode */
1281                 /* disable embedded syncs for auto graphics mode */
1282                 cp_write_and_or(sd, 0x81, 0xef, 0x00);
1283
1284                 /* set ADI recommended settings for HDMI: */
1285                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
1286                 hdmi_write(sd, 0x0d, 0x84); /* HDMI filter optimization */
1287                 hdmi_write(sd, 0x3d, 0x10); /* DDC bus active pull-up control */
1288                 hdmi_write(sd, 0x3e, 0x39); /* TMDS PLL optimization */
1289                 hdmi_write(sd, 0x4e, 0x3b); /* TMDS PLL optimization */
1290                 hdmi_write(sd, 0x57, 0xb6); /* TMDS PLL optimization */
1291                 hdmi_write(sd, 0x58, 0x03); /* TMDS PLL optimization */
1292                 hdmi_write(sd, 0x8d, 0x18); /* equaliser */
1293                 hdmi_write(sd, 0x8e, 0x34); /* equaliser */
1294                 hdmi_write(sd, 0x93, 0x8b); /* equaliser */
1295                 hdmi_write(sd, 0x94, 0x2d); /* equaliser */
1296                 hdmi_write(sd, 0x96, 0x01); /* enable automatic EQ changing */
1297
1298                 afe_write(sd, 0x00, 0xff); /* power down ADC */
1299                 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */
1300                 afe_write(sd, 0xc8, 0x40); /* phase control */
1301
1302                 /* reset ADI recommended settings for digitizer */
1303                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 17. */
1304                 afe_write(sd, 0x12, 0xfb); /* ADC noise shaping filter controls */
1305                 afe_write(sd, 0x0c, 0x0d); /* CP core gain controls */
1306                 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */
1307                 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
1308                 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */
1309
1310                 break;
1311         default:
1312                 v4l2_err(sd, "%s: reserved primary mode 0x%0x\n", __func__, prim_mode);
1313                 break;
1314         }
1315 }
1316
1317 static int adv7604_s_routing(struct v4l2_subdev *sd,
1318                 u32 input, u32 output, u32 config)
1319 {
1320         struct adv7604_state *state = to_state(sd);
1321
1322         v4l2_dbg(2, debug, sd, "%s: input %d", __func__, input);
1323
1324         switch (input) {
1325         case 0:
1326                 /* TODO select HDMI_COMP or HDMI_GR */
1327                 state->prim_mode = ADV7604_PRIM_MODE_HDMI_COMP;
1328                 break;
1329         case 1:
1330                 state->prim_mode = ADV7604_PRIM_MODE_RGB;
1331                 break;
1332         case 2:
1333                 state->prim_mode = ADV7604_PRIM_MODE_COMP;
1334                 break;
1335         default:
1336                 return -EINVAL;
1337         }
1338
1339         disable_input(sd);
1340
1341         select_input(sd, state->prim_mode);
1342
1343         enable_input(sd, state->prim_mode);
1344
1345         return 0;
1346 }
1347
1348 static int adv7604_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
1349                              enum v4l2_mbus_pixelcode *code)
1350 {
1351         if (index)
1352                 return -EINVAL;
1353         /* Good enough for now */
1354         *code = V4L2_MBUS_FMT_FIXED;
1355         return 0;
1356 }
1357
1358 static int adv7604_g_mbus_fmt(struct v4l2_subdev *sd,
1359                 struct v4l2_mbus_framefmt *fmt)
1360 {
1361         struct adv7604_state *state = to_state(sd);
1362
1363         fmt->width = state->timings.bt.width;
1364         fmt->height = state->timings.bt.height;
1365         fmt->code = V4L2_MBUS_FMT_FIXED;
1366         fmt->field = V4L2_FIELD_NONE;
1367         if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
1368                 fmt->colorspace = (state->timings.bt.height <= 576) ?
1369                         V4L2_COLORSPACE_SMPTE170M : V4L2_COLORSPACE_REC709;
1370         }
1371         return 0;
1372 }
1373
1374 static int adv7604_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
1375 {
1376         struct adv7604_state *state = to_state(sd);
1377         u8 fmt_change, fmt_change_digital, tx_5v;
1378
1379         /* format change */
1380         fmt_change = io_read(sd, 0x43) & 0x98;
1381         if (fmt_change)
1382                 io_write(sd, 0x44, fmt_change);
1383         fmt_change_digital = DIGITAL_INPUT ? (io_read(sd, 0x6b) & 0xc0) : 0;
1384         if (fmt_change_digital)
1385                 io_write(sd, 0x6c, fmt_change_digital);
1386         if (fmt_change || fmt_change_digital) {
1387                 v4l2_dbg(1, debug, sd,
1388                         "%s: ADV7604_FMT_CHANGE, fmt_change = 0x%x, fmt_change_digital = 0x%x\n",
1389                         __func__, fmt_change, fmt_change_digital);
1390                 v4l2_subdev_notify(sd, ADV7604_FMT_CHANGE, NULL);
1391                 if (handled)
1392                         *handled = true;
1393         }
1394         /* tx 5v detect */
1395         tx_5v = io_read(sd, 0x70) & 0x10;
1396         if (tx_5v) {
1397                 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v);
1398                 io_write(sd, 0x71, tx_5v);
1399                 adv7604_s_detect_tx_5v_ctrl(sd);
1400                 if (handled)
1401                         *handled = true;
1402         }
1403         return 0;
1404 }
1405
1406 static int adv7604_get_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid)
1407 {
1408         struct adv7604_state *state = to_state(sd);
1409
1410         if (edid->pad != 0)
1411                 return -EINVAL;
1412         if (edid->blocks == 0)
1413                 return -EINVAL;
1414         if (edid->start_block >= state->edid_blocks)
1415                 return -EINVAL;
1416         if (edid->start_block + edid->blocks > state->edid_blocks)
1417                 edid->blocks = state->edid_blocks - edid->start_block;
1418         if (!edid->edid)
1419                 return -EINVAL;
1420         memcpy(edid->edid + edid->start_block * 128,
1421                state->edid + edid->start_block * 128,
1422                edid->blocks * 128);
1423         return 0;
1424 }
1425
1426 static int adv7604_set_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid)
1427 {
1428         struct adv7604_state *state = to_state(sd);
1429         int err;
1430
1431         if (edid->pad != 0)
1432                 return -EINVAL;
1433         if (edid->start_block != 0)
1434                 return -EINVAL;
1435         if (edid->blocks == 0) {
1436                 /* Pull down the hotplug pin */
1437                 v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)0);
1438                 /* Disables I2C access to internal EDID ram from DDC port */
1439                 rep_write_and_or(sd, 0x77, 0xf0, 0x0);
1440                 state->edid_blocks = 0;
1441                 /* Fall back to a 16:9 aspect ratio */
1442                 state->aspect_ratio.numerator = 16;
1443                 state->aspect_ratio.denominator = 9;
1444                 return 0;
1445         }
1446         if (edid->blocks > 2)
1447                 return -E2BIG;
1448         if (!edid->edid)
1449                 return -EINVAL;
1450         memcpy(state->edid, edid->edid, 128 * edid->blocks);
1451         state->edid_blocks = edid->blocks;
1452         state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15],
1453                         edid->edid[0x16]);
1454         err = edid_write_block(sd, 128 * edid->blocks, state->edid);
1455         if (err < 0)
1456                 v4l2_err(sd, "error %d writing edid\n", err);
1457         return err;
1458 }
1459
1460 /*********** avi info frame CEA-861-E **************/
1461
1462 static void print_avi_infoframe(struct v4l2_subdev *sd)
1463 {
1464         int i;
1465         u8 buf[14];
1466         u8 avi_len;
1467         u8 avi_ver;
1468
1469         if (!(hdmi_read(sd, 0x05) & 0x80)) {
1470                 v4l2_info(sd, "receive DVI-D signal (AVI infoframe not supported)\n");
1471                 return;
1472         }
1473         if (!(io_read(sd, 0x60) & 0x01)) {
1474                 v4l2_info(sd, "AVI infoframe not received\n");
1475                 return;
1476         }
1477
1478         if (io_read(sd, 0x83) & 0x01) {
1479                 v4l2_info(sd, "AVI infoframe checksum error has occurred earlier\n");
1480                 io_write(sd, 0x85, 0x01); /* clear AVI_INF_CKS_ERR_RAW */
1481                 if (io_read(sd, 0x83) & 0x01) {
1482                         v4l2_info(sd, "AVI infoframe checksum error still present\n");
1483                         io_write(sd, 0x85, 0x01); /* clear AVI_INF_CKS_ERR_RAW */
1484                 }
1485         }
1486
1487         avi_len = infoframe_read(sd, 0xe2);
1488         avi_ver = infoframe_read(sd, 0xe1);
1489         v4l2_info(sd, "AVI infoframe version %d (%d byte)\n",
1490                         avi_ver, avi_len);
1491
1492         if (avi_ver != 0x02)
1493                 return;
1494
1495         for (i = 0; i < 14; i++)
1496                 buf[i] = infoframe_read(sd, i);
1497
1498         v4l2_info(sd,
1499                 "\t%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
1500                 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7],
1501                 buf[8], buf[9], buf[10], buf[11], buf[12], buf[13]);
1502 }
1503
1504 static int adv7604_log_status(struct v4l2_subdev *sd)
1505 {
1506         struct adv7604_state *state = to_state(sd);
1507         struct v4l2_dv_timings timings;
1508         struct stdi_readback stdi;
1509         u8 reg_io_0x02 = io_read(sd, 0x02);
1510
1511         char *csc_coeff_sel_rb[16] = {
1512                 "bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB",
1513                 "reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709",
1514                 "reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709",
1515                 "reserved", "reserved", "reserved", "reserved", "manual"
1516         };
1517         char *input_color_space_txt[16] = {
1518                 "RGB limited range (16-235)", "RGB full range (0-255)",
1519                 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)",
1520                 "XvYCC Bt.601", "XvYCC Bt.709",
1521                 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)",
1522                 "invalid", "invalid", "invalid", "invalid", "invalid",
1523                 "invalid", "invalid", "automatic"
1524         };
1525         char *rgb_quantization_range_txt[] = {
1526                 "Automatic",
1527                 "RGB limited range (16-235)",
1528                 "RGB full range (0-255)",
1529         };
1530
1531         v4l2_info(sd, "-----Chip status-----\n");
1532         v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");
1533         v4l2_info(sd, "Connector type: %s\n", state->connector_hdmi ?
1534                         "HDMI" : (DIGITAL_INPUT ? "DVI-D" : "DVI-A"));
1535         v4l2_info(sd, "EDID: %s\n", ((rep_read(sd, 0x7d) & 0x01) &&
1536                         (rep_read(sd, 0x77) & 0x01)) ? "enabled" : "disabled ");
1537         v4l2_info(sd, "CEC: %s\n", !!(cec_read(sd, 0x2a) & 0x01) ?
1538                         "enabled" : "disabled");
1539
1540         v4l2_info(sd, "-----Signal status-----\n");
1541         v4l2_info(sd, "Cable detected (+5V power): %s\n",
1542                         (io_read(sd, 0x6f) & 0x10) ? "true" : "false");
1543         v4l2_info(sd, "TMDS signal detected: %s\n",
1544                         no_signal_tmds(sd) ? "false" : "true");
1545         v4l2_info(sd, "TMDS signal locked: %s\n",
1546                         no_lock_tmds(sd) ? "false" : "true");
1547         v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true");
1548         v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true");
1549         v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true");
1550         v4l2_info(sd, "CP free run: %s\n",
1551                         (!!(cp_read(sd, 0xff) & 0x10) ? "on" : "off"));
1552         v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x\n",
1553                         io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f);
1554
1555         v4l2_info(sd, "-----Video Timings-----\n");
1556         if (read_stdi(sd, &stdi))
1557                 v4l2_info(sd, "STDI: not locked\n");
1558         else
1559                 v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync\n",
1560                                 stdi.lcf, stdi.bl, stdi.lcvs,
1561                                 stdi.interlaced ? "interlaced" : "progressive",
1562                                 stdi.hs_pol, stdi.vs_pol);
1563         if (adv7604_query_dv_timings(sd, &timings))
1564                 v4l2_info(sd, "No video detected\n");
1565         else
1566                 adv7604_print_timings(sd, &timings, "Detected format:", true);
1567         adv7604_print_timings(sd, &state->timings, "Configured format:", true);
1568
1569         v4l2_info(sd, "-----Color space-----\n");
1570         v4l2_info(sd, "RGB quantization range ctrl: %s\n",
1571                         rgb_quantization_range_txt[state->rgb_quantization_range]);
1572         v4l2_info(sd, "Input color space: %s\n",
1573                         input_color_space_txt[reg_io_0x02 >> 4]);
1574         v4l2_info(sd, "Output color space: %s %s, saturator %s\n",
1575                         (reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
1576                         (reg_io_0x02 & 0x04) ? "(16-235)" : "(0-255)",
1577                         ((reg_io_0x02 & 0x04) ^ (reg_io_0x02 & 0x01)) ?
1578                                         "enabled" : "disabled");
1579         v4l2_info(sd, "Color space conversion: %s\n",
1580                         csc_coeff_sel_rb[cp_read(sd, 0xfc) >> 4]);
1581
1582         /* Digital video */
1583         if (DIGITAL_INPUT) {
1584                 v4l2_info(sd, "-----HDMI status-----\n");
1585                 v4l2_info(sd, "HDCP encrypted content: %s\n",
1586                                 hdmi_read(sd, 0x05) & 0x40 ? "true" : "false");
1587
1588                 print_avi_infoframe(sd);
1589         }
1590
1591         return 0;
1592 }
1593
1594 /* ----------------------------------------------------------------------- */
1595
1596 static const struct v4l2_ctrl_ops adv7604_ctrl_ops = {
1597         .s_ctrl = adv7604_s_ctrl,
1598 };
1599
1600 static const struct v4l2_subdev_core_ops adv7604_core_ops = {
1601         .log_status = adv7604_log_status,
1602         .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
1603         .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
1604         .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
1605         .g_ctrl = v4l2_subdev_g_ctrl,
1606         .s_ctrl = v4l2_subdev_s_ctrl,
1607         .queryctrl = v4l2_subdev_queryctrl,
1608         .querymenu = v4l2_subdev_querymenu,
1609         .g_chip_ident = adv7604_g_chip_ident,
1610         .interrupt_service_routine = adv7604_isr,
1611 #ifdef CONFIG_VIDEO_ADV_DEBUG
1612         .g_register = adv7604_g_register,
1613         .s_register = adv7604_s_register,
1614 #endif
1615 };
1616
1617 static const struct v4l2_subdev_video_ops adv7604_video_ops = {
1618         .s_routing = adv7604_s_routing,
1619         .g_input_status = adv7604_g_input_status,
1620         .s_dv_timings = adv7604_s_dv_timings,
1621         .g_dv_timings = adv7604_g_dv_timings,
1622         .query_dv_timings = adv7604_query_dv_timings,
1623         .enum_dv_timings = adv7604_enum_dv_timings,
1624         .dv_timings_cap = adv7604_dv_timings_cap,
1625         .enum_mbus_fmt = adv7604_enum_mbus_fmt,
1626         .g_mbus_fmt = adv7604_g_mbus_fmt,
1627         .try_mbus_fmt = adv7604_g_mbus_fmt,
1628         .s_mbus_fmt = adv7604_g_mbus_fmt,
1629 };
1630
1631 static const struct v4l2_subdev_pad_ops adv7604_pad_ops = {
1632         .get_edid = adv7604_get_edid,
1633         .set_edid = adv7604_set_edid,
1634 };
1635
1636 static const struct v4l2_subdev_ops adv7604_ops = {
1637         .core = &adv7604_core_ops,
1638         .video = &adv7604_video_ops,
1639         .pad = &adv7604_pad_ops,
1640 };
1641
1642 /* -------------------------- custom ctrls ---------------------------------- */
1643
1644 static const struct v4l2_ctrl_config adv7604_ctrl_analog_sampling_phase = {
1645         .ops = &adv7604_ctrl_ops,
1646         .id = V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE,
1647         .name = "Analog Sampling Phase",
1648         .type = V4L2_CTRL_TYPE_INTEGER,
1649         .min = 0,
1650         .max = 0x1f,
1651         .step = 1,
1652         .def = 0,
1653 };
1654
1655 static const struct v4l2_ctrl_config adv7604_ctrl_free_run_color_manual = {
1656         .ops = &adv7604_ctrl_ops,
1657         .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL,
1658         .name = "Free Running Color, Manual",
1659         .type = V4L2_CTRL_TYPE_BOOLEAN,
1660         .min = false,
1661         .max = true,
1662         .step = 1,
1663         .def = false,
1664 };
1665
1666 static const struct v4l2_ctrl_config adv7604_ctrl_free_run_color = {
1667         .ops = &adv7604_ctrl_ops,
1668         .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR,
1669         .name = "Free Running Color",
1670         .type = V4L2_CTRL_TYPE_INTEGER,
1671         .min = 0x0,
1672         .max = 0xffffff,
1673         .step = 0x1,
1674         .def = 0x0,
1675 };
1676
1677 /* ----------------------------------------------------------------------- */
1678
1679 static int adv7604_core_init(struct v4l2_subdev *sd)
1680 {
1681         struct adv7604_state *state = to_state(sd);
1682         struct adv7604_platform_data *pdata = &state->pdata;
1683
1684         hdmi_write(sd, 0x48,
1685                 (pdata->disable_pwrdnb ? 0x80 : 0) |
1686                 (pdata->disable_cable_det_rst ? 0x40 : 0));
1687
1688         disable_input(sd);
1689
1690         /* power */
1691         io_write(sd, 0x0c, 0x42);   /* Power up part and power down VDP */
1692         io_write(sd, 0x0b, 0x44);   /* Power down ESDP block */
1693         cp_write(sd, 0xcf, 0x01);   /* Power down macrovision */
1694
1695         /* video format */
1696         io_write_and_or(sd, 0x02, 0xf0,
1697                         pdata->alt_gamma << 3 |
1698                         pdata->op_656_range << 2 |
1699                         pdata->rgb_out << 1 |
1700                         pdata->alt_data_sat << 0);
1701         io_write(sd, 0x03, pdata->op_format_sel);
1702         io_write_and_or(sd, 0x04, 0x1f, pdata->op_ch_sel << 5);
1703         io_write_and_or(sd, 0x05, 0xf0, pdata->blank_data << 3 |
1704                                         pdata->insert_av_codes << 2 |
1705                                         pdata->replicate_av_codes << 1 |
1706                                         pdata->invert_cbcr << 0);
1707
1708         /* TODO from platform data */
1709         cp_write(sd, 0x69, 0x30);   /* Enable CP CSC */
1710         io_write(sd, 0x06, 0xa6);   /* positive VS and HS */
1711         io_write(sd, 0x14, 0x7f);   /* Drive strength adjusted to max */
1712         cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */
1713         cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */
1714         cp_write(sd, 0xf9, 0x23); /*  STDI ch. 1 - LCVS change threshold -
1715                                       ADI recommended setting [REF_01 c. 2.3.3] */
1716         cp_write(sd, 0x45, 0x23); /*  STDI ch. 2 - LCVS change threshold -
1717                                       ADI recommended setting [REF_01 c. 2.3.3] */
1718         cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution
1719                                      for digital formats */
1720
1721         /* TODO from platform data */
1722         afe_write(sd, 0xb5, 0x01);  /* Setting MCLK to 256Fs */
1723
1724         afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */
1725         io_write_and_or(sd, 0x30, ~(1 << 4), pdata->output_bus_lsb_to_msb << 4);
1726
1727         state->prim_mode = pdata->prim_mode;
1728         select_input(sd, pdata->prim_mode);
1729
1730         enable_input(sd, pdata->prim_mode);
1731
1732         /* interrupts */
1733         io_write(sd, 0x40, 0xc2); /* Configure INT1 */
1734         io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */
1735         io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */
1736         io_write(sd, 0x6e, 0xc0); /* Enable V_LOCKED and DE_REGEN_LCK interrupts */
1737         io_write(sd, 0x73, 0x10); /* Enable CABLE_DET_A_ST (+5v) interrupt */
1738
1739         return v4l2_ctrl_handler_setup(sd->ctrl_handler);
1740 }
1741
1742 static void adv7604_unregister_clients(struct adv7604_state *state)
1743 {
1744         if (state->i2c_avlink)
1745                 i2c_unregister_device(state->i2c_avlink);
1746         if (state->i2c_cec)
1747                 i2c_unregister_device(state->i2c_cec);
1748         if (state->i2c_infoframe)
1749                 i2c_unregister_device(state->i2c_infoframe);
1750         if (state->i2c_esdp)
1751                 i2c_unregister_device(state->i2c_esdp);
1752         if (state->i2c_dpp)
1753                 i2c_unregister_device(state->i2c_dpp);
1754         if (state->i2c_afe)
1755                 i2c_unregister_device(state->i2c_afe);
1756         if (state->i2c_repeater)
1757                 i2c_unregister_device(state->i2c_repeater);
1758         if (state->i2c_edid)
1759                 i2c_unregister_device(state->i2c_edid);
1760         if (state->i2c_hdmi)
1761                 i2c_unregister_device(state->i2c_hdmi);
1762         if (state->i2c_test)
1763                 i2c_unregister_device(state->i2c_test);
1764         if (state->i2c_cp)
1765                 i2c_unregister_device(state->i2c_cp);
1766         if (state->i2c_vdp)
1767                 i2c_unregister_device(state->i2c_vdp);
1768 }
1769
1770 static struct i2c_client *adv7604_dummy_client(struct v4l2_subdev *sd,
1771                                                         u8 addr, u8 io_reg)
1772 {
1773         struct i2c_client *client = v4l2_get_subdevdata(sd);
1774
1775         if (addr)
1776                 io_write(sd, io_reg, addr << 1);
1777         return i2c_new_dummy(client->adapter, io_read(sd, io_reg) >> 1);
1778 }
1779
1780 static int adv7604_probe(struct i2c_client *client,
1781                          const struct i2c_device_id *id)
1782 {
1783         struct adv7604_state *state;
1784         struct adv7604_platform_data *pdata = client->dev.platform_data;
1785         struct v4l2_ctrl_handler *hdl;
1786         struct v4l2_subdev *sd;
1787         int err;
1788
1789         /* Check if the adapter supports the needed features */
1790         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1791                 return -EIO;
1792         v4l_dbg(1, debug, client, "detecting adv7604 client on address 0x%x\n",
1793                         client->addr << 1);
1794
1795         state = kzalloc(sizeof(struct adv7604_state), GFP_KERNEL);
1796         if (!state) {
1797                 v4l_err(client, "Could not allocate adv7604_state memory!\n");
1798                 return -ENOMEM;
1799         }
1800
1801         /* platform data */
1802         if (!pdata) {
1803                 v4l_err(client, "No platform data!\n");
1804                 err = -ENODEV;
1805                 goto err_state;
1806         }
1807         memcpy(&state->pdata, pdata, sizeof(state->pdata));
1808
1809         sd = &state->sd;
1810         v4l2_i2c_subdev_init(sd, client, &adv7604_ops);
1811         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1812         state->connector_hdmi = pdata->connector_hdmi;
1813
1814         /* i2c access to adv7604? */
1815         if (adv_smbus_read_byte_data_check(client, 0xfb, false) != 0x68) {
1816                 v4l2_info(sd, "not an adv7604 on address 0x%x\n",
1817                                 client->addr << 1);
1818                 err = -ENODEV;
1819                 goto err_state;
1820         }
1821
1822         /* control handlers */
1823         hdl = &state->hdl;
1824         v4l2_ctrl_handler_init(hdl, 9);
1825
1826         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1827                         V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
1828         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1829                         V4L2_CID_CONTRAST, 0, 255, 1, 128);
1830         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1831                         V4L2_CID_SATURATION, 0, 255, 1, 128);
1832         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1833                         V4L2_CID_HUE, 0, 128, 1, 0);
1834
1835         /* private controls */
1836         state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1837                         V4L2_CID_DV_RX_POWER_PRESENT, 0, 1, 0, 0);
1838         state->detect_tx_5v_ctrl->is_private = true;
1839         state->rgb_quantization_range_ctrl =
1840                 v4l2_ctrl_new_std_menu(hdl, &adv7604_ctrl_ops,
1841                         V4L2_CID_DV_RX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1842                         0, V4L2_DV_RGB_RANGE_AUTO);
1843         state->rgb_quantization_range_ctrl->is_private = true;
1844
1845         /* custom controls */
1846         state->analog_sampling_phase_ctrl =
1847                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_analog_sampling_phase, NULL);
1848         state->analog_sampling_phase_ctrl->is_private = true;
1849         state->free_run_color_manual_ctrl =
1850                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color_manual, NULL);
1851         state->free_run_color_manual_ctrl->is_private = true;
1852         state->free_run_color_ctrl =
1853                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color, NULL);
1854         state->free_run_color_ctrl->is_private = true;
1855
1856         sd->ctrl_handler = hdl;
1857         if (hdl->error) {
1858                 err = hdl->error;
1859                 goto err_hdl;
1860         }
1861         if (adv7604_s_detect_tx_5v_ctrl(sd)) {
1862                 err = -ENODEV;
1863                 goto err_hdl;
1864         }
1865
1866         state->i2c_avlink = adv7604_dummy_client(sd, pdata->i2c_avlink, 0xf3);
1867         state->i2c_cec = adv7604_dummy_client(sd, pdata->i2c_cec, 0xf4);
1868         state->i2c_infoframe = adv7604_dummy_client(sd, pdata->i2c_infoframe, 0xf5);
1869         state->i2c_esdp = adv7604_dummy_client(sd, pdata->i2c_esdp, 0xf6);
1870         state->i2c_dpp = adv7604_dummy_client(sd, pdata->i2c_dpp, 0xf7);
1871         state->i2c_afe = adv7604_dummy_client(sd, pdata->i2c_afe, 0xf8);
1872         state->i2c_repeater = adv7604_dummy_client(sd, pdata->i2c_repeater, 0xf9);
1873         state->i2c_edid = adv7604_dummy_client(sd, pdata->i2c_edid, 0xfa);
1874         state->i2c_hdmi = adv7604_dummy_client(sd, pdata->i2c_hdmi, 0xfb);
1875         state->i2c_test = adv7604_dummy_client(sd, pdata->i2c_test, 0xfc);
1876         state->i2c_cp = adv7604_dummy_client(sd, pdata->i2c_cp, 0xfd);
1877         state->i2c_vdp = adv7604_dummy_client(sd, pdata->i2c_vdp, 0xfe);
1878         if (!state->i2c_avlink || !state->i2c_cec || !state->i2c_infoframe ||
1879             !state->i2c_esdp || !state->i2c_dpp || !state->i2c_afe ||
1880             !state->i2c_repeater || !state->i2c_edid || !state->i2c_hdmi ||
1881             !state->i2c_test || !state->i2c_cp || !state->i2c_vdp) {
1882                 err = -ENOMEM;
1883                 v4l2_err(sd, "failed to create all i2c clients\n");
1884                 goto err_i2c;
1885         }
1886
1887         /* work queues */
1888         state->work_queues = create_singlethread_workqueue(client->name);
1889         if (!state->work_queues) {
1890                 v4l2_err(sd, "Could not create work queue\n");
1891                 err = -ENOMEM;
1892                 goto err_i2c;
1893         }
1894
1895         INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug,
1896                         adv7604_delayed_work_enable_hotplug);
1897
1898         state->pad.flags = MEDIA_PAD_FL_SOURCE;
1899         err = media_entity_init(&sd->entity, 1, &state->pad, 0);
1900         if (err)
1901                 goto err_work_queues;
1902
1903         err = adv7604_core_init(sd);
1904         if (err)
1905                 goto err_entity;
1906         v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1907                         client->addr << 1, client->adapter->name);
1908         return 0;
1909
1910 err_entity:
1911         media_entity_cleanup(&sd->entity);
1912 err_work_queues:
1913         cancel_delayed_work(&state->delayed_work_enable_hotplug);
1914         destroy_workqueue(state->work_queues);
1915 err_i2c:
1916         adv7604_unregister_clients(state);
1917 err_hdl:
1918         v4l2_ctrl_handler_free(hdl);
1919 err_state:
1920         kfree(state);
1921         return err;
1922 }
1923
1924 /* ----------------------------------------------------------------------- */
1925
1926 static int adv7604_remove(struct i2c_client *client)
1927 {
1928         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1929         struct adv7604_state *state = to_state(sd);
1930
1931         cancel_delayed_work(&state->delayed_work_enable_hotplug);
1932         destroy_workqueue(state->work_queues);
1933         v4l2_device_unregister_subdev(sd);
1934         media_entity_cleanup(&sd->entity);
1935         adv7604_unregister_clients(to_state(sd));
1936         v4l2_ctrl_handler_free(sd->ctrl_handler);
1937         kfree(to_state(sd));
1938         return 0;
1939 }
1940
1941 /* ----------------------------------------------------------------------- */
1942
1943 static struct i2c_device_id adv7604_id[] = {
1944         { "adv7604", 0 },
1945         { }
1946 };
1947 MODULE_DEVICE_TABLE(i2c, adv7604_id);
1948
1949 static struct i2c_driver adv7604_driver = {
1950         .driver = {
1951                 .owner = THIS_MODULE,
1952                 .name = "adv7604",
1953         },
1954         .probe = adv7604_probe,
1955         .remove = adv7604_remove,
1956         .id_table = adv7604_id,
1957 };
1958
1959 module_i2c_driver(adv7604_driver);