2 * adv7343 - ADV7343 Video Encoder Driver
4 * The encoder hardware does not support SECAM.
6 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2.
12 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/ctype.h>
21 #include <linux/slab.h>
22 #include <linux/i2c.h>
23 #include <linux/device.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <linux/videodev2.h>
27 #include <linux/uaccess.h>
29 #include <media/adv7343.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-chip-ident.h>
32 #include <media/v4l2-ctrls.h>
34 #include "adv7343_regs.h"
36 MODULE_DESCRIPTION("ADV7343 video encoder driver");
37 MODULE_LICENSE("GPL");
40 module_param(debug, int, 0644);
41 MODULE_PARM_DESC(debug, "Debug level 0-1");
43 struct adv7343_state {
44 struct v4l2_subdev sd;
45 struct v4l2_ctrl_handler hdl;
46 const struct adv7343_platform_data *pdata;
57 static inline struct adv7343_state *to_state(struct v4l2_subdev *sd)
59 return container_of(sd, struct adv7343_state, sd);
62 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
64 return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
67 static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
69 struct i2c_client *client = v4l2_get_subdevdata(sd);
71 return i2c_smbus_write_byte_data(client, reg, value);
74 static const u8 adv7343_init_reg_val[] = {
75 ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
76 ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,
78 ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
79 ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
80 ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
81 ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
82 ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
83 ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
84 ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,
86 ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
87 ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
88 ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
89 ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
90 ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
91 ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
92 ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
93 ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,
95 ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
96 ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
97 ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
102 * FSC(reg) = FSC (HZ) * --------
105 static const struct adv7343_std_info stdinfo[] = {
107 /* FSC(Hz) = 3,579,545.45 Hz */
108 SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
110 /* FSC(Hz) = 3,575,611.00 Hz */
111 SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
113 /* FSC(Hz) = 3,582,056.00 */
114 SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
116 /* FSC(Hz) = 4,433,618.75 Hz */
117 SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
119 /* FSC(Hz) = 4,433,618.75 Hz */
120 SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
122 /* FSC(Hz) = 4,433,618.75 Hz */
123 SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
125 /* FSC(Hz) = 4,433,618.75 Hz */
126 SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
130 static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
132 struct adv7343_state *state = to_state(sd);
133 struct adv7343_std_info *std_info;
140 std_info = (struct adv7343_std_info *)stdinfo;
141 num_std = ARRAY_SIZE(stdinfo);
143 for (i = 0; i < num_std; i++) {
144 if (std_info[i].stdid & std)
149 v4l2_dbg(1, debug, sd,
150 "Invalid std or std is not supported: %llx\n",
151 (unsigned long long)std);
155 /* Set the standard */
156 val = state->reg80 & (~(SD_STD_MASK));
157 val |= std_info[i].standard_val3;
158 err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
164 /* Configure the input mode register */
165 val = state->reg01 & (~((u8) INPUT_MODE_MASK));
166 val |= SD_INPUT_MODE;
167 err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
173 /* Program the sub carrier frequency registers */
174 fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
175 reg = ADV7343_FSC_REG0;
176 for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
177 err = adv7343_write(sd, reg, *fsc_ptr);
184 /* Filter settings */
185 if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
187 else if (std & ~V4L2_STD_SECAM)
190 err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
198 v4l2_err(sd, "Error setting std, write failed\n");
203 static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
205 struct adv7343_state *state = to_state(sd);
209 if (output_type > ADV7343_SVIDEO_ID) {
210 v4l2_dbg(1, debug, sd,
211 "Invalid output type or output type not supported:%d\n",
216 /* Enable Appropriate DAC */
217 val = state->reg00 & 0x03;
219 /* configure default configuration */
221 if (output_type == ADV7343_COMPOSITE_ID)
222 val |= ADV7343_COMPOSITE_POWER_VALUE;
223 else if (output_type == ADV7343_COMPONENT_ID)
224 val |= ADV7343_COMPONENT_POWER_VALUE;
226 val |= ADV7343_SVIDEO_POWER_VALUE;
228 val = state->pdata->mode_config.sleep_mode << 0 |
229 state->pdata->mode_config.pll_control << 1 |
230 state->pdata->mode_config.dac_3 << 2 |
231 state->pdata->mode_config.dac_2 << 3 |
232 state->pdata->mode_config.dac_1 << 4 |
233 state->pdata->mode_config.dac_6 << 5 |
234 state->pdata->mode_config.dac_5 << 6 |
235 state->pdata->mode_config.dac_4 << 7;
237 err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
243 /* Enable YUV output */
244 val = state->reg02 | YUV_OUTPUT_SELECT;
245 err = adv7343_write(sd, ADV7343_MODE_REG0, val);
251 /* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
252 val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
254 if (state->pdata && state->pdata->sd_config.sd_dac_out1)
255 val = val | (state->pdata->sd_config.sd_dac_out1 << 1);
256 else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
257 val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);
259 if (state->pdata && state->pdata->sd_config.sd_dac_out2)
260 val = val | (state->pdata->sd_config.sd_dac_out2 << 2);
261 else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
262 val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);
264 err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
270 /* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
272 val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
273 err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
281 v4l2_err(sd, "Error setting output, write failed\n");
286 static int adv7343_log_status(struct v4l2_subdev *sd)
288 struct adv7343_state *state = to_state(sd);
290 v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
291 v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
292 ((state->output == 1) ? "Component" : "S-Video"));
296 static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
298 struct v4l2_subdev *sd = to_sd(ctrl);
301 case V4L2_CID_BRIGHTNESS:
302 return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
306 return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);
309 return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
314 static int adv7343_g_chip_ident(struct v4l2_subdev *sd,
315 struct v4l2_dbg_chip_ident *chip)
317 struct i2c_client *client = v4l2_get_subdevdata(sd);
319 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7343, 0);
322 static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
323 .s_ctrl = adv7343_s_ctrl,
326 static const struct v4l2_subdev_core_ops adv7343_core_ops = {
327 .log_status = adv7343_log_status,
328 .g_chip_ident = adv7343_g_chip_ident,
329 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
330 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
331 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
332 .g_ctrl = v4l2_subdev_g_ctrl,
333 .s_ctrl = v4l2_subdev_s_ctrl,
334 .queryctrl = v4l2_subdev_queryctrl,
335 .querymenu = v4l2_subdev_querymenu,
338 static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
340 struct adv7343_state *state = to_state(sd);
343 if (state->std == std)
346 err = adv7343_setstd(sd, std);
353 static int adv7343_s_routing(struct v4l2_subdev *sd,
354 u32 input, u32 output, u32 config)
356 struct adv7343_state *state = to_state(sd);
359 if (state->output == output)
362 err = adv7343_setoutput(sd, output);
364 state->output = output;
369 static const struct v4l2_subdev_video_ops adv7343_video_ops = {
370 .s_std_output = adv7343_s_std_output,
371 .s_routing = adv7343_s_routing,
374 static const struct v4l2_subdev_ops adv7343_ops = {
375 .core = &adv7343_core_ops,
376 .video = &adv7343_video_ops,
379 static int adv7343_initialize(struct v4l2_subdev *sd)
381 struct adv7343_state *state = to_state(sd);
385 for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {
387 err = adv7343_write(sd, adv7343_init_reg_val[i],
388 adv7343_init_reg_val[i+1]);
390 v4l2_err(sd, "Error initializing\n");
395 /* Configure for default video standard */
396 err = adv7343_setoutput(sd, state->output);
398 v4l2_err(sd, "Error setting output during init\n");
402 err = adv7343_setstd(sd, state->std);
404 v4l2_err(sd, "Error setting std during init\n");
411 static int adv7343_probe(struct i2c_client *client,
412 const struct i2c_device_id *id)
414 struct adv7343_state *state;
417 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
420 v4l_info(client, "chip found @ 0x%x (%s)\n",
421 client->addr << 1, client->adapter->name);
423 state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
428 /* Copy board specific information here */
429 state->pdata = client->dev.platform_data;
435 state->reg80 = ADV7343_SD_MODE_REG1_DEFAULT;
436 state->reg82 = ADV7343_SD_MODE_REG2_DEFAULT;
438 state->output = ADV7343_COMPOSITE_ID;
439 state->std = V4L2_STD_NTSC;
441 v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);
443 v4l2_ctrl_handler_init(&state->hdl, 2);
444 v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
445 V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
446 ADV7343_BRIGHTNESS_MAX, 1,
447 ADV7343_BRIGHTNESS_DEF);
448 v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
449 V4L2_CID_HUE, ADV7343_HUE_MIN,
452 v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
453 V4L2_CID_GAIN, ADV7343_GAIN_MIN,
456 state->sd.ctrl_handler = &state->hdl;
457 if (state->hdl.error) {
458 int err = state->hdl.error;
460 v4l2_ctrl_handler_free(&state->hdl);
463 v4l2_ctrl_handler_setup(&state->hdl);
465 err = adv7343_initialize(&state->sd);
467 v4l2_ctrl_handler_free(&state->hdl);
471 static int adv7343_remove(struct i2c_client *client)
473 struct v4l2_subdev *sd = i2c_get_clientdata(client);
474 struct adv7343_state *state = to_state(sd);
476 v4l2_device_unregister_subdev(sd);
477 v4l2_ctrl_handler_free(&state->hdl);
482 static const struct i2c_device_id adv7343_id[] = {
487 MODULE_DEVICE_TABLE(i2c, adv7343_id);
489 static struct i2c_driver adv7343_driver = {
491 .owner = THIS_MODULE,
494 .probe = adv7343_probe,
495 .remove = adv7343_remove,
496 .id_table = adv7343_id,
499 module_i2c_driver(adv7343_driver);