Merge branches 'arm/rockchip', 'arm/exynos', 'arm/smmu', 'x86/vt-d', 'x86/amd', ...
[firefly-linux-kernel-4.4.55.git] / drivers / media / dvb-frontends / ts2020.c
1 /*
2     Montage Technology TS2020 - Silicon Tuner driver
3     Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
4
5     Copyright (C) 2009-2012 TurboSight.com
6
7     This program is free software; you can redistribute it and/or modify
8     it under the terms of the GNU General Public License as published by
9     the Free Software Foundation; either version 2 of the License, or
10     (at your option) any later version.
11
12     This program is distributed in the hope that it will be useful,
13     but WITHOUT ANY WARRANTY; without even the implied warranty of
14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15     GNU General Public License for more details.
16
17     You should have received a copy of the GNU General Public License
18     along with this program; if not, write to the Free Software
19     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include "dvb_frontend.h"
23 #include "ts2020.h"
24
25 #define TS2020_XTAL_FREQ   27000 /* in kHz */
26 #define FREQ_OFFSET_LOW_SYM_RATE 3000
27
28 struct ts2020_priv {
29         struct dvb_frontend *fe;
30         /* i2c details */
31         int i2c_address;
32         struct i2c_adapter *i2c;
33         u8 clk_out:2;
34         u8 clk_out_div:5;
35         u32 frequency;
36         u32 frequency_div;
37 #define TS2020_M88TS2020 0
38 #define TS2020_M88TS2022 1
39         u8 tuner;
40         u8 loop_through:1;
41 };
42
43 struct ts2020_reg_val {
44         u8 reg;
45         u8 val;
46 };
47
48 static int ts2020_release(struct dvb_frontend *fe)
49 {
50         kfree(fe->tuner_priv);
51         fe->tuner_priv = NULL;
52         return 0;
53 }
54
55 static int ts2020_writereg(struct dvb_frontend *fe, int reg, int data)
56 {
57         struct ts2020_priv *priv = fe->tuner_priv;
58         u8 buf[] = { reg, data };
59         struct i2c_msg msg[] = {
60                 {
61                         .addr = priv->i2c_address,
62                         .flags = 0,
63                         .buf = buf,
64                         .len = 2
65                 }
66         };
67         int err;
68
69         if (fe->ops.i2c_gate_ctrl)
70                 fe->ops.i2c_gate_ctrl(fe, 1);
71
72         err = i2c_transfer(priv->i2c, msg, 1);
73         if (err != 1) {
74                 printk(KERN_ERR
75                        "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n",
76                        __func__, err, reg, data);
77                 return -EREMOTEIO;
78         }
79
80         if (fe->ops.i2c_gate_ctrl)
81                 fe->ops.i2c_gate_ctrl(fe, 0);
82
83         return 0;
84 }
85
86 static int ts2020_readreg(struct dvb_frontend *fe, u8 reg)
87 {
88         struct ts2020_priv *priv = fe->tuner_priv;
89         int ret;
90         u8 b0[] = { reg };
91         u8 b1[] = { 0 };
92         struct i2c_msg msg[] = {
93                 {
94                         .addr = priv->i2c_address,
95                         .flags = 0,
96                         .buf = b0,
97                         .len = 1
98                 }, {
99                         .addr = priv->i2c_address,
100                         .flags = I2C_M_RD,
101                         .buf = b1,
102                         .len = 1
103                 }
104         };
105
106         if (fe->ops.i2c_gate_ctrl)
107                 fe->ops.i2c_gate_ctrl(fe, 1);
108
109         ret = i2c_transfer(priv->i2c, msg, 2);
110
111         if (ret != 2) {
112                 printk(KERN_ERR "%s: reg=0x%x(error=%d)\n",
113                        __func__, reg, ret);
114                 return ret;
115         }
116
117         if (fe->ops.i2c_gate_ctrl)
118                 fe->ops.i2c_gate_ctrl(fe, 0);
119
120         return b1[0];
121 }
122
123 static int ts2020_sleep(struct dvb_frontend *fe)
124 {
125         struct ts2020_priv *priv = fe->tuner_priv;
126         u8 u8tmp;
127
128         if (priv->tuner == TS2020_M88TS2020)
129                 u8tmp = 0x0a; /* XXX: probably wrong */
130         else
131                 u8tmp = 0x00;
132
133         return ts2020_writereg(fe, u8tmp, 0x00);
134 }
135
136 static int ts2020_init(struct dvb_frontend *fe)
137 {
138         struct ts2020_priv *priv = fe->tuner_priv;
139         int i;
140         u8 u8tmp;
141
142         if (priv->tuner == TS2020_M88TS2020) {
143                 ts2020_writereg(fe, 0x42, 0x73);
144                 ts2020_writereg(fe, 0x05, priv->clk_out_div);
145                 ts2020_writereg(fe, 0x20, 0x27);
146                 ts2020_writereg(fe, 0x07, 0x02);
147                 ts2020_writereg(fe, 0x11, 0xff);
148                 ts2020_writereg(fe, 0x60, 0xf9);
149                 ts2020_writereg(fe, 0x08, 0x01);
150                 ts2020_writereg(fe, 0x00, 0x41);
151         } else {
152                 static const struct ts2020_reg_val reg_vals[] = {
153                         {0x7d, 0x9d},
154                         {0x7c, 0x9a},
155                         {0x7a, 0x76},
156                         {0x3b, 0x01},
157                         {0x63, 0x88},
158                         {0x61, 0x85},
159                         {0x22, 0x30},
160                         {0x30, 0x40},
161                         {0x20, 0x23},
162                         {0x24, 0x02},
163                         {0x12, 0xa0},
164                 };
165
166                 ts2020_writereg(fe, 0x00, 0x01);
167                 ts2020_writereg(fe, 0x00, 0x03);
168
169                 switch (priv->clk_out) {
170                 case TS2020_CLK_OUT_DISABLED:
171                         u8tmp = 0x60;
172                         break;
173                 case TS2020_CLK_OUT_ENABLED:
174                         u8tmp = 0x70;
175                         ts2020_writereg(fe, 0x05, priv->clk_out_div);
176                         break;
177                 case TS2020_CLK_OUT_ENABLED_XTALOUT:
178                         u8tmp = 0x6c;
179                         break;
180                 default:
181                         u8tmp = 0x60;
182                         break;
183                 }
184
185                 ts2020_writereg(fe, 0x42, u8tmp);
186
187                 if (priv->loop_through)
188                         u8tmp = 0xec;
189                 else
190                         u8tmp = 0x6c;
191
192                 ts2020_writereg(fe, 0x62, u8tmp);
193
194                 for (i = 0; i < ARRAY_SIZE(reg_vals); i++)
195                         ts2020_writereg(fe, reg_vals[i].reg, reg_vals[i].val);
196         }
197
198         return 0;
199 }
200
201 static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
202 {
203         int ret;
204         ret = ts2020_writereg(fe, 0x51, 0x1f - offset);
205         ret |= ts2020_writereg(fe, 0x51, 0x1f);
206         ret |= ts2020_writereg(fe, 0x50, offset);
207         ret |= ts2020_writereg(fe, 0x50, 0x00);
208         msleep(20);
209         return ret;
210 }
211
212 static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
213 {
214         int reg;
215
216         reg = ts2020_readreg(fe, 0x3d);
217         reg &= 0x7f;
218         if (reg < 0x16)
219                 reg = 0xa1;
220         else if (reg == 0x16)
221                 reg = 0x99;
222         else
223                 reg = 0xf9;
224
225         ts2020_writereg(fe, 0x60, reg);
226         reg = ts2020_tuner_gate_ctrl(fe, 0x08);
227
228         return reg;
229 }
230
231 static int ts2020_set_params(struct dvb_frontend *fe)
232 {
233         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
234         struct ts2020_priv *priv = fe->tuner_priv;
235         int ret;
236         u32 frequency = c->frequency;
237         s32 offset_khz;
238         u32 symbol_rate = (c->symbol_rate / 1000);
239         u32 f3db, gdiv28;
240         u16 value, ndiv, lpf_coeff;
241         u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
242         u8 lo = 0x01, div4 = 0x0;
243
244         /* Calculate frequency divider */
245         if (frequency < priv->frequency_div) {
246                 lo |= 0x10;
247                 div4 = 0x1;
248                 ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ;
249         } else
250                 ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ;
251         ndiv = ndiv + ndiv % 2;
252         ndiv = ndiv - 1024;
253
254         if (priv->tuner == TS2020_M88TS2020) {
255                 lpf_coeff = 2766;
256                 ret = ts2020_writereg(fe, 0x10, 0x80 | lo);
257         } else {
258                 lpf_coeff = 3200;
259                 ret = ts2020_writereg(fe, 0x10, 0x0b);
260                 ret |= ts2020_writereg(fe, 0x11, 0x40);
261         }
262
263         /* Set frequency divider */
264         ret |= ts2020_writereg(fe, 0x01, (ndiv >> 8) & 0xf);
265         ret |= ts2020_writereg(fe, 0x02, ndiv & 0xff);
266
267         ret |= ts2020_writereg(fe, 0x03, 0x06);
268         ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
269         if (ret < 0)
270                 return -ENODEV;
271
272         /* Tuner Frequency Range */
273         ret = ts2020_writereg(fe, 0x10, lo);
274
275         ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
276
277         /* Tuner RF */
278         if (priv->tuner == TS2020_M88TS2020)
279                 ret |= ts2020_set_tuner_rf(fe);
280
281         gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
282         ret |= ts2020_writereg(fe, 0x04, gdiv28 & 0xff);
283         ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
284         if (ret < 0)
285                 return -ENODEV;
286
287         if (priv->tuner == TS2020_M88TS2022) {
288                 ret = ts2020_writereg(fe, 0x25, 0x00);
289                 ret |= ts2020_writereg(fe, 0x27, 0x70);
290                 ret |= ts2020_writereg(fe, 0x41, 0x09);
291                 ret |= ts2020_writereg(fe, 0x08, 0x0b);
292                 if (ret < 0)
293                         return -ENODEV;
294         }
295
296         value = ts2020_readreg(fe, 0x26);
297
298         f3db = (symbol_rate * 135) / 200 + 2000;
299         f3db += FREQ_OFFSET_LOW_SYM_RATE;
300         if (f3db < 7000)
301                 f3db = 7000;
302         if (f3db > 40000)
303                 f3db = 40000;
304
305         gdiv28 = gdiv28 * 207 / (value * 2 + 151);
306         mlpf_max = gdiv28 * 135 / 100;
307         mlpf_min = gdiv28 * 78 / 100;
308         if (mlpf_max > 63)
309                 mlpf_max = 63;
310
311         nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
312                 (TS2020_XTAL_FREQ / 1000)  + 1) / 2;
313         if (nlpf > 23)
314                 nlpf = 23;
315         if (nlpf < 1)
316                 nlpf = 1;
317
318         lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
319                 * lpf_coeff * 2  / f3db + 1) / 2;
320
321         if (lpf_mxdiv < mlpf_min) {
322                 nlpf++;
323                 lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
324                         * lpf_coeff * 2  / f3db + 1) / 2;
325         }
326
327         if (lpf_mxdiv > mlpf_max)
328                 lpf_mxdiv = mlpf_max;
329
330         ret = ts2020_writereg(fe, 0x04, lpf_mxdiv);
331         ret |= ts2020_writereg(fe, 0x06, nlpf);
332
333         ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
334
335         ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
336
337         msleep(80);
338         /* calculate offset assuming 96000kHz*/
339         offset_khz = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
340                 / (6 + 8) / (div4 + 1) / 2;
341
342         priv->frequency = offset_khz;
343
344         return (ret < 0) ? -EINVAL : 0;
345 }
346
347 static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
348 {
349         struct ts2020_priv *priv = fe->tuner_priv;
350         *frequency = priv->frequency;
351
352         return 0;
353 }
354
355 static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
356 {
357         *frequency = 0; /* Zero-IF */
358         return 0;
359 }
360
361 /* read TS2020 signal strength */
362 static int ts2020_read_signal_strength(struct dvb_frontend *fe,
363                                                 u16 *signal_strength)
364 {
365         u16 sig_reading, sig_strength;
366         u8 rfgain, bbgain;
367
368         rfgain = ts2020_readreg(fe, 0x3d) & 0x1f;
369         bbgain = ts2020_readreg(fe, 0x21) & 0x1f;
370
371         if (rfgain > 15)
372                 rfgain = 15;
373         if (bbgain > 13)
374                 bbgain = 13;
375
376         sig_reading = rfgain * 2 + bbgain * 3;
377
378         sig_strength = 40 + (64 - sig_reading) * 50 / 64 ;
379
380         /* cook the value to be suitable for szap-s2 human readable output */
381         *signal_strength = sig_strength * 1000;
382
383         return 0;
384 }
385
386 static struct dvb_tuner_ops ts2020_tuner_ops = {
387         .info = {
388                 .name = "TS2020",
389                 .frequency_min = 950000,
390                 .frequency_max = 2150000
391         },
392         .init = ts2020_init,
393         .release = ts2020_release,
394         .sleep = ts2020_sleep,
395         .set_params = ts2020_set_params,
396         .get_frequency = ts2020_get_frequency,
397         .get_if_frequency = ts2020_get_if_frequency,
398         .get_rf_strength = ts2020_read_signal_strength,
399 };
400
401 struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
402                                         const struct ts2020_config *config,
403                                         struct i2c_adapter *i2c)
404 {
405         struct ts2020_priv *priv = NULL;
406         u8 buf;
407
408         priv = kzalloc(sizeof(struct ts2020_priv), GFP_KERNEL);
409         if (priv == NULL)
410                 return NULL;
411
412         priv->i2c_address = config->tuner_address;
413         priv->i2c = i2c;
414         priv->clk_out = config->clk_out;
415         priv->clk_out_div = config->clk_out_div;
416         priv->frequency_div = config->frequency_div;
417         priv->fe = fe;
418         fe->tuner_priv = priv;
419
420         if (!priv->frequency_div)
421                 priv->frequency_div = 1060000;
422
423         /* Wake Up the tuner */
424         if ((0x03 & ts2020_readreg(fe, 0x00)) == 0x00) {
425                 ts2020_writereg(fe, 0x00, 0x01);
426                 msleep(2);
427         }
428
429         ts2020_writereg(fe, 0x00, 0x03);
430         msleep(2);
431
432         /* Check the tuner version */
433         buf = ts2020_readreg(fe, 0x00);
434         if ((buf == 0x01) || (buf == 0x41) || (buf == 0x81)) {
435                 printk(KERN_INFO "%s: Find tuner TS2020!\n", __func__);
436                 priv->tuner = TS2020_M88TS2020;
437         } else if ((buf == 0x83) || (buf == 0xc3)) {
438                 printk(KERN_INFO "%s: Find tuner TS2022!\n", __func__);
439                 priv->tuner = TS2020_M88TS2022;
440         } else {
441                 printk(KERN_ERR "%s: Read tuner reg[0] = %d\n", __func__, buf);
442                 kfree(priv);
443                 return NULL;
444         }
445
446         memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
447                                 sizeof(struct dvb_tuner_ops));
448
449         return fe;
450 }
451 EXPORT_SYMBOL(ts2020_attach);
452
453 static int ts2020_probe(struct i2c_client *client,
454                 const struct i2c_device_id *id)
455 {
456         struct ts2020_config *pdata = client->dev.platform_data;
457         struct dvb_frontend *fe = pdata->fe;
458         struct ts2020_priv *dev;
459         int ret;
460         u8 u8tmp;
461         unsigned int utmp;
462         char *chip_str;
463
464         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
465         if (!dev) {
466                 ret = -ENOMEM;
467                 goto err;
468         }
469
470         dev->i2c = client->adapter;
471         dev->i2c_address = client->addr;
472         dev->clk_out = pdata->clk_out;
473         dev->clk_out_div = pdata->clk_out_div;
474         dev->frequency_div = pdata->frequency_div;
475         dev->fe = fe;
476         fe->tuner_priv = dev;
477
478         /* check if the tuner is there */
479         ret = ts2020_readreg(fe, 0x00);
480         if (ret < 0)
481                 goto err;
482         utmp = ret;
483
484         if ((utmp & 0x03) == 0x00) {
485                 ret = ts2020_writereg(fe, 0x00, 0x01);
486                 if (ret)
487                         goto err;
488
489                 usleep_range(2000, 50000);
490         }
491
492         ret = ts2020_writereg(fe, 0x00, 0x03);
493         if (ret)
494                 goto err;
495
496         usleep_range(2000, 50000);
497
498         ret = ts2020_readreg(fe, 0x00);
499         if (ret < 0)
500                 goto err;
501         utmp = ret;
502
503         dev_dbg(&client->dev, "chip_id=%02x\n", utmp);
504
505         switch (utmp) {
506         case 0x01:
507         case 0x41:
508         case 0x81:
509                 dev->tuner = TS2020_M88TS2020;
510                 chip_str = "TS2020";
511                 if (!dev->frequency_div)
512                         dev->frequency_div = 1060000;
513                 break;
514         case 0xc3:
515         case 0x83:
516                 dev->tuner = TS2020_M88TS2022;
517                 chip_str = "TS2022";
518                 if (!dev->frequency_div)
519                         dev->frequency_div = 1103000;
520                 break;
521         default:
522                 ret = -ENODEV;
523                 goto err;
524         }
525
526         if (dev->tuner == TS2020_M88TS2022) {
527                 switch (dev->clk_out) {
528                 case TS2020_CLK_OUT_DISABLED:
529                         u8tmp = 0x60;
530                         break;
531                 case TS2020_CLK_OUT_ENABLED:
532                         u8tmp = 0x70;
533                         ret = ts2020_writereg(fe, 0x05, dev->clk_out_div);
534                         if (ret)
535                                 goto err;
536                         break;
537                 case TS2020_CLK_OUT_ENABLED_XTALOUT:
538                         u8tmp = 0x6c;
539                         break;
540                 default:
541                         ret = -EINVAL;
542                         goto err;
543                 }
544
545                 ret = ts2020_writereg(fe, 0x42, u8tmp);
546                 if (ret)
547                         goto err;
548
549                 if (dev->loop_through)
550                         u8tmp = 0xec;
551                 else
552                         u8tmp = 0x6c;
553
554                 ret = ts2020_writereg(fe, 0x62, u8tmp);
555                 if (ret)
556                         goto err;
557         }
558
559         /* sleep */
560         ret = ts2020_writereg(fe, 0x00, 0x00);
561         if (ret)
562                 goto err;
563
564         dev_info(&client->dev,
565                  "Montage Technology %s successfully identified\n", chip_str);
566
567         memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
568                         sizeof(struct dvb_tuner_ops));
569         fe->ops.tuner_ops.release = NULL;
570
571         i2c_set_clientdata(client, dev);
572         return 0;
573 err:
574         dev_dbg(&client->dev, "failed=%d\n", ret);
575         kfree(dev);
576         return ret;
577 }
578
579 static int ts2020_remove(struct i2c_client *client)
580 {
581         struct ts2020_priv *dev = i2c_get_clientdata(client);
582         struct dvb_frontend *fe = dev->fe;
583
584         dev_dbg(&client->dev, "\n");
585
586         memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
587         fe->tuner_priv = NULL;
588         kfree(dev);
589
590         return 0;
591 }
592
593 static const struct i2c_device_id ts2020_id_table[] = {
594         {"ts2020", 0},
595         {"ts2022", 0},
596         {}
597 };
598 MODULE_DEVICE_TABLE(i2c, ts2020_id_table);
599
600 static struct i2c_driver ts2020_driver = {
601         .driver = {
602                 .owner  = THIS_MODULE,
603                 .name   = "ts2020",
604         },
605         .probe          = ts2020_probe,
606         .remove         = ts2020_remove,
607         .id_table       = ts2020_id_table,
608 };
609
610 module_i2c_driver(ts2020_driver);
611
612 MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
613 MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
614 MODULE_LICENSE("GPL");