2 Driver for M88RS2000 demodulator and tuner
4 Copyright (C) 2012 Malcolm Priestley (tvboxspy@gmail.com)
7 Include various calculation code from DS3000 driver.
8 Copyright (C) 2009 Konstantin Dimitrov.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/device.h>
28 #include <linux/jiffies.h>
29 #include <linux/string.h>
30 #include <linux/slab.h>
31 #include <linux/types.h>
34 #include "dvb_frontend.h"
35 #include "m88rs2000.h"
37 struct m88rs2000_state {
38 struct i2c_adapter *i2c;
39 const struct m88rs2000_config *config;
40 struct dvb_frontend frontend;
44 fe_code_rate_t fec_inner;
49 static int m88rs2000_debug;
51 module_param_named(debug, m88rs2000_debug, int, 0644);
52 MODULE_PARM_DESC(debug, "set debugging level (1=info (or-able)).");
54 #define dprintk(level, args...) do { \
55 if (level & m88rs2000_debug) \
56 printk(KERN_DEBUG "m88rs2000-fe: " args); \
59 #define deb_info(args...) dprintk(0x01, args)
60 #define info(format, arg...) \
61 printk(KERN_INFO "m88rs2000-fe: " format "\n" , ## arg)
63 static int m88rs2000_writereg(struct m88rs2000_state *state,
67 u8 buf[] = { reg, data };
68 struct i2c_msg msg = {
69 .addr = state->config->demod_addr,
75 ret = i2c_transfer(state->i2c, &msg, 1);
78 deb_info("%s: writereg error (reg == 0x%02x, val == 0x%02x, "
79 "ret == %i)\n", __func__, reg, data, ret);
81 return (ret != 1) ? -EREMOTEIO : 0;
84 static u8 m88rs2000_readreg(struct m88rs2000_state *state, u8 reg)
90 struct i2c_msg msg[] = {
92 .addr = state->config->demod_addr,
97 .addr = state->config->demod_addr,
104 ret = i2c_transfer(state->i2c, msg, 2);
107 deb_info("%s: readreg error (reg == 0x%02x, ret == %i)\n",
113 static u32 m88rs2000_get_mclk(struct dvb_frontend *fe)
115 struct m88rs2000_state *state = fe->demodulator_priv;
118 /* Must not be 0x00 or 0xff */
119 reg = m88rs2000_readreg(state, 0x86);
120 if (!reg || reg == 0xff)
126 mclk = (u32)(reg * RS2000_FE_CRYSTAL_KHZ + 28 / 2) / 28;
131 static int m88rs2000_set_carrieroffset(struct dvb_frontend *fe, s16 offset)
133 struct m88rs2000_state *state = fe->demodulator_priv;
139 mclk = m88rs2000_get_mclk(fe);
143 tmp = (offset * 4096 + (s32)mclk / 2) / (s32)mclk;
148 ret = m88rs2000_writereg(state, 0x9c, (u8)(tmp >> 4));
150 reg = m88rs2000_readreg(state, 0x9d);
152 reg |= (u8)(tmp & 0xf) << 4;
154 ret |= m88rs2000_writereg(state, 0x9d, reg);
159 static int m88rs2000_set_symbolrate(struct dvb_frontend *fe, u32 srate)
161 struct m88rs2000_state *state = fe->demodulator_priv;
166 if ((srate < 1000000) || (srate > 45000000))
174 b[0] = (u8) (temp >> 16) & 0xff;
175 b[1] = (u8) (temp >> 8) & 0xff;
176 b[2] = (u8) temp & 0xff;
177 ret = m88rs2000_writereg(state, 0x93, b[2]);
178 ret |= m88rs2000_writereg(state, 0x94, b[1]);
179 ret |= m88rs2000_writereg(state, 0x95, b[0]);
181 deb_info("m88rs2000: m88rs2000_set_symbolrate\n");
185 static int m88rs2000_send_diseqc_msg(struct dvb_frontend *fe,
186 struct dvb_diseqc_master_cmd *m)
188 struct m88rs2000_state *state = fe->demodulator_priv;
192 deb_info("%s\n", __func__);
193 m88rs2000_writereg(state, 0x9a, 0x30);
194 reg = m88rs2000_readreg(state, 0xb2);
196 m88rs2000_writereg(state, 0xb2, reg);
197 for (i = 0; i < m->msg_len; i++)
198 m88rs2000_writereg(state, 0xb3 + i, m->msg[i]);
200 reg = m88rs2000_readreg(state, 0xb1);
202 reg |= ((m->msg_len - 1) << 3) | 0x07;
204 m88rs2000_writereg(state, 0xb1, reg);
206 for (i = 0; i < 15; i++) {
207 if ((m88rs2000_readreg(state, 0xb1) & 0x40) == 0x0)
212 reg = m88rs2000_readreg(state, 0xb1);
213 if ((reg & 0x40) > 0x0) {
216 m88rs2000_writereg(state, 0xb1, reg);
219 reg = m88rs2000_readreg(state, 0xb2);
222 m88rs2000_writereg(state, 0xb2, reg);
223 m88rs2000_writereg(state, 0x9a, 0xb0);
229 static int m88rs2000_send_diseqc_burst(struct dvb_frontend *fe,
230 fe_sec_mini_cmd_t burst)
232 struct m88rs2000_state *state = fe->demodulator_priv;
234 deb_info("%s\n", __func__);
235 m88rs2000_writereg(state, 0x9a, 0x30);
237 reg0 = m88rs2000_readreg(state, 0xb1);
238 reg1 = m88rs2000_readreg(state, 0xb2);
239 /* TODO complete this section */
240 m88rs2000_writereg(state, 0xb2, reg1);
241 m88rs2000_writereg(state, 0xb1, reg0);
242 m88rs2000_writereg(state, 0x9a, 0xb0);
247 static int m88rs2000_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
249 struct m88rs2000_state *state = fe->demodulator_priv;
251 m88rs2000_writereg(state, 0x9a, 0x30);
252 reg0 = m88rs2000_readreg(state, 0xb1);
253 reg1 = m88rs2000_readreg(state, 0xb2);
268 m88rs2000_writereg(state, 0xb2, reg1);
269 m88rs2000_writereg(state, 0xb1, reg0);
270 m88rs2000_writereg(state, 0x9a, 0xb0);
280 struct inittab m88rs2000_setup[] = {
281 {DEMOD_WRITE, 0x9a, 0x30},
282 {DEMOD_WRITE, 0x00, 0x01},
283 {WRITE_DELAY, 0x19, 0x00},
284 {DEMOD_WRITE, 0x00, 0x00},
285 {DEMOD_WRITE, 0x9a, 0xb0},
286 {DEMOD_WRITE, 0x81, 0xc1},
287 {DEMOD_WRITE, 0x81, 0x81},
288 {DEMOD_WRITE, 0x86, 0xc6},
289 {DEMOD_WRITE, 0x9a, 0x30},
290 {DEMOD_WRITE, 0xf0, 0x22},
291 {DEMOD_WRITE, 0xf1, 0xbf},
292 {DEMOD_WRITE, 0xb0, 0x45},
293 {DEMOD_WRITE, 0xb2, 0x01}, /* set voltage pin always set 1*/
294 {DEMOD_WRITE, 0x9a, 0xb0},
298 struct inittab m88rs2000_shutdown[] = {
299 {DEMOD_WRITE, 0x9a, 0x30},
300 {DEMOD_WRITE, 0xb0, 0x00},
301 {DEMOD_WRITE, 0xf1, 0x89},
302 {DEMOD_WRITE, 0x00, 0x01},
303 {DEMOD_WRITE, 0x9a, 0xb0},
304 {DEMOD_WRITE, 0x81, 0x81},
308 struct inittab fe_reset[] = {
309 {DEMOD_WRITE, 0x00, 0x01},
310 {DEMOD_WRITE, 0xf1, 0xbf},
311 {DEMOD_WRITE, 0x00, 0x01},
312 {DEMOD_WRITE, 0x20, 0x81},
313 {DEMOD_WRITE, 0x21, 0x80},
314 {DEMOD_WRITE, 0x10, 0x33},
315 {DEMOD_WRITE, 0x11, 0x44},
316 {DEMOD_WRITE, 0x12, 0x07},
317 {DEMOD_WRITE, 0x18, 0x20},
318 {DEMOD_WRITE, 0x28, 0x04},
319 {DEMOD_WRITE, 0x29, 0x8e},
320 {DEMOD_WRITE, 0x3b, 0xff},
321 {DEMOD_WRITE, 0x32, 0x10},
322 {DEMOD_WRITE, 0x33, 0x02},
323 {DEMOD_WRITE, 0x34, 0x30},
324 {DEMOD_WRITE, 0x35, 0xff},
325 {DEMOD_WRITE, 0x38, 0x50},
326 {DEMOD_WRITE, 0x39, 0x68},
327 {DEMOD_WRITE, 0x3c, 0x7f},
328 {DEMOD_WRITE, 0x3d, 0x0f},
329 {DEMOD_WRITE, 0x45, 0x20},
330 {DEMOD_WRITE, 0x46, 0x24},
331 {DEMOD_WRITE, 0x47, 0x7c},
332 {DEMOD_WRITE, 0x48, 0x16},
333 {DEMOD_WRITE, 0x49, 0x04},
334 {DEMOD_WRITE, 0x4a, 0x01},
335 {DEMOD_WRITE, 0x4b, 0x78},
336 {DEMOD_WRITE, 0X4d, 0xd2},
337 {DEMOD_WRITE, 0x4e, 0x6d},
338 {DEMOD_WRITE, 0x50, 0x30},
339 {DEMOD_WRITE, 0x51, 0x30},
340 {DEMOD_WRITE, 0x54, 0x7b},
341 {DEMOD_WRITE, 0x56, 0x09},
342 {DEMOD_WRITE, 0x58, 0x59},
343 {DEMOD_WRITE, 0x59, 0x37},
344 {DEMOD_WRITE, 0x63, 0xfa},
348 struct inittab fe_trigger[] = {
349 {DEMOD_WRITE, 0x97, 0x04},
350 {DEMOD_WRITE, 0x99, 0x77},
351 {DEMOD_WRITE, 0x9b, 0x64},
352 {DEMOD_WRITE, 0x9e, 0x00},
353 {DEMOD_WRITE, 0x9f, 0xf8},
354 {DEMOD_WRITE, 0xa0, 0x20},
355 {DEMOD_WRITE, 0xa1, 0xe0},
356 {DEMOD_WRITE, 0xa3, 0x38},
357 {DEMOD_WRITE, 0x98, 0xff},
358 {DEMOD_WRITE, 0xc0, 0x0f},
359 {DEMOD_WRITE, 0x89, 0x01},
360 {DEMOD_WRITE, 0x00, 0x00},
361 {WRITE_DELAY, 0x0a, 0x00},
362 {DEMOD_WRITE, 0x00, 0x01},
363 {DEMOD_WRITE, 0x00, 0x00},
364 {DEMOD_WRITE, 0x9a, 0xb0},
368 static int m88rs2000_tab_set(struct m88rs2000_state *state,
376 for (i = 0; i < 255; i++) {
377 switch (tab[i].cmd) {
379 ret = m88rs2000_writereg(state, tab[i].reg,
387 if (tab[i].reg == 0xaa && tab[i].val == 0xff)
400 static int m88rs2000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t volt)
402 struct m88rs2000_state *state = fe->demodulator_priv;
405 data = m88rs2000_readreg(state, 0xb2);
406 data |= 0x03; /* bit0 V/H, bit1 off/on */
416 case SEC_VOLTAGE_OFF:
420 m88rs2000_writereg(state, 0xb2, data);
425 static int m88rs2000_init(struct dvb_frontend *fe)
427 struct m88rs2000_state *state = fe->demodulator_priv;
430 deb_info("m88rs2000: init chip\n");
431 /* Setup frontend from shutdown/cold */
432 if (state->config->inittab)
433 ret = m88rs2000_tab_set(state,
434 (struct inittab *)state->config->inittab);
436 ret = m88rs2000_tab_set(state, m88rs2000_setup);
441 static int m88rs2000_sleep(struct dvb_frontend *fe)
443 struct m88rs2000_state *state = fe->demodulator_priv;
445 /* Shutdown the frondend */
446 ret = m88rs2000_tab_set(state, m88rs2000_shutdown);
450 static int m88rs2000_read_status(struct dvb_frontend *fe, fe_status_t *status)
452 struct m88rs2000_state *state = fe->demodulator_priv;
453 u8 reg = m88rs2000_readreg(state, 0x8c);
457 if ((reg & 0x7) == 0x7) {
458 *status = FE_HAS_CARRIER | FE_HAS_SIGNAL | FE_HAS_VITERBI
459 | FE_HAS_SYNC | FE_HAS_LOCK;
460 if (state->config->set_ts_params)
461 state->config->set_ts_params(fe, CALL_IS_READ);
466 static int m88rs2000_read_ber(struct dvb_frontend *fe, u32 *ber)
468 struct m88rs2000_state *state = fe->demodulator_priv;
471 m88rs2000_writereg(state, 0x9a, 0x30);
472 tmp0 = m88rs2000_readreg(state, 0xd8);
473 if ((tmp0 & 0x10) != 0) {
474 m88rs2000_writereg(state, 0x9a, 0xb0);
479 *ber = (m88rs2000_readreg(state, 0xd7) << 8) |
480 m88rs2000_readreg(state, 0xd6);
482 tmp1 = m88rs2000_readreg(state, 0xd9);
483 m88rs2000_writereg(state, 0xd9, (tmp1 & ~7) | 4);
485 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30);
486 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30);
487 m88rs2000_writereg(state, 0x9a, 0xb0);
492 static int m88rs2000_read_signal_strength(struct dvb_frontend *fe,
495 if (fe->ops.tuner_ops.get_rf_strength)
496 fe->ops.tuner_ops.get_rf_strength(fe, strength);
501 static int m88rs2000_read_snr(struct dvb_frontend *fe, u16 *snr)
503 struct m88rs2000_state *state = fe->demodulator_priv;
505 *snr = 512 * m88rs2000_readreg(state, 0x65);
510 static int m88rs2000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
512 struct m88rs2000_state *state = fe->demodulator_priv;
515 *ucblocks = (m88rs2000_readreg(state, 0xd5) << 8) |
516 m88rs2000_readreg(state, 0xd4);
517 tmp = m88rs2000_readreg(state, 0xd8);
518 m88rs2000_writereg(state, 0xd8, tmp & ~0x20);
519 /* needs two times */
520 m88rs2000_writereg(state, 0xd8, tmp | 0x20);
521 m88rs2000_writereg(state, 0xd8, tmp | 0x20);
526 static int m88rs2000_set_fec(struct m88rs2000_state *state,
531 /* This is not confirmed kept for reference */
551 m88rs2000_writereg(state, 0x76, fec_set);
557 static fe_code_rate_t m88rs2000_get_fec(struct m88rs2000_state *state)
560 m88rs2000_writereg(state, 0x9a, 0x30);
561 reg = m88rs2000_readreg(state, 0x76);
562 m88rs2000_writereg(state, 0x9a, 0xb0);
583 static int m88rs2000_set_frontend(struct dvb_frontend *fe)
585 struct m88rs2000_state *state = fe->demodulator_priv;
586 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
593 state->no_lock_count = 0;
595 if (c->delivery_system != SYS_DVBS) {
596 deb_info("%s: unsupported delivery "
597 "system selected (%d)\n",
598 __func__, c->delivery_system);
603 if (fe->ops.tuner_ops.set_params)
604 ret = fe->ops.tuner_ops.set_params(fe);
609 if (fe->ops.tuner_ops.get_frequency)
610 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_freq);
615 offset = (s16)((s32)tuner_freq - c->frequency);
617 /* default mclk value 96.4285 * 2 * 1000 = 192857 */
618 if (((c->frequency % 192857) >= (192857 - 3000)) ||
619 (c->frequency % 192857) <= 3000)
620 ret = m88rs2000_writereg(state, 0x86, 0xc2);
622 ret = m88rs2000_writereg(state, 0x86, 0xc6);
624 ret |= m88rs2000_set_carrieroffset(fe, offset);
629 ret = m88rs2000_tab_set(state, fe_reset);
634 reg = m88rs2000_readreg(state, 0x70);
635 ret = m88rs2000_writereg(state, 0x70, reg);
638 ret |= m88rs2000_set_fec(state, c->fec_inner);
639 ret |= m88rs2000_writereg(state, 0x85, 0x1);
640 ret |= m88rs2000_writereg(state, 0x8a, 0xbf);
641 ret |= m88rs2000_writereg(state, 0x8d, 0x1e);
642 ret |= m88rs2000_writereg(state, 0x90, 0xf1);
643 ret |= m88rs2000_writereg(state, 0x91, 0x08);
648 /* Set Symbol Rate */
649 ret = m88rs2000_set_symbolrate(fe, c->symbol_rate);
654 ret = m88rs2000_tab_set(state, fe_trigger);
658 for (i = 0; i < 25; i++) {
659 reg = m88rs2000_readreg(state, 0x8c);
660 if ((reg & 0x7) == 0x7) {
661 status = FE_HAS_LOCK;
664 state->no_lock_count++;
665 if (state->no_lock_count == 15) {
666 reg = m88rs2000_readreg(state, 0x70);
668 m88rs2000_writereg(state, 0x70, reg);
669 state->no_lock_count = 0;
674 if (status & FE_HAS_LOCK) {
675 state->fec_inner = m88rs2000_get_fec(state);
676 /* Uknown suspect SNR level */
677 reg = m88rs2000_readreg(state, 0x65);
680 state->tuner_frequency = c->frequency;
681 state->symbol_rate = c->symbol_rate;
685 static int m88rs2000_get_frontend(struct dvb_frontend *fe)
687 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
688 struct m88rs2000_state *state = fe->demodulator_priv;
689 c->fec_inner = state->fec_inner;
690 c->frequency = state->tuner_frequency;
691 c->symbol_rate = state->symbol_rate;
695 static int m88rs2000_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
697 struct m88rs2000_state *state = fe->demodulator_priv;
700 m88rs2000_writereg(state, 0x81, 0x84);
702 m88rs2000_writereg(state, 0x81, 0x81);
707 static void m88rs2000_release(struct dvb_frontend *fe)
709 struct m88rs2000_state *state = fe->demodulator_priv;
713 static struct dvb_frontend_ops m88rs2000_ops = {
714 .delsys = { SYS_DVBS },
716 .name = "M88RS2000 DVB-S",
717 .frequency_min = 950000,
718 .frequency_max = 2150000,
719 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
720 .frequency_tolerance = 5000,
721 .symbol_rate_min = 1000000,
722 .symbol_rate_max = 45000000,
723 .symbol_rate_tolerance = 500, /* ppm */
724 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
725 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
730 .release = m88rs2000_release,
731 .init = m88rs2000_init,
732 .sleep = m88rs2000_sleep,
733 .i2c_gate_ctrl = m88rs2000_i2c_gate_ctrl,
734 .read_status = m88rs2000_read_status,
735 .read_ber = m88rs2000_read_ber,
736 .read_signal_strength = m88rs2000_read_signal_strength,
737 .read_snr = m88rs2000_read_snr,
738 .read_ucblocks = m88rs2000_read_ucblocks,
739 .diseqc_send_master_cmd = m88rs2000_send_diseqc_msg,
740 .diseqc_send_burst = m88rs2000_send_diseqc_burst,
741 .set_tone = m88rs2000_set_tone,
742 .set_voltage = m88rs2000_set_voltage,
744 .set_frontend = m88rs2000_set_frontend,
745 .get_frontend = m88rs2000_get_frontend,
748 struct dvb_frontend *m88rs2000_attach(const struct m88rs2000_config *config,
749 struct i2c_adapter *i2c)
751 struct m88rs2000_state *state = NULL;
753 /* allocate memory for the internal state */
754 state = kzalloc(sizeof(struct m88rs2000_state), GFP_KERNEL);
758 /* setup the state */
759 state->config = config;
761 state->tuner_frequency = 0;
762 state->symbol_rate = 0;
763 state->fec_inner = 0;
765 /* create dvb_frontend */
766 memcpy(&state->frontend.ops, &m88rs2000_ops,
767 sizeof(struct dvb_frontend_ops));
768 state->frontend.demodulator_priv = state;
769 return &state->frontend;
776 EXPORT_SYMBOL(m88rs2000_attach);
778 MODULE_DESCRIPTION("M88RS2000 DVB-S Demodulator driver");
779 MODULE_AUTHOR("Malcolm Priestley tvboxspy@gmail.com");
780 MODULE_LICENSE("GPL");
781 MODULE_VERSION("1.13");