2 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
4 * Copyright (C) 2010 Michael Krufky <mkrufky@kernellabs.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include "mxl111sf-i2c.h"
24 /* SW-I2C ----------------------------------------------------------------- */
26 #define SW_I2C_ADDR 0x1a
27 #define SW_I2C_EN 0x02
28 #define SW_SCL_OUT 0x04
29 #define SW_SDA_OUT 0x08
30 #define SW_SDA_IN 0x04
32 #define SW_I2C_BUSY_ADDR 0x2f
33 #define SW_I2C_BUSY 0x02
35 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
41 mxl_i2c("(0x%02x)", byte);
43 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
47 for (i = 0; i < 8; i++) {
49 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
51 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
52 0x10 | SW_I2C_EN | data);
56 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
57 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
61 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
62 0x10 | SW_I2C_EN | data);
67 /* last bit was 0 so we need to release SDA */
69 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
70 0x10 | SW_I2C_EN | SW_SDA_OUT);
75 /* CLK high for ACK readback */
76 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
77 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
81 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
85 /* drop the CLK after getting ACK, SDA will go high right away */
86 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
87 0x10 | SW_I2C_EN | SW_SDA_OUT);
97 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
108 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
109 0x10 | SW_I2C_EN | SW_SDA_OUT);
113 for (i = 0; i < 8; i++) {
114 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
116 SW_SCL_OUT | SW_SDA_OUT);
120 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
124 if (data & SW_SDA_IN)
127 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
128 0x10 | SW_I2C_EN | SW_SDA_OUT);
137 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
143 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
144 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
148 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
149 0x10 | SW_I2C_EN | SW_SCL_OUT);
153 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
154 0x10 | SW_I2C_EN); /* start */
160 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
166 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
167 0x10 | SW_I2C_EN); /* stop */
171 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
172 0x10 | SW_I2C_EN | SW_SCL_OUT);
176 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
177 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
181 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
182 0x10 | SW_SCL_OUT | SW_SDA_OUT);
188 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
195 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
199 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
205 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
206 0x10 | SW_I2C_EN | SW_SCL_OUT);
210 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
211 0x10 | SW_I2C_EN | SW_SDA_OUT);
217 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
223 /* SDA high to signal last byte read from slave */
224 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
225 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
229 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
230 0x10 | SW_I2C_EN | SW_SDA_OUT);
236 /* ------------------------------------------------------------------------ */
238 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
245 if (msg->flags & I2C_M_RD) {
247 ret = mxl111sf_i2c_start(state);
251 ret = mxl111sf_i2c_bitbang_sendbyte(state,
252 (msg->addr << 1) | 0x01);
254 mxl111sf_i2c_stop(state);
258 for (i = 0; i < msg->len; i++) {
259 ret = mxl111sf_i2c_bitbang_recvbyte(state,
262 mxl111sf_i2c_stop(state);
266 if (i < msg->len - 1)
267 mxl111sf_i2c_ack(state);
270 mxl111sf_i2c_nack(state);
272 ret = mxl111sf_i2c_stop(state);
278 ret = mxl111sf_i2c_start(state);
282 ret = mxl111sf_i2c_bitbang_sendbyte(state,
283 (msg->addr << 1) & 0xfe);
285 mxl111sf_i2c_stop(state);
289 for (i = 0; i < msg->len; i++) {
290 ret = mxl111sf_i2c_bitbang_sendbyte(state,
293 mxl111sf_i2c_stop(state);
298 /* FIXME: we only want to do this on the last transaction */
299 mxl111sf_i2c_stop(state);
305 /* HW-I2C ----------------------------------------------------------------- */
307 #define USB_WRITE_I2C_CMD 0x99
308 #define USB_READ_I2C_CMD 0xdd
309 #define USB_END_I2C_CMD 0xfe
311 #define USB_WRITE_I2C_CMD_LEN 26
312 #define USB_READ_I2C_CMD_LEN 24
314 #define I2C_MUX_REG 0x30
315 #define I2C_CONTROL_REG 0x00
316 #define I2C_SLAVE_ADDR_REG 0x08
317 #define I2C_DATA_REG 0x0c
318 #define I2C_INT_STATUS_REG 0x10
320 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
323 int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
324 &wdata[1], 25, NULL, 0);
330 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
331 u8 index, u8 *wdata, u8 *rdata)
333 int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
334 &wdata[1], 25, rdata, 24);
340 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
347 buf[0] = USB_READ_I2C_CMD;
350 buf[2] = I2C_INT_STATUS_REG;
354 buf[5] = USB_END_I2C_CMD;
356 mxl111sf_i2c_get_data(state, 0, buf, buf);
364 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
371 buf[0] = USB_READ_I2C_CMD;
374 buf[2] = I2C_MUX_REG;
378 buf[5] = I2C_INT_STATUS_REG;
381 buf[8] = USB_END_I2C_CMD;
383 mxl111sf_i2c_get_data(state, 0, buf, buf);
385 if (0x08 == (buf[1] & 0x08))
388 if ((buf[5] & 0x02) == 0x02)
389 mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
394 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
404 mxl_i2c("read %d bytes", count);
406 while ((fifo_status == 0) && (i++ < 5))
407 fifo_status = mxl111sf_i2c_check_fifo(state);
409 i2c_w_data[0] = 0xDD;
410 i2c_w_data[1] = 0x00;
412 for (i = 2; i < 26; i++)
413 i2c_w_data[i] = 0xFE;
415 for (i = 0; i < count; i++) {
416 i2c_w_data[2+(i*3)] = 0x0C;
417 i2c_w_data[3+(i*3)] = 0x00;
418 i2c_w_data[4+(i*3)] = 0x00;
421 ret = mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
423 /* Check for I2C NACK status */
424 if (mxl111sf_i2c_check_status(state) == 1) {
427 for (i = 0; i < count; i++) {
428 rbuf[i] = i2c_r_data[(i*3)+1];
429 mxl_i2c("%02x\t %02x",
431 i2c_r_data[(i*3)+2]);
441 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
454 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
455 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
456 (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
458 for (index = 0; index < 26; index++)
459 buf[index] = USB_END_I2C_CMD;
461 /* command to indicate data payload is destined for I2C interface */
462 buf[0] = USB_WRITE_I2C_CMD;
465 /* enable I2C interface */
466 buf[2] = I2C_MUX_REG;
470 /* enable I2C interface */
471 buf[5] = I2C_MUX_REG;
475 /* set Timeout register on I2C interface */
480 /* enable Interrupts on I2C interface */
489 ret = mxl111sf_i2c_send_data(state, 0, buf);
491 /* write data on I2C bus */
492 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
493 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
495 /* control register on I2C interface to initialize I2C bus */
496 buf[2] = I2C_CONTROL_REG;
498 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
500 /* I2C Slave device Address */
501 buf[5] = I2C_SLAVE_ADDR_REG;
502 buf[6] = (msg->addr);
504 buf[8] = USB_END_I2C_CMD;
505 ret = mxl111sf_i2c_send_data(state, 0, buf);
507 /* check for slave device status */
508 if (mxl111sf_i2c_check_status(state) == 1) {
509 mxl_i2c("NACK writing slave address %02x",
511 /* if NACK, stop I2C bus and exit */
512 buf[2] = I2C_CONTROL_REG;
514 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
519 /* I2C interface can do I2C operations in block of 8 bytes of
520 I2C data. calculation to figure out number of blocks of i2c
521 data required to program */
522 block_len = (msg->len / 8);
523 left_over_len = (msg->len % 8);
526 mxl_i2c("block_len %d, left_over_len %d",
527 block_len, left_over_len);
529 for (index = 0; index < block_len; index++) {
530 for (i = 0; i < 8; i++) {
531 /* write data on I2C interface */
532 buf[2+(i*3)] = I2C_DATA_REG;
533 buf[3+(i*3)] = msg->buf[(index*8)+i];
537 ret = mxl111sf_i2c_send_data(state, 0, buf);
539 /* check for I2C NACK status */
540 if (mxl111sf_i2c_check_status(state) == 1) {
541 mxl_i2c("NACK writing slave address %02x",
544 /* if NACK, stop I2C bus and exit */
545 buf[2] = I2C_CONTROL_REG;
547 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
555 for (k = 0; k < 26; k++)
556 buf[k] = USB_END_I2C_CMD;
561 for (i = 0; i < left_over_len; i++) {
562 buf[2+(i*3)] = I2C_DATA_REG;
563 buf[3+(i*3)] = msg->buf[(index*8)+i];
564 mxl_i2c("index = %d %d data %d",
565 index, i, msg->buf[(index*8)+i]);
568 ret = mxl111sf_i2c_send_data(state, 0, buf);
570 /* check for I2C NACK status */
571 if (mxl111sf_i2c_check_status(state) == 1) {
572 mxl_i2c("NACK writing slave address %02x",
575 /* if NACK, stop I2C bus and exit */
576 buf[2] = I2C_CONTROL_REG;
578 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
585 /* issue I2C STOP after write */
586 buf[2] = I2C_CONTROL_REG;
588 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
592 /* read data from I2C bus */
593 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
594 mxl_i2c("read buf len %d", msg->len);
596 /* command to indicate data payload is
597 destined for I2C interface */
598 buf[2] = I2C_CONTROL_REG;
600 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
602 /* I2C xfer length */
604 buf[6] = (msg->len & 0xFF);
607 /* I2C slave device Address */
608 buf[8] = I2C_SLAVE_ADDR_REG;
611 buf[11] = USB_END_I2C_CMD;
612 ret = mxl111sf_i2c_send_data(state, 0, buf);
614 /* check for I2C NACK status */
615 if (mxl111sf_i2c_check_status(state) == 1) {
616 mxl_i2c("NACK reading slave address %02x",
619 /* if NACK, stop I2C bus and exit */
620 buf[2] = I2C_CONTROL_REG;
622 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
627 /* I2C interface can do I2C operations in block of 8 bytes of
628 I2C data. calculation to figure out number of blocks of
629 i2c data required to program */
630 block_len = ((msg->len) / 8);
631 left_over_len = ((msg->len) % 8);
634 mxl_i2c("block_len %d, left_over_len %d",
635 block_len, left_over_len);
637 /* command to read data from I2C interface */
638 buf[0] = USB_READ_I2C_CMD;
641 for (index = 0; index < block_len; index++) {
642 /* setup I2C read request packet on I2C interface */
643 for (i = 0; i < 8; i++) {
644 buf[2+(i*3)] = I2C_DATA_REG;
649 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
651 /* check for I2C NACK status */
652 if (mxl111sf_i2c_check_status(state) == 1) {
653 mxl_i2c("NACK reading slave address %02x",
656 /* if NACK, stop I2C bus and exit */
657 buf[2] = I2C_CONTROL_REG;
659 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
664 /* copy data from i2c data payload to read buffer */
665 for (i = 0; i < 8; i++) {
666 rd_status[i] = i2c_r_data[(i*3)+2];
668 if (rd_status[i] == 0x04) {
670 mxl_i2c("i2c fifo empty!"
672 msg->buf[(index*8)+i] =
676 mxl111sf_i2c_readagain(
679 if (ret_status == 1) {
684 msg->buf[(index*8)+(k+i+1)] =
686 mxl_i2c("read data: %02x\t %02x",
687 msg->buf[(index*8)+(k+i)],
689 mxl_i2c("read data: %02x\t %02x",
690 msg->buf[(index*8)+(k+i+1)],
700 msg->buf[(index*8)+i] =
704 msg->buf[(index*8)+i] =
714 for (k = 0; k < 26; k++)
715 buf[k] = USB_END_I2C_CMD;
720 for (i = 0; i < left_over_len; i++) {
721 buf[2+(i*3)] = I2C_DATA_REG;
725 ret = mxl111sf_i2c_get_data(state, 0, buf,
728 /* check for I2C NACK status */
729 if (mxl111sf_i2c_check_status(state) == 1) {
730 mxl_i2c("NACK reading slave address %02x",
733 /* if NACK, stop I2C bus and exit */
734 buf[2] = I2C_CONTROL_REG;
736 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
741 for (i = 0; i < left_over_len; i++) {
742 msg->buf[(block_len*8)+i] =
744 mxl_i2c("read data: %02x\t %02x",
746 i2c_r_data[(i*3)+2]);
750 /* indicate I2C interface to issue NACK
751 after next I2C read op */
752 buf[0] = USB_WRITE_I2C_CMD;
755 /* control register */
756 buf[2] = I2C_CONTROL_REG;
758 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
760 buf[5] = USB_END_I2C_CMD;
761 ret = mxl111sf_i2c_send_data(state, 0, buf);
763 /* control register */
764 buf[2] = I2C_CONTROL_REG;
766 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
770 /* STOP and disable I2C MUX */
771 buf[0] = USB_WRITE_I2C_CMD;
774 /* de-initilize I2C BUS */
775 buf[5] = USB_END_I2C_CMD;
776 mxl111sf_i2c_send_data(state, 0, buf);
778 /* Control Register */
779 buf[2] = I2C_CONTROL_REG;
783 /* disable I2C interface */
784 buf[5] = I2C_MUX_REG;
788 /* de-initilize I2C BUS */
789 buf[8] = USB_END_I2C_CMD;
790 mxl111sf_i2c_send_data(state, 0, buf);
792 /* disable I2C interface */
793 buf[2] = I2C_MUX_REG;
797 /* disable I2C interface */
798 buf[5] = I2C_MUX_REG;
802 /* disable I2C interface */
803 buf[8] = I2C_MUX_REG;
807 buf[11] = USB_END_I2C_CMD;
808 mxl111sf_i2c_send_data(state, 0, buf);
813 /* ------------------------------------------------------------------------ */
815 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
816 struct i2c_msg msg[], int num)
818 struct dvb_usb_device *d = i2c_get_adapdata(adap);
819 struct mxl111sf_state *state = d->priv;
820 int hwi2c = (state->chip_rev > MXL111SF_V6);
823 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
826 for (i = 0; i < num; i++) {
828 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
829 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
831 mxl_debug_adv("failed with error %d on i2c "
832 "transaction %d of %d, %sing %d bytes "
833 "to/from 0x%02x", ret, i+1, num,
834 (msg[i].flags & I2C_M_RD) ?
836 msg[i].len, msg[i].addr);
842 mutex_unlock(&d->i2c_mutex);
844 return i == num ? num : -EREMOTEIO;