2 * A fairly generic DMA-API to IOMMU-API glue layer.
4 * Copyright (C) 2014-2015 ARM Ltd.
6 * based in part on arch/arm/mm/dma-mapping.c:
7 * Copyright (C) 2000-2004 Russell King
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/device.h>
23 #include <linux/dma-iommu.h>
24 #include <linux/gfp.h>
25 #include <linux/huge_mm.h>
26 #include <linux/iommu.h>
27 #include <linux/iova.h>
29 #include <linux/scatterlist.h>
30 #include <linux/vmalloc.h>
32 int iommu_dma_init(void)
34 return iova_cache_get();
38 * iommu_get_dma_cookie - Acquire DMA-API resources for a domain
39 * @domain: IOMMU domain to prepare for DMA-API usage
41 * IOMMU drivers should normally call this from their domain_alloc
42 * callback when domain->type == IOMMU_DOMAIN_DMA.
44 int iommu_get_dma_cookie(struct iommu_domain *domain)
46 struct iova_domain *iovad;
48 if (domain->iova_cookie)
51 iovad = kzalloc(sizeof(*iovad), GFP_KERNEL);
52 domain->iova_cookie = iovad;
54 return iovad ? 0 : -ENOMEM;
56 EXPORT_SYMBOL(iommu_get_dma_cookie);
59 * iommu_put_dma_cookie - Release a domain's DMA mapping resources
60 * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie()
62 * IOMMU drivers should normally call this from their domain_free callback.
64 void iommu_put_dma_cookie(struct iommu_domain *domain)
66 struct iova_domain *iovad = domain->iova_cookie;
71 put_iova_domain(iovad);
73 domain->iova_cookie = NULL;
75 EXPORT_SYMBOL(iommu_put_dma_cookie);
78 * iommu_dma_init_domain - Initialise a DMA mapping domain
79 * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie()
80 * @base: IOVA at which the mappable address space starts
81 * @size: Size of IOVA space
83 * @base and @size should be exact multiples of IOMMU page granularity to
84 * avoid rounding surprises. If necessary, we reserve the page at address 0
85 * to ensure it is an invalid IOVA. It is safe to reinitialise a domain, but
86 * any change which could make prior IOVAs invalid will fail.
88 int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size)
90 struct iova_domain *iovad = domain->iova_cookie;
91 unsigned long order, base_pfn, end_pfn;
96 /* Use the smallest supported page size for IOVA granularity */
97 order = __ffs(domain->ops->pgsize_bitmap);
98 base_pfn = max_t(unsigned long, 1, base >> order);
99 end_pfn = (base + size - 1) >> order;
101 /* Check the domain allows at least some access to the device... */
102 if (domain->geometry.force_aperture) {
103 if (base > domain->geometry.aperture_end ||
104 base + size <= domain->geometry.aperture_start) {
105 pr_warn("specified DMA range outside IOMMU capability\n");
108 /* ...then finally give it a kicking to make sure it fits */
109 base_pfn = max_t(unsigned long, base_pfn,
110 domain->geometry.aperture_start >> order);
111 end_pfn = min_t(unsigned long, end_pfn,
112 domain->geometry.aperture_end >> order);
115 /* All we can safely do with an existing domain is enlarge it */
116 if (iovad->start_pfn) {
117 if (1UL << order != iovad->granule ||
118 base_pfn != iovad->start_pfn ||
119 end_pfn < iovad->dma_32bit_pfn) {
120 pr_warn("Incompatible range for DMA domain\n");
123 iovad->dma_32bit_pfn = end_pfn;
125 init_iova_domain(iovad, 1UL << order, base_pfn, end_pfn);
129 EXPORT_SYMBOL(iommu_dma_init_domain);
132 * dma_direction_to_prot - Translate DMA API directions to IOMMU API page flags
133 * @dir: Direction of DMA transfer
134 * @coherent: Is the DMA master cache-coherent?
136 * Return: corresponding IOMMU API page protection flags
138 int dma_direction_to_prot(enum dma_data_direction dir, bool coherent)
140 int prot = coherent ? IOMMU_CACHE : 0;
143 case DMA_BIDIRECTIONAL:
144 return prot | IOMMU_READ | IOMMU_WRITE;
146 return prot | IOMMU_READ;
147 case DMA_FROM_DEVICE:
148 return prot | IOMMU_WRITE;
154 static struct iova *__alloc_iova(struct iova_domain *iovad, size_t size,
155 dma_addr_t dma_limit)
157 unsigned long shift = iova_shift(iovad);
158 unsigned long length = iova_align(iovad, size) >> shift;
161 * Enforce size-alignment to be safe - there could perhaps be an
162 * attribute to control this per-device, or at least per-domain...
164 return alloc_iova(iovad, length, dma_limit >> shift, true);
167 /* The IOVA allocator knows what we mapped, so just unmap whatever that was */
168 static void __iommu_dma_unmap(struct iommu_domain *domain, dma_addr_t dma_addr)
170 struct iova_domain *iovad = domain->iova_cookie;
171 unsigned long shift = iova_shift(iovad);
172 unsigned long pfn = dma_addr >> shift;
173 struct iova *iova = find_iova(iovad, pfn);
179 size = iova_size(iova) << shift;
180 size -= iommu_unmap(domain, pfn << shift, size);
181 /* ...and if we can't, then something is horribly, horribly wrong */
183 __free_iova(iovad, iova);
186 static void __iommu_dma_free_pages(struct page **pages, int count)
189 __free_page(pages[count]);
193 static struct page **__iommu_dma_alloc_pages(unsigned int count, gfp_t gfp)
196 unsigned int i = 0, array_size = count * sizeof(*pages);
198 if (array_size <= PAGE_SIZE)
199 pages = kzalloc(array_size, GFP_KERNEL);
201 pages = vzalloc(array_size);
205 /* IOMMU can map any pages, so himem can also be used here */
206 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
209 struct page *page = NULL;
210 int j, order = __fls(count);
213 * Higher-order allocations are a convenience rather
214 * than a necessity, hence using __GFP_NORETRY until
215 * falling back to single-page allocations.
217 for (order = min(order, MAX_ORDER); order > 0; order--) {
218 page = alloc_pages(gfp | __GFP_NORETRY, order);
221 if (PageCompound(page)) {
222 if (!split_huge_page(page))
224 __free_pages(page, order);
226 split_page(page, order);
231 page = alloc_page(gfp);
233 __iommu_dma_free_pages(pages, i);
245 * iommu_dma_free - Free a buffer allocated by iommu_dma_alloc()
246 * @dev: Device which owns this buffer
247 * @pages: Array of buffer pages as returned by iommu_dma_alloc()
248 * @size: Size of buffer in bytes
249 * @handle: DMA address of buffer
251 * Frees both the pages associated with the buffer, and the array
254 void iommu_dma_free(struct device *dev, struct page **pages, size_t size,
257 __iommu_dma_unmap(iommu_get_domain_for_dev(dev), *handle);
258 __iommu_dma_free_pages(pages, PAGE_ALIGN(size) >> PAGE_SHIFT);
259 *handle = DMA_ERROR_CODE;
263 * iommu_dma_alloc - Allocate and map a buffer contiguous in IOVA space
264 * @dev: Device to allocate memory for. Must be a real device
265 * attached to an iommu_dma_domain
266 * @size: Size of buffer in bytes
267 * @gfp: Allocation flags
268 * @prot: IOMMU mapping flags
269 * @handle: Out argument for allocated DMA handle
270 * @flush_page: Arch callback which must ensure PAGE_SIZE bytes from the
271 * given VA/PA are visible to the given non-coherent device.
273 * If @size is less than PAGE_SIZE, then a full CPU page will be allocated,
274 * but an IOMMU which supports smaller pages might not map the whole thing.
276 * Return: Array of struct page pointers describing the buffer,
277 * or NULL on failure.
279 struct page **iommu_dma_alloc(struct device *dev, size_t size,
280 gfp_t gfp, int prot, dma_addr_t *handle,
281 void (*flush_page)(struct device *, const void *, phys_addr_t))
283 struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
284 struct iova_domain *iovad = domain->iova_cookie;
289 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
291 *handle = DMA_ERROR_CODE;
293 pages = __iommu_dma_alloc_pages(count, gfp);
297 iova = __alloc_iova(iovad, size, dev->coherent_dma_mask);
301 size = iova_align(iovad, size);
302 if (sg_alloc_table_from_pages(&sgt, pages, count, 0, size, GFP_KERNEL))
305 if (!(prot & IOMMU_CACHE)) {
306 struct sg_mapping_iter miter;
308 * The CPU-centric flushing implied by SG_MITER_TO_SG isn't
309 * sufficient here, so skip it by using the "wrong" direction.
311 sg_miter_start(&miter, sgt.sgl, sgt.orig_nents, SG_MITER_FROM_SG);
312 while (sg_miter_next(&miter))
313 flush_page(dev, miter.addr, page_to_phys(miter.page));
314 sg_miter_stop(&miter);
317 dma_addr = iova_dma_addr(iovad, iova);
318 if (iommu_map_sg(domain, dma_addr, sgt.sgl, sgt.orig_nents, prot)
329 __free_iova(iovad, iova);
331 __iommu_dma_free_pages(pages, count);
336 * iommu_dma_mmap - Map a buffer into provided user VMA
337 * @pages: Array representing buffer from iommu_dma_alloc()
338 * @size: Size of buffer in bytes
339 * @vma: VMA describing requested userspace mapping
341 * Maps the pages of the buffer in @pages into @vma. The caller is responsible
342 * for verifying the correct size and protection of @vma beforehand.
345 int iommu_dma_mmap(struct page **pages, size_t size, struct vm_area_struct *vma)
347 unsigned long uaddr = vma->vm_start;
348 unsigned int i, count = PAGE_ALIGN(size) >> PAGE_SHIFT;
351 for (i = vma->vm_pgoff; i < count && uaddr < vma->vm_end; i++) {
352 ret = vm_insert_page(vma, uaddr, pages[i]);
360 dma_addr_t iommu_dma_map_page(struct device *dev, struct page *page,
361 unsigned long offset, size_t size, int prot)
364 struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
365 struct iova_domain *iovad = domain->iova_cookie;
366 phys_addr_t phys = page_to_phys(page) + offset;
367 size_t iova_off = iova_offset(iovad, phys);
368 size_t len = iova_align(iovad, size + iova_off);
369 struct iova *iova = __alloc_iova(iovad, len, dma_get_mask(dev));
372 return DMA_ERROR_CODE;
374 dma_addr = iova_dma_addr(iovad, iova);
375 if (iommu_map(domain, dma_addr, phys - iova_off, len, prot)) {
376 __free_iova(iovad, iova);
377 return DMA_ERROR_CODE;
379 return dma_addr + iova_off;
382 void iommu_dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
383 enum dma_data_direction dir, struct dma_attrs *attrs)
385 __iommu_dma_unmap(iommu_get_domain_for_dev(dev), handle);
389 * Prepare a successfully-mapped scatterlist to give back to the caller.
390 * Handling IOVA concatenation can come later, if needed
392 static int __finalise_sg(struct device *dev, struct scatterlist *sg, int nents,
395 struct scatterlist *s;
398 for_each_sg(sg, s, nents, i) {
399 /* Un-swizzling the fields here, hence the naming mismatch */
400 unsigned int s_offset = sg_dma_address(s);
401 unsigned int s_length = sg_dma_len(s);
402 unsigned int s_dma_len = s->length;
404 s->offset = s_offset;
405 s->length = s_length;
406 sg_dma_address(s) = dma_addr + s_offset;
407 dma_addr += s_dma_len;
413 * If mapping failed, then just restore the original list,
414 * but making sure the DMA fields are invalidated.
416 static void __invalidate_sg(struct scatterlist *sg, int nents)
418 struct scatterlist *s;
421 for_each_sg(sg, s, nents, i) {
422 if (sg_dma_address(s) != DMA_ERROR_CODE)
423 s->offset = sg_dma_address(s);
425 s->length = sg_dma_len(s);
426 sg_dma_address(s) = DMA_ERROR_CODE;
432 * The DMA API client is passing in a scatterlist which could describe
433 * any old buffer layout, but the IOMMU API requires everything to be
434 * aligned to IOMMU pages. Hence the need for this complicated bit of
435 * impedance-matching, to be able to hand off a suitably-aligned list,
436 * but still preserve the original offsets and sizes for the caller.
438 int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg,
441 struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
442 struct iova_domain *iovad = domain->iova_cookie;
444 struct scatterlist *s, *prev = NULL;
450 * Work out how much IOVA space we need, and align the segments to
451 * IOVA granules for the IOMMU driver to handle. With some clever
452 * trickery we can modify the list in-place, but reversibly, by
453 * hiding the original data in the as-yet-unused DMA fields.
455 for_each_sg(sg, s, nents, i) {
456 size_t s_offset = iova_offset(iovad, s->offset);
457 size_t s_length = s->length;
459 sg_dma_address(s) = s->offset;
460 sg_dma_len(s) = s_length;
461 s->offset -= s_offset;
462 s_length = iova_align(iovad, s_length + s_offset);
463 s->length = s_length;
466 * The simple way to avoid the rare case of a segment
467 * crossing the boundary mask is to pad the previous one
468 * to end at a naturally-aligned IOVA for this one's size,
469 * at the cost of potentially over-allocating a little.
472 size_t pad_len = roundup_pow_of_two(s_length);
474 pad_len = (pad_len - iova_len) & (pad_len - 1);
475 prev->length += pad_len;
479 iova_len += s_length;
483 iova = __alloc_iova(iovad, iova_len, dma_get_mask(dev));
488 * We'll leave any physical concatenation to the IOMMU driver's
489 * implementation - it knows better than we do.
491 dma_addr = iova_dma_addr(iovad, iova);
492 if (iommu_map_sg(domain, dma_addr, sg, nents, prot) < iova_len)
495 return __finalise_sg(dev, sg, nents, dma_addr);
498 __free_iova(iovad, iova);
500 __invalidate_sg(sg, nents);
504 void iommu_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
505 enum dma_data_direction dir, struct dma_attrs *attrs)
508 * The scatterlist segments are mapped into a single
509 * contiguous IOVA allocation, so this is incredibly easy.
511 __iommu_dma_unmap(iommu_get_domain_for_dev(dev), sg_dma_address(sg));
514 int iommu_dma_supported(struct device *dev, u64 mask)
517 * 'Special' IOMMUs which don't have the same addressing capability
518 * as the CPU will have to wait until we have some way to query that
519 * before they'll be able to use this framework.
524 int iommu_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
526 return dma_addr == DMA_ERROR_CODE;