drivers/input/gsensor/lis3dh.h

   1 /****************************************************************************************\r
   2  * File:                driver/input/gsensor/lis3dh.h\r
   3  * Copyright:   Copyright (C) 2012-2013 RK Corporation.\r
   4  * Author:              LiBing <libing@rock-chips.com>\r
   5  * Date:                2012.03.06\r
   6  * Description: This driver use for rk29 chip extern gsensor. Use i2c IF ,the chip is \r
   7  *                              STMicroelectronics lis3dh.\r
   8  *****************************************************************************************/\r
   9 \r
  10 #ifndef LIS3DH_H\r
  11 #define LIS3DH_H\r
  12 \r
  13 #include <linux/ioctl.h>\r
  14 \r
  15 #define ODR1                                    0x10  /* 1Hz output data rate */\r
  16 #define ODR10                                   0x20  /* 10Hz output data rate */\r
  17 #define ODR25                                   0x30  /* 25Hz output data rate */\r
  18 #define ODR50                                   0x40  /* 50Hz output data rate */\r
  19 #define ODR100                                  0x50  /* 100Hz output data rate */\r
  20 #define ODR200                                  0x60  /* 200Hz output data rate */\r
  21 #define ODR400                                  0x70  /* 400Hz output data rate */\r
  22 #define ODR1250                                 0x90  /* 1250Hz output data rate */\r
  23 \r
  24 #define SENSITIVITY_2G                  1       /**     mg/LSB  */\r
  25 #define SENSITIVITY_4G                  2       /**     mg/LSB  */\r
  26 #define SENSITIVITY_8G                  4       /**     mg/LSB  */\r
  27 #define SENSITIVITY_16G                 12      /**     mg/LSB  */\r
  28 \r
  29 #define HIGH_RESOLUTION                 0x08\r
  30 \r
  31 /* Accelerometer Sensor Full Scale */\r
  32 #define LIS3DH_ACC_FS_MASK              0x30\r
  33 #define LIS3DH_ACC_G_2G                 0x00\r
  34 #define LIS3DH_ACC_G_4G                 0x10\r
  35 #define LIS3DH_ACC_G_8G                 0x20\r
  36 #define LIS3DH_ACC_G_16G                0x30\r
  37 \r
  38 #define WHO_AM_I                                0x0F\r
  39 #define WHOAMI_LIS3DH_ACC               0x33\r
  40 #define AXISDATA_REG                    0x28\r
  41 \r
  42 #define I2C_AUTO_INCREMENT              0x80\r
  43 #define I2C_RETRY_DELAY                 5\r
  44 #define I2C_RETRIES                             5\r
  45 \r
  46 #define RESUME_ENTRIES                  17\r
  47 \r
  48 #define RES_CTRL_REG1                   0\r
  49 #define RES_CTRL_REG2                   1\r
  50 #define RES_CTRL_REG3                   2\r
  51 #define RES_CTRL_REG4                   3\r
  52 #define RES_CTRL_REG5                   4\r
  53 #define RES_CTRL_REG6                   5\r
  54 \r
  55 #define RES_INT_CFG1                    6\r
  56 #define RES_INT_THS1                    7\r
  57 #define RES_INT_DUR1                    8\r
  58 \r
  59 #define RES_TT_CFG                              9\r
  60 #define RES_TT_THS                              10\r
  61 #define RES_TT_LIM                              11\r
  62 #define RES_TT_TLAT                             12\r
  63 #define RES_TT_TW                               13\r
  64 #define TT_CFG                                  0x38    /*      tap config              */\r
  65 #define TT_SRC                                  0x39    /*      tap source              */\r
  66 #define TT_THS                                  0x3A    /*      tap threshold           */\r
  67 #define TT_LIM                                  0x3B    /*      tap time limit          */\r
  68 #define TT_TLAT                                 0x3C    /*      tap time latency        */\r
  69 #define TT_TW                                   0x3D    /*      tap time window */\r
  70 \r
  71 #define RES_TEMP_CFG_REG                14\r
  72 #define RES_REFERENCE_REG               15\r
  73 #define RES_FIFO_CTRL_REG               16\r
  74 \r
  75 #define CTRL_REG1                               0x20    /*      control reg 1           */\r
  76 #define CTRL_REG2                               0x21    /*      control reg 2           */\r
  77 #define CTRL_REG3                               0x22    /*      control reg 3           */\r
  78 #define CTRL_REG4                               0x23    /*      control reg 4           */\r
  79 #define CTRL_REG5                               0x24    /*      control reg 5           */\r
  80 #define CTRL_REG6                               0x25    /*      control reg 6           */\r
  81 \r
  82 #define TEMP_CFG_REG                    0x1F    /*      temper sens control reg */\r
  83 \r
  84 #define FIFO_CTRL_REG                   0x2E    /*      FiFo control reg        */\r
  85
  86 #define INT_CFG1                                0x30    /*      interrupt 1 config      */\r
  87 #define INT_SRC1                                0x31    /*      interrupt 1 source      */\r
  88 #define INT_THS1                                0x32    /*      interrupt 1 threshold   */\r
  89 #define INT_DUR1                                0x33    /*      interrupt 1 duration    */\r
  90 \r
  91 /* Default register settings */\r
  92 #define RBUFF_SIZE                              12      /* Rx buffer size */\r
  93 #define STIO                                    0xA1\r
  94 \r
  95 /* IOCTLs for LIS3DH library */\r
  96 #define ST_IOCTL_INIT                   _IO(STIO, 0x01)\r
  97 #define ST_IOCTL_RESET                  _IO(STIO, 0x04)\r
  98 #define ST_IOCTL_CLOSE                  _IO(STIO, 0x02)\r
  99 #define ST_IOCTL_START                  _IO(STIO, 0x03)\r
 100 #define ST_IOCTL_GETDATA                _IOR(STIO, 0x08, char[RBUFF_SIZE+1])\r
 101 \r
 102 /* IOCTLs for APPs */\r
 103 #define ST_IOCTL_APP_SET_RATE   _IOW(STIO, 0x10, char)\r
 104 \r
 105 /*rate*/\r
 106 #define LIS3DH_RATE_800                 0\r
 107 #define LIS3DH_RATE_400                 1\r
 108 #define LIS3DH_RATE_200                 2\r
 109 #define LIS3DH_RATE_100                 3\r
 110 #define LIS3DH_RATE_50                  4\r
 111 #define LIS3DH_RATE_12P5                5\r
 112 #define LIS3DH_RATE_6P25                6\r
 113 #define LIS3DH_RATE_1P56                7\r
 114 #define LIS3DH_RATE_SHIFT               3\r
 115 #define LIS3DH_ASLP_RATE_50             0\r
 116 #define LIS3DH_ASLP_RATE_12P5   1\r
 117 #define LIS3DH_ASLP_RATE_6P25   2\r
 118 #define LIS3DH_ASLP_RATE_1P56   3\r
 119 #define LIS3DH_ASLP_RATE_SHIFT  6\r
 120 \r
 121 #define ACTIVE_MASK                             1\r
 122 #define FREAD_MASK                              2\r
 123 \r
 124 /*status*/\r
 125 #define LIS3DH_SUSPEND                  2\r
 126 #define LIS3DH_OPEN                             1\r
 127 #define LIS3DH_CLOSE                    0\r
 128 #define LIS3DH_SPEED                    200 * 1000\r
 129
 130 #define LIS3DH_ACC_ENABLE_ALL_AXES      0x07
 131 \r
 132 #define LIS3DH_RANGE                    2000000\r
 133 #define LIS3DH_PRECISION                16 //8bit data\r
 134 #define LIS3DH_BOUNDARY                 (0x1 << (LIS3DH_PRECISION - 1))\r
 135 #define LIS3DH_GRAVITY_STEP             LIS3DH_RANGE / LIS3DH_BOUNDARY  //2g full scale range\r
 136 \r
 137 #ifdef CONFIG_HAS_EARLYSUSPEND\r
 138 static struct early_suspend lis3dh_early_suspend;\r
 139 #endif\r
 140 \r
 141 struct \r
 142 {       \r
 143         unsigned int cutoff_ms;\r
 144         unsigned int mask;\r
 145 }lis3dh_acc_odr_table[] =\r
 146 {\r
 147         {        1,     ODR1250},\r
 148         {        3,     ODR400 },\r
 149         {        5,     ODR200 },\r
 150         {       10,     ODR100 },\r
 151         {   20, ODR50  },\r
 152         {   40, ODR25  },\r
 153         {  100, ODR10  },\r
 154         { 1000, ODR1   },\r
 155 };\r
 156 \r
 157 struct lis3dh_axis {\r
 158         int x;\r
 159         int y;\r
 160         int z;\r
 161 };\r
 162 \r
 163 \r
 164 struct lis3dh_data {\r
 165     char                status;\r
 166     char                curr_tate;\r
 167         \r
 168         unsigned int    poll_interval;\r
 169         unsigned int    min_interval;\r
 170         \r
 171         struct input_dev        *input_dev;\r
 172         struct i2c_client       *client;\r
 173         struct work_struct      work;\r
 174         struct delayed_work     delaywork;      /*report second event*/\r
 175     struct lis3dh_axis  sense_data;\r
 176     struct mutex                sense_data_mutex;\r
 177         struct mutex            operation_mutex;\r
 178         \r
 179     atomic_t                    data_ready;\r
 180     wait_queue_head_t   data_ready_wq;\r
 181     int                         start_count;\r
 182         u8                              resume_state[RESUME_ENTRIES];  \r
 183 };\r
 184 \r
 185 #endif\r