2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
42 #include <linux/aio.h>
43 #include <linux/jiffies.h>
44 #include <asm/pgtable.h>
45 #include <linux/delay.h>
46 #include <linux/export.h>
49 #include "qib_common.h"
50 #include "qib_user_sdma.h"
53 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
55 static int qib_open(struct inode *, struct file *);
56 static int qib_close(struct inode *, struct file *);
57 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
58 static ssize_t qib_aio_write(struct kiocb *, const struct iovec *,
59 unsigned long, loff_t);
60 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
61 static int qib_mmapf(struct file *, struct vm_area_struct *);
63 static const struct file_operations qib_file_ops = {
66 .aio_write = qib_aio_write,
71 .llseek = noop_llseek,
75 * Convert kernel virtual addresses to physical addresses so they don't
76 * potentially conflict with the chip addresses used as mmap offsets.
77 * It doesn't really matter what mmap offset we use as long as we can
78 * interpret it correctly.
80 static u64 cvt_kvaddr(void *p)
85 page = vmalloc_to_page(p);
87 paddr = page_to_pfn(page) << PAGE_SHIFT;
92 static int qib_get_base_info(struct file *fp, void __user *ubase,
95 struct qib_ctxtdata *rcd = ctxt_fp(fp);
97 struct qib_base_info *kinfo = NULL;
98 struct qib_devdata *dd = rcd->dd;
99 struct qib_pportdata *ppd = rcd->ppd;
100 unsigned subctxt_cnt;
104 subctxt_cnt = rcd->subctxt_cnt;
111 master = !subctxt_fp(fp);
115 /* If context sharing is not requested, allow the old size structure */
117 sz -= 7 * sizeof(u64);
118 if (ubase_size < sz) {
123 kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
129 ret = dd->f_get_base_info(rcd, kinfo);
133 kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
134 kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
135 kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
136 kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
138 * have to mmap whole thing
140 kinfo->spi_rcv_egrbuftotlen =
141 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
142 kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
143 kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
144 rcd->rcvegrbuf_chunks;
145 kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
147 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
149 * for this use, may be cfgctxts summed over all chips that
150 * are are configured and present
152 kinfo->spi_nctxts = dd->cfgctxts;
153 /* unit (chip/board) our context is on */
154 kinfo->spi_unit = dd->unit;
155 kinfo->spi_port = ppd->port;
156 /* for now, only a single page */
157 kinfo->spi_tid_maxsize = PAGE_SIZE;
160 * Doing this per context, and based on the skip value, etc. This has
161 * to be the actual buffer size, since the protocol code treats it
164 * These have to be set to user addresses in the user code via mmap.
165 * These values are used on return to user code for the mmap target
166 * addresses only. For 32 bit, same 44 bit address problem, so use
167 * the physical address, not virtual. Before 2.6.11, using the
168 * page_address() macro worked, but in 2.6.11, even that returns the
169 * full 64 bit address (upper bits all 1's). So far, using the
170 * physical addresses (or chip offsets, for chip mapping) works, but
171 * no doubt some future kernel release will change that, and we'll be
172 * on to yet another method of dealing with this.
173 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
174 * since the chips with non-zero rhf_offset don't normally
175 * enable tail register updates to host memory, but for testing,
176 * both can be enabled and used.
178 kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
179 kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
180 kinfo->spi_rhf_offset = dd->rhf_offset;
181 kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
182 kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
183 /* setup per-unit (not port) status area for user programs */
184 kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
185 (char *) ppd->statusp -
186 (char *) dd->pioavailregs_dma;
187 kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
189 kinfo->spi_piocnt = rcd->piocnt;
190 kinfo->spi_piobufbase = (u64) rcd->piobufs;
191 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
193 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
194 (rcd->piocnt % subctxt_cnt);
195 /* Master's PIO buffers are after all the slave's */
196 kinfo->spi_piobufbase = (u64) rcd->piobufs +
198 (rcd->piocnt - kinfo->spi_piocnt);
200 unsigned slave = subctxt_fp(fp) - 1;
202 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
203 kinfo->spi_piobufbase = (u64) rcd->piobufs +
204 dd->palign * kinfo->spi_piocnt * slave;
208 kinfo->spi_sendbuf_status =
209 cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
210 /* only spi_subctxt_* fields should be set in this block! */
211 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
213 kinfo->spi_subctxt_rcvegrbuf =
214 cvt_kvaddr(rcd->subctxt_rcvegrbuf);
215 kinfo->spi_subctxt_rcvhdr_base =
216 cvt_kvaddr(rcd->subctxt_rcvhdr_base);
220 * All user buffers are 2KB buffers. If we ever support
221 * giving 4KB buffers to user processes, this will need some
222 * work. Can't use piobufbase directly, because it has
223 * both 2K and 4K buffer base values.
225 kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
227 kinfo->spi_pioalign = dd->palign;
228 kinfo->spi_qpair = QIB_KD_QP;
230 * user mode PIO buffers are always 2KB, even when 4KB can
231 * be received, and sent via the kernel; this is ibmaxlen
234 kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
235 kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
236 kinfo->spi_ctxt = rcd->ctxt;
237 kinfo->spi_subctxt = subctxt_fp(fp);
238 kinfo->spi_sw_version = QIB_KERN_SWVERSION;
239 kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
240 kinfo->spi_hw_version = dd->revision;
243 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
245 sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
246 if (copy_to_user(ubase, kinfo, sz))
254 * qib_tid_update - update a context TID
256 * @fp: the qib device file
257 * @ti: the TID information
259 * The new implementation as of Oct 2004 is that the driver assigns
260 * the tid and returns it to the caller. To reduce search time, we
261 * keep a cursor for each context, walking the shadow tid array to find
262 * one that's not in use.
264 * For now, if we can't allocate the full list, we fail, although
265 * in the long run, we'll allocate as many as we can, and the
266 * caller will deal with that by trying the remaining pages later.
267 * That means that when we fail, we have to mark the tids as not in
268 * use again, in our shadow copy.
270 * It's up to the caller to free the tids when they are done.
271 * We'll unlock the pages as they free them.
273 * Also, right now we are locking one page at a time, but since
274 * the intended use of this routine is for a single group of
275 * virtually contiguous pages, that should change to improve
278 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
279 const struct qib_tid_info *ti)
282 u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
284 struct qib_devdata *dd = rcd->dd;
287 u64 __iomem *tidbase;
288 unsigned long tidmap[8];
289 struct page **pagep = NULL;
290 unsigned subctxt = subctxt_fp(fp);
292 if (!dd->pageshadow) {
302 ctxttid = rcd->ctxt * dd->rcvtidcnt;
303 if (!rcd->subctxt_cnt) {
304 tidcnt = dd->rcvtidcnt;
305 tid = rcd->tidcursor;
307 } else if (!subctxt) {
308 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
309 (dd->rcvtidcnt % rcd->subctxt_cnt);
310 tidoff = dd->rcvtidcnt - tidcnt;
312 tid = tidcursor_fp(fp);
314 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
315 tidoff = tidcnt * (subctxt - 1);
317 tid = tidcursor_fp(fp);
320 /* make sure it all fits in tid_pg_list */
321 qib_devinfo(dd->pcidev,
322 "Process tried to allocate %u TIDs, only trying max (%u)\n",
326 pagep = (struct page **) rcd->tid_pg_list;
327 tidlist = (u16 *) &pagep[dd->rcvtidcnt];
331 memset(tidmap, 0, sizeof(tidmap));
332 /* before decrement; chip actual # */
334 tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
336 ctxttid * sizeof(*tidbase));
338 /* virtual address of first page in transfer */
339 vaddr = ti->tidvaddr;
340 if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
345 ret = qib_get_user_pages(vaddr, cnt, pagep);
349 * We can't continue because the pagep array won't be
350 * initialized. This should never happen,
351 * unless perhaps the user has mpin'ed the pages
356 "Failed to lock addr %p, %u pages: errno %d\n",
357 (void *) vaddr, cnt, -ret);
360 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
361 for (; ntids--; tid++) {
364 if (!dd->pageshadow[ctxttid + tid])
369 * Oops, wrapped all the way through their TIDs,
370 * and didn't have enough free; see comments at
373 i--; /* last tidlist[i] not filled in */
377 tidlist[i] = tid + tidoff;
378 /* we "know" system pages and TID pages are same size */
379 dd->pageshadow[ctxttid + tid] = pagep[i];
380 dd->physshadow[ctxttid + tid] =
381 qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
384 * don't need atomic or it's overhead
386 __set_bit(tid, tidmap);
387 physaddr = dd->physshadow[ctxttid + tid];
388 /* PERFORMANCE: below should almost certainly be cached */
389 dd->f_put_tid(dd, &tidbase[tid],
390 RCVHQ_RCV_TYPE_EXPECTED, physaddr);
392 * don't check this tid in qib_ctxtshadow, since we
393 * just filled it in; start with the next one.
401 /* jump here if copy out of updated info failed... */
402 /* same code that's in qib_free_tid() */
403 limit = sizeof(tidmap) * BITS_PER_BYTE;
405 /* just in case size changes in future */
407 tid = find_first_bit((const unsigned long *)tidmap, limit);
408 for (; tid < limit; tid++) {
409 if (!test_bit(tid, tidmap))
411 if (dd->pageshadow[ctxttid + tid]) {
414 phys = dd->physshadow[ctxttid + tid];
415 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
416 /* PERFORMANCE: below should almost certainly
419 dd->f_put_tid(dd, &tidbase[tid],
420 RCVHQ_RCV_TYPE_EXPECTED,
422 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
424 dd->pageshadow[ctxttid + tid] = NULL;
427 qib_release_user_pages(pagep, cnt);
430 * Copy the updated array, with qib_tid's filled in, back
431 * to user. Since we did the copy in already, this "should
432 * never fail" If it does, we have to clean up...
434 if (copy_to_user((void __user *)
435 (unsigned long) ti->tidlist,
436 tidlist, cnt * sizeof(*tidlist))) {
440 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
441 tidmap, sizeof(tidmap))) {
447 if (!rcd->subctxt_cnt)
448 rcd->tidcursor = tid;
450 tidcursor_fp(fp) = tid;
458 * qib_tid_free - free a context TID
460 * @subctxt: the subcontext
463 * right now we are unlocking one page at a time, but since
464 * the intended use of this routine is for a single group of
465 * virtually contiguous pages, that should change to improve
466 * performance. We check that the TID is in range for this context
467 * but otherwise don't check validity; if user has an error and
468 * frees the wrong tid, it's only their own data that can thereby
469 * be corrupted. We do check that the TID was in use, for sanity
470 * We always use our idea of the saved address, not the address that
471 * they pass in to us.
473 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
474 const struct qib_tid_info *ti)
477 u32 tid, ctxttid, cnt, limit, tidcnt;
478 struct qib_devdata *dd = rcd->dd;
479 u64 __iomem *tidbase;
480 unsigned long tidmap[8];
482 if (!dd->pageshadow) {
487 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
493 ctxttid = rcd->ctxt * dd->rcvtidcnt;
494 if (!rcd->subctxt_cnt)
495 tidcnt = dd->rcvtidcnt;
497 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
498 (dd->rcvtidcnt % rcd->subctxt_cnt);
499 ctxttid += dd->rcvtidcnt - tidcnt;
501 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
502 ctxttid += tidcnt * (subctxt - 1);
504 tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
506 ctxttid * sizeof(*tidbase));
508 limit = sizeof(tidmap) * BITS_PER_BYTE;
510 /* just in case size changes in future */
512 tid = find_first_bit(tidmap, limit);
513 for (cnt = 0; tid < limit; tid++) {
515 * small optimization; if we detect a run of 3 or so without
516 * any set, use find_first_bit again. That's mainly to
517 * accelerate the case where we wrapped, so we have some at
518 * the beginning, and some at the end, and a big gap
521 if (!test_bit(tid, tidmap))
524 if (dd->pageshadow[ctxttid + tid]) {
528 p = dd->pageshadow[ctxttid + tid];
529 dd->pageshadow[ctxttid + tid] = NULL;
530 phys = dd->physshadow[ctxttid + tid];
531 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
532 /* PERFORMANCE: below should almost certainly be
535 dd->f_put_tid(dd, &tidbase[tid],
536 RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
537 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
539 qib_release_user_pages(&p, 1);
547 * qib_set_part_key - set a partition key
551 * We can have up to 4 active at a time (other than the default, which is
552 * always allowed). This is somewhat tricky, since multiple contexts may set
553 * the same key, so we reference count them, and clean up at exit. All 4
554 * partition keys are packed into a single qlogic_ib register. It's an
555 * error for a process to set the same pkey multiple times. We provide no
556 * mechanism to de-allocate a pkey at this time, we may eventually need to
557 * do that. I've used the atomic operations, and no locking, and only make
558 * a single pass through what's available. This should be more than
559 * adequate for some time. I'll think about spinlocks or the like if and as
562 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
564 struct qib_pportdata *ppd = rcd->ppd;
565 int i, any = 0, pidx = -1;
566 u16 lkey = key & 0x7FFF;
569 if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
570 /* nothing to do; this key always valid */
581 * Set the full membership bit, because it has to be
582 * set in the register or the packet, and it seems
583 * cleaner to set in the register than to force all
588 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
589 if (!rcd->pkeys[i] && pidx == -1)
591 if (rcd->pkeys[i] == key) {
600 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
601 if (!ppd->pkeys[i]) {
605 if (ppd->pkeys[i] == key) {
606 atomic_t *pkrefs = &ppd->pkeyrefs[i];
608 if (atomic_inc_return(pkrefs) > 1) {
609 rcd->pkeys[pidx] = key;
614 * lost race, decrement count, catch below
620 if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
622 * It makes no sense to have both the limited and
623 * full membership PKEY set at the same time since
624 * the unlimited one will disable the limited one.
634 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
635 if (!ppd->pkeys[i] &&
636 atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
637 rcd->pkeys[pidx] = key;
639 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
651 * qib_manage_rcvq - manage a context's receive queue
653 * @subctxt: the subcontext
654 * @start_stop: action to carry out
656 * start_stop == 0 disables receive on the context, for use in queue
657 * overflow conditions. start_stop==1 re-enables, to be used to
658 * re-init the software copy of the head register
660 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
663 struct qib_devdata *dd = rcd->dd;
664 unsigned int rcvctrl_op;
668 /* atomically clear receive enable ctxt. */
671 * On enable, force in-memory copy of the tail register to
672 * 0, so that protocol code doesn't have to worry about
673 * whether or not the chip has yet updated the in-memory
674 * copy or not on return from the system call. The chip
675 * always resets it's tail register back to 0 on a
676 * transition from disabled to enabled.
678 if (rcd->rcvhdrtail_kvaddr)
679 qib_clear_rcvhdrtail(rcd);
680 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
682 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
683 dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
684 /* always; new head should be equal to new tail; see above */
689 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
690 struct qib_devdata *dd)
692 int i, j, pchanged = 0;
694 struct qib_pportdata *ppd = rcd->ppd;
696 /* for debugging only */
697 oldpkey = (u64) ppd->pkeys[0] |
698 ((u64) ppd->pkeys[1] << 16) |
699 ((u64) ppd->pkeys[2] << 32) |
700 ((u64) ppd->pkeys[3] << 48);
702 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
705 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
706 /* check for match independent of the global bit */
707 if ((ppd->pkeys[j] & 0x7fff) !=
708 (rcd->pkeys[i] & 0x7fff))
710 if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
719 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
722 /* common code for the mappings on dma_alloc_coherent mem */
723 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
724 unsigned len, void *kvaddr, u32 write_ok, char *what)
726 struct qib_devdata *dd = rcd->dd;
730 if ((vma->vm_end - vma->vm_start) > len) {
731 qib_devinfo(dd->pcidev,
732 "FAIL on %s: len %lx > %x\n", what,
733 vma->vm_end - vma->vm_start, len);
739 * shared context user code requires rcvhdrq mapped r/w, others
740 * only allowed readonly mapping.
743 if (vma->vm_flags & VM_WRITE) {
744 qib_devinfo(dd->pcidev,
745 "%s must be mapped readonly\n", what);
750 /* don't allow them to later change with mprotect */
751 vma->vm_flags &= ~VM_MAYWRITE;
754 pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
755 ret = remap_pfn_range(vma, vma->vm_start, pfn,
756 len, vma->vm_page_prot);
758 qib_devinfo(dd->pcidev,
759 "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
760 what, rcd->ctxt, pfn, len, ret);
765 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
773 * This is real hardware, so use io_remap. This is the mechanism
774 * for the user process to update the head registers for their ctxt
777 sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
778 if ((vma->vm_end - vma->vm_start) > sz) {
779 qib_devinfo(dd->pcidev,
780 "FAIL mmap userreg: reqlen %lx > PAGE\n",
781 vma->vm_end - vma->vm_start);
784 phys = dd->physaddr + ureg;
785 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
787 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
788 ret = io_remap_pfn_range(vma, vma->vm_start,
790 vma->vm_end - vma->vm_start,
796 static int mmap_piobufs(struct vm_area_struct *vma,
797 struct qib_devdata *dd,
798 struct qib_ctxtdata *rcd,
799 unsigned piobufs, unsigned piocnt)
805 * When we map the PIO buffers in the chip, we want to map them as
806 * writeonly, no read possible; unfortunately, x86 doesn't allow
807 * for this in hardware, but we still prevent users from asking
810 if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
811 qib_devinfo(dd->pcidev,
812 "FAIL mmap piobufs: reqlen %lx > PAGE\n",
813 vma->vm_end - vma->vm_start);
818 phys = dd->physaddr + piobufs;
820 #if defined(__powerpc__)
821 /* There isn't a generic way to specify writethrough mappings */
822 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
823 pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
824 pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED;
828 * don't allow them to later change to readable with mprotect (for when
829 * not initially mapped readable, as is normally the case)
831 vma->vm_flags &= ~VM_MAYREAD;
832 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
835 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
837 ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
838 vma->vm_end - vma->vm_start,
844 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
845 struct qib_ctxtdata *rcd)
847 struct qib_devdata *dd = rcd->dd;
848 unsigned long start, size;
849 size_t total_size, i;
853 size = rcd->rcvegrbuf_size;
854 total_size = rcd->rcvegrbuf_chunks * size;
855 if ((vma->vm_end - vma->vm_start) > total_size) {
856 qib_devinfo(dd->pcidev,
857 "FAIL on egr bufs: reqlen %lx > actual %lx\n",
858 vma->vm_end - vma->vm_start,
859 (unsigned long) total_size);
864 if (vma->vm_flags & VM_WRITE) {
865 qib_devinfo(dd->pcidev,
866 "Can't map eager buffers as writable (flags=%lx)\n",
871 /* don't allow them to later change to writeable with mprotect */
872 vma->vm_flags &= ~VM_MAYWRITE;
874 start = vma->vm_start;
876 for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
877 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
878 ret = remap_pfn_range(vma, start, pfn, size,
890 * qib_file_vma_fault - handle a VMA page fault.
892 static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
896 page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
898 return VM_FAULT_SIGBUS;
906 static struct vm_operations_struct qib_file_vm_ops = {
907 .fault = qib_file_vma_fault,
910 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
911 struct qib_ctxtdata *rcd, unsigned subctxt)
913 struct qib_devdata *dd = rcd->dd;
914 unsigned subctxt_cnt;
920 subctxt_cnt = rcd->subctxt_cnt;
921 size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
924 * Each process has all the subctxt uregbase, rcvhdrq, and
925 * rcvegrbufs mmapped - as an array for all the processes,
926 * and also separately for this process.
928 if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
929 addr = rcd->subctxt_uregbase;
930 size = PAGE_SIZE * subctxt_cnt;
931 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
932 addr = rcd->subctxt_rcvhdr_base;
933 size = rcd->rcvhdrq_size * subctxt_cnt;
934 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
935 addr = rcd->subctxt_rcvegrbuf;
937 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
938 PAGE_SIZE * subctxt)) {
939 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
941 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
942 rcd->rcvhdrq_size * subctxt)) {
943 addr = rcd->subctxt_rcvhdr_base +
944 rcd->rcvhdrq_size * subctxt;
945 size = rcd->rcvhdrq_size;
946 } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
947 addr = rcd->user_event_mask;
949 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
951 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
952 /* rcvegrbufs are read-only on the slave */
953 if (vma->vm_flags & VM_WRITE) {
954 qib_devinfo(dd->pcidev,
955 "Can't map eager buffers as writable (flags=%lx)\n",
961 * Don't allow permission to later change to writeable
964 vma->vm_flags &= ~VM_MAYWRITE;
967 len = vma->vm_end - vma->vm_start;
973 vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
974 vma->vm_ops = &qib_file_vm_ops;
975 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
983 * qib_mmapf - mmap various structures into user space
984 * @fp: the file pointer
987 * We use this to have a shared buffer between the kernel and the user code
988 * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
989 * buffers in the chip. We have the open and close entries so we can bump
990 * the ref count and keep the driver from being unloaded while still mapped.
992 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
994 struct qib_ctxtdata *rcd;
995 struct qib_devdata *dd;
997 unsigned piobufs, piocnt;
1001 if (!rcd || !(vma->vm_flags & VM_SHARED)) {
1008 * This is the qib_do_user_init() code, mapping the shared buffers
1009 * and per-context user registers into the user process. The address
1010 * referred to by vm_pgoff is the file offset passed via mmap().
1011 * For shared contexts, this is the kernel vmalloc() address of the
1012 * pages to share with the master.
1013 * For non-shared or master ctxts, this is a physical address.
1014 * We only do one mmap for each space mapped.
1016 pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1019 * Check for 0 in case one of the allocations failed, but user
1020 * called mmap anyway.
1028 * Physical addresses must fit in 40 bits for our hardware.
1029 * Check for kernel virtual addresses first, anything else must
1030 * match a HW or memory address.
1032 ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1039 ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1040 if (!rcd->subctxt_cnt) {
1041 /* ctxt is not shared */
1042 piocnt = rcd->piocnt;
1043 piobufs = rcd->piobufs;
1044 } else if (!subctxt_fp(fp)) {
1045 /* caller is the master */
1046 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1047 (rcd->piocnt % rcd->subctxt_cnt);
1048 piobufs = rcd->piobufs +
1049 dd->palign * (rcd->piocnt - piocnt);
1051 unsigned slave = subctxt_fp(fp) - 1;
1053 /* caller is a slave */
1054 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1055 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1059 ret = mmap_ureg(vma, dd, ureg);
1060 else if (pgaddr == piobufs)
1061 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1062 else if (pgaddr == dd->pioavailregs_phys)
1063 /* in-memory copy of pioavail registers */
1064 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1065 (void *) dd->pioavailregs_dma, 0,
1066 "pioavail registers");
1067 else if (pgaddr == rcd->rcvegr_phys)
1068 ret = mmap_rcvegrbufs(vma, rcd);
1069 else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1071 * The rcvhdrq itself; multiple pages, contiguous
1072 * from an i/o perspective. Shared contexts need
1073 * to map r/w, so we allow writing.
1075 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1076 rcd->rcvhdrq, 1, "rcvhdrq");
1077 else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1078 /* in-memory copy of rcvhdrq tail register */
1079 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1080 rcd->rcvhdrtail_kvaddr, 0,
1087 vma->vm_private_data = NULL;
1090 qib_devinfo(dd->pcidev,
1091 "mmap Failure %d: off %llx len %lx\n",
1092 -ret, (unsigned long long)pgaddr,
1093 vma->vm_end - vma->vm_start);
1098 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1100 struct poll_table_struct *pt)
1102 struct qib_devdata *dd = rcd->dd;
1105 poll_wait(fp, &rcd->wait, pt);
1107 spin_lock_irq(&dd->uctxt_lock);
1108 if (rcd->urgent != rcd->urgent_poll) {
1109 pollflag = POLLIN | POLLRDNORM;
1110 rcd->urgent_poll = rcd->urgent;
1113 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1115 spin_unlock_irq(&dd->uctxt_lock);
1120 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1122 struct poll_table_struct *pt)
1124 struct qib_devdata *dd = rcd->dd;
1127 poll_wait(fp, &rcd->wait, pt);
1129 spin_lock_irq(&dd->uctxt_lock);
1130 if (dd->f_hdrqempty(rcd)) {
1131 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1132 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1135 pollflag = POLLIN | POLLRDNORM;
1136 spin_unlock_irq(&dd->uctxt_lock);
1141 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1143 struct qib_ctxtdata *rcd;
1149 else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1150 pollflag = qib_poll_urgent(rcd, fp, pt);
1151 else if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1152 pollflag = qib_poll_next(rcd, fp, pt);
1159 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1161 struct qib_filedata *fd = fp->private_data;
1162 const unsigned int weight = cpumask_weight(¤t->cpus_allowed);
1163 const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1167 * If process has NOT already set it's affinity, select and
1168 * reserve a processor for it on the local NUMA node.
1170 if ((weight >= qib_cpulist_count) &&
1171 (cpumask_weight(local_mask) <= qib_cpulist_count)) {
1172 for_each_cpu(local_cpu, local_mask)
1173 if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1174 fd->rec_cpu_num = local_cpu;
1180 * If process has NOT already set it's affinity, select and
1181 * reserve a processor for it, as a rendevous for all
1182 * users of the driver. If they don't actually later
1183 * set affinity to this cpu, or set it to some other cpu,
1184 * it just means that sooner or later we don't recommend
1185 * a cpu, and let the scheduler do it's best.
1187 if (weight >= qib_cpulist_count) {
1190 cpu = find_first_zero_bit(qib_cpulist,
1192 if (cpu == qib_cpulist_count)
1194 "no cpus avail for affinity PID %u\n",
1197 __set_bit(cpu, qib_cpulist);
1198 fd->rec_cpu_num = cpu;
1204 * Check that userland and driver are compatible for subcontexts.
1206 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1208 /* this code is written long-hand for clarity */
1209 if (QIB_USER_SWMAJOR != user_swmajor) {
1210 /* no promise of compatibility if major mismatch */
1213 if (QIB_USER_SWMAJOR == 1) {
1214 switch (QIB_USER_SWMINOR) {
1218 /* no subctxt implementation so cannot be compatible */
1221 /* 3 is only compatible with itself */
1222 return user_swminor == 3;
1224 /* >= 4 are compatible (or are expected to be) */
1225 return user_swminor <= QIB_USER_SWMINOR;
1228 /* make no promises yet for future major versions */
1232 static int init_subctxts(struct qib_devdata *dd,
1233 struct qib_ctxtdata *rcd,
1234 const struct qib_user_info *uinfo)
1237 unsigned num_subctxts;
1241 * If the user is requesting zero subctxts,
1242 * skip the subctxt allocation.
1244 if (uinfo->spu_subctxt_cnt <= 0)
1246 num_subctxts = uinfo->spu_subctxt_cnt;
1248 /* Check for subctxt compatibility */
1249 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1250 uinfo->spu_userversion & 0xffff)) {
1251 qib_devinfo(dd->pcidev,
1252 "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1253 (int) (uinfo->spu_userversion >> 16),
1254 (int) (uinfo->spu_userversion & 0xffff),
1255 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1258 if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1263 rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1264 if (!rcd->subctxt_uregbase) {
1268 /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1269 size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1270 sizeof(u32), PAGE_SIZE) * num_subctxts;
1271 rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1272 if (!rcd->subctxt_rcvhdr_base) {
1277 rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1278 rcd->rcvegrbuf_size *
1280 if (!rcd->subctxt_rcvegrbuf) {
1285 rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1286 rcd->subctxt_id = uinfo->spu_subctxt_id;
1287 rcd->active_slaves = 1;
1288 rcd->redirect_seq_cnt = 1;
1289 set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1293 vfree(rcd->subctxt_rcvhdr_base);
1295 vfree(rcd->subctxt_uregbase);
1296 rcd->subctxt_uregbase = NULL;
1301 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1302 struct file *fp, const struct qib_user_info *uinfo)
1304 struct qib_filedata *fd = fp->private_data;
1305 struct qib_devdata *dd = ppd->dd;
1306 struct qib_ctxtdata *rcd;
1311 assign_ctxt_affinity(fp, dd);
1313 numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1314 cpu_to_node(fd->rec_cpu_num) :
1315 numa_node_id()) : dd->assigned_node_id;
1317 rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1320 * Allocate memory for use in qib_tid_update() at open to
1321 * reduce cost of expected send setup per message segment
1324 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1325 dd->rcvtidcnt * sizeof(struct page **),
1328 if (!rcd || !ptmp) {
1330 "Unable to allocate ctxtdata memory, failing open\n");
1334 rcd->userversion = uinfo->spu_userversion;
1335 ret = init_subctxts(dd, rcd, uinfo);
1338 rcd->tid_pg_list = ptmp;
1339 rcd->pid = current->pid;
1340 init_waitqueue_head(&dd->rcd[ctxt]->wait);
1341 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1343 qib_stats.sps_ctxts++;
1349 if (fd->rec_cpu_num != -1)
1350 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1352 dd->rcd[ctxt] = NULL;
1359 static inline int usable(struct qib_pportdata *ppd)
1361 struct qib_devdata *dd = ppd->dd;
1363 return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1364 (ppd->lflags & QIBL_LINKACTIVE);
1368 * Select a context on the given device, either using a requested port
1369 * or the port based on the context number.
1371 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1372 const struct qib_user_info *uinfo)
1374 struct qib_pportdata *ppd = NULL;
1378 if (!usable(dd->pport + port - 1)) {
1382 ppd = dd->pport + port - 1;
1384 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1387 if (ctxt == dd->cfgctxts) {
1392 u32 pidx = ctxt % dd->num_pports;
1394 if (usable(dd->pport + pidx))
1395 ppd = dd->pport + pidx;
1397 for (pidx = 0; pidx < dd->num_pports && !ppd;
1399 if (usable(dd->pport + pidx))
1400 ppd = dd->pport + pidx;
1403 ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1408 static int find_free_ctxt(int unit, struct file *fp,
1409 const struct qib_user_info *uinfo)
1411 struct qib_devdata *dd = qib_lookup(unit);
1414 if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1417 ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1422 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1425 struct qib_devdata *udd = NULL;
1426 int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1427 u32 port = uinfo->spu_port, ctxt;
1429 devmax = qib_count_units(&npresent, &nup);
1439 if (alg == QIB_PORT_ALG_ACROSS) {
1440 unsigned inuse = ~0U;
1442 /* find device (with ACTIVE ports) with fewest ctxts in use */
1443 for (ndev = 0; ndev < devmax; ndev++) {
1444 struct qib_devdata *dd = qib_lookup(ndev);
1445 unsigned cused = 0, cfree = 0, pusable = 0;
1449 if (port && port <= dd->num_pports &&
1450 usable(dd->pport + port - 1))
1453 for (i = 0; i < dd->num_pports; i++)
1454 if (usable(dd->pport + i))
1458 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1464 if (cfree && cused < inuse) {
1470 ret = choose_port_ctxt(fp, udd, port, uinfo);
1474 for (ndev = 0; ndev < devmax; ndev++) {
1475 struct qib_devdata *dd = qib_lookup(ndev);
1478 ret = choose_port_ctxt(fp, dd, port, uinfo);
1486 ret = dusable ? -EBUSY : -ENETDOWN;
1492 static int find_shared_ctxt(struct file *fp,
1493 const struct qib_user_info *uinfo)
1495 int devmax, ndev, i;
1498 devmax = qib_count_units(NULL, NULL);
1500 for (ndev = 0; ndev < devmax; ndev++) {
1501 struct qib_devdata *dd = qib_lookup(ndev);
1503 /* device portion of usable() */
1504 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1506 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1507 struct qib_ctxtdata *rcd = dd->rcd[i];
1509 /* Skip ctxts which are not yet open */
1510 if (!rcd || !rcd->cnt)
1512 /* Skip ctxt if it doesn't match the requested one */
1513 if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1515 /* Verify the sharing process matches the master */
1516 if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1517 rcd->userversion != uinfo->spu_userversion ||
1518 rcd->cnt >= rcd->subctxt_cnt) {
1523 subctxt_fp(fp) = rcd->cnt++;
1524 rcd->subpid[subctxt_fp(fp)] = current->pid;
1525 tidcursor_fp(fp) = 0;
1526 rcd->active_slaves |= 1 << subctxt_fp(fp);
1536 static int qib_open(struct inode *in, struct file *fp)
1538 /* The real work is performed later in qib_assign_ctxt() */
1539 fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1540 if (fp->private_data) /* no cpu affinity by default */
1541 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1542 return fp->private_data ? 0 : -ENOMEM;
1545 static int find_hca(unsigned int cpu, int *unit)
1547 int ret = 0, devmax, npresent, nup, ndev;
1551 devmax = qib_count_units(&npresent, &nup);
1560 for (ndev = 0; ndev < devmax; ndev++) {
1561 struct qib_devdata *dd = qib_lookup(ndev);
1564 if (pcibus_to_node(dd->pcidev->bus) < 0) {
1568 if (cpu_to_node(cpu) ==
1569 pcibus_to_node(dd->pcidev->bus)) {
1579 static int do_qib_user_sdma_queue_create(struct file *fp)
1581 struct qib_filedata *fd = fp->private_data;
1582 struct qib_ctxtdata *rcd = fd->rcd;
1583 struct qib_devdata *dd = rcd->dd;
1585 if (dd->flags & QIB_HAS_SEND_DMA) {
1587 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1599 * Get ctxt early, so can set affinity prior to memory allocation.
1601 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1605 unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1607 /* Check to be sure we haven't already initialized this file */
1613 /* for now, if major version is different, bail */
1614 swmajor = uinfo->spu_userversion >> 16;
1615 if (swmajor != QIB_USER_SWMAJOR) {
1620 swminor = uinfo->spu_userversion & 0xffff;
1622 if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1623 alg = uinfo->spu_port_alg;
1625 mutex_lock(&qib_mutex);
1627 if (qib_compatible_subctxts(swmajor, swminor) &&
1628 uinfo->spu_subctxt_cnt) {
1629 ret = find_shared_ctxt(fp, uinfo);
1631 ret = do_qib_user_sdma_queue_create(fp);
1633 assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1638 i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1640 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1643 const unsigned int cpu = cpumask_first(¤t->cpus_allowed);
1644 const unsigned int weight =
1645 cpumask_weight(¤t->cpus_allowed);
1647 if (weight == 1 && !test_bit(cpu, qib_cpulist))
1648 if (!find_hca(cpu, &unit) && unit >= 0)
1649 if (!find_free_ctxt(unit, fp, uinfo)) {
1653 ret = get_a_ctxt(fp, uinfo, alg);
1658 ret = do_qib_user_sdma_queue_create(fp);
1660 mutex_unlock(&qib_mutex);
1667 static int qib_do_user_init(struct file *fp,
1668 const struct qib_user_info *uinfo)
1671 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1672 struct qib_devdata *dd;
1675 /* Subctxts don't need to initialize anything since master did it. */
1676 if (subctxt_fp(fp)) {
1677 ret = wait_event_interruptible(rcd->wait,
1678 !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1684 /* some ctxts may get extra buffers, calculate that here */
1685 uctxt = rcd->ctxt - dd->first_user_ctxt;
1686 if (uctxt < dd->ctxts_extrabuf) {
1687 rcd->piocnt = dd->pbufsctxt + 1;
1688 rcd->pio_base = rcd->piocnt * uctxt;
1690 rcd->piocnt = dd->pbufsctxt;
1691 rcd->pio_base = rcd->piocnt * uctxt +
1696 * All user buffers are 2KB buffers. If we ever support
1697 * giving 4KB buffers to user processes, this will need some
1698 * work. Can't use piobufbase directly, because it has
1699 * both 2K and 4K buffer base values. So check and handle.
1701 if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1702 if (rcd->pio_base >= dd->piobcnt2k) {
1704 "%u:ctxt%u: no 2KB buffers available\n",
1705 dd->unit, rcd->ctxt);
1709 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1710 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1711 rcd->ctxt, rcd->piocnt);
1714 rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1715 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1716 TXCHK_CHG_TYPE_USER, rcd);
1718 * try to ensure that processes start up with consistent avail update
1719 * for their own range, at least. If system very quiet, it might
1720 * have the in-memory copy out of date at startup for this range of
1721 * buffers, when a context gets re-used. Do after the chg_pioavail
1722 * and before the rest of setup, so it's "almost certain" the dma
1723 * will have occurred (can't 100% guarantee, but should be many
1724 * decimals of 9s, with this ordering), given how much else happens
1727 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1730 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1731 * array for time being. If rcd->ctxt > chip-supported,
1732 * we need to do extra stuff here to handle by handling overflow
1733 * through ctxt 0, someday
1735 ret = qib_create_rcvhdrq(dd, rcd);
1737 ret = qib_setup_eagerbufs(rcd);
1741 rcd->tidcursor = 0; /* start at beginning after open */
1743 /* initialize poll variables... */
1745 rcd->urgent_poll = 0;
1748 * Now enable the ctxt for receive.
1749 * For chips that are set to DMA the tail register to memory
1750 * when they change (and when the update bit transitions from
1751 * 0 to 1. So for those chips, we turn it off and then back on.
1752 * This will (very briefly) affect any other open ctxts, but the
1753 * duration is very short, and therefore isn't an issue. We
1754 * explicitly set the in-memory tail copy to 0 beforehand, so we
1755 * don't have to wait to be sure the DMA update has happened
1756 * (chip resets head/tail to 0 on transition to enable).
1758 if (rcd->rcvhdrtail_kvaddr)
1759 qib_clear_rcvhdrtail(rcd);
1761 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1764 /* Notify any waiting slaves */
1765 if (rcd->subctxt_cnt) {
1766 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1767 wake_up(&rcd->wait);
1772 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1773 TXCHK_CHG_TYPE_KERN, rcd);
1779 * unlock_exptid - unlock any expected TID entries context still had in use
1782 * We don't actually update the chip here, because we do a bulk update
1783 * below, using f_clear_tids.
1785 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1787 struct qib_devdata *dd = rcd->dd;
1788 int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1789 int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1791 for (i = ctxt_tidbase; i < maxtid; i++) {
1792 struct page *p = dd->pageshadow[i];
1798 phys = dd->physshadow[i];
1799 dd->physshadow[i] = dd->tidinvalid;
1800 dd->pageshadow[i] = NULL;
1801 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1802 PCI_DMA_FROMDEVICE);
1803 qib_release_user_pages(&p, 1);
1808 static int qib_close(struct inode *in, struct file *fp)
1811 struct qib_filedata *fd;
1812 struct qib_ctxtdata *rcd;
1813 struct qib_devdata *dd;
1814 unsigned long flags;
1818 mutex_lock(&qib_mutex);
1820 fd = fp->private_data;
1821 fp->private_data = NULL;
1824 mutex_unlock(&qib_mutex);
1830 /* ensure all pio buffer writes in progress are flushed */
1833 /* drain user sdma queue */
1835 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1836 qib_user_sdma_queue_destroy(fd->pq);
1839 if (fd->rec_cpu_num != -1)
1840 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1844 * XXX If the master closes the context before the slave(s),
1845 * revoke the mmap for the eager receive queue so
1846 * the slave(s) don't wait for receive data forever.
1848 rcd->active_slaves &= ~(1 << fd->subctxt);
1849 rcd->subpid[fd->subctxt] = 0;
1850 mutex_unlock(&qib_mutex);
1854 /* early; no interrupt users after this */
1855 spin_lock_irqsave(&dd->uctxt_lock, flags);
1857 dd->rcd[ctxt] = NULL;
1860 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1862 if (rcd->rcvwait_to || rcd->piowait_to ||
1863 rcd->rcvnowait || rcd->pionowait) {
1864 rcd->rcvwait_to = 0;
1865 rcd->piowait_to = 0;
1873 /* atomically clear receive enable ctxt and intr avail. */
1874 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1875 QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1877 /* clean up the pkeys for this ctxt user */
1878 qib_clean_part_key(rcd, dd);
1879 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1880 qib_chg_pioavailkernel(dd, rcd->pio_base,
1881 rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1883 dd->f_clear_tids(dd, rcd);
1886 unlock_expected_tids(rcd);
1887 qib_stats.sps_ctxts--;
1891 mutex_unlock(&qib_mutex);
1892 qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1899 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1901 struct qib_ctxt_info info;
1904 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1905 struct qib_filedata *fd;
1907 fd = fp->private_data;
1909 info.num_active = qib_count_active_units();
1910 info.unit = rcd->dd->unit;
1911 info.port = rcd->ppd->port;
1912 info.ctxt = rcd->ctxt;
1913 info.subctxt = subctxt_fp(fp);
1914 /* Number of user ctxts available for this device. */
1915 info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1916 info.num_subctxts = rcd->subctxt_cnt;
1917 info.rec_cpu = fd->rec_cpu_num;
1920 if (copy_to_user(uinfo, &info, sz)) {
1930 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1931 u32 __user *inflightp)
1933 const u32 val = qib_user_sdma_inflight_counter(pq);
1935 if (put_user(val, inflightp))
1941 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1942 struct qib_user_sdma_queue *pq,
1943 u32 __user *completep)
1951 err = qib_user_sdma_make_progress(ppd, pq);
1955 val = qib_user_sdma_complete_counter(pq);
1956 if (put_user(val, completep))
1962 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1966 if (!usable(rcd->ppd)) {
1969 * if link is down, or otherwise not usable, delay
1970 * the caller up to 30 seconds, so we don't thrash
1971 * in trying to get the chip back to ACTIVE, and
1972 * set flag so they make the call again.
1974 if (rcd->user_event_mask) {
1976 * subctxt_cnt is 0 if not shared, so do base
1977 * separately, first, then remaining subctxt, if any
1979 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1980 &rcd->user_event_mask[0]);
1981 for (i = 1; i < rcd->subctxt_cnt; i++)
1982 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1983 &rcd->user_event_mask[i]);
1985 for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1993 * Find all user contexts in use, and set the specified bit in their
1995 * See also find_ctxt() for a similar use, that is specific to send buffers.
1997 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
1999 struct qib_ctxtdata *rcd;
2002 unsigned long flags;
2004 spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
2005 for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
2007 rcd = ppd->dd->rcd[ctxt];
2010 if (rcd->user_event_mask) {
2013 * subctxt_cnt is 0 if not shared, so do base
2014 * separately, first, then remaining subctxt, if any
2016 set_bit(evtbit, &rcd->user_event_mask[0]);
2017 for (i = 1; i < rcd->subctxt_cnt; i++)
2018 set_bit(evtbit, &rcd->user_event_mask[i]);
2023 spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2029 * clear the event notifier events for this context.
2030 * For the DISARM_BUFS case, we also take action (this obsoletes
2031 * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2033 * Other bits don't currently require actions, just atomically clear.
2034 * User process then performs actions appropriate to bit having been
2035 * set, if desired, and checks again in future.
2037 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2038 unsigned long events)
2042 for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2043 if (!test_bit(i, &events))
2045 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2046 (void)qib_disarm_piobufs_ifneeded(rcd);
2047 ret = disarm_req_delay(rcd);
2049 clear_bit(i, &rcd->user_event_mask[subctxt]);
2054 static ssize_t qib_write(struct file *fp, const char __user *data,
2055 size_t count, loff_t *off)
2057 const struct qib_cmd __user *ucmd;
2058 struct qib_ctxtdata *rcd;
2059 const void __user *src;
2060 size_t consumed, copy = 0;
2065 if (count < sizeof(cmd.type)) {
2070 ucmd = (const struct qib_cmd __user *) data;
2072 if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2077 consumed = sizeof(cmd.type);
2080 case QIB_CMD_ASSIGN_CTXT:
2081 case QIB_CMD_USER_INIT:
2082 copy = sizeof(cmd.cmd.user_info);
2083 dest = &cmd.cmd.user_info;
2084 src = &ucmd->cmd.user_info;
2087 case QIB_CMD_RECV_CTRL:
2088 copy = sizeof(cmd.cmd.recv_ctrl);
2089 dest = &cmd.cmd.recv_ctrl;
2090 src = &ucmd->cmd.recv_ctrl;
2093 case QIB_CMD_CTXT_INFO:
2094 copy = sizeof(cmd.cmd.ctxt_info);
2095 dest = &cmd.cmd.ctxt_info;
2096 src = &ucmd->cmd.ctxt_info;
2099 case QIB_CMD_TID_UPDATE:
2100 case QIB_CMD_TID_FREE:
2101 copy = sizeof(cmd.cmd.tid_info);
2102 dest = &cmd.cmd.tid_info;
2103 src = &ucmd->cmd.tid_info;
2106 case QIB_CMD_SET_PART_KEY:
2107 copy = sizeof(cmd.cmd.part_key);
2108 dest = &cmd.cmd.part_key;
2109 src = &ucmd->cmd.part_key;
2112 case QIB_CMD_DISARM_BUFS:
2113 case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2119 case QIB_CMD_POLL_TYPE:
2120 copy = sizeof(cmd.cmd.poll_type);
2121 dest = &cmd.cmd.poll_type;
2122 src = &ucmd->cmd.poll_type;
2125 case QIB_CMD_ARMLAUNCH_CTRL:
2126 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2127 dest = &cmd.cmd.armlaunch_ctrl;
2128 src = &ucmd->cmd.armlaunch_ctrl;
2131 case QIB_CMD_SDMA_INFLIGHT:
2132 copy = sizeof(cmd.cmd.sdma_inflight);
2133 dest = &cmd.cmd.sdma_inflight;
2134 src = &ucmd->cmd.sdma_inflight;
2137 case QIB_CMD_SDMA_COMPLETE:
2138 copy = sizeof(cmd.cmd.sdma_complete);
2139 dest = &cmd.cmd.sdma_complete;
2140 src = &ucmd->cmd.sdma_complete;
2143 case QIB_CMD_ACK_EVENT:
2144 copy = sizeof(cmd.cmd.event_mask);
2145 dest = &cmd.cmd.event_mask;
2146 src = &ucmd->cmd.event_mask;
2155 if ((count - consumed) < copy) {
2159 if (copy_from_user(dest, src, copy)) {
2167 if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2173 case QIB_CMD_ASSIGN_CTXT:
2174 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2179 case QIB_CMD_USER_INIT:
2180 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2183 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2184 cmd.cmd.user_info.spu_base_info,
2185 cmd.cmd.user_info.spu_base_info_size);
2188 case QIB_CMD_RECV_CTRL:
2189 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2192 case QIB_CMD_CTXT_INFO:
2193 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2194 (unsigned long) cmd.cmd.ctxt_info);
2197 case QIB_CMD_TID_UPDATE:
2198 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2201 case QIB_CMD_TID_FREE:
2202 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2205 case QIB_CMD_SET_PART_KEY:
2206 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2209 case QIB_CMD_DISARM_BUFS:
2210 (void)qib_disarm_piobufs_ifneeded(rcd);
2211 ret = disarm_req_delay(rcd);
2214 case QIB_CMD_PIOAVAILUPD:
2215 qib_force_pio_avail_update(rcd->dd);
2218 case QIB_CMD_POLL_TYPE:
2219 rcd->poll_type = cmd.cmd.poll_type;
2222 case QIB_CMD_ARMLAUNCH_CTRL:
2223 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2226 case QIB_CMD_SDMA_INFLIGHT:
2227 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2228 (u32 __user *) (unsigned long)
2229 cmd.cmd.sdma_inflight);
2232 case QIB_CMD_SDMA_COMPLETE:
2233 ret = qib_sdma_get_complete(rcd->ppd,
2234 user_sdma_queue_fp(fp),
2235 (u32 __user *) (unsigned long)
2236 cmd.cmd.sdma_complete);
2239 case QIB_CMD_ACK_EVENT:
2240 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2241 cmd.cmd.event_mask);
2252 static ssize_t qib_aio_write(struct kiocb *iocb, const struct iovec *iov,
2253 unsigned long dim, loff_t off)
2255 struct qib_filedata *fp = iocb->ki_filp->private_data;
2256 struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2257 struct qib_user_sdma_queue *pq = fp->pq;
2262 return qib_user_sdma_writev(rcd, pq, iov, dim);
2265 static struct class *qib_class;
2266 static dev_t qib_dev;
2268 int qib_cdev_init(int minor, const char *name,
2269 const struct file_operations *fops,
2270 struct cdev **cdevp, struct device **devp)
2272 const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2274 struct device *device = NULL;
2277 cdev = cdev_alloc();
2279 pr_err("Could not allocate cdev for minor %d, %s\n",
2285 cdev->owner = THIS_MODULE;
2287 kobject_set_name(&cdev->kobj, name);
2289 ret = cdev_add(cdev, dev, 1);
2291 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2296 device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2297 if (!IS_ERR(device))
2299 ret = PTR_ERR(device);
2301 pr_err("Could not create device for minor %d, %s (err %d)\n",
2312 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2314 struct device *device = *devp;
2317 device_unregister(device);
2327 static struct cdev *wildcard_cdev;
2328 static struct device *wildcard_device;
2330 int __init qib_dev_init(void)
2334 ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2336 pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2340 qib_class = class_create(THIS_MODULE, "ipath");
2341 if (IS_ERR(qib_class)) {
2342 ret = PTR_ERR(qib_class);
2343 pr_err("Could not create device class (err %d)\n", -ret);
2344 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2351 void qib_dev_cleanup(void)
2354 class_destroy(qib_class);
2358 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2361 static atomic_t user_count = ATOMIC_INIT(0);
2363 static void qib_user_remove(struct qib_devdata *dd)
2365 if (atomic_dec_return(&user_count) == 0)
2366 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2368 qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2371 static int qib_user_add(struct qib_devdata *dd)
2376 if (atomic_inc_return(&user_count) == 1) {
2377 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2378 &wildcard_cdev, &wildcard_device);
2383 snprintf(name, sizeof(name), "ipath%d", dd->unit);
2384 ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2385 &dd->user_cdev, &dd->user_device);
2387 qib_user_remove(dd);
2393 * Create per-unit files in /dev
2395 int qib_device_create(struct qib_devdata *dd)
2399 r = qib_user_add(dd);
2400 ret = qib_diag_add(dd);
2407 * Remove per-unit files in /dev
2408 * void, core kernel returns no errors for this stuff
2410 void qib_device_remove(struct qib_devdata *dd)
2412 qib_user_remove(dd);
2413 qib_diag_remove(dd);