2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
42 #include <linux/jiffies.h>
43 #include <asm/pgtable.h>
44 #include <linux/delay.h>
45 #include <linux/export.h>
46 #include <linux/uio.h>
49 #include "qib_common.h"
50 #include "qib_user_sdma.h"
53 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
55 static int qib_open(struct inode *, struct file *);
56 static int qib_close(struct inode *, struct file *);
57 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
58 static ssize_t qib_write_iter(struct kiocb *, struct iov_iter *);
59 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
60 static int qib_mmapf(struct file *, struct vm_area_struct *);
63 * This is really, really weird shit - write() and writev() here
64 * have completely unrelated semantics. Sucky userland ABI,
67 static const struct file_operations qib_file_ops = {
70 .write_iter = qib_write_iter,
75 .llseek = noop_llseek,
79 * Convert kernel virtual addresses to physical addresses so they don't
80 * potentially conflict with the chip addresses used as mmap offsets.
81 * It doesn't really matter what mmap offset we use as long as we can
82 * interpret it correctly.
84 static u64 cvt_kvaddr(void *p)
89 page = vmalloc_to_page(p);
91 paddr = page_to_pfn(page) << PAGE_SHIFT;
96 static int qib_get_base_info(struct file *fp, void __user *ubase,
99 struct qib_ctxtdata *rcd = ctxt_fp(fp);
101 struct qib_base_info *kinfo = NULL;
102 struct qib_devdata *dd = rcd->dd;
103 struct qib_pportdata *ppd = rcd->ppd;
104 unsigned subctxt_cnt;
108 subctxt_cnt = rcd->subctxt_cnt;
115 master = !subctxt_fp(fp);
119 /* If context sharing is not requested, allow the old size structure */
121 sz -= 7 * sizeof(u64);
122 if (ubase_size < sz) {
127 kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
133 ret = dd->f_get_base_info(rcd, kinfo);
137 kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
138 kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
139 kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
140 kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
142 * have to mmap whole thing
144 kinfo->spi_rcv_egrbuftotlen =
145 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
146 kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
147 kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
148 rcd->rcvegrbuf_chunks;
149 kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
151 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
153 * for this use, may be cfgctxts summed over all chips that
154 * are are configured and present
156 kinfo->spi_nctxts = dd->cfgctxts;
157 /* unit (chip/board) our context is on */
158 kinfo->spi_unit = dd->unit;
159 kinfo->spi_port = ppd->port;
160 /* for now, only a single page */
161 kinfo->spi_tid_maxsize = PAGE_SIZE;
164 * Doing this per context, and based on the skip value, etc. This has
165 * to be the actual buffer size, since the protocol code treats it
168 * These have to be set to user addresses in the user code via mmap.
169 * These values are used on return to user code for the mmap target
170 * addresses only. For 32 bit, same 44 bit address problem, so use
171 * the physical address, not virtual. Before 2.6.11, using the
172 * page_address() macro worked, but in 2.6.11, even that returns the
173 * full 64 bit address (upper bits all 1's). So far, using the
174 * physical addresses (or chip offsets, for chip mapping) works, but
175 * no doubt some future kernel release will change that, and we'll be
176 * on to yet another method of dealing with this.
177 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
178 * since the chips with non-zero rhf_offset don't normally
179 * enable tail register updates to host memory, but for testing,
180 * both can be enabled and used.
182 kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
183 kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
184 kinfo->spi_rhf_offset = dd->rhf_offset;
185 kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
186 kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
187 /* setup per-unit (not port) status area for user programs */
188 kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
189 (char *) ppd->statusp -
190 (char *) dd->pioavailregs_dma;
191 kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
193 kinfo->spi_piocnt = rcd->piocnt;
194 kinfo->spi_piobufbase = (u64) rcd->piobufs;
195 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
197 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
198 (rcd->piocnt % subctxt_cnt);
199 /* Master's PIO buffers are after all the slave's */
200 kinfo->spi_piobufbase = (u64) rcd->piobufs +
202 (rcd->piocnt - kinfo->spi_piocnt);
204 unsigned slave = subctxt_fp(fp) - 1;
206 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
207 kinfo->spi_piobufbase = (u64) rcd->piobufs +
208 dd->palign * kinfo->spi_piocnt * slave;
212 kinfo->spi_sendbuf_status =
213 cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
214 /* only spi_subctxt_* fields should be set in this block! */
215 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
217 kinfo->spi_subctxt_rcvegrbuf =
218 cvt_kvaddr(rcd->subctxt_rcvegrbuf);
219 kinfo->spi_subctxt_rcvhdr_base =
220 cvt_kvaddr(rcd->subctxt_rcvhdr_base);
224 * All user buffers are 2KB buffers. If we ever support
225 * giving 4KB buffers to user processes, this will need some
226 * work. Can't use piobufbase directly, because it has
227 * both 2K and 4K buffer base values.
229 kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
231 kinfo->spi_pioalign = dd->palign;
232 kinfo->spi_qpair = QIB_KD_QP;
234 * user mode PIO buffers are always 2KB, even when 4KB can
235 * be received, and sent via the kernel; this is ibmaxlen
238 kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
239 kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
240 kinfo->spi_ctxt = rcd->ctxt;
241 kinfo->spi_subctxt = subctxt_fp(fp);
242 kinfo->spi_sw_version = QIB_KERN_SWVERSION;
243 kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
244 kinfo->spi_hw_version = dd->revision;
247 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
249 sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
250 if (copy_to_user(ubase, kinfo, sz))
258 * qib_tid_update - update a context TID
260 * @fp: the qib device file
261 * @ti: the TID information
263 * The new implementation as of Oct 2004 is that the driver assigns
264 * the tid and returns it to the caller. To reduce search time, we
265 * keep a cursor for each context, walking the shadow tid array to find
266 * one that's not in use.
268 * For now, if we can't allocate the full list, we fail, although
269 * in the long run, we'll allocate as many as we can, and the
270 * caller will deal with that by trying the remaining pages later.
271 * That means that when we fail, we have to mark the tids as not in
272 * use again, in our shadow copy.
274 * It's up to the caller to free the tids when they are done.
275 * We'll unlock the pages as they free them.
277 * Also, right now we are locking one page at a time, but since
278 * the intended use of this routine is for a single group of
279 * virtually contiguous pages, that should change to improve
282 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
283 const struct qib_tid_info *ti)
286 u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
288 struct qib_devdata *dd = rcd->dd;
291 u64 __iomem *tidbase;
292 unsigned long tidmap[8];
293 struct page **pagep = NULL;
294 unsigned subctxt = subctxt_fp(fp);
296 if (!dd->pageshadow) {
306 ctxttid = rcd->ctxt * dd->rcvtidcnt;
307 if (!rcd->subctxt_cnt) {
308 tidcnt = dd->rcvtidcnt;
309 tid = rcd->tidcursor;
311 } else if (!subctxt) {
312 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
313 (dd->rcvtidcnt % rcd->subctxt_cnt);
314 tidoff = dd->rcvtidcnt - tidcnt;
316 tid = tidcursor_fp(fp);
318 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
319 tidoff = tidcnt * (subctxt - 1);
321 tid = tidcursor_fp(fp);
324 /* make sure it all fits in tid_pg_list */
325 qib_devinfo(dd->pcidev,
326 "Process tried to allocate %u TIDs, only trying max (%u)\n",
330 pagep = (struct page **) rcd->tid_pg_list;
331 tidlist = (u16 *) &pagep[dd->rcvtidcnt];
335 memset(tidmap, 0, sizeof(tidmap));
336 /* before decrement; chip actual # */
338 tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
340 ctxttid * sizeof(*tidbase));
342 /* virtual address of first page in transfer */
343 vaddr = ti->tidvaddr;
344 if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
349 ret = qib_get_user_pages(vaddr, cnt, pagep);
353 * We can't continue because the pagep array won't be
354 * initialized. This should never happen,
355 * unless perhaps the user has mpin'ed the pages
360 "Failed to lock addr %p, %u pages: errno %d\n",
361 (void *) vaddr, cnt, -ret);
364 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
365 for (; ntids--; tid++) {
368 if (!dd->pageshadow[ctxttid + tid])
373 * Oops, wrapped all the way through their TIDs,
374 * and didn't have enough free; see comments at
377 i--; /* last tidlist[i] not filled in */
381 tidlist[i] = tid + tidoff;
382 /* we "know" system pages and TID pages are same size */
383 dd->pageshadow[ctxttid + tid] = pagep[i];
384 dd->physshadow[ctxttid + tid] =
385 qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
388 * don't need atomic or it's overhead
390 __set_bit(tid, tidmap);
391 physaddr = dd->physshadow[ctxttid + tid];
392 /* PERFORMANCE: below should almost certainly be cached */
393 dd->f_put_tid(dd, &tidbase[tid],
394 RCVHQ_RCV_TYPE_EXPECTED, physaddr);
396 * don't check this tid in qib_ctxtshadow, since we
397 * just filled it in; start with the next one.
405 /* jump here if copy out of updated info failed... */
406 /* same code that's in qib_free_tid() */
407 limit = sizeof(tidmap) * BITS_PER_BYTE;
409 /* just in case size changes in future */
411 tid = find_first_bit((const unsigned long *)tidmap, limit);
412 for (; tid < limit; tid++) {
413 if (!test_bit(tid, tidmap))
415 if (dd->pageshadow[ctxttid + tid]) {
418 phys = dd->physshadow[ctxttid + tid];
419 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
420 /* PERFORMANCE: below should almost certainly
423 dd->f_put_tid(dd, &tidbase[tid],
424 RCVHQ_RCV_TYPE_EXPECTED,
426 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
428 dd->pageshadow[ctxttid + tid] = NULL;
431 qib_release_user_pages(pagep, cnt);
434 * Copy the updated array, with qib_tid's filled in, back
435 * to user. Since we did the copy in already, this "should
436 * never fail" If it does, we have to clean up...
438 if (copy_to_user((void __user *)
439 (unsigned long) ti->tidlist,
440 tidlist, cnt * sizeof(*tidlist))) {
444 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
445 tidmap, sizeof(tidmap))) {
451 if (!rcd->subctxt_cnt)
452 rcd->tidcursor = tid;
454 tidcursor_fp(fp) = tid;
462 * qib_tid_free - free a context TID
464 * @subctxt: the subcontext
467 * right now we are unlocking one page at a time, but since
468 * the intended use of this routine is for a single group of
469 * virtually contiguous pages, that should change to improve
470 * performance. We check that the TID is in range for this context
471 * but otherwise don't check validity; if user has an error and
472 * frees the wrong tid, it's only their own data that can thereby
473 * be corrupted. We do check that the TID was in use, for sanity
474 * We always use our idea of the saved address, not the address that
475 * they pass in to us.
477 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
478 const struct qib_tid_info *ti)
481 u32 tid, ctxttid, cnt, limit, tidcnt;
482 struct qib_devdata *dd = rcd->dd;
483 u64 __iomem *tidbase;
484 unsigned long tidmap[8];
486 if (!dd->pageshadow) {
491 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
497 ctxttid = rcd->ctxt * dd->rcvtidcnt;
498 if (!rcd->subctxt_cnt)
499 tidcnt = dd->rcvtidcnt;
501 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
502 (dd->rcvtidcnt % rcd->subctxt_cnt);
503 ctxttid += dd->rcvtidcnt - tidcnt;
505 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
506 ctxttid += tidcnt * (subctxt - 1);
508 tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
510 ctxttid * sizeof(*tidbase));
512 limit = sizeof(tidmap) * BITS_PER_BYTE;
514 /* just in case size changes in future */
516 tid = find_first_bit(tidmap, limit);
517 for (cnt = 0; tid < limit; tid++) {
519 * small optimization; if we detect a run of 3 or so without
520 * any set, use find_first_bit again. That's mainly to
521 * accelerate the case where we wrapped, so we have some at
522 * the beginning, and some at the end, and a big gap
525 if (!test_bit(tid, tidmap))
528 if (dd->pageshadow[ctxttid + tid]) {
532 p = dd->pageshadow[ctxttid + tid];
533 dd->pageshadow[ctxttid + tid] = NULL;
534 phys = dd->physshadow[ctxttid + tid];
535 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
536 /* PERFORMANCE: below should almost certainly be
539 dd->f_put_tid(dd, &tidbase[tid],
540 RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
541 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
543 qib_release_user_pages(&p, 1);
551 * qib_set_part_key - set a partition key
555 * We can have up to 4 active at a time (other than the default, which is
556 * always allowed). This is somewhat tricky, since multiple contexts may set
557 * the same key, so we reference count them, and clean up at exit. All 4
558 * partition keys are packed into a single qlogic_ib register. It's an
559 * error for a process to set the same pkey multiple times. We provide no
560 * mechanism to de-allocate a pkey at this time, we may eventually need to
561 * do that. I've used the atomic operations, and no locking, and only make
562 * a single pass through what's available. This should be more than
563 * adequate for some time. I'll think about spinlocks or the like if and as
566 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
568 struct qib_pportdata *ppd = rcd->ppd;
569 int i, any = 0, pidx = -1;
570 u16 lkey = key & 0x7FFF;
573 if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
574 /* nothing to do; this key always valid */
585 * Set the full membership bit, because it has to be
586 * set in the register or the packet, and it seems
587 * cleaner to set in the register than to force all
592 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
593 if (!rcd->pkeys[i] && pidx == -1)
595 if (rcd->pkeys[i] == key) {
604 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
605 if (!ppd->pkeys[i]) {
609 if (ppd->pkeys[i] == key) {
610 atomic_t *pkrefs = &ppd->pkeyrefs[i];
612 if (atomic_inc_return(pkrefs) > 1) {
613 rcd->pkeys[pidx] = key;
618 * lost race, decrement count, catch below
624 if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
626 * It makes no sense to have both the limited and
627 * full membership PKEY set at the same time since
628 * the unlimited one will disable the limited one.
638 for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
639 if (!ppd->pkeys[i] &&
640 atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
641 rcd->pkeys[pidx] = key;
643 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
655 * qib_manage_rcvq - manage a context's receive queue
657 * @subctxt: the subcontext
658 * @start_stop: action to carry out
660 * start_stop == 0 disables receive on the context, for use in queue
661 * overflow conditions. start_stop==1 re-enables, to be used to
662 * re-init the software copy of the head register
664 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
667 struct qib_devdata *dd = rcd->dd;
668 unsigned int rcvctrl_op;
672 /* atomically clear receive enable ctxt. */
675 * On enable, force in-memory copy of the tail register to
676 * 0, so that protocol code doesn't have to worry about
677 * whether or not the chip has yet updated the in-memory
678 * copy or not on return from the system call. The chip
679 * always resets it's tail register back to 0 on a
680 * transition from disabled to enabled.
682 if (rcd->rcvhdrtail_kvaddr)
683 qib_clear_rcvhdrtail(rcd);
684 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
686 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
687 dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
688 /* always; new head should be equal to new tail; see above */
693 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
694 struct qib_devdata *dd)
696 int i, j, pchanged = 0;
698 struct qib_pportdata *ppd = rcd->ppd;
700 /* for debugging only */
701 oldpkey = (u64) ppd->pkeys[0] |
702 ((u64) ppd->pkeys[1] << 16) |
703 ((u64) ppd->pkeys[2] << 32) |
704 ((u64) ppd->pkeys[3] << 48);
706 for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
709 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
710 /* check for match independent of the global bit */
711 if ((ppd->pkeys[j] & 0x7fff) !=
712 (rcd->pkeys[i] & 0x7fff))
714 if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
723 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
726 /* common code for the mappings on dma_alloc_coherent mem */
727 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
728 unsigned len, void *kvaddr, u32 write_ok, char *what)
730 struct qib_devdata *dd = rcd->dd;
734 if ((vma->vm_end - vma->vm_start) > len) {
735 qib_devinfo(dd->pcidev,
736 "FAIL on %s: len %lx > %x\n", what,
737 vma->vm_end - vma->vm_start, len);
743 * shared context user code requires rcvhdrq mapped r/w, others
744 * only allowed readonly mapping.
747 if (vma->vm_flags & VM_WRITE) {
748 qib_devinfo(dd->pcidev,
749 "%s must be mapped readonly\n", what);
754 /* don't allow them to later change with mprotect */
755 vma->vm_flags &= ~VM_MAYWRITE;
758 pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
759 ret = remap_pfn_range(vma, vma->vm_start, pfn,
760 len, vma->vm_page_prot);
762 qib_devinfo(dd->pcidev,
763 "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
764 what, rcd->ctxt, pfn, len, ret);
769 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
777 * This is real hardware, so use io_remap. This is the mechanism
778 * for the user process to update the head registers for their ctxt
781 sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
782 if ((vma->vm_end - vma->vm_start) > sz) {
783 qib_devinfo(dd->pcidev,
784 "FAIL mmap userreg: reqlen %lx > PAGE\n",
785 vma->vm_end - vma->vm_start);
788 phys = dd->physaddr + ureg;
789 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
791 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
792 ret = io_remap_pfn_range(vma, vma->vm_start,
794 vma->vm_end - vma->vm_start,
800 static int mmap_piobufs(struct vm_area_struct *vma,
801 struct qib_devdata *dd,
802 struct qib_ctxtdata *rcd,
803 unsigned piobufs, unsigned piocnt)
809 * When we map the PIO buffers in the chip, we want to map them as
810 * writeonly, no read possible; unfortunately, x86 doesn't allow
811 * for this in hardware, but we still prevent users from asking
814 if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
815 qib_devinfo(dd->pcidev,
816 "FAIL mmap piobufs: reqlen %lx > PAGE\n",
817 vma->vm_end - vma->vm_start);
822 phys = dd->physaddr + piobufs;
824 #if defined(__powerpc__)
825 /* There isn't a generic way to specify writethrough mappings */
826 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
827 pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
828 pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED;
832 * don't allow them to later change to readable with mprotect (for when
833 * not initially mapped readable, as is normally the case)
835 vma->vm_flags &= ~VM_MAYREAD;
836 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
839 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
841 ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
842 vma->vm_end - vma->vm_start,
848 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
849 struct qib_ctxtdata *rcd)
851 struct qib_devdata *dd = rcd->dd;
852 unsigned long start, size;
853 size_t total_size, i;
857 size = rcd->rcvegrbuf_size;
858 total_size = rcd->rcvegrbuf_chunks * size;
859 if ((vma->vm_end - vma->vm_start) > total_size) {
860 qib_devinfo(dd->pcidev,
861 "FAIL on egr bufs: reqlen %lx > actual %lx\n",
862 vma->vm_end - vma->vm_start,
863 (unsigned long) total_size);
868 if (vma->vm_flags & VM_WRITE) {
869 qib_devinfo(dd->pcidev,
870 "Can't map eager buffers as writable (flags=%lx)\n",
875 /* don't allow them to later change to writeable with mprotect */
876 vma->vm_flags &= ~VM_MAYWRITE;
878 start = vma->vm_start;
880 for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
881 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
882 ret = remap_pfn_range(vma, start, pfn, size,
894 * qib_file_vma_fault - handle a VMA page fault.
896 static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
900 page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
902 return VM_FAULT_SIGBUS;
910 static struct vm_operations_struct qib_file_vm_ops = {
911 .fault = qib_file_vma_fault,
914 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
915 struct qib_ctxtdata *rcd, unsigned subctxt)
917 struct qib_devdata *dd = rcd->dd;
918 unsigned subctxt_cnt;
924 subctxt_cnt = rcd->subctxt_cnt;
925 size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
928 * Each process has all the subctxt uregbase, rcvhdrq, and
929 * rcvegrbufs mmapped - as an array for all the processes,
930 * and also separately for this process.
932 if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
933 addr = rcd->subctxt_uregbase;
934 size = PAGE_SIZE * subctxt_cnt;
935 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
936 addr = rcd->subctxt_rcvhdr_base;
937 size = rcd->rcvhdrq_size * subctxt_cnt;
938 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
939 addr = rcd->subctxt_rcvegrbuf;
941 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
942 PAGE_SIZE * subctxt)) {
943 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
945 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
946 rcd->rcvhdrq_size * subctxt)) {
947 addr = rcd->subctxt_rcvhdr_base +
948 rcd->rcvhdrq_size * subctxt;
949 size = rcd->rcvhdrq_size;
950 } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
951 addr = rcd->user_event_mask;
953 } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
955 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
956 /* rcvegrbufs are read-only on the slave */
957 if (vma->vm_flags & VM_WRITE) {
958 qib_devinfo(dd->pcidev,
959 "Can't map eager buffers as writable (flags=%lx)\n",
965 * Don't allow permission to later change to writeable
968 vma->vm_flags &= ~VM_MAYWRITE;
971 len = vma->vm_end - vma->vm_start;
977 vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
978 vma->vm_ops = &qib_file_vm_ops;
979 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
987 * qib_mmapf - mmap various structures into user space
988 * @fp: the file pointer
991 * We use this to have a shared buffer between the kernel and the user code
992 * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
993 * buffers in the chip. We have the open and close entries so we can bump
994 * the ref count and keep the driver from being unloaded while still mapped.
996 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
998 struct qib_ctxtdata *rcd;
999 struct qib_devdata *dd;
1001 unsigned piobufs, piocnt;
1005 if (!rcd || !(vma->vm_flags & VM_SHARED)) {
1012 * This is the qib_do_user_init() code, mapping the shared buffers
1013 * and per-context user registers into the user process. The address
1014 * referred to by vm_pgoff is the file offset passed via mmap().
1015 * For shared contexts, this is the kernel vmalloc() address of the
1016 * pages to share with the master.
1017 * For non-shared or master ctxts, this is a physical address.
1018 * We only do one mmap for each space mapped.
1020 pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1023 * Check for 0 in case one of the allocations failed, but user
1024 * called mmap anyway.
1032 * Physical addresses must fit in 40 bits for our hardware.
1033 * Check for kernel virtual addresses first, anything else must
1034 * match a HW or memory address.
1036 ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1043 ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1044 if (!rcd->subctxt_cnt) {
1045 /* ctxt is not shared */
1046 piocnt = rcd->piocnt;
1047 piobufs = rcd->piobufs;
1048 } else if (!subctxt_fp(fp)) {
1049 /* caller is the master */
1050 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1051 (rcd->piocnt % rcd->subctxt_cnt);
1052 piobufs = rcd->piobufs +
1053 dd->palign * (rcd->piocnt - piocnt);
1055 unsigned slave = subctxt_fp(fp) - 1;
1057 /* caller is a slave */
1058 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1059 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1063 ret = mmap_ureg(vma, dd, ureg);
1064 else if (pgaddr == piobufs)
1065 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1066 else if (pgaddr == dd->pioavailregs_phys)
1067 /* in-memory copy of pioavail registers */
1068 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1069 (void *) dd->pioavailregs_dma, 0,
1070 "pioavail registers");
1071 else if (pgaddr == rcd->rcvegr_phys)
1072 ret = mmap_rcvegrbufs(vma, rcd);
1073 else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1075 * The rcvhdrq itself; multiple pages, contiguous
1076 * from an i/o perspective. Shared contexts need
1077 * to map r/w, so we allow writing.
1079 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1080 rcd->rcvhdrq, 1, "rcvhdrq");
1081 else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1082 /* in-memory copy of rcvhdrq tail register */
1083 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1084 rcd->rcvhdrtail_kvaddr, 0,
1091 vma->vm_private_data = NULL;
1094 qib_devinfo(dd->pcidev,
1095 "mmap Failure %d: off %llx len %lx\n",
1096 -ret, (unsigned long long)pgaddr,
1097 vma->vm_end - vma->vm_start);
1102 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1104 struct poll_table_struct *pt)
1106 struct qib_devdata *dd = rcd->dd;
1109 poll_wait(fp, &rcd->wait, pt);
1111 spin_lock_irq(&dd->uctxt_lock);
1112 if (rcd->urgent != rcd->urgent_poll) {
1113 pollflag = POLLIN | POLLRDNORM;
1114 rcd->urgent_poll = rcd->urgent;
1117 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1119 spin_unlock_irq(&dd->uctxt_lock);
1124 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1126 struct poll_table_struct *pt)
1128 struct qib_devdata *dd = rcd->dd;
1131 poll_wait(fp, &rcd->wait, pt);
1133 spin_lock_irq(&dd->uctxt_lock);
1134 if (dd->f_hdrqempty(rcd)) {
1135 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1136 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1139 pollflag = POLLIN | POLLRDNORM;
1140 spin_unlock_irq(&dd->uctxt_lock);
1145 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1147 struct qib_ctxtdata *rcd;
1153 else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1154 pollflag = qib_poll_urgent(rcd, fp, pt);
1155 else if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1156 pollflag = qib_poll_next(rcd, fp, pt);
1163 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1165 struct qib_filedata *fd = fp->private_data;
1166 const unsigned int weight = cpumask_weight(¤t->cpus_allowed);
1167 const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1171 * If process has NOT already set it's affinity, select and
1172 * reserve a processor for it on the local NUMA node.
1174 if ((weight >= qib_cpulist_count) &&
1175 (cpumask_weight(local_mask) <= qib_cpulist_count)) {
1176 for_each_cpu(local_cpu, local_mask)
1177 if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1178 fd->rec_cpu_num = local_cpu;
1184 * If process has NOT already set it's affinity, select and
1185 * reserve a processor for it, as a rendevous for all
1186 * users of the driver. If they don't actually later
1187 * set affinity to this cpu, or set it to some other cpu,
1188 * it just means that sooner or later we don't recommend
1189 * a cpu, and let the scheduler do it's best.
1191 if (weight >= qib_cpulist_count) {
1194 cpu = find_first_zero_bit(qib_cpulist,
1196 if (cpu == qib_cpulist_count)
1198 "no cpus avail for affinity PID %u\n",
1201 __set_bit(cpu, qib_cpulist);
1202 fd->rec_cpu_num = cpu;
1208 * Check that userland and driver are compatible for subcontexts.
1210 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1212 /* this code is written long-hand for clarity */
1213 if (QIB_USER_SWMAJOR != user_swmajor) {
1214 /* no promise of compatibility if major mismatch */
1217 if (QIB_USER_SWMAJOR == 1) {
1218 switch (QIB_USER_SWMINOR) {
1222 /* no subctxt implementation so cannot be compatible */
1225 /* 3 is only compatible with itself */
1226 return user_swminor == 3;
1228 /* >= 4 are compatible (or are expected to be) */
1229 return user_swminor <= QIB_USER_SWMINOR;
1232 /* make no promises yet for future major versions */
1236 static int init_subctxts(struct qib_devdata *dd,
1237 struct qib_ctxtdata *rcd,
1238 const struct qib_user_info *uinfo)
1241 unsigned num_subctxts;
1245 * If the user is requesting zero subctxts,
1246 * skip the subctxt allocation.
1248 if (uinfo->spu_subctxt_cnt <= 0)
1250 num_subctxts = uinfo->spu_subctxt_cnt;
1252 /* Check for subctxt compatibility */
1253 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1254 uinfo->spu_userversion & 0xffff)) {
1255 qib_devinfo(dd->pcidev,
1256 "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1257 (int) (uinfo->spu_userversion >> 16),
1258 (int) (uinfo->spu_userversion & 0xffff),
1259 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1262 if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1267 rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1268 if (!rcd->subctxt_uregbase) {
1272 /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1273 size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1274 sizeof(u32), PAGE_SIZE) * num_subctxts;
1275 rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1276 if (!rcd->subctxt_rcvhdr_base) {
1281 rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1282 rcd->rcvegrbuf_size *
1284 if (!rcd->subctxt_rcvegrbuf) {
1289 rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1290 rcd->subctxt_id = uinfo->spu_subctxt_id;
1291 rcd->active_slaves = 1;
1292 rcd->redirect_seq_cnt = 1;
1293 set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1297 vfree(rcd->subctxt_rcvhdr_base);
1299 vfree(rcd->subctxt_uregbase);
1300 rcd->subctxt_uregbase = NULL;
1305 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1306 struct file *fp, const struct qib_user_info *uinfo)
1308 struct qib_filedata *fd = fp->private_data;
1309 struct qib_devdata *dd = ppd->dd;
1310 struct qib_ctxtdata *rcd;
1315 assign_ctxt_affinity(fp, dd);
1317 numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1318 cpu_to_node(fd->rec_cpu_num) :
1319 numa_node_id()) : dd->assigned_node_id;
1321 rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1324 * Allocate memory for use in qib_tid_update() at open to
1325 * reduce cost of expected send setup per message segment
1328 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1329 dd->rcvtidcnt * sizeof(struct page **),
1332 if (!rcd || !ptmp) {
1334 "Unable to allocate ctxtdata memory, failing open\n");
1338 rcd->userversion = uinfo->spu_userversion;
1339 ret = init_subctxts(dd, rcd, uinfo);
1342 rcd->tid_pg_list = ptmp;
1343 rcd->pid = current->pid;
1344 init_waitqueue_head(&dd->rcd[ctxt]->wait);
1345 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1347 qib_stats.sps_ctxts++;
1353 if (fd->rec_cpu_num != -1)
1354 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1356 dd->rcd[ctxt] = NULL;
1363 static inline int usable(struct qib_pportdata *ppd)
1365 struct qib_devdata *dd = ppd->dd;
1367 return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1368 (ppd->lflags & QIBL_LINKACTIVE);
1372 * Select a context on the given device, either using a requested port
1373 * or the port based on the context number.
1375 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1376 const struct qib_user_info *uinfo)
1378 struct qib_pportdata *ppd = NULL;
1382 if (!usable(dd->pport + port - 1)) {
1386 ppd = dd->pport + port - 1;
1388 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1391 if (ctxt == dd->cfgctxts) {
1396 u32 pidx = ctxt % dd->num_pports;
1398 if (usable(dd->pport + pidx))
1399 ppd = dd->pport + pidx;
1401 for (pidx = 0; pidx < dd->num_pports && !ppd;
1403 if (usable(dd->pport + pidx))
1404 ppd = dd->pport + pidx;
1407 ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1412 static int find_free_ctxt(int unit, struct file *fp,
1413 const struct qib_user_info *uinfo)
1415 struct qib_devdata *dd = qib_lookup(unit);
1418 if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1421 ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1426 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1429 struct qib_devdata *udd = NULL;
1430 int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1431 u32 port = uinfo->spu_port, ctxt;
1433 devmax = qib_count_units(&npresent, &nup);
1443 if (alg == QIB_PORT_ALG_ACROSS) {
1444 unsigned inuse = ~0U;
1446 /* find device (with ACTIVE ports) with fewest ctxts in use */
1447 for (ndev = 0; ndev < devmax; ndev++) {
1448 struct qib_devdata *dd = qib_lookup(ndev);
1449 unsigned cused = 0, cfree = 0, pusable = 0;
1453 if (port && port <= dd->num_pports &&
1454 usable(dd->pport + port - 1))
1457 for (i = 0; i < dd->num_pports; i++)
1458 if (usable(dd->pport + i))
1462 for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1468 if (cfree && cused < inuse) {
1474 ret = choose_port_ctxt(fp, udd, port, uinfo);
1478 for (ndev = 0; ndev < devmax; ndev++) {
1479 struct qib_devdata *dd = qib_lookup(ndev);
1482 ret = choose_port_ctxt(fp, dd, port, uinfo);
1490 ret = dusable ? -EBUSY : -ENETDOWN;
1496 static int find_shared_ctxt(struct file *fp,
1497 const struct qib_user_info *uinfo)
1499 int devmax, ndev, i;
1502 devmax = qib_count_units(NULL, NULL);
1504 for (ndev = 0; ndev < devmax; ndev++) {
1505 struct qib_devdata *dd = qib_lookup(ndev);
1507 /* device portion of usable() */
1508 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1510 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1511 struct qib_ctxtdata *rcd = dd->rcd[i];
1513 /* Skip ctxts which are not yet open */
1514 if (!rcd || !rcd->cnt)
1516 /* Skip ctxt if it doesn't match the requested one */
1517 if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1519 /* Verify the sharing process matches the master */
1520 if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1521 rcd->userversion != uinfo->spu_userversion ||
1522 rcd->cnt >= rcd->subctxt_cnt) {
1527 subctxt_fp(fp) = rcd->cnt++;
1528 rcd->subpid[subctxt_fp(fp)] = current->pid;
1529 tidcursor_fp(fp) = 0;
1530 rcd->active_slaves |= 1 << subctxt_fp(fp);
1540 static int qib_open(struct inode *in, struct file *fp)
1542 /* The real work is performed later in qib_assign_ctxt() */
1543 fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1544 if (fp->private_data) /* no cpu affinity by default */
1545 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1546 return fp->private_data ? 0 : -ENOMEM;
1549 static int find_hca(unsigned int cpu, int *unit)
1551 int ret = 0, devmax, npresent, nup, ndev;
1555 devmax = qib_count_units(&npresent, &nup);
1564 for (ndev = 0; ndev < devmax; ndev++) {
1565 struct qib_devdata *dd = qib_lookup(ndev);
1568 if (pcibus_to_node(dd->pcidev->bus) < 0) {
1572 if (cpu_to_node(cpu) ==
1573 pcibus_to_node(dd->pcidev->bus)) {
1583 static int do_qib_user_sdma_queue_create(struct file *fp)
1585 struct qib_filedata *fd = fp->private_data;
1586 struct qib_ctxtdata *rcd = fd->rcd;
1587 struct qib_devdata *dd = rcd->dd;
1589 if (dd->flags & QIB_HAS_SEND_DMA) {
1591 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1603 * Get ctxt early, so can set affinity prior to memory allocation.
1605 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1609 unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1611 /* Check to be sure we haven't already initialized this file */
1617 /* for now, if major version is different, bail */
1618 swmajor = uinfo->spu_userversion >> 16;
1619 if (swmajor != QIB_USER_SWMAJOR) {
1624 swminor = uinfo->spu_userversion & 0xffff;
1626 if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1627 alg = uinfo->spu_port_alg;
1629 mutex_lock(&qib_mutex);
1631 if (qib_compatible_subctxts(swmajor, swminor) &&
1632 uinfo->spu_subctxt_cnt) {
1633 ret = find_shared_ctxt(fp, uinfo);
1635 ret = do_qib_user_sdma_queue_create(fp);
1637 assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1642 i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1644 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1647 const unsigned int cpu = cpumask_first(¤t->cpus_allowed);
1648 const unsigned int weight =
1649 cpumask_weight(¤t->cpus_allowed);
1651 if (weight == 1 && !test_bit(cpu, qib_cpulist))
1652 if (!find_hca(cpu, &unit) && unit >= 0)
1653 if (!find_free_ctxt(unit, fp, uinfo)) {
1657 ret = get_a_ctxt(fp, uinfo, alg);
1662 ret = do_qib_user_sdma_queue_create(fp);
1664 mutex_unlock(&qib_mutex);
1671 static int qib_do_user_init(struct file *fp,
1672 const struct qib_user_info *uinfo)
1675 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1676 struct qib_devdata *dd;
1679 /* Subctxts don't need to initialize anything since master did it. */
1680 if (subctxt_fp(fp)) {
1681 ret = wait_event_interruptible(rcd->wait,
1682 !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1688 /* some ctxts may get extra buffers, calculate that here */
1689 uctxt = rcd->ctxt - dd->first_user_ctxt;
1690 if (uctxt < dd->ctxts_extrabuf) {
1691 rcd->piocnt = dd->pbufsctxt + 1;
1692 rcd->pio_base = rcd->piocnt * uctxt;
1694 rcd->piocnt = dd->pbufsctxt;
1695 rcd->pio_base = rcd->piocnt * uctxt +
1700 * All user buffers are 2KB buffers. If we ever support
1701 * giving 4KB buffers to user processes, this will need some
1702 * work. Can't use piobufbase directly, because it has
1703 * both 2K and 4K buffer base values. So check and handle.
1705 if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1706 if (rcd->pio_base >= dd->piobcnt2k) {
1708 "%u:ctxt%u: no 2KB buffers available\n",
1709 dd->unit, rcd->ctxt);
1713 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1714 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1715 rcd->ctxt, rcd->piocnt);
1718 rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1719 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1720 TXCHK_CHG_TYPE_USER, rcd);
1722 * try to ensure that processes start up with consistent avail update
1723 * for their own range, at least. If system very quiet, it might
1724 * have the in-memory copy out of date at startup for this range of
1725 * buffers, when a context gets re-used. Do after the chg_pioavail
1726 * and before the rest of setup, so it's "almost certain" the dma
1727 * will have occurred (can't 100% guarantee, but should be many
1728 * decimals of 9s, with this ordering), given how much else happens
1731 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1734 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1735 * array for time being. If rcd->ctxt > chip-supported,
1736 * we need to do extra stuff here to handle by handling overflow
1737 * through ctxt 0, someday
1739 ret = qib_create_rcvhdrq(dd, rcd);
1741 ret = qib_setup_eagerbufs(rcd);
1745 rcd->tidcursor = 0; /* start at beginning after open */
1747 /* initialize poll variables... */
1749 rcd->urgent_poll = 0;
1752 * Now enable the ctxt for receive.
1753 * For chips that are set to DMA the tail register to memory
1754 * when they change (and when the update bit transitions from
1755 * 0 to 1. So for those chips, we turn it off and then back on.
1756 * This will (very briefly) affect any other open ctxts, but the
1757 * duration is very short, and therefore isn't an issue. We
1758 * explicitly set the in-memory tail copy to 0 beforehand, so we
1759 * don't have to wait to be sure the DMA update has happened
1760 * (chip resets head/tail to 0 on transition to enable).
1762 if (rcd->rcvhdrtail_kvaddr)
1763 qib_clear_rcvhdrtail(rcd);
1765 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1768 /* Notify any waiting slaves */
1769 if (rcd->subctxt_cnt) {
1770 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1771 wake_up(&rcd->wait);
1776 qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1777 TXCHK_CHG_TYPE_KERN, rcd);
1783 * unlock_exptid - unlock any expected TID entries context still had in use
1786 * We don't actually update the chip here, because we do a bulk update
1787 * below, using f_clear_tids.
1789 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1791 struct qib_devdata *dd = rcd->dd;
1792 int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1793 int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1795 for (i = ctxt_tidbase; i < maxtid; i++) {
1796 struct page *p = dd->pageshadow[i];
1802 phys = dd->physshadow[i];
1803 dd->physshadow[i] = dd->tidinvalid;
1804 dd->pageshadow[i] = NULL;
1805 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1806 PCI_DMA_FROMDEVICE);
1807 qib_release_user_pages(&p, 1);
1812 static int qib_close(struct inode *in, struct file *fp)
1815 struct qib_filedata *fd;
1816 struct qib_ctxtdata *rcd;
1817 struct qib_devdata *dd;
1818 unsigned long flags;
1822 mutex_lock(&qib_mutex);
1824 fd = fp->private_data;
1825 fp->private_data = NULL;
1828 mutex_unlock(&qib_mutex);
1834 /* ensure all pio buffer writes in progress are flushed */
1837 /* drain user sdma queue */
1839 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1840 qib_user_sdma_queue_destroy(fd->pq);
1843 if (fd->rec_cpu_num != -1)
1844 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1848 * XXX If the master closes the context before the slave(s),
1849 * revoke the mmap for the eager receive queue so
1850 * the slave(s) don't wait for receive data forever.
1852 rcd->active_slaves &= ~(1 << fd->subctxt);
1853 rcd->subpid[fd->subctxt] = 0;
1854 mutex_unlock(&qib_mutex);
1858 /* early; no interrupt users after this */
1859 spin_lock_irqsave(&dd->uctxt_lock, flags);
1861 dd->rcd[ctxt] = NULL;
1864 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1866 if (rcd->rcvwait_to || rcd->piowait_to ||
1867 rcd->rcvnowait || rcd->pionowait) {
1868 rcd->rcvwait_to = 0;
1869 rcd->piowait_to = 0;
1877 /* atomically clear receive enable ctxt and intr avail. */
1878 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1879 QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1881 /* clean up the pkeys for this ctxt user */
1882 qib_clean_part_key(rcd, dd);
1883 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1884 qib_chg_pioavailkernel(dd, rcd->pio_base,
1885 rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1887 dd->f_clear_tids(dd, rcd);
1890 unlock_expected_tids(rcd);
1891 qib_stats.sps_ctxts--;
1895 mutex_unlock(&qib_mutex);
1896 qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1903 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1905 struct qib_ctxt_info info;
1908 struct qib_ctxtdata *rcd = ctxt_fp(fp);
1909 struct qib_filedata *fd;
1911 fd = fp->private_data;
1913 info.num_active = qib_count_active_units();
1914 info.unit = rcd->dd->unit;
1915 info.port = rcd->ppd->port;
1916 info.ctxt = rcd->ctxt;
1917 info.subctxt = subctxt_fp(fp);
1918 /* Number of user ctxts available for this device. */
1919 info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1920 info.num_subctxts = rcd->subctxt_cnt;
1921 info.rec_cpu = fd->rec_cpu_num;
1924 if (copy_to_user(uinfo, &info, sz)) {
1934 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1935 u32 __user *inflightp)
1937 const u32 val = qib_user_sdma_inflight_counter(pq);
1939 if (put_user(val, inflightp))
1945 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1946 struct qib_user_sdma_queue *pq,
1947 u32 __user *completep)
1955 err = qib_user_sdma_make_progress(ppd, pq);
1959 val = qib_user_sdma_complete_counter(pq);
1960 if (put_user(val, completep))
1966 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1970 if (!usable(rcd->ppd)) {
1973 * if link is down, or otherwise not usable, delay
1974 * the caller up to 30 seconds, so we don't thrash
1975 * in trying to get the chip back to ACTIVE, and
1976 * set flag so they make the call again.
1978 if (rcd->user_event_mask) {
1980 * subctxt_cnt is 0 if not shared, so do base
1981 * separately, first, then remaining subctxt, if any
1983 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1984 &rcd->user_event_mask[0]);
1985 for (i = 1; i < rcd->subctxt_cnt; i++)
1986 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1987 &rcd->user_event_mask[i]);
1989 for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1997 * Find all user contexts in use, and set the specified bit in their
1999 * See also find_ctxt() for a similar use, that is specific to send buffers.
2001 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
2003 struct qib_ctxtdata *rcd;
2006 unsigned long flags;
2008 spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
2009 for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
2011 rcd = ppd->dd->rcd[ctxt];
2014 if (rcd->user_event_mask) {
2017 * subctxt_cnt is 0 if not shared, so do base
2018 * separately, first, then remaining subctxt, if any
2020 set_bit(evtbit, &rcd->user_event_mask[0]);
2021 for (i = 1; i < rcd->subctxt_cnt; i++)
2022 set_bit(evtbit, &rcd->user_event_mask[i]);
2027 spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2033 * clear the event notifier events for this context.
2034 * For the DISARM_BUFS case, we also take action (this obsoletes
2035 * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2037 * Other bits don't currently require actions, just atomically clear.
2038 * User process then performs actions appropriate to bit having been
2039 * set, if desired, and checks again in future.
2041 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2042 unsigned long events)
2046 for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2047 if (!test_bit(i, &events))
2049 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2050 (void)qib_disarm_piobufs_ifneeded(rcd);
2051 ret = disarm_req_delay(rcd);
2053 clear_bit(i, &rcd->user_event_mask[subctxt]);
2058 static ssize_t qib_write(struct file *fp, const char __user *data,
2059 size_t count, loff_t *off)
2061 const struct qib_cmd __user *ucmd;
2062 struct qib_ctxtdata *rcd;
2063 const void __user *src;
2064 size_t consumed, copy = 0;
2069 if (count < sizeof(cmd.type)) {
2074 ucmd = (const struct qib_cmd __user *) data;
2076 if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2081 consumed = sizeof(cmd.type);
2084 case QIB_CMD_ASSIGN_CTXT:
2085 case QIB_CMD_USER_INIT:
2086 copy = sizeof(cmd.cmd.user_info);
2087 dest = &cmd.cmd.user_info;
2088 src = &ucmd->cmd.user_info;
2091 case QIB_CMD_RECV_CTRL:
2092 copy = sizeof(cmd.cmd.recv_ctrl);
2093 dest = &cmd.cmd.recv_ctrl;
2094 src = &ucmd->cmd.recv_ctrl;
2097 case QIB_CMD_CTXT_INFO:
2098 copy = sizeof(cmd.cmd.ctxt_info);
2099 dest = &cmd.cmd.ctxt_info;
2100 src = &ucmd->cmd.ctxt_info;
2103 case QIB_CMD_TID_UPDATE:
2104 case QIB_CMD_TID_FREE:
2105 copy = sizeof(cmd.cmd.tid_info);
2106 dest = &cmd.cmd.tid_info;
2107 src = &ucmd->cmd.tid_info;
2110 case QIB_CMD_SET_PART_KEY:
2111 copy = sizeof(cmd.cmd.part_key);
2112 dest = &cmd.cmd.part_key;
2113 src = &ucmd->cmd.part_key;
2116 case QIB_CMD_DISARM_BUFS:
2117 case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2123 case QIB_CMD_POLL_TYPE:
2124 copy = sizeof(cmd.cmd.poll_type);
2125 dest = &cmd.cmd.poll_type;
2126 src = &ucmd->cmd.poll_type;
2129 case QIB_CMD_ARMLAUNCH_CTRL:
2130 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2131 dest = &cmd.cmd.armlaunch_ctrl;
2132 src = &ucmd->cmd.armlaunch_ctrl;
2135 case QIB_CMD_SDMA_INFLIGHT:
2136 copy = sizeof(cmd.cmd.sdma_inflight);
2137 dest = &cmd.cmd.sdma_inflight;
2138 src = &ucmd->cmd.sdma_inflight;
2141 case QIB_CMD_SDMA_COMPLETE:
2142 copy = sizeof(cmd.cmd.sdma_complete);
2143 dest = &cmd.cmd.sdma_complete;
2144 src = &ucmd->cmd.sdma_complete;
2147 case QIB_CMD_ACK_EVENT:
2148 copy = sizeof(cmd.cmd.event_mask);
2149 dest = &cmd.cmd.event_mask;
2150 src = &ucmd->cmd.event_mask;
2159 if ((count - consumed) < copy) {
2163 if (copy_from_user(dest, src, copy)) {
2171 if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2177 case QIB_CMD_ASSIGN_CTXT:
2178 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2183 case QIB_CMD_USER_INIT:
2184 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2187 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2188 cmd.cmd.user_info.spu_base_info,
2189 cmd.cmd.user_info.spu_base_info_size);
2192 case QIB_CMD_RECV_CTRL:
2193 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2196 case QIB_CMD_CTXT_INFO:
2197 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2198 (unsigned long) cmd.cmd.ctxt_info);
2201 case QIB_CMD_TID_UPDATE:
2202 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2205 case QIB_CMD_TID_FREE:
2206 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2209 case QIB_CMD_SET_PART_KEY:
2210 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2213 case QIB_CMD_DISARM_BUFS:
2214 (void)qib_disarm_piobufs_ifneeded(rcd);
2215 ret = disarm_req_delay(rcd);
2218 case QIB_CMD_PIOAVAILUPD:
2219 qib_force_pio_avail_update(rcd->dd);
2222 case QIB_CMD_POLL_TYPE:
2223 rcd->poll_type = cmd.cmd.poll_type;
2226 case QIB_CMD_ARMLAUNCH_CTRL:
2227 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2230 case QIB_CMD_SDMA_INFLIGHT:
2231 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2232 (u32 __user *) (unsigned long)
2233 cmd.cmd.sdma_inflight);
2236 case QIB_CMD_SDMA_COMPLETE:
2237 ret = qib_sdma_get_complete(rcd->ppd,
2238 user_sdma_queue_fp(fp),
2239 (u32 __user *) (unsigned long)
2240 cmd.cmd.sdma_complete);
2243 case QIB_CMD_ACK_EVENT:
2244 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2245 cmd.cmd.event_mask);
2256 static ssize_t qib_write_iter(struct kiocb *iocb, struct iov_iter *from)
2258 struct qib_filedata *fp = iocb->ki_filp->private_data;
2259 struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2260 struct qib_user_sdma_queue *pq = fp->pq;
2262 if (!iter_is_iovec(from) || !from->nr_segs || !pq)
2265 return qib_user_sdma_writev(rcd, pq, from->iov, from->nr_segs);
2268 static struct class *qib_class;
2269 static dev_t qib_dev;
2271 int qib_cdev_init(int minor, const char *name,
2272 const struct file_operations *fops,
2273 struct cdev **cdevp, struct device **devp)
2275 const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2277 struct device *device = NULL;
2280 cdev = cdev_alloc();
2282 pr_err("Could not allocate cdev for minor %d, %s\n",
2288 cdev->owner = THIS_MODULE;
2290 kobject_set_name(&cdev->kobj, name);
2292 ret = cdev_add(cdev, dev, 1);
2294 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2299 device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2300 if (!IS_ERR(device))
2302 ret = PTR_ERR(device);
2304 pr_err("Could not create device for minor %d, %s (err %d)\n",
2315 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2317 struct device *device = *devp;
2320 device_unregister(device);
2330 static struct cdev *wildcard_cdev;
2331 static struct device *wildcard_device;
2333 int __init qib_dev_init(void)
2337 ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2339 pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2343 qib_class = class_create(THIS_MODULE, "ipath");
2344 if (IS_ERR(qib_class)) {
2345 ret = PTR_ERR(qib_class);
2346 pr_err("Could not create device class (err %d)\n", -ret);
2347 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2354 void qib_dev_cleanup(void)
2357 class_destroy(qib_class);
2361 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2364 static atomic_t user_count = ATOMIC_INIT(0);
2366 static void qib_user_remove(struct qib_devdata *dd)
2368 if (atomic_dec_return(&user_count) == 0)
2369 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2371 qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2374 static int qib_user_add(struct qib_devdata *dd)
2379 if (atomic_inc_return(&user_count) == 1) {
2380 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2381 &wildcard_cdev, &wildcard_device);
2386 snprintf(name, sizeof(name), "ipath%d", dd->unit);
2387 ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2388 &dd->user_cdev, &dd->user_device);
2390 qib_user_remove(dd);
2396 * Create per-unit files in /dev
2398 int qib_device_create(struct qib_devdata *dd)
2402 r = qib_user_add(dd);
2403 ret = qib_diag_add(dd);
2410 * Remove per-unit files in /dev
2411 * void, core kernel returns no errors for this stuff
2413 void qib_device_remove(struct qib_devdata *dd)
2415 qib_user_remove(dd);
2416 qib_diag_remove(dd);