2 * STMicroelectronics accelerometers driver
4 * Copyright 2012-2013 STMicroelectronics Inc.
6 * Denis Ciocca <denis.ciocca@st.com>
8 * Licensed under the GPL-2.
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/types.h>
16 #include <linux/mutex.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/gpio.h>
20 #include <linux/irq.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger.h>
24 #include <linux/iio/buffer.h>
26 #include <linux/iio/common/st_sensors.h>
29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3
31 /* DEFAULT VALUE FOR SENSORS */
32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
37 #define ST_ACCEL_FS_AVL_2G 2
38 #define ST_ACCEL_FS_AVL_4G 4
39 #define ST_ACCEL_FS_AVL_6G 6
40 #define ST_ACCEL_FS_AVL_8G 8
41 #define ST_ACCEL_FS_AVL_16G 16
43 /* CUSTOM VALUES FOR SENSOR 1 */
44 #define ST_ACCEL_1_WAI_EXP 0x33
45 #define ST_ACCEL_1_ODR_ADDR 0x20
46 #define ST_ACCEL_1_ODR_MASK 0xf0
47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01
48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02
49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03
50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04
51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05
52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06
53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07
54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08
55 #define ST_ACCEL_1_FS_ADDR 0x23
56 #define ST_ACCEL_1_FS_MASK 0x30
57 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00
58 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01
59 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02
60 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03
61 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
62 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
63 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000)
64 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000)
65 #define ST_ACCEL_1_BDU_ADDR 0x23
66 #define ST_ACCEL_1_BDU_MASK 0x80
67 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22
68 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10
69 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08
70 #define ST_ACCEL_1_MULTIREAD_BIT true
72 /* CUSTOM VALUES FOR SENSOR 2 */
73 #define ST_ACCEL_2_WAI_EXP 0x32
74 #define ST_ACCEL_2_ODR_ADDR 0x20
75 #define ST_ACCEL_2_ODR_MASK 0x18
76 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00
77 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01
78 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02
79 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03
80 #define ST_ACCEL_2_PW_ADDR 0x20
81 #define ST_ACCEL_2_PW_MASK 0xe0
82 #define ST_ACCEL_2_FS_ADDR 0x23
83 #define ST_ACCEL_2_FS_MASK 0x30
84 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00
85 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01
86 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03
87 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000)
88 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000)
89 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900)
90 #define ST_ACCEL_2_BDU_ADDR 0x23
91 #define ST_ACCEL_2_BDU_MASK 0x80
92 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22
93 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02
94 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10
95 #define ST_ACCEL_2_MULTIREAD_BIT true
97 /* CUSTOM VALUES FOR SENSOR 3 */
98 #define ST_ACCEL_3_WAI_EXP 0x40
99 #define ST_ACCEL_3_ODR_ADDR 0x20
100 #define ST_ACCEL_3_ODR_MASK 0xf0
101 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01
102 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02
103 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03
104 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04
105 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05
106 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06
107 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07
108 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08
109 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09
110 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a
111 #define ST_ACCEL_3_FS_ADDR 0x24
112 #define ST_ACCEL_3_FS_MASK 0x38
113 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00
114 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01
115 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02
116 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03
117 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04
118 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61)
119 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122)
120 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183)
121 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244)
122 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732)
123 #define ST_ACCEL_3_BDU_ADDR 0x20
124 #define ST_ACCEL_3_BDU_MASK 0x08
125 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23
126 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80
127 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00
128 #define ST_ACCEL_3_IG1_EN_ADDR 0x23
129 #define ST_ACCEL_3_IG1_EN_MASK 0x08
130 #define ST_ACCEL_3_MULTIREAD_BIT false
132 /* CUSTOM VALUES FOR SENSOR 4 */
133 #define ST_ACCEL_4_WAI_EXP 0x3a
134 #define ST_ACCEL_4_ODR_ADDR 0x20
135 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */
136 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00
137 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01
138 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02
139 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03
140 #define ST_ACCEL_4_PW_ADDR 0x20
141 #define ST_ACCEL_4_PW_MASK 0xc0
142 #define ST_ACCEL_4_FS_ADDR 0x21
143 #define ST_ACCEL_4_FS_MASK 0x80
144 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00
145 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01
146 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024)
147 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340)
148 #define ST_ACCEL_4_BDU_ADDR 0x21
149 #define ST_ACCEL_4_BDU_MASK 0x40
150 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
151 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
152 #define ST_ACCEL_4_IG1_EN_ADDR 0x21
153 #define ST_ACCEL_4_IG1_EN_MASK 0x08
154 #define ST_ACCEL_4_MULTIREAD_BIT true
156 /* CUSTOM VALUES FOR SENSOR 5 */
157 #define ST_ACCEL_5_WAI_EXP 0x3b
158 #define ST_ACCEL_5_ODR_ADDR 0x20
159 #define ST_ACCEL_5_ODR_MASK 0x80
160 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
161 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
162 #define ST_ACCEL_5_PW_ADDR 0x20
163 #define ST_ACCEL_5_PW_MASK 0x40
164 #define ST_ACCEL_5_FS_ADDR 0x20
165 #define ST_ACCEL_5_FS_MASK 0x20
166 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00
167 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01
168 /* TODO: check these resulting gain settings, these are not in the datsheet */
169 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
170 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
171 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
172 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
173 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
174 #define ST_ACCEL_5_IG1_EN_ADDR 0x21
175 #define ST_ACCEL_5_IG1_EN_MASK 0x08
176 #define ST_ACCEL_5_MULTIREAD_BIT false
178 static const struct iio_chan_spec st_accel_8bit_channels[] = {
179 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
180 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
181 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8,
182 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1),
183 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
184 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
185 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8,
186 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1),
187 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
188 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
189 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8,
190 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1),
191 IIO_CHAN_SOFT_TIMESTAMP(3)
194 static const struct iio_chan_spec st_accel_12bit_channels[] = {
195 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
196 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
197 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
198 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
199 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
200 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
201 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
202 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
203 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
204 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
205 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
206 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
207 IIO_CHAN_SOFT_TIMESTAMP(3)
210 static const struct iio_chan_spec st_accel_16bit_channels[] = {
211 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
212 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
213 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
214 ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
215 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
216 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
217 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
218 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
219 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
220 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
221 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
222 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
223 IIO_CHAN_SOFT_TIMESTAMP(3)
226 static const struct st_sensor_settings st_accel_sensors_settings[] = {
228 .wai = ST_ACCEL_1_WAI_EXP,
229 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
230 .sensors_supported = {
231 [0] = LIS3DH_ACCEL_DEV_NAME,
232 [1] = LSM303DLHC_ACCEL_DEV_NAME,
233 [2] = LSM330D_ACCEL_DEV_NAME,
234 [3] = LSM330DL_ACCEL_DEV_NAME,
235 [4] = LSM330DLC_ACCEL_DEV_NAME,
236 [5] = LSM303AGR_ACCEL_DEV_NAME,
238 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
240 .addr = ST_ACCEL_1_ODR_ADDR,
241 .mask = ST_ACCEL_1_ODR_MASK,
243 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
244 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
245 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
246 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
247 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
248 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
249 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
250 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
254 .addr = ST_ACCEL_1_ODR_ADDR,
255 .mask = ST_ACCEL_1_ODR_MASK,
256 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
259 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
260 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
263 .addr = ST_ACCEL_1_FS_ADDR,
264 .mask = ST_ACCEL_1_FS_MASK,
267 .num = ST_ACCEL_FS_AVL_2G,
268 .value = ST_ACCEL_1_FS_AVL_2_VAL,
269 .gain = ST_ACCEL_1_FS_AVL_2_GAIN,
272 .num = ST_ACCEL_FS_AVL_4G,
273 .value = ST_ACCEL_1_FS_AVL_4_VAL,
274 .gain = ST_ACCEL_1_FS_AVL_4_GAIN,
277 .num = ST_ACCEL_FS_AVL_8G,
278 .value = ST_ACCEL_1_FS_AVL_8_VAL,
279 .gain = ST_ACCEL_1_FS_AVL_8_GAIN,
282 .num = ST_ACCEL_FS_AVL_16G,
283 .value = ST_ACCEL_1_FS_AVL_16_VAL,
284 .gain = ST_ACCEL_1_FS_AVL_16_GAIN,
289 .addr = ST_ACCEL_1_BDU_ADDR,
290 .mask = ST_ACCEL_1_BDU_MASK,
293 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
294 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
295 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
297 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
301 .wai = ST_ACCEL_2_WAI_EXP,
302 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
303 .sensors_supported = {
304 [0] = LIS331DLH_ACCEL_DEV_NAME,
305 [1] = LSM303DL_ACCEL_DEV_NAME,
306 [2] = LSM303DLH_ACCEL_DEV_NAME,
307 [3] = LSM303DLM_ACCEL_DEV_NAME,
309 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
311 .addr = ST_ACCEL_2_ODR_ADDR,
312 .mask = ST_ACCEL_2_ODR_MASK,
314 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
315 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
316 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
317 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
321 .addr = ST_ACCEL_2_PW_ADDR,
322 .mask = ST_ACCEL_2_PW_MASK,
323 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
324 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
327 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
328 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
331 .addr = ST_ACCEL_2_FS_ADDR,
332 .mask = ST_ACCEL_2_FS_MASK,
335 .num = ST_ACCEL_FS_AVL_2G,
336 .value = ST_ACCEL_2_FS_AVL_2_VAL,
337 .gain = ST_ACCEL_2_FS_AVL_2_GAIN,
340 .num = ST_ACCEL_FS_AVL_4G,
341 .value = ST_ACCEL_2_FS_AVL_4_VAL,
342 .gain = ST_ACCEL_2_FS_AVL_4_GAIN,
345 .num = ST_ACCEL_FS_AVL_8G,
346 .value = ST_ACCEL_2_FS_AVL_8_VAL,
347 .gain = ST_ACCEL_2_FS_AVL_8_GAIN,
352 .addr = ST_ACCEL_2_BDU_ADDR,
353 .mask = ST_ACCEL_2_BDU_MASK,
356 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
357 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
358 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
360 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
364 .wai = ST_ACCEL_3_WAI_EXP,
365 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
366 .sensors_supported = {
367 [0] = LSM330_ACCEL_DEV_NAME,
369 .ch = (struct iio_chan_spec *)st_accel_16bit_channels,
371 .addr = ST_ACCEL_3_ODR_ADDR,
372 .mask = ST_ACCEL_3_ODR_MASK,
374 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
375 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
376 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
377 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
378 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
379 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
380 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
381 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
382 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
383 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
387 .addr = ST_ACCEL_3_ODR_ADDR,
388 .mask = ST_ACCEL_3_ODR_MASK,
389 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
392 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
393 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
396 .addr = ST_ACCEL_3_FS_ADDR,
397 .mask = ST_ACCEL_3_FS_MASK,
400 .num = ST_ACCEL_FS_AVL_2G,
401 .value = ST_ACCEL_3_FS_AVL_2_VAL,
402 .gain = ST_ACCEL_3_FS_AVL_2_GAIN,
405 .num = ST_ACCEL_FS_AVL_4G,
406 .value = ST_ACCEL_3_FS_AVL_4_VAL,
407 .gain = ST_ACCEL_3_FS_AVL_4_GAIN,
410 .num = ST_ACCEL_FS_AVL_6G,
411 .value = ST_ACCEL_3_FS_AVL_6_VAL,
412 .gain = ST_ACCEL_3_FS_AVL_6_GAIN,
415 .num = ST_ACCEL_FS_AVL_8G,
416 .value = ST_ACCEL_3_FS_AVL_8_VAL,
417 .gain = ST_ACCEL_3_FS_AVL_8_GAIN,
420 .num = ST_ACCEL_FS_AVL_16G,
421 .value = ST_ACCEL_3_FS_AVL_16_VAL,
422 .gain = ST_ACCEL_3_FS_AVL_16_GAIN,
427 .addr = ST_ACCEL_3_BDU_ADDR,
428 .mask = ST_ACCEL_3_BDU_MASK,
431 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
432 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
433 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
435 .en_addr = ST_ACCEL_3_IG1_EN_ADDR,
436 .en_mask = ST_ACCEL_3_IG1_EN_MASK,
439 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
443 .wai = ST_ACCEL_4_WAI_EXP,
444 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
445 .sensors_supported = {
446 [0] = LIS3LV02DL_ACCEL_DEV_NAME,
448 .ch = (struct iio_chan_spec *)st_accel_12bit_channels,
450 .addr = ST_ACCEL_4_ODR_ADDR,
451 .mask = ST_ACCEL_4_ODR_MASK,
453 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
454 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
455 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
456 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
460 .addr = ST_ACCEL_4_PW_ADDR,
461 .mask = ST_ACCEL_4_PW_MASK,
462 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
463 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
466 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
467 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
470 .addr = ST_ACCEL_4_FS_ADDR,
471 .mask = ST_ACCEL_4_FS_MASK,
474 .num = ST_ACCEL_FS_AVL_2G,
475 .value = ST_ACCEL_4_FS_AVL_2_VAL,
476 .gain = ST_ACCEL_4_FS_AVL_2_GAIN,
479 .num = ST_ACCEL_FS_AVL_6G,
480 .value = ST_ACCEL_4_FS_AVL_6_VAL,
481 .gain = ST_ACCEL_4_FS_AVL_6_GAIN,
486 .addr = ST_ACCEL_4_BDU_ADDR,
487 .mask = ST_ACCEL_4_BDU_MASK,
490 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
491 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
493 .en_addr = ST_ACCEL_4_IG1_EN_ADDR,
494 .en_mask = ST_ACCEL_4_IG1_EN_MASK,
497 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
498 .bootime = 2, /* guess */
501 .wai = ST_ACCEL_5_WAI_EXP,
502 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
503 .sensors_supported = {
504 [0] = LIS331DL_ACCEL_DEV_NAME,
506 .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
508 .addr = ST_ACCEL_5_ODR_ADDR,
509 .mask = ST_ACCEL_5_ODR_MASK,
511 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
512 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
516 .addr = ST_ACCEL_5_PW_ADDR,
517 .mask = ST_ACCEL_5_PW_MASK,
518 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
519 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
522 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
523 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
526 .addr = ST_ACCEL_5_FS_ADDR,
527 .mask = ST_ACCEL_5_FS_MASK,
530 .num = ST_ACCEL_FS_AVL_2G,
531 .value = ST_ACCEL_5_FS_AVL_2_VAL,
532 .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
535 .num = ST_ACCEL_FS_AVL_8G,
536 .value = ST_ACCEL_5_FS_AVL_8_VAL,
537 .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
542 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
543 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
544 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
546 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
547 .bootime = 2, /* guess */
551 static int st_accel_read_raw(struct iio_dev *indio_dev,
552 struct iio_chan_spec const *ch, int *val,
553 int *val2, long mask)
556 struct st_sensor_data *adata = iio_priv(indio_dev);
559 case IIO_CHAN_INFO_RAW:
560 err = st_sensors_read_info_raw(indio_dev, ch, val);
565 case IIO_CHAN_INFO_SCALE:
567 *val2 = adata->current_fullscale->gain;
568 return IIO_VAL_INT_PLUS_MICRO;
569 case IIO_CHAN_INFO_SAMP_FREQ:
580 static int st_accel_write_raw(struct iio_dev *indio_dev,
581 struct iio_chan_spec const *chan, int val, int val2, long mask)
586 case IIO_CHAN_INFO_SCALE:
587 err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
589 case IIO_CHAN_INFO_SAMP_FREQ:
592 mutex_lock(&indio_dev->mlock);
593 err = st_sensors_set_odr(indio_dev, val);
594 mutex_unlock(&indio_dev->mlock);
603 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
604 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
606 static struct attribute *st_accel_attributes[] = {
607 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
608 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
612 static const struct attribute_group st_accel_attribute_group = {
613 .attrs = st_accel_attributes,
616 static const struct iio_info accel_info = {
617 .driver_module = THIS_MODULE,
618 .attrs = &st_accel_attribute_group,
619 .read_raw = &st_accel_read_raw,
620 .write_raw = &st_accel_write_raw,
621 .debugfs_reg_access = &st_sensors_debugfs_reg_access,
624 #ifdef CONFIG_IIO_TRIGGER
625 static const struct iio_trigger_ops st_accel_trigger_ops = {
626 .owner = THIS_MODULE,
627 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
629 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
631 #define ST_ACCEL_TRIGGER_OPS NULL
634 int st_accel_common_probe(struct iio_dev *indio_dev)
636 struct st_sensor_data *adata = iio_priv(indio_dev);
637 int irq = adata->get_irq_data_ready(indio_dev);
640 indio_dev->modes = INDIO_DIRECT_MODE;
641 indio_dev->info = &accel_info;
642 mutex_init(&adata->tb.buf_lock);
644 st_sensors_power_enable(indio_dev);
646 err = st_sensors_check_device_support(indio_dev,
647 ARRAY_SIZE(st_accel_sensors_settings),
648 st_accel_sensors_settings);
652 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
653 adata->multiread_bit = adata->sensor_settings->multi_read_bit;
654 indio_dev->channels = adata->sensor_settings->ch;
655 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
657 adata->current_fullscale = (struct st_sensor_fullscale_avl *)
658 &adata->sensor_settings->fs.fs_avl[0];
659 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
661 if (!adata->dev->platform_data)
662 adata->dev->platform_data =
663 (struct st_sensors_platform_data *)&default_accel_pdata;
665 err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
669 err = st_accel_allocate_ring(indio_dev);
674 err = st_sensors_allocate_trigger(indio_dev,
675 ST_ACCEL_TRIGGER_OPS);
677 goto st_accel_probe_trigger_error;
680 err = iio_device_register(indio_dev);
682 goto st_accel_device_register_error;
684 dev_info(&indio_dev->dev, "registered accelerometer %s\n",
689 st_accel_device_register_error:
691 st_sensors_deallocate_trigger(indio_dev);
692 st_accel_probe_trigger_error:
693 st_accel_deallocate_ring(indio_dev);
697 EXPORT_SYMBOL(st_accel_common_probe);
699 void st_accel_common_remove(struct iio_dev *indio_dev)
701 struct st_sensor_data *adata = iio_priv(indio_dev);
703 st_sensors_power_disable(indio_dev);
705 iio_device_unregister(indio_dev);
706 if (adata->get_irq_data_ready(indio_dev) > 0)
707 st_sensors_deallocate_trigger(indio_dev);
709 st_accel_deallocate_ring(indio_dev);
711 EXPORT_SYMBOL(st_accel_common_remove);
713 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
714 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
715 MODULE_LICENSE("GPL v2");