drivers/ide/pci/slc90e66.c

   1 /*
   2  *  linux/drivers/ide/pci/slc90e66.c    Version 0.14    February 8, 2007
   3  *
   4  *  Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
   5  *  Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This is a look-alike variation of the ICH0 PIIX4 Ultra-66,
   8  * but this keeps the ISA-Bridge and slots alive.
   9  *
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/ioport.h>
  16 #include <linux/pci.h>
  17 #include <linux/hdreg.h>
  18 #include <linux/ide.h>
  19 #include <linux/delay.h>
  20 #include <linux/init.h>
  21
  22 #include <asm/io.h>
  23
  24 static u8 slc90e66_ratemask (ide_drive_t *drive)
  25 {
  26         u8 mode = 2;
  27
  28         if (!eighty_ninty_three(drive))
  29                 mode = min_t(u8, mode, 1);
  30         return mode;
  31 }
  32
  33 static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
  34         switch(xfer_rate) {
  35                 case XFER_UDMA_4:
  36                 case XFER_UDMA_3:
  37                 case XFER_UDMA_2:
  38                 case XFER_UDMA_1:
  39                 case XFER_UDMA_0:
  40                 case XFER_MW_DMA_2:
  41                 case XFER_PIO_4:
  42                         return 4;
  43                 case XFER_MW_DMA_1:
  44                 case XFER_PIO_3:
  45                         return 3;
  46                 case XFER_SW_DMA_2:
  47                 case XFER_PIO_2:
  48                         return 2;
  49                 case XFER_MW_DMA_0:
  50                 case XFER_SW_DMA_1:
  51                 case XFER_SW_DMA_0:
  52                 case XFER_PIO_1:
  53                 case XFER_PIO_0:
  54                 case XFER_PIO_SLOW:
  55                 default:
  56                         return 0;
  57         }
  58 }
  59
  60 static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)
  61 {
  62         ide_hwif_t *hwif        = HWIF(drive);
  63         struct pci_dev *dev     = hwif->pci_dev;
  64         int is_slave            = drive->dn & 1;
  65         int master_port         = hwif->channel ? 0x42 : 0x40;
  66         int slave_port          = 0x44;
  67         unsigned long flags;
  68         u16 master_data;
  69         u8 slave_data;
  70         int control = 0;
  71                                      /* ISP  RTC */
  72         static const u8 timings[][2]= {
  73                                         { 0, 0 },
  74                                         { 0, 0 },
  75                                         { 1, 0 },
  76                                         { 2, 1 },
  77                                         { 2, 3 }, };
  78
  79         spin_lock_irqsave(&ide_lock, flags);
  80         pci_read_config_word(dev, master_port, &master_data);
  81
  82         if (pio > 1)
  83                 control |= 1;   /* Programmable timing on */
  84         if (drive->media == ide_disk)
  85                 control |= 4;   /* Prefetch, post write */
  86         if (pio > 2)
  87                 control |= 2;   /* IORDY */
  88         if (is_slave) {
  89                 master_data |=  0x4000;
  90                 master_data &= ~0x0070;
  91                 if (pio > 1) {
  92                         /* Set PPE, IE and TIME */
  93                         master_data |= control << 4;
  94                 }
  95                 pci_read_config_byte(dev, slave_port, &slave_data);
  96                 slave_data &= hwif->channel ? 0x0f : 0xf0;
  97                 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
  98                                (hwif->channel ? 4 : 0);
  99         } else {
 100                 master_data &= ~0x3307;
 101                 if (pio > 1) {
 102                         /* enable PPE, IE and TIME */
 103                         master_data |= control;
 104                 }
 105                 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
 106         }
 107         pci_write_config_word(dev, master_port, master_data);
 108         if (is_slave)
 109                 pci_write_config_byte(dev, slave_port, slave_data);
 110         spin_unlock_irqrestore(&ide_lock, flags);
 111 }
 112
 113 static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
 114 {
 115         pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
 116         slc90e66_tune_pio(drive, pio);
 117         (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 118 }
 119
 120 static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
 121 {
 122         ide_hwif_t *hwif        = HWIF(drive);
 123         struct pci_dev *dev     = hwif->pci_dev;
 124         u8 maslave              = hwif->channel ? 0x42 : 0x40;
 125         u8 speed        = ide_rate_filter(slc90e66_ratemask(drive), xferspeed);
 126         int sitre = 0, a_speed  = 7 << (drive->dn * 4);
 127         int u_speed = 0, u_flag = 1 << drive->dn;
 128         u16                     reg4042, reg44, reg48, reg4a;
 129
 130         pci_read_config_word(dev, maslave, &reg4042);
 131         sitre = (reg4042 & 0x4000) ? 1 : 0;
 132         pci_read_config_word(dev, 0x44, &reg44);
 133         pci_read_config_word(dev, 0x48, &reg48);
 134         pci_read_config_word(dev, 0x4a, &reg4a);
 135
 136         switch(speed) {
 137                 case XFER_UDMA_4:       u_speed = 4 << (drive->dn * 4); break;
 138                 case XFER_UDMA_3:       u_speed = 3 << (drive->dn * 4); break;
 139                 case XFER_UDMA_2:       u_speed = 2 << (drive->dn * 4); break;
 140                 case XFER_UDMA_1:       u_speed = 1 << (drive->dn * 4); break;
 141                 case XFER_UDMA_0:       u_speed = 0 << (drive->dn * 4); break;
 142                 case XFER_MW_DMA_2:
 143                 case XFER_MW_DMA_1:
 144                 case XFER_SW_DMA_2:     break;
 145                 case XFER_PIO_4:
 146                 case XFER_PIO_3:
 147                 case XFER_PIO_2:
 148                 case XFER_PIO_0:        break;
 149                 default:                return -1;
 150         }
 151
 152         if (speed >= XFER_UDMA_0) {
 153                 if (!(reg48 & u_flag))
 154                         pci_write_config_word(dev, 0x48, reg48|u_flag);
 155                 /* FIXME: (reg4a & a_speed) ? */
 156                 if ((reg4a & u_speed) != u_speed) {
 157                         pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
 158                         pci_read_config_word(dev, 0x4a, &reg4a);
 159                         pci_write_config_word(dev, 0x4a, reg4a|u_speed);
 160                 }
 161         } else {
 162                 if (reg48 & u_flag)
 163                         pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
 164                 if (reg4a & a_speed)
 165                         pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
 166         }
 167
 168         slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
 169         return ide_config_drive_speed(drive, speed);
 170 }
 171
 172 static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
 173 {
 174         u8 speed = ide_dma_speed(drive, slc90e66_ratemask(drive));
 175
 176         if (!speed)
 177                 return 0;
 178
 179         (void) slc90e66_tune_chipset(drive, speed);
 180         return ide_dma_enable(drive);
 181 }
 182
 183 static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
 184 {
 185         drive->init_speed = 0;
 186
 187         if (ide_use_dma(drive) && slc90e66_config_drive_for_dma(drive))
 188                 return 0;
 189
 190         if (ide_use_fast_pio(drive))
 191                 slc90e66_tune_drive(drive, 255);
 192
 193         return -1;
 194 }
 195
 196 static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
 197 {
 198         u8 reg47 = 0;
 199         u8 mask = hwif->channel ? 0x01 : 0x02;  /* bit0:Primary */
 200
 201         hwif->autodma = 0;
 202
 203         if (!hwif->irq)
 204                 hwif->irq = hwif->channel ? 15 : 14;
 205
 206         hwif->speedproc = &slc90e66_tune_chipset;
 207         hwif->tuneproc  = &slc90e66_tune_drive;
 208
 209         pci_read_config_byte(hwif->pci_dev, 0x47, &reg47);
 210
 211         if (!hwif->dma_base) {
 212                 hwif->drives[0].autotune = 1;
 213                 hwif->drives[1].autotune = 1;
 214                 return;
 215         }
 216
 217         hwif->atapi_dma = 1;
 218         hwif->ultra_mask = 0x1f;
 219         hwif->mwdma_mask = 0x06;
 220         hwif->swdma_mask = 0x04;
 221
 222         if (!hwif->udma_four) {
 223                 /* bit[0(1)]: 0:80, 1:40 */
 224                 hwif->udma_four = (reg47 & mask) ? 0 : 1;
 225         }
 226
 227         hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate;
 228
 229         if (!noautodma)
 230                 hwif->autodma = 1;
 231         hwif->drives[0].autodma = hwif->autodma;
 232         hwif->drives[1].autodma = hwif->autodma;
 233 }
 234
 235 static ide_pci_device_t slc90e66_chipset __devinitdata = {
 236         .name           = "SLC90E66",
 237         .init_hwif      = init_hwif_slc90e66,
 238         .channels       = 2,
 239         .autodma        = AUTODMA,
 240         .enablebits     = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
 241         .bootable       = ON_BOARD,
 242 };
 243
 244 static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 245 {
 246         return ide_setup_pci_device(dev, &slc90e66_chipset);
 247 }
 248
 249 static struct pci_device_id slc90e66_pci_tbl[] = {
 250         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1), 0},
 251         { 0, },
 252 };
 253 MODULE_DEVICE_TABLE(pci, slc90e66_pci_tbl);
 254
 255 static struct pci_driver driver = {
 256         .name           = "SLC90e66_IDE",
 257         .id_table       = slc90e66_pci_tbl,
 258         .probe          = slc90e66_init_one,
 259 };
 260
 261 static int __init slc90e66_ide_init(void)
 262 {
 263         return ide_pci_register_driver(&driver);
 264 }
 265
 266 module_init(slc90e66_ide_init);
 267
 268 MODULE_AUTHOR("Andre Hedrick");
 269 MODULE_DESCRIPTION("PCI driver module for SLC90E66 IDE");
 270 MODULE_LICENSE("GPL");