drivers/hwtracing/coresight/coresight-etm4x.c

   1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/types.h>
  17 #include <linux/device.h>
  18 #include <linux/module.h>
  19 #include <linux/io.h>
  20 #include <linux/err.h>
  21 #include <linux/fs.h>
  22 #include <linux/slab.h>
  23 #include <linux/delay.h>
  24 #include <linux/smp.h>
  25 #include <linux/sysfs.h>
  26 #include <linux/stat.h>
  27 #include <linux/clk.h>
  28 #include <linux/cpu.h>
  29 #include <linux/coresight.h>
  30 #include <linux/pm_wakeup.h>
  31 #include <linux/amba/bus.h>
  32 #include <linux/seq_file.h>
  33 #include <linux/uaccess.h>
  34 #include <linux/pm_runtime.h>
  35 #include <asm/sections.h>
  36
  37 #include "coresight-etm4x.h"
  38
  39 static int boot_enable;
  40 module_param_named(boot_enable, boot_enable, int, S_IRUGO);
  41
  42 /* The number of ETMv4 currently registered */
  43 static int etm4_count;
  44 static struct etmv4_drvdata *etmdrvdata[NR_CPUS];
  45
  46 static void etm4_os_unlock(void *info)
  47 {
  48         struct etmv4_drvdata *drvdata = (struct etmv4_drvdata *)info;
  49
  50         /* Writing any value to ETMOSLAR unlocks the trace registers */
  51         writel_relaxed(0x0, drvdata->base + TRCOSLAR);
  52         isb();
  53 }
  54
  55 static bool etm4_arch_supported(u8 arch)
  56 {
  57         switch (arch) {
  58         case ETM_ARCH_V4:
  59                 break;
  60         default:
  61                 return false;
  62         }
  63         return true;
  64 }
  65
  66 static int etm4_cpu_id(struct coresight_device *csdev)
  67 {
  68         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  69
  70         return drvdata->cpu;
  71 }
  72
  73 static int etm4_trace_id(struct coresight_device *csdev)
  74 {
  75         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  76         unsigned long flags;
  77         int trace_id = -1;
  78
  79         if (!drvdata->enable)
  80                 return drvdata->trcid;
  81
  82         spin_lock_irqsave(&drvdata->spinlock, flags);
  83
  84         CS_UNLOCK(drvdata->base);
  85         trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR);
  86         trace_id &= ETM_TRACEID_MASK;
  87         CS_LOCK(drvdata->base);
  88
  89         spin_unlock_irqrestore(&drvdata->spinlock, flags);
  90
  91         return trace_id;
  92 }
  93
  94 static void etm4_enable_hw(void *info)
  95 {
  96         int i;
  97         struct etmv4_drvdata *drvdata = info;
  98
  99         CS_UNLOCK(drvdata->base);
 100
 101         etm4_os_unlock(drvdata);
 102
 103         /* Disable the trace unit before programming trace registers */
 104         writel_relaxed(0, drvdata->base + TRCPRGCTLR);
 105
 106         /* wait for TRCSTATR.IDLE to go up */
 107         if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))
 108                 dev_err(drvdata->dev,
 109                         "timeout observed when probing at offset %#x\n",
 110                         TRCSTATR);
 111
 112         writel_relaxed(drvdata->pe_sel, drvdata->base + TRCPROCSELR);
 113         writel_relaxed(drvdata->cfg, drvdata->base + TRCCONFIGR);
 114         /* nothing specific implemented */
 115         writel_relaxed(0x0, drvdata->base + TRCAUXCTLR);
 116         writel_relaxed(drvdata->eventctrl0, drvdata->base + TRCEVENTCTL0R);
 117         writel_relaxed(drvdata->eventctrl1, drvdata->base + TRCEVENTCTL1R);
 118         writel_relaxed(drvdata->stall_ctrl, drvdata->base + TRCSTALLCTLR);
 119         writel_relaxed(drvdata->ts_ctrl, drvdata->base + TRCTSCTLR);
 120         writel_relaxed(drvdata->syncfreq, drvdata->base + TRCSYNCPR);
 121         writel_relaxed(drvdata->ccctlr, drvdata->base + TRCCCCTLR);
 122         writel_relaxed(drvdata->bb_ctrl, drvdata->base + TRCBBCTLR);
 123         writel_relaxed(drvdata->trcid, drvdata->base + TRCTRACEIDR);
 124         writel_relaxed(drvdata->vinst_ctrl, drvdata->base + TRCVICTLR);
 125         writel_relaxed(drvdata->viiectlr, drvdata->base + TRCVIIECTLR);
 126         writel_relaxed(drvdata->vissctlr,
 127                        drvdata->base + TRCVISSCTLR);
 128         writel_relaxed(drvdata->vipcssctlr,
 129                        drvdata->base + TRCVIPCSSCTLR);
 130         for (i = 0; i < drvdata->nrseqstate - 1; i++)
 131                 writel_relaxed(drvdata->seq_ctrl[i],
 132                                drvdata->base + TRCSEQEVRn(i));
 133         writel_relaxed(drvdata->seq_rst, drvdata->base + TRCSEQRSTEVR);
 134         writel_relaxed(drvdata->seq_state, drvdata->base + TRCSEQSTR);
 135         writel_relaxed(drvdata->ext_inp, drvdata->base + TRCEXTINSELR);
 136         for (i = 0; i < drvdata->nr_cntr; i++) {
 137                 writel_relaxed(drvdata->cntrldvr[i],
 138                                drvdata->base + TRCCNTRLDVRn(i));
 139                 writel_relaxed(drvdata->cntr_ctrl[i],
 140                                drvdata->base + TRCCNTCTLRn(i));
 141                 writel_relaxed(drvdata->cntr_val[i],
 142                                drvdata->base + TRCCNTVRn(i));
 143         }
 144
 145         /* Resource selector pair 0 is always implemented and reserved */
 146         for (i = 2; i < drvdata->nr_resource * 2; i++)
 147                 writel_relaxed(drvdata->res_ctrl[i],
 148                                drvdata->base + TRCRSCTLRn(i));
 149
 150         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
 151                 writel_relaxed(drvdata->ss_ctrl[i],
 152                                drvdata->base + TRCSSCCRn(i));
 153                 writel_relaxed(drvdata->ss_status[i],
 154                                drvdata->base + TRCSSCSRn(i));
 155                 writel_relaxed(drvdata->ss_pe_cmp[i],
 156                                drvdata->base + TRCSSPCICRn(i));
 157         }
 158         for (i = 0; i < drvdata->nr_addr_cmp; i++) {
 159                 writeq_relaxed(drvdata->addr_val[i],
 160                                drvdata->base + TRCACVRn(i));
 161                 writeq_relaxed(drvdata->addr_acc[i],
 162                                drvdata->base + TRCACATRn(i));
 163         }
 164         for (i = 0; i < drvdata->numcidc; i++)
 165                 writeq_relaxed(drvdata->ctxid_pid[i],
 166                                drvdata->base + TRCCIDCVRn(i));
 167         writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
 168         writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
 169
 170         for (i = 0; i < drvdata->numvmidc; i++)
 171                 writeq_relaxed(drvdata->vmid_val[i],
 172                                drvdata->base + TRCVMIDCVRn(i));
 173         writel_relaxed(drvdata->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);
 174         writel_relaxed(drvdata->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);
 175
 176         /* Enable the trace unit */
 177         writel_relaxed(1, drvdata->base + TRCPRGCTLR);
 178
 179         /* wait for TRCSTATR.IDLE to go back down to '0' */
 180         if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))
 181                 dev_err(drvdata->dev,
 182                         "timeout observed when probing at offset %#x\n",
 183                         TRCSTATR);
 184
 185         CS_LOCK(drvdata->base);
 186
 187         dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
 188 }
 189
 190 static int etm4_enable(struct coresight_device *csdev)
 191 {
 192         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 193         int ret;
 194
 195         spin_lock(&drvdata->spinlock);
 196
 197         /*
 198          * Executing etm4_enable_hw on the cpu whose ETM is being enabled
 199          * ensures that register writes occur when cpu is powered.
 200          */
 201         ret = smp_call_function_single(drvdata->cpu,
 202                                        etm4_enable_hw, drvdata, 1);
 203         if (ret)
 204                 goto err;
 205         drvdata->enable = true;
 206         drvdata->sticky_enable = true;
 207
 208         spin_unlock(&drvdata->spinlock);
 209
 210         dev_info(drvdata->dev, "ETM tracing enabled\n");
 211         return 0;
 212 err:
 213         spin_unlock(&drvdata->spinlock);
 214         return ret;
 215 }
 216
 217 static void etm4_disable_hw(void *info)
 218 {
 219         u32 control;
 220         struct etmv4_drvdata *drvdata = info;
 221
 222         CS_UNLOCK(drvdata->base);
 223
 224         control = readl_relaxed(drvdata->base + TRCPRGCTLR);
 225
 226         /* EN, bit[0] Trace unit enable bit */
 227         control &= ~0x1;
 228
 229         /* make sure everything completes before disabling */
 230         mb();
 231         isb();
 232         writel_relaxed(control, drvdata->base + TRCPRGCTLR);
 233
 234         CS_LOCK(drvdata->base);
 235
 236         dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);
 237 }
 238
 239 static void etm4_disable(struct coresight_device *csdev)
 240 {
 241         struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 242
 243         /*
 244          * Taking hotplug lock here protects from clocks getting disabled
 245          * with tracing being left on (crash scenario) if user disable occurs
 246          * after cpu online mask indicates the cpu is offline but before the
 247          * DYING hotplug callback is serviced by the ETM driver.
 248          */
 249         get_online_cpus();
 250         spin_lock(&drvdata->spinlock);
 251
 252         /*
 253          * Executing etm4_disable_hw on the cpu whose ETM is being disabled
 254          * ensures that register writes occur when cpu is powered.
 255          */
 256         smp_call_function_single(drvdata->cpu, etm4_disable_hw, drvdata, 1);
 257         drvdata->enable = false;
 258
 259         spin_unlock(&drvdata->spinlock);
 260         put_online_cpus();
 261
 262         dev_info(drvdata->dev, "ETM tracing disabled\n");
 263 }
 264
 265 static const struct coresight_ops_source etm4_source_ops = {
 266         .cpu_id         = etm4_cpu_id,
 267         .trace_id       = etm4_trace_id,
 268         .enable         = etm4_enable,
 269         .disable        = etm4_disable,
 270 };
 271
 272 static const struct coresight_ops etm4_cs_ops = {
 273         .source_ops     = &etm4_source_ops,
 274 };
 275
 276 static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
 277 {
 278         u8 idx = drvdata->addr_idx;
 279
 280         /*
 281          * TRCACATRn.TYPE bit[1:0]: type of comparison
 282          * the trace unit performs
 283          */
 284         if (BMVAL(drvdata->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
 285                 if (idx % 2 != 0)
 286                         return -EINVAL;
 287
 288                 /*
 289                  * We are performing instruction address comparison. Set the
 290                  * relevant bit of ViewInst Include/Exclude Control register
 291                  * for corresponding address comparator pair.
 292                  */
 293                 if (drvdata->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
 294                     drvdata->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
 295                         return -EINVAL;
 296
 297                 if (exclude == true) {
 298                         /*
 299                          * Set exclude bit and unset the include bit
 300                          * corresponding to comparator pair
 301                          */
 302                         drvdata->viiectlr |= BIT(idx / 2 + 16);
 303                         drvdata->viiectlr &= ~BIT(idx / 2);
 304                 } else {
 305                         /*
 306                          * Set include bit and unset exclude bit
 307                          * corresponding to comparator pair
 308                          */
 309                         drvdata->viiectlr |= BIT(idx / 2);
 310                         drvdata->viiectlr &= ~BIT(idx / 2 + 16);
 311                 }
 312         }
 313         return 0;
 314 }
 315
 316 static ssize_t nr_pe_cmp_show(struct device *dev,
 317                               struct device_attribute *attr,
 318                               char *buf)
 319 {
 320         unsigned long val;
 321         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 322
 323         val = drvdata->nr_pe_cmp;
 324         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 325 }
 326 static DEVICE_ATTR_RO(nr_pe_cmp);
 327
 328 static ssize_t nr_addr_cmp_show(struct device *dev,
 329                                 struct device_attribute *attr,
 330                                 char *buf)
 331 {
 332         unsigned long val;
 333         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 334
 335         val = drvdata->nr_addr_cmp;
 336         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 337 }
 338 static DEVICE_ATTR_RO(nr_addr_cmp);
 339
 340 static ssize_t nr_cntr_show(struct device *dev,
 341                             struct device_attribute *attr,
 342                             char *buf)
 343 {
 344         unsigned long val;
 345         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 346
 347         val = drvdata->nr_cntr;
 348         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 349 }
 350 static DEVICE_ATTR_RO(nr_cntr);
 351
 352 static ssize_t nr_ext_inp_show(struct device *dev,
 353                                struct device_attribute *attr,
 354                                char *buf)
 355 {
 356         unsigned long val;
 357         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 358
 359         val = drvdata->nr_ext_inp;
 360         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 361 }
 362 static DEVICE_ATTR_RO(nr_ext_inp);
 363
 364 static ssize_t numcidc_show(struct device *dev,
 365                             struct device_attribute *attr,
 366                             char *buf)
 367 {
 368         unsigned long val;
 369         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 370
 371         val = drvdata->numcidc;
 372         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 373 }
 374 static DEVICE_ATTR_RO(numcidc);
 375
 376 static ssize_t numvmidc_show(struct device *dev,
 377                              struct device_attribute *attr,
 378                              char *buf)
 379 {
 380         unsigned long val;
 381         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 382
 383         val = drvdata->numvmidc;
 384         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 385 }
 386 static DEVICE_ATTR_RO(numvmidc);
 387
 388 static ssize_t nrseqstate_show(struct device *dev,
 389                                struct device_attribute *attr,
 390                                char *buf)
 391 {
 392         unsigned long val;
 393         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 394
 395         val = drvdata->nrseqstate;
 396         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 397 }
 398 static DEVICE_ATTR_RO(nrseqstate);
 399
 400 static ssize_t nr_resource_show(struct device *dev,
 401                                 struct device_attribute *attr,
 402                                 char *buf)
 403 {
 404         unsigned long val;
 405         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 406
 407         val = drvdata->nr_resource;
 408         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 409 }
 410 static DEVICE_ATTR_RO(nr_resource);
 411
 412 static ssize_t nr_ss_cmp_show(struct device *dev,
 413                               struct device_attribute *attr,
 414                               char *buf)
 415 {
 416         unsigned long val;
 417         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 418
 419         val = drvdata->nr_ss_cmp;
 420         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 421 }
 422 static DEVICE_ATTR_RO(nr_ss_cmp);
 423
 424 static ssize_t reset_store(struct device *dev,
 425                            struct device_attribute *attr,
 426                            const char *buf, size_t size)
 427 {
 428         int i;
 429         unsigned long val;
 430         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 431
 432         if (kstrtoul(buf, 16, &val))
 433                 return -EINVAL;
 434
 435         spin_lock(&drvdata->spinlock);
 436         if (val)
 437                 drvdata->mode = 0x0;
 438
 439         /* Disable data tracing: do not trace load and store data transfers */
 440         drvdata->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
 441         drvdata->cfg &= ~(BIT(1) | BIT(2));
 442
 443         /* Disable data value and data address tracing */
 444         drvdata->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
 445                            ETM_MODE_DATA_TRACE_VAL);
 446         drvdata->cfg &= ~(BIT(16) | BIT(17));
 447
 448         /* Disable all events tracing */
 449         drvdata->eventctrl0 = 0x0;
 450         drvdata->eventctrl1 = 0x0;
 451
 452         /* Disable timestamp event */
 453         drvdata->ts_ctrl = 0x0;
 454
 455         /* Disable stalling */
 456         drvdata->stall_ctrl = 0x0;
 457
 458         /* Reset trace synchronization period  to 2^8 = 256 bytes*/
 459         if (drvdata->syncpr == false)
 460                 drvdata->syncfreq = 0x8;
 461
 462         /*
 463          * Enable ViewInst to trace everything with start-stop logic in
 464          * started state. ARM recommends start-stop logic is set before
 465          * each trace run.
 466          */
 467         drvdata->vinst_ctrl |= BIT(0);
 468         if (drvdata->nr_addr_cmp == true) {
 469                 drvdata->mode |= ETM_MODE_VIEWINST_STARTSTOP;
 470                 /* SSSTATUS, bit[9] */
 471                 drvdata->vinst_ctrl |= BIT(9);
 472         }
 473
 474         /* No address range filtering for ViewInst */
 475         drvdata->viiectlr = 0x0;
 476
 477         /* No start-stop filtering for ViewInst */
 478         drvdata->vissctlr = 0x0;
 479
 480         /* Disable seq events */
 481         for (i = 0; i < drvdata->nrseqstate-1; i++)
 482                 drvdata->seq_ctrl[i] = 0x0;
 483         drvdata->seq_rst = 0x0;
 484         drvdata->seq_state = 0x0;
 485
 486         /* Disable external input events */
 487         drvdata->ext_inp = 0x0;
 488
 489         drvdata->cntr_idx = 0x0;
 490         for (i = 0; i < drvdata->nr_cntr; i++) {
 491                 drvdata->cntrldvr[i] = 0x0;
 492                 drvdata->cntr_ctrl[i] = 0x0;
 493                 drvdata->cntr_val[i] = 0x0;
 494         }
 495
 496         /* Resource selector pair 0 is always implemented and reserved */
 497         drvdata->res_idx = 0x2;
 498         for (i = 2; i < drvdata->nr_resource * 2; i++)
 499                 drvdata->res_ctrl[i] = 0x0;
 500
 501         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
 502                 drvdata->ss_ctrl[i] = 0x0;
 503                 drvdata->ss_pe_cmp[i] = 0x0;
 504         }
 505
 506         drvdata->addr_idx = 0x0;
 507         for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
 508                 drvdata->addr_val[i] = 0x0;
 509                 drvdata->addr_acc[i] = 0x0;
 510                 drvdata->addr_type[i] = ETM_ADDR_TYPE_NONE;
 511         }
 512
 513         drvdata->ctxid_idx = 0x0;
 514         for (i = 0; i < drvdata->numcidc; i++) {
 515                 drvdata->ctxid_pid[i] = 0x0;
 516                 drvdata->ctxid_vpid[i] = 0x0;
 517         }
 518
 519         drvdata->ctxid_mask0 = 0x0;
 520         drvdata->ctxid_mask1 = 0x0;
 521
 522         drvdata->vmid_idx = 0x0;
 523         for (i = 0; i < drvdata->numvmidc; i++)
 524                 drvdata->vmid_val[i] = 0x0;
 525         drvdata->vmid_mask0 = 0x0;
 526         drvdata->vmid_mask1 = 0x0;
 527
 528         drvdata->trcid = drvdata->cpu + 1;
 529         spin_unlock(&drvdata->spinlock);
 530         return size;
 531 }
 532 static DEVICE_ATTR_WO(reset);
 533
 534 static ssize_t mode_show(struct device *dev,
 535                          struct device_attribute *attr,
 536                          char *buf)
 537 {
 538         unsigned long val;
 539         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 540
 541         val = drvdata->mode;
 542         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 543 }
 544
 545 static ssize_t mode_store(struct device *dev,
 546                           struct device_attribute *attr,
 547                           const char *buf, size_t size)
 548 {
 549         unsigned long val, mode;
 550         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 551
 552         if (kstrtoul(buf, 16, &val))
 553                 return -EINVAL;
 554
 555         spin_lock(&drvdata->spinlock);
 556         drvdata->mode = val & ETMv4_MODE_ALL;
 557
 558         if (drvdata->mode & ETM_MODE_EXCLUDE)
 559                 etm4_set_mode_exclude(drvdata, true);
 560         else
 561                 etm4_set_mode_exclude(drvdata, false);
 562
 563         if (drvdata->instrp0 == true) {
 564                 /* start by clearing instruction P0 field */
 565                 drvdata->cfg  &= ~(BIT(1) | BIT(2));
 566                 if (drvdata->mode & ETM_MODE_LOAD)
 567                         /* 0b01 Trace load instructions as P0 instructions */
 568                         drvdata->cfg  |= BIT(1);
 569                 if (drvdata->mode & ETM_MODE_STORE)
 570                         /* 0b10 Trace store instructions as P0 instructions */
 571                         drvdata->cfg  |= BIT(2);
 572                 if (drvdata->mode & ETM_MODE_LOAD_STORE)
 573                         /*
 574                          * 0b11 Trace load and store instructions
 575                          * as P0 instructions
 576                          */
 577                         drvdata->cfg  |= BIT(1) | BIT(2);
 578         }
 579
 580         /* bit[3], Branch broadcast mode */
 581         if ((drvdata->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
 582                 drvdata->cfg |= BIT(3);
 583         else
 584                 drvdata->cfg &= ~BIT(3);
 585
 586         /* bit[4], Cycle counting instruction trace bit */
 587         if ((drvdata->mode & ETMv4_MODE_CYCACC) &&
 588                 (drvdata->trccci == true))
 589                 drvdata->cfg |= BIT(4);
 590         else
 591                 drvdata->cfg &= ~BIT(4);
 592
 593         /* bit[6], Context ID tracing bit */
 594         if ((drvdata->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
 595                 drvdata->cfg |= BIT(6);
 596         else
 597                 drvdata->cfg &= ~BIT(6);
 598
 599         if ((drvdata->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
 600                 drvdata->cfg |= BIT(7);
 601         else
 602                 drvdata->cfg &= ~BIT(7);
 603
 604         /* bits[10:8], Conditional instruction tracing bit */
 605         mode = ETM_MODE_COND(drvdata->mode);
 606         if (drvdata->trccond == true) {
 607                 drvdata->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
 608                 drvdata->cfg |= mode << 8;
 609         }
 610
 611         /* bit[11], Global timestamp tracing bit */
 612         if ((drvdata->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
 613                 drvdata->cfg |= BIT(11);
 614         else
 615                 drvdata->cfg &= ~BIT(11);
 616
 617         /* bit[12], Return stack enable bit */
 618         if ((drvdata->mode & ETM_MODE_RETURNSTACK) &&
 619                 (drvdata->retstack == true))
 620                 drvdata->cfg |= BIT(12);
 621         else
 622                 drvdata->cfg &= ~BIT(12);
 623
 624         /* bits[14:13], Q element enable field */
 625         mode = ETM_MODE_QELEM(drvdata->mode);
 626         /* start by clearing QE bits */
 627         drvdata->cfg &= ~(BIT(13) | BIT(14));
 628         /* if supported, Q elements with instruction counts are enabled */
 629         if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
 630                 drvdata->cfg |= BIT(13);
 631         /*
 632          * if supported, Q elements with and without instruction
 633          * counts are enabled
 634          */
 635         if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
 636                 drvdata->cfg |= BIT(14);
 637
 638         /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
 639         if ((drvdata->mode & ETM_MODE_ATB_TRIGGER) &&
 640             (drvdata->atbtrig == true))
 641                 drvdata->eventctrl1 |= BIT(11);
 642         else
 643                 drvdata->eventctrl1 &= ~BIT(11);
 644
 645         /* bit[12], Low-power state behavior override bit */
 646         if ((drvdata->mode & ETM_MODE_LPOVERRIDE) &&
 647             (drvdata->lpoverride == true))
 648                 drvdata->eventctrl1 |= BIT(12);
 649         else
 650                 drvdata->eventctrl1 &= ~BIT(12);
 651
 652         /* bit[8], Instruction stall bit */
 653         if (drvdata->mode & ETM_MODE_ISTALL_EN)
 654                 drvdata->stall_ctrl |= BIT(8);
 655         else
 656                 drvdata->stall_ctrl &= ~BIT(8);
 657
 658         /* bit[10], Prioritize instruction trace bit */
 659         if (drvdata->mode & ETM_MODE_INSTPRIO)
 660                 drvdata->stall_ctrl |= BIT(10);
 661         else
 662                 drvdata->stall_ctrl &= ~BIT(10);
 663
 664         /* bit[13], Trace overflow prevention bit */
 665         if ((drvdata->mode & ETM_MODE_NOOVERFLOW) &&
 666                 (drvdata->nooverflow == true))
 667                 drvdata->stall_ctrl |= BIT(13);
 668         else
 669                 drvdata->stall_ctrl &= ~BIT(13);
 670
 671         /* bit[9] Start/stop logic control bit */
 672         if (drvdata->mode & ETM_MODE_VIEWINST_STARTSTOP)
 673                 drvdata->vinst_ctrl |= BIT(9);
 674         else
 675                 drvdata->vinst_ctrl &= ~BIT(9);
 676
 677         /* bit[10], Whether a trace unit must trace a Reset exception */
 678         if (drvdata->mode & ETM_MODE_TRACE_RESET)
 679                 drvdata->vinst_ctrl |= BIT(10);
 680         else
 681                 drvdata->vinst_ctrl &= ~BIT(10);
 682
 683         /* bit[11], Whether a trace unit must trace a system error exception */
 684         if ((drvdata->mode & ETM_MODE_TRACE_ERR) &&
 685                 (drvdata->trc_error == true))
 686                 drvdata->vinst_ctrl |= BIT(11);
 687         else
 688                 drvdata->vinst_ctrl &= ~BIT(11);
 689
 690         spin_unlock(&drvdata->spinlock);
 691         return size;
 692 }
 693 static DEVICE_ATTR_RW(mode);
 694
 695 static ssize_t pe_show(struct device *dev,
 696                        struct device_attribute *attr,
 697                        char *buf)
 698 {
 699         unsigned long val;
 700         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 701
 702         val = drvdata->pe_sel;
 703         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 704 }
 705
 706 static ssize_t pe_store(struct device *dev,
 707                         struct device_attribute *attr,
 708                         const char *buf, size_t size)
 709 {
 710         unsigned long val;
 711         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 712
 713         if (kstrtoul(buf, 16, &val))
 714                 return -EINVAL;
 715
 716         spin_lock(&drvdata->spinlock);
 717         if (val > drvdata->nr_pe) {
 718                 spin_unlock(&drvdata->spinlock);
 719                 return -EINVAL;
 720         }
 721
 722         drvdata->pe_sel = val;
 723         spin_unlock(&drvdata->spinlock);
 724         return size;
 725 }
 726 static DEVICE_ATTR_RW(pe);
 727
 728 static ssize_t event_show(struct device *dev,
 729                           struct device_attribute *attr,
 730                           char *buf)
 731 {
 732         unsigned long val;
 733         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 734
 735         val = drvdata->eventctrl0;
 736         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 737 }
 738
 739 static ssize_t event_store(struct device *dev,
 740                            struct device_attribute *attr,
 741                            const char *buf, size_t size)
 742 {
 743         unsigned long val;
 744         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 745
 746         if (kstrtoul(buf, 16, &val))
 747                 return -EINVAL;
 748
 749         spin_lock(&drvdata->spinlock);
 750         switch (drvdata->nr_event) {
 751         case 0x0:
 752                 /* EVENT0, bits[7:0] */
 753                 drvdata->eventctrl0 = val & 0xFF;
 754                 break;
 755         case 0x1:
 756                  /* EVENT1, bits[15:8] */
 757                 drvdata->eventctrl0 = val & 0xFFFF;
 758                 break;
 759         case 0x2:
 760                 /* EVENT2, bits[23:16] */
 761                 drvdata->eventctrl0 = val & 0xFFFFFF;
 762                 break;
 763         case 0x3:
 764                 /* EVENT3, bits[31:24] */
 765                 drvdata->eventctrl0 = val;
 766                 break;
 767         default:
 768                 break;
 769         }
 770         spin_unlock(&drvdata->spinlock);
 771         return size;
 772 }
 773 static DEVICE_ATTR_RW(event);
 774
 775 static ssize_t event_instren_show(struct device *dev,
 776                                   struct device_attribute *attr,
 777                                   char *buf)
 778 {
 779         unsigned long val;
 780         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 781
 782         val = BMVAL(drvdata->eventctrl1, 0, 3);
 783         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 784 }
 785
 786 static ssize_t event_instren_store(struct device *dev,
 787                                    struct device_attribute *attr,
 788                                    const char *buf, size_t size)
 789 {
 790         unsigned long val;
 791         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 792
 793         if (kstrtoul(buf, 16, &val))
 794                 return -EINVAL;
 795
 796         spin_lock(&drvdata->spinlock);
 797         /* start by clearing all instruction event enable bits */
 798         drvdata->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
 799         switch (drvdata->nr_event) {
 800         case 0x0:
 801                 /* generate Event element for event 1 */
 802                 drvdata->eventctrl1 |= val & BIT(1);
 803                 break;
 804         case 0x1:
 805                 /* generate Event element for event 1 and 2 */
 806                 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1));
 807                 break;
 808         case 0x2:
 809                 /* generate Event element for event 1, 2 and 3 */
 810                 drvdata->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
 811                 break;
 812         case 0x3:
 813                 /* generate Event element for all 4 events */
 814                 drvdata->eventctrl1 |= val & 0xF;
 815                 break;
 816         default:
 817                 break;
 818         }
 819         spin_unlock(&drvdata->spinlock);
 820         return size;
 821 }
 822 static DEVICE_ATTR_RW(event_instren);
 823
 824 static ssize_t event_ts_show(struct device *dev,
 825                              struct device_attribute *attr,
 826                              char *buf)
 827 {
 828         unsigned long val;
 829         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 830
 831         val = drvdata->ts_ctrl;
 832         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 833 }
 834
 835 static ssize_t event_ts_store(struct device *dev,
 836                               struct device_attribute *attr,
 837                               const char *buf, size_t size)
 838 {
 839         unsigned long val;
 840         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 841
 842         if (kstrtoul(buf, 16, &val))
 843                 return -EINVAL;
 844         if (!drvdata->ts_size)
 845                 return -EINVAL;
 846
 847         drvdata->ts_ctrl = val & ETMv4_EVENT_MASK;
 848         return size;
 849 }
 850 static DEVICE_ATTR_RW(event_ts);
 851
 852 static ssize_t syncfreq_show(struct device *dev,
 853                              struct device_attribute *attr,
 854                              char *buf)
 855 {
 856         unsigned long val;
 857         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 858
 859         val = drvdata->syncfreq;
 860         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 861 }
 862
 863 static ssize_t syncfreq_store(struct device *dev,
 864                               struct device_attribute *attr,
 865                               const char *buf, size_t size)
 866 {
 867         unsigned long val;
 868         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 869
 870         if (kstrtoul(buf, 16, &val))
 871                 return -EINVAL;
 872         if (drvdata->syncpr == true)
 873                 return -EINVAL;
 874
 875         drvdata->syncfreq = val & ETMv4_SYNC_MASK;
 876         return size;
 877 }
 878 static DEVICE_ATTR_RW(syncfreq);
 879
 880 static ssize_t cyc_threshold_show(struct device *dev,
 881                                   struct device_attribute *attr,
 882                                   char *buf)
 883 {
 884         unsigned long val;
 885         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 886
 887         val = drvdata->ccctlr;
 888         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 889 }
 890
 891 static ssize_t cyc_threshold_store(struct device *dev,
 892                                    struct device_attribute *attr,
 893                                    const char *buf, size_t size)
 894 {
 895         unsigned long val;
 896         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 897
 898         if (kstrtoul(buf, 16, &val))
 899                 return -EINVAL;
 900         if (val < drvdata->ccitmin)
 901                 return -EINVAL;
 902
 903         drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
 904         return size;
 905 }
 906 static DEVICE_ATTR_RW(cyc_threshold);
 907
 908 static ssize_t bb_ctrl_show(struct device *dev,
 909                             struct device_attribute *attr,
 910                             char *buf)
 911 {
 912         unsigned long val;
 913         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 914
 915         val = drvdata->bb_ctrl;
 916         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 917 }
 918
 919 static ssize_t bb_ctrl_store(struct device *dev,
 920                              struct device_attribute *attr,
 921                              const char *buf, size_t size)
 922 {
 923         unsigned long val;
 924         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 925
 926         if (kstrtoul(buf, 16, &val))
 927                 return -EINVAL;
 928         if (drvdata->trcbb == false)
 929                 return -EINVAL;
 930         if (!drvdata->nr_addr_cmp)
 931                 return -EINVAL;
 932         /*
 933          * Bit[7:0] selects which address range comparator is used for
 934          * branch broadcast control.
 935          */
 936         if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
 937                 return -EINVAL;
 938
 939         drvdata->bb_ctrl = val;
 940         return size;
 941 }
 942 static DEVICE_ATTR_RW(bb_ctrl);
 943
 944 static ssize_t event_vinst_show(struct device *dev,
 945                                 struct device_attribute *attr,
 946                                 char *buf)
 947 {
 948         unsigned long val;
 949         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 950
 951         val = drvdata->vinst_ctrl & ETMv4_EVENT_MASK;
 952         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 953 }
 954
 955 static ssize_t event_vinst_store(struct device *dev,
 956                                  struct device_attribute *attr,
 957                                  const char *buf, size_t size)
 958 {
 959         unsigned long val;
 960         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 961
 962         if (kstrtoul(buf, 16, &val))
 963                 return -EINVAL;
 964
 965         spin_lock(&drvdata->spinlock);
 966         val &= ETMv4_EVENT_MASK;
 967         drvdata->vinst_ctrl &= ~ETMv4_EVENT_MASK;
 968         drvdata->vinst_ctrl |= val;
 969         spin_unlock(&drvdata->spinlock);
 970         return size;
 971 }
 972 static DEVICE_ATTR_RW(event_vinst);
 973
 974 static ssize_t s_exlevel_vinst_show(struct device *dev,
 975                                     struct device_attribute *attr,
 976                                     char *buf)
 977 {
 978         unsigned long val;
 979         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 980
 981         val = BMVAL(drvdata->vinst_ctrl, 16, 19);
 982         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
 983 }
 984
 985 static ssize_t s_exlevel_vinst_store(struct device *dev,
 986                                      struct device_attribute *attr,
 987                                      const char *buf, size_t size)
 988 {
 989         unsigned long val;
 990         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
 991
 992         if (kstrtoul(buf, 16, &val))
 993                 return -EINVAL;
 994
 995         spin_lock(&drvdata->spinlock);
 996         /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
 997         drvdata->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
 998         /* enable instruction tracing for corresponding exception level */
 999         val &= drvdata->s_ex_level;
1000         drvdata->vinst_ctrl |= (val << 16);
1001         spin_unlock(&drvdata->spinlock);
1002         return size;
1003 }
1004 static DEVICE_ATTR_RW(s_exlevel_vinst);
1005
1006 static ssize_t ns_exlevel_vinst_show(struct device *dev,
1007                                      struct device_attribute *attr,
1008                                      char *buf)
1009 {
1010         unsigned long val;
1011         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1012
1013         /* EXLEVEL_NS, bits[23:20] */
1014         val = BMVAL(drvdata->vinst_ctrl, 20, 23);
1015         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1016 }
1017
1018 static ssize_t ns_exlevel_vinst_store(struct device *dev,
1019                                       struct device_attribute *attr,
1020                                       const char *buf, size_t size)
1021 {
1022         unsigned long val;
1023         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1024
1025         if (kstrtoul(buf, 16, &val))
1026                 return -EINVAL;
1027
1028         spin_lock(&drvdata->spinlock);
1029         /* clear EXLEVEL_NS bits (bit[23] is never implemented */
1030         drvdata->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
1031         /* enable instruction tracing for corresponding exception level */
1032         val &= drvdata->ns_ex_level;
1033         drvdata->vinst_ctrl |= (val << 20);
1034         spin_unlock(&drvdata->spinlock);
1035         return size;
1036 }
1037 static DEVICE_ATTR_RW(ns_exlevel_vinst);
1038
1039 static ssize_t addr_idx_show(struct device *dev,
1040                              struct device_attribute *attr,
1041                              char *buf)
1042 {
1043         unsigned long val;
1044         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1045
1046         val = drvdata->addr_idx;
1047         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1048 }
1049
1050 static ssize_t addr_idx_store(struct device *dev,
1051                               struct device_attribute *attr,
1052                               const char *buf, size_t size)
1053 {
1054         unsigned long val;
1055         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1056
1057         if (kstrtoul(buf, 16, &val))
1058                 return -EINVAL;
1059         if (val >= drvdata->nr_addr_cmp * 2)
1060                 return -EINVAL;
1061
1062         /*
1063          * Use spinlock to ensure index doesn't change while it gets
1064          * dereferenced multiple times within a spinlock block elsewhere.
1065          */
1066         spin_lock(&drvdata->spinlock);
1067         drvdata->addr_idx = val;
1068         spin_unlock(&drvdata->spinlock);
1069         return size;
1070 }
1071 static DEVICE_ATTR_RW(addr_idx);
1072
1073 static ssize_t addr_instdatatype_show(struct device *dev,
1074                                       struct device_attribute *attr,
1075                                       char *buf)
1076 {
1077         ssize_t len;
1078         u8 val, idx;
1079         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1080
1081         spin_lock(&drvdata->spinlock);
1082         idx = drvdata->addr_idx;
1083         val = BMVAL(drvdata->addr_acc[idx], 0, 1);
1084         len = scnprintf(buf, PAGE_SIZE, "%s\n",
1085                         val == ETM_INSTR_ADDR ? "instr" :
1086                         (val == ETM_DATA_LOAD_ADDR ? "data_load" :
1087                         (val == ETM_DATA_STORE_ADDR ? "data_store" :
1088                         "data_load_store")));
1089         spin_unlock(&drvdata->spinlock);
1090         return len;
1091 }
1092
1093 static ssize_t addr_instdatatype_store(struct device *dev,
1094                                        struct device_attribute *attr,
1095                                        const char *buf, size_t size)
1096 {
1097         u8 idx;
1098         char str[20] = "";
1099         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1100
1101         if (strlen(buf) >= 20)
1102                 return -EINVAL;
1103         if (sscanf(buf, "%s", str) != 1)
1104                 return -EINVAL;
1105
1106         spin_lock(&drvdata->spinlock);
1107         idx = drvdata->addr_idx;
1108         if (!strcmp(str, "instr"))
1109                 /* TYPE, bits[1:0] */
1110                 drvdata->addr_acc[idx] &= ~(BIT(0) | BIT(1));
1111
1112         spin_unlock(&drvdata->spinlock);
1113         return size;
1114 }
1115 static DEVICE_ATTR_RW(addr_instdatatype);
1116
1117 static ssize_t addr_single_show(struct device *dev,
1118                                 struct device_attribute *attr,
1119                                 char *buf)
1120 {
1121         u8 idx;
1122         unsigned long val;
1123         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1124
1125         idx = drvdata->addr_idx;
1126         spin_lock(&drvdata->spinlock);
1127         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1128               drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1129                 spin_unlock(&drvdata->spinlock);
1130                 return -EPERM;
1131         }
1132         val = (unsigned long)drvdata->addr_val[idx];
1133         spin_unlock(&drvdata->spinlock);
1134         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1135 }
1136
1137 static ssize_t addr_single_store(struct device *dev,
1138                                  struct device_attribute *attr,
1139                                  const char *buf, size_t size)
1140 {
1141         u8 idx;
1142         unsigned long val;
1143         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1144
1145         if (kstrtoul(buf, 16, &val))
1146                 return -EINVAL;
1147
1148         spin_lock(&drvdata->spinlock);
1149         idx = drvdata->addr_idx;
1150         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1151               drvdata->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
1152                 spin_unlock(&drvdata->spinlock);
1153                 return -EPERM;
1154         }
1155
1156         drvdata->addr_val[idx] = (u64)val;
1157         drvdata->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
1158         spin_unlock(&drvdata->spinlock);
1159         return size;
1160 }
1161 static DEVICE_ATTR_RW(addr_single);
1162
1163 static ssize_t addr_range_show(struct device *dev,
1164                                struct device_attribute *attr,
1165                                char *buf)
1166 {
1167         u8 idx;
1168         unsigned long val1, val2;
1169         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1170
1171         spin_lock(&drvdata->spinlock);
1172         idx = drvdata->addr_idx;
1173         if (idx % 2 != 0) {
1174                 spin_unlock(&drvdata->spinlock);
1175                 return -EPERM;
1176         }
1177         if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1178                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1179               (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1180                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1181                 spin_unlock(&drvdata->spinlock);
1182                 return -EPERM;
1183         }
1184
1185         val1 = (unsigned long)drvdata->addr_val[idx];
1186         val2 = (unsigned long)drvdata->addr_val[idx + 1];
1187         spin_unlock(&drvdata->spinlock);
1188         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1189 }
1190
1191 static ssize_t addr_range_store(struct device *dev,
1192                                 struct device_attribute *attr,
1193                                 const char *buf, size_t size)
1194 {
1195         u8 idx;
1196         unsigned long val1, val2;
1197         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1198
1199         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1200                 return -EINVAL;
1201         /* lower address comparator cannot have a higher address value */
1202         if (val1 > val2)
1203                 return -EINVAL;
1204
1205         spin_lock(&drvdata->spinlock);
1206         idx = drvdata->addr_idx;
1207         if (idx % 2 != 0) {
1208                 spin_unlock(&drvdata->spinlock);
1209                 return -EPERM;
1210         }
1211
1212         if (!((drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1213                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1214               (drvdata->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1215                drvdata->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1216                 spin_unlock(&drvdata->spinlock);
1217                 return -EPERM;
1218         }
1219
1220         drvdata->addr_val[idx] = (u64)val1;
1221         drvdata->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
1222         drvdata->addr_val[idx + 1] = (u64)val2;
1223         drvdata->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
1224         /*
1225          * Program include or exclude control bits for vinst or vdata
1226          * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
1227          */
1228         if (drvdata->mode & ETM_MODE_EXCLUDE)
1229                 etm4_set_mode_exclude(drvdata, true);
1230         else
1231                 etm4_set_mode_exclude(drvdata, false);
1232
1233         spin_unlock(&drvdata->spinlock);
1234         return size;
1235 }
1236 static DEVICE_ATTR_RW(addr_range);
1237
1238 static ssize_t addr_start_show(struct device *dev,
1239                                struct device_attribute *attr,
1240                                char *buf)
1241 {
1242         u8 idx;
1243         unsigned long val;
1244         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1245
1246         spin_lock(&drvdata->spinlock);
1247         idx = drvdata->addr_idx;
1248
1249         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1250               drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1251                 spin_unlock(&drvdata->spinlock);
1252                 return -EPERM;
1253         }
1254
1255         val = (unsigned long)drvdata->addr_val[idx];
1256         spin_unlock(&drvdata->spinlock);
1257         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1258 }
1259
1260 static ssize_t addr_start_store(struct device *dev,
1261                                 struct device_attribute *attr,
1262                                 const char *buf, size_t size)
1263 {
1264         u8 idx;
1265         unsigned long val;
1266         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1267
1268         if (kstrtoul(buf, 16, &val))
1269                 return -EINVAL;
1270
1271         spin_lock(&drvdata->spinlock);
1272         idx = drvdata->addr_idx;
1273         if (!drvdata->nr_addr_cmp) {
1274                 spin_unlock(&drvdata->spinlock);
1275                 return -EINVAL;
1276         }
1277         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1278               drvdata->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1279                 spin_unlock(&drvdata->spinlock);
1280                 return -EPERM;
1281         }
1282
1283         drvdata->addr_val[idx] = (u64)val;
1284         drvdata->addr_type[idx] = ETM_ADDR_TYPE_START;
1285         drvdata->vissctlr |= BIT(idx);
1286         /* SSSTATUS, bit[9] - turn on start/stop logic */
1287         drvdata->vinst_ctrl |= BIT(9);
1288         spin_unlock(&drvdata->spinlock);
1289         return size;
1290 }
1291 static DEVICE_ATTR_RW(addr_start);
1292
1293 static ssize_t addr_stop_show(struct device *dev,
1294                               struct device_attribute *attr,
1295                               char *buf)
1296 {
1297         u8 idx;
1298         unsigned long val;
1299         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1300
1301         spin_lock(&drvdata->spinlock);
1302         idx = drvdata->addr_idx;
1303
1304         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1305               drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1306                 spin_unlock(&drvdata->spinlock);
1307                 return -EPERM;
1308         }
1309
1310         val = (unsigned long)drvdata->addr_val[idx];
1311         spin_unlock(&drvdata->spinlock);
1312         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1313 }
1314
1315 static ssize_t addr_stop_store(struct device *dev,
1316                                struct device_attribute *attr,
1317                                const char *buf, size_t size)
1318 {
1319         u8 idx;
1320         unsigned long val;
1321         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1322
1323         if (kstrtoul(buf, 16, &val))
1324                 return -EINVAL;
1325
1326         spin_lock(&drvdata->spinlock);
1327         idx = drvdata->addr_idx;
1328         if (!drvdata->nr_addr_cmp) {
1329                 spin_unlock(&drvdata->spinlock);
1330                 return -EINVAL;
1331         }
1332         if (!(drvdata->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1333                drvdata->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1334                 spin_unlock(&drvdata->spinlock);
1335                 return -EPERM;
1336         }
1337
1338         drvdata->addr_val[idx] = (u64)val;
1339         drvdata->addr_type[idx] = ETM_ADDR_TYPE_STOP;
1340         drvdata->vissctlr |= BIT(idx + 16);
1341         /* SSSTATUS, bit[9] - turn on start/stop logic */
1342         drvdata->vinst_ctrl |= BIT(9);
1343         spin_unlock(&drvdata->spinlock);
1344         return size;
1345 }
1346 static DEVICE_ATTR_RW(addr_stop);
1347
1348 static ssize_t addr_ctxtype_show(struct device *dev,
1349                                  struct device_attribute *attr,
1350                                  char *buf)
1351 {
1352         ssize_t len;
1353         u8 idx, val;
1354         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1355
1356         spin_lock(&drvdata->spinlock);
1357         idx = drvdata->addr_idx;
1358         /* CONTEXTTYPE, bits[3:2] */
1359         val = BMVAL(drvdata->addr_acc[idx], 2, 3);
1360         len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
1361                         (val == ETM_CTX_CTXID ? "ctxid" :
1362                         (val == ETM_CTX_VMID ? "vmid" : "all")));
1363         spin_unlock(&drvdata->spinlock);
1364         return len;
1365 }
1366
1367 static ssize_t addr_ctxtype_store(struct device *dev,
1368                                   struct device_attribute *attr,
1369                                   const char *buf, size_t size)
1370 {
1371         u8 idx;
1372         char str[10] = "";
1373         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1374
1375         if (strlen(buf) >= 10)
1376                 return -EINVAL;
1377         if (sscanf(buf, "%s", str) != 1)
1378                 return -EINVAL;
1379
1380         spin_lock(&drvdata->spinlock);
1381         idx = drvdata->addr_idx;
1382         if (!strcmp(str, "none"))
1383                 /* start by clearing context type bits */
1384                 drvdata->addr_acc[idx] &= ~(BIT(2) | BIT(3));
1385         else if (!strcmp(str, "ctxid")) {
1386                 /* 0b01 The trace unit performs a Context ID */
1387                 if (drvdata->numcidc) {
1388                         drvdata->addr_acc[idx] |= BIT(2);
1389                         drvdata->addr_acc[idx] &= ~BIT(3);
1390                 }
1391         } else if (!strcmp(str, "vmid")) {
1392                 /* 0b10 The trace unit performs a VMID */
1393                 if (drvdata->numvmidc) {
1394                         drvdata->addr_acc[idx] &= ~BIT(2);
1395                         drvdata->addr_acc[idx] |= BIT(3);
1396                 }
1397         } else if (!strcmp(str, "all")) {
1398                 /*
1399                  * 0b11 The trace unit performs a Context ID
1400                  * comparison and a VMID
1401                  */
1402                 if (drvdata->numcidc)
1403                         drvdata->addr_acc[idx] |= BIT(2);
1404                 if (drvdata->numvmidc)
1405                         drvdata->addr_acc[idx] |= BIT(3);
1406         }
1407         spin_unlock(&drvdata->spinlock);
1408         return size;
1409 }
1410 static DEVICE_ATTR_RW(addr_ctxtype);
1411
1412 static ssize_t addr_context_show(struct device *dev,
1413                                  struct device_attribute *attr,
1414                                  char *buf)
1415 {
1416         u8 idx;
1417         unsigned long val;
1418         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1419
1420         spin_lock(&drvdata->spinlock);
1421         idx = drvdata->addr_idx;
1422         /* context ID comparator bits[6:4] */
1423         val = BMVAL(drvdata->addr_acc[idx], 4, 6);
1424         spin_unlock(&drvdata->spinlock);
1425         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1426 }
1427
1428 static ssize_t addr_context_store(struct device *dev,
1429                                   struct device_attribute *attr,
1430                                   const char *buf, size_t size)
1431 {
1432         u8 idx;
1433         unsigned long val;
1434         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1435
1436         if (kstrtoul(buf, 16, &val))
1437                 return -EINVAL;
1438         if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
1439                 return -EINVAL;
1440         if (val >=  (drvdata->numcidc >= drvdata->numvmidc ?
1441                      drvdata->numcidc : drvdata->numvmidc))
1442                 return -EINVAL;
1443
1444         spin_lock(&drvdata->spinlock);
1445         idx = drvdata->addr_idx;
1446         /* clear context ID comparator bits[6:4] */
1447         drvdata->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
1448         drvdata->addr_acc[idx] |= (val << 4);
1449         spin_unlock(&drvdata->spinlock);
1450         return size;
1451 }
1452 static DEVICE_ATTR_RW(addr_context);
1453
1454 static ssize_t seq_idx_show(struct device *dev,
1455                             struct device_attribute *attr,
1456                             char *buf)
1457 {
1458         unsigned long val;
1459         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1460
1461         val = drvdata->seq_idx;
1462         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1463 }
1464
1465 static ssize_t seq_idx_store(struct device *dev,
1466                              struct device_attribute *attr,
1467                              const char *buf, size_t size)
1468 {
1469         unsigned long val;
1470         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1471
1472         if (kstrtoul(buf, 16, &val))
1473                 return -EINVAL;
1474         if (val >= drvdata->nrseqstate - 1)
1475                 return -EINVAL;
1476
1477         /*
1478          * Use spinlock to ensure index doesn't change while it gets
1479          * dereferenced multiple times within a spinlock block elsewhere.
1480          */
1481         spin_lock(&drvdata->spinlock);
1482         drvdata->seq_idx = val;
1483         spin_unlock(&drvdata->spinlock);
1484         return size;
1485 }
1486 static DEVICE_ATTR_RW(seq_idx);
1487
1488 static ssize_t seq_state_show(struct device *dev,
1489                               struct device_attribute *attr,
1490                               char *buf)
1491 {
1492         unsigned long val;
1493         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1494
1495         val = drvdata->seq_state;
1496         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1497 }
1498
1499 static ssize_t seq_state_store(struct device *dev,
1500                                struct device_attribute *attr,
1501                                const char *buf, size_t size)
1502 {
1503         unsigned long val;
1504         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1505
1506         if (kstrtoul(buf, 16, &val))
1507                 return -EINVAL;
1508         if (val >= drvdata->nrseqstate)
1509                 return -EINVAL;
1510
1511         drvdata->seq_state = val;
1512         return size;
1513 }
1514 static DEVICE_ATTR_RW(seq_state);
1515
1516 static ssize_t seq_event_show(struct device *dev,
1517                               struct device_attribute *attr,
1518                               char *buf)
1519 {
1520         u8 idx;
1521         unsigned long val;
1522         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1523
1524         spin_lock(&drvdata->spinlock);
1525         idx = drvdata->seq_idx;
1526         val = drvdata->seq_ctrl[idx];
1527         spin_unlock(&drvdata->spinlock);
1528         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1529 }
1530
1531 static ssize_t seq_event_store(struct device *dev,
1532                                struct device_attribute *attr,
1533                                const char *buf, size_t size)
1534 {
1535         u8 idx;
1536         unsigned long val;
1537         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1538
1539         if (kstrtoul(buf, 16, &val))
1540                 return -EINVAL;
1541
1542         spin_lock(&drvdata->spinlock);
1543         idx = drvdata->seq_idx;
1544         /* RST, bits[7:0] */
1545         drvdata->seq_ctrl[idx] = val & 0xFF;
1546         spin_unlock(&drvdata->spinlock);
1547         return size;
1548 }
1549 static DEVICE_ATTR_RW(seq_event);
1550
1551 static ssize_t seq_reset_event_show(struct device *dev,
1552                                     struct device_attribute *attr,
1553                                     char *buf)
1554 {
1555         unsigned long val;
1556         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1557
1558         val = drvdata->seq_rst;
1559         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1560 }
1561
1562 static ssize_t seq_reset_event_store(struct device *dev,
1563                                      struct device_attribute *attr,
1564                                      const char *buf, size_t size)
1565 {
1566         unsigned long val;
1567         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1568
1569         if (kstrtoul(buf, 16, &val))
1570                 return -EINVAL;
1571         if (!(drvdata->nrseqstate))
1572                 return -EINVAL;
1573
1574         drvdata->seq_rst = val & ETMv4_EVENT_MASK;
1575         return size;
1576 }
1577 static DEVICE_ATTR_RW(seq_reset_event);
1578
1579 static ssize_t cntr_idx_show(struct device *dev,
1580                              struct device_attribute *attr,
1581                              char *buf)
1582 {
1583         unsigned long val;
1584         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1585
1586         val = drvdata->cntr_idx;
1587         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1588 }
1589
1590 static ssize_t cntr_idx_store(struct device *dev,
1591                               struct device_attribute *attr,
1592                               const char *buf, size_t size)
1593 {
1594         unsigned long val;
1595         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1596
1597         if (kstrtoul(buf, 16, &val))
1598                 return -EINVAL;
1599         if (val >= drvdata->nr_cntr)
1600                 return -EINVAL;
1601
1602         /*
1603          * Use spinlock to ensure index doesn't change while it gets
1604          * dereferenced multiple times within a spinlock block elsewhere.
1605          */
1606         spin_lock(&drvdata->spinlock);
1607         drvdata->cntr_idx = val;
1608         spin_unlock(&drvdata->spinlock);
1609         return size;
1610 }
1611 static DEVICE_ATTR_RW(cntr_idx);
1612
1613 static ssize_t cntrldvr_show(struct device *dev,
1614                              struct device_attribute *attr,
1615                              char *buf)
1616 {
1617         u8 idx;
1618         unsigned long val;
1619         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1620
1621         spin_lock(&drvdata->spinlock);
1622         idx = drvdata->cntr_idx;
1623         val = drvdata->cntrldvr[idx];
1624         spin_unlock(&drvdata->spinlock);
1625         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1626 }
1627
1628 static ssize_t cntrldvr_store(struct device *dev,
1629                               struct device_attribute *attr,
1630                               const char *buf, size_t size)
1631 {
1632         u8 idx;
1633         unsigned long val;
1634         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1635
1636         if (kstrtoul(buf, 16, &val))
1637                 return -EINVAL;
1638         if (val > ETM_CNTR_MAX_VAL)
1639                 return -EINVAL;
1640
1641         spin_lock(&drvdata->spinlock);
1642         idx = drvdata->cntr_idx;
1643         drvdata->cntrldvr[idx] = val;
1644         spin_unlock(&drvdata->spinlock);
1645         return size;
1646 }
1647 static DEVICE_ATTR_RW(cntrldvr);
1648
1649 static ssize_t cntr_val_show(struct device *dev,
1650                              struct device_attribute *attr,
1651                              char *buf)
1652 {
1653         u8 idx;
1654         unsigned long val;
1655         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1656
1657         spin_lock(&drvdata->spinlock);
1658         idx = drvdata->cntr_idx;
1659         val = drvdata->cntr_val[idx];
1660         spin_unlock(&drvdata->spinlock);
1661         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1662 }
1663
1664 static ssize_t cntr_val_store(struct device *dev,
1665                               struct device_attribute *attr,
1666                               const char *buf, size_t size)
1667 {
1668         u8 idx;
1669         unsigned long val;
1670         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1671
1672         if (kstrtoul(buf, 16, &val))
1673                 return -EINVAL;
1674         if (val > ETM_CNTR_MAX_VAL)
1675                 return -EINVAL;
1676
1677         spin_lock(&drvdata->spinlock);
1678         idx = drvdata->cntr_idx;
1679         drvdata->cntr_val[idx] = val;
1680         spin_unlock(&drvdata->spinlock);
1681         return size;
1682 }
1683 static DEVICE_ATTR_RW(cntr_val);
1684
1685 static ssize_t cntr_ctrl_show(struct device *dev,
1686                               struct device_attribute *attr,
1687                               char *buf)
1688 {
1689         u8 idx;
1690         unsigned long val;
1691         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1692
1693         spin_lock(&drvdata->spinlock);
1694         idx = drvdata->cntr_idx;
1695         val = drvdata->cntr_ctrl[idx];
1696         spin_unlock(&drvdata->spinlock);
1697         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1698 }
1699
1700 static ssize_t cntr_ctrl_store(struct device *dev,
1701                                struct device_attribute *attr,
1702                                const char *buf, size_t size)
1703 {
1704         u8 idx;
1705         unsigned long val;
1706         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1707
1708         if (kstrtoul(buf, 16, &val))
1709                 return -EINVAL;
1710
1711         spin_lock(&drvdata->spinlock);
1712         idx = drvdata->cntr_idx;
1713         drvdata->cntr_ctrl[idx] = val;
1714         spin_unlock(&drvdata->spinlock);
1715         return size;
1716 }
1717 static DEVICE_ATTR_RW(cntr_ctrl);
1718
1719 static ssize_t res_idx_show(struct device *dev,
1720                             struct device_attribute *attr,
1721                             char *buf)
1722 {
1723         unsigned long val;
1724         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1725
1726         val = drvdata->res_idx;
1727         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1728 }
1729
1730 static ssize_t res_idx_store(struct device *dev,
1731                              struct device_attribute *attr,
1732                              const char *buf, size_t size)
1733 {
1734         unsigned long val;
1735         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1736
1737         if (kstrtoul(buf, 16, &val))
1738                 return -EINVAL;
1739         /* Resource selector pair 0 is always implemented and reserved */
1740         if (val < 2 || val >= drvdata->nr_resource * 2)
1741                 return -EINVAL;
1742
1743         /*
1744          * Use spinlock to ensure index doesn't change while it gets
1745          * dereferenced multiple times within a spinlock block elsewhere.
1746          */
1747         spin_lock(&drvdata->spinlock);
1748         drvdata->res_idx = val;
1749         spin_unlock(&drvdata->spinlock);
1750         return size;
1751 }
1752 static DEVICE_ATTR_RW(res_idx);
1753
1754 static ssize_t res_ctrl_show(struct device *dev,
1755                              struct device_attribute *attr,
1756                              char *buf)
1757 {
1758         u8 idx;
1759         unsigned long val;
1760         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1761
1762         spin_lock(&drvdata->spinlock);
1763         idx = drvdata->res_idx;
1764         val = drvdata->res_ctrl[idx];
1765         spin_unlock(&drvdata->spinlock);
1766         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1767 }
1768
1769 static ssize_t res_ctrl_store(struct device *dev,
1770                               struct device_attribute *attr,
1771                               const char *buf, size_t size)
1772 {
1773         u8 idx;
1774         unsigned long val;
1775         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1776
1777         if (kstrtoul(buf, 16, &val))
1778                 return -EINVAL;
1779
1780         spin_lock(&drvdata->spinlock);
1781         idx = drvdata->res_idx;
1782         /* For odd idx pair inversal bit is RES0 */
1783         if (idx % 2 != 0)
1784                 /* PAIRINV, bit[21] */
1785                 val &= ~BIT(21);
1786         drvdata->res_ctrl[idx] = val;
1787         spin_unlock(&drvdata->spinlock);
1788         return size;
1789 }
1790 static DEVICE_ATTR_RW(res_ctrl);
1791
1792 static ssize_t ctxid_idx_show(struct device *dev,
1793                               struct device_attribute *attr,
1794                               char *buf)
1795 {
1796         unsigned long val;
1797         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1798
1799         val = drvdata->ctxid_idx;
1800         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1801 }
1802
1803 static ssize_t ctxid_idx_store(struct device *dev,
1804                                struct device_attribute *attr,
1805                                const char *buf, size_t size)
1806 {
1807         unsigned long val;
1808         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1809
1810         if (kstrtoul(buf, 16, &val))
1811                 return -EINVAL;
1812         if (val >= drvdata->numcidc)
1813                 return -EINVAL;
1814
1815         /*
1816          * Use spinlock to ensure index doesn't change while it gets
1817          * dereferenced multiple times within a spinlock block elsewhere.
1818          */
1819         spin_lock(&drvdata->spinlock);
1820         drvdata->ctxid_idx = val;
1821         spin_unlock(&drvdata->spinlock);
1822         return size;
1823 }
1824 static DEVICE_ATTR_RW(ctxid_idx);
1825
1826 static ssize_t ctxid_pid_show(struct device *dev,
1827                               struct device_attribute *attr,
1828                               char *buf)
1829 {
1830         u8 idx;
1831         unsigned long val;
1832         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1833
1834         spin_lock(&drvdata->spinlock);
1835         idx = drvdata->ctxid_idx;
1836         val = (unsigned long)drvdata->ctxid_vpid[idx];
1837         spin_unlock(&drvdata->spinlock);
1838         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1839 }
1840
1841 static ssize_t ctxid_pid_store(struct device *dev,
1842                                struct device_attribute *attr,
1843                                const char *buf, size_t size)
1844 {
1845         u8 idx;
1846         unsigned long vpid, pid;
1847         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1848
1849         /*
1850          * only implemented when ctxid tracing is enabled, i.e. at least one
1851          * ctxid comparator is implemented and ctxid is greater than 0 bits
1852          * in length
1853          */
1854         if (!drvdata->ctxid_size || !drvdata->numcidc)
1855                 return -EINVAL;
1856         if (kstrtoul(buf, 16, &vpid))
1857                 return -EINVAL;
1858
1859         pid = coresight_vpid_to_pid(vpid);
1860
1861         spin_lock(&drvdata->spinlock);
1862         idx = drvdata->ctxid_idx;
1863         drvdata->ctxid_pid[idx] = (u64)pid;
1864         drvdata->ctxid_vpid[idx] = (u64)vpid;
1865         spin_unlock(&drvdata->spinlock);
1866         return size;
1867 }
1868 static DEVICE_ATTR_RW(ctxid_pid);
1869
1870 static ssize_t ctxid_masks_show(struct device *dev,
1871                                 struct device_attribute *attr,
1872                                 char *buf)
1873 {
1874         unsigned long val1, val2;
1875         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1876
1877         spin_lock(&drvdata->spinlock);
1878         val1 = drvdata->ctxid_mask0;
1879         val2 = drvdata->ctxid_mask1;
1880         spin_unlock(&drvdata->spinlock);
1881         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1882 }
1883
1884 static ssize_t ctxid_masks_store(struct device *dev,
1885                                 struct device_attribute *attr,
1886                                 const char *buf, size_t size)
1887 {
1888         u8 i, j, maskbyte;
1889         unsigned long val1, val2, mask;
1890         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1891
1892         /*
1893          * only implemented when ctxid tracing is enabled, i.e. at least one
1894          * ctxid comparator is implemented and ctxid is greater than 0 bits
1895          * in length
1896          */
1897         if (!drvdata->ctxid_size || !drvdata->numcidc)
1898                 return -EINVAL;
1899         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
1900                 return -EINVAL;
1901
1902         spin_lock(&drvdata->spinlock);
1903         /*
1904          * each byte[0..3] controls mask value applied to ctxid
1905          * comparator[0..3]
1906          */
1907         switch (drvdata->numcidc) {
1908         case 0x1:
1909                 /* COMP0, bits[7:0] */
1910                 drvdata->ctxid_mask0 = val1 & 0xFF;
1911                 break;
1912         case 0x2:
1913                 /* COMP1, bits[15:8] */
1914                 drvdata->ctxid_mask0 = val1 & 0xFFFF;
1915                 break;
1916         case 0x3:
1917                 /* COMP2, bits[23:16] */
1918                 drvdata->ctxid_mask0 = val1 & 0xFFFFFF;
1919                 break;
1920         case 0x4:
1921                  /* COMP3, bits[31:24] */
1922                 drvdata->ctxid_mask0 = val1;
1923                 break;
1924         case 0x5:
1925                 /* COMP4, bits[7:0] */
1926                 drvdata->ctxid_mask0 = val1;
1927                 drvdata->ctxid_mask1 = val2 & 0xFF;
1928                 break;
1929         case 0x6:
1930                 /* COMP5, bits[15:8] */
1931                 drvdata->ctxid_mask0 = val1;
1932                 drvdata->ctxid_mask1 = val2 & 0xFFFF;
1933                 break;
1934         case 0x7:
1935                 /* COMP6, bits[23:16] */
1936                 drvdata->ctxid_mask0 = val1;
1937                 drvdata->ctxid_mask1 = val2 & 0xFFFFFF;
1938                 break;
1939         case 0x8:
1940                 /* COMP7, bits[31:24] */
1941                 drvdata->ctxid_mask0 = val1;
1942                 drvdata->ctxid_mask1 = val2;
1943                 break;
1944         default:
1945                 break;
1946         }
1947         /*
1948          * If software sets a mask bit to 1, it must program relevant byte
1949          * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
1950          * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
1951          * of ctxid comparator0 value (corresponding to byte 0) register.
1952          */
1953         mask = drvdata->ctxid_mask0;
1954         for (i = 0; i < drvdata->numcidc; i++) {
1955                 /* mask value of corresponding ctxid comparator */
1956                 maskbyte = mask & ETMv4_EVENT_MASK;
1957                 /*
1958                  * each bit corresponds to a byte of respective ctxid comparator
1959                  * value register
1960                  */
1961                 for (j = 0; j < 8; j++) {
1962                         if (maskbyte & 1)
1963                                 drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
1964                         maskbyte >>= 1;
1965                 }
1966                 /* Select the next ctxid comparator mask value */
1967                 if (i == 3)
1968                         /* ctxid comparators[4-7] */
1969                         mask = drvdata->ctxid_mask1;
1970                 else
1971                         mask >>= 0x8;
1972         }
1973
1974         spin_unlock(&drvdata->spinlock);
1975         return size;
1976 }
1977 static DEVICE_ATTR_RW(ctxid_masks);
1978
1979 static ssize_t vmid_idx_show(struct device *dev,
1980                              struct device_attribute *attr,
1981                              char *buf)
1982 {
1983         unsigned long val;
1984         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1985
1986         val = drvdata->vmid_idx;
1987         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1988 }
1989
1990 static ssize_t vmid_idx_store(struct device *dev,
1991                               struct device_attribute *attr,
1992                               const char *buf, size_t size)
1993 {
1994         unsigned long val;
1995         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1996
1997         if (kstrtoul(buf, 16, &val))
1998                 return -EINVAL;
1999         if (val >= drvdata->numvmidc)
2000                 return -EINVAL;
2001
2002         /*
2003          * Use spinlock to ensure index doesn't change while it gets
2004          * dereferenced multiple times within a spinlock block elsewhere.
2005          */
2006         spin_lock(&drvdata->spinlock);
2007         drvdata->vmid_idx = val;
2008         spin_unlock(&drvdata->spinlock);
2009         return size;
2010 }
2011 static DEVICE_ATTR_RW(vmid_idx);
2012
2013 static ssize_t vmid_val_show(struct device *dev,
2014                              struct device_attribute *attr,
2015                              char *buf)
2016 {
2017         unsigned long val;
2018         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2019
2020         val = (unsigned long)drvdata->vmid_val[drvdata->vmid_idx];
2021         return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2022 }
2023
2024 static ssize_t vmid_val_store(struct device *dev,
2025                               struct device_attribute *attr,
2026                               const char *buf, size_t size)
2027 {
2028         unsigned long val;
2029         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2030
2031         /*
2032          * only implemented when vmid tracing is enabled, i.e. at least one
2033          * vmid comparator is implemented and at least 8 bit vmid size
2034          */
2035         if (!drvdata->vmid_size || !drvdata->numvmidc)
2036                 return -EINVAL;
2037         if (kstrtoul(buf, 16, &val))
2038                 return -EINVAL;
2039
2040         spin_lock(&drvdata->spinlock);
2041         drvdata->vmid_val[drvdata->vmid_idx] = (u64)val;
2042         spin_unlock(&drvdata->spinlock);
2043         return size;
2044 }
2045 static DEVICE_ATTR_RW(vmid_val);
2046
2047 static ssize_t vmid_masks_show(struct device *dev,
2048                                struct device_attribute *attr, char *buf)
2049 {
2050         unsigned long val1, val2;
2051         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2052
2053         spin_lock(&drvdata->spinlock);
2054         val1 = drvdata->vmid_mask0;
2055         val2 = drvdata->vmid_mask1;
2056         spin_unlock(&drvdata->spinlock);
2057         return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
2058 }
2059
2060 static ssize_t vmid_masks_store(struct device *dev,
2061                                 struct device_attribute *attr,
2062                                 const char *buf, size_t size)
2063 {
2064         u8 i, j, maskbyte;
2065         unsigned long val1, val2, mask;
2066         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2067         /*
2068          * only implemented when vmid tracing is enabled, i.e. at least one
2069          * vmid comparator is implemented and at least 8 bit vmid size
2070          */
2071         if (!drvdata->vmid_size || !drvdata->numvmidc)
2072                 return -EINVAL;
2073         if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
2074                 return -EINVAL;
2075
2076         spin_lock(&drvdata->spinlock);
2077
2078         /*
2079          * each byte[0..3] controls mask value applied to vmid
2080          * comparator[0..3]
2081          */
2082         switch (drvdata->numvmidc) {
2083         case 0x1:
2084                 /* COMP0, bits[7:0] */
2085                 drvdata->vmid_mask0 = val1 & 0xFF;
2086                 break;
2087         case 0x2:
2088                 /* COMP1, bits[15:8] */
2089                 drvdata->vmid_mask0 = val1 & 0xFFFF;
2090                 break;
2091         case 0x3:
2092                 /* COMP2, bits[23:16] */
2093                 drvdata->vmid_mask0 = val1 & 0xFFFFFF;
2094                 break;
2095         case 0x4:
2096                 /* COMP3, bits[31:24] */
2097                 drvdata->vmid_mask0 = val1;
2098                 break;
2099         case 0x5:
2100                 /* COMP4, bits[7:0] */
2101                 drvdata->vmid_mask0 = val1;
2102                 drvdata->vmid_mask1 = val2 & 0xFF;
2103                 break;
2104         case 0x6:
2105                 /* COMP5, bits[15:8] */
2106                 drvdata->vmid_mask0 = val1;
2107                 drvdata->vmid_mask1 = val2 & 0xFFFF;
2108                 break;
2109         case 0x7:
2110                 /* COMP6, bits[23:16] */
2111                 drvdata->vmid_mask0 = val1;
2112                 drvdata->vmid_mask1 = val2 & 0xFFFFFF;
2113                 break;
2114         case 0x8:
2115                 /* COMP7, bits[31:24] */
2116                 drvdata->vmid_mask0 = val1;
2117                 drvdata->vmid_mask1 = val2;
2118                 break;
2119         default:
2120                 break;
2121         }
2122
2123         /*
2124          * If software sets a mask bit to 1, it must program relevant byte
2125          * of vmid comparator value 0x0, otherwise behavior is unpredictable.
2126          * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
2127          * of vmid comparator0 value (corresponding to byte 0) register.
2128          */
2129         mask = drvdata->vmid_mask0;
2130         for (i = 0; i < drvdata->numvmidc; i++) {
2131                 /* mask value of corresponding vmid comparator */
2132                 maskbyte = mask & ETMv4_EVENT_MASK;
2133                 /*
2134                  * each bit corresponds to a byte of respective vmid comparator
2135                  * value register
2136                  */
2137                 for (j = 0; j < 8; j++) {
2138                         if (maskbyte & 1)
2139                                 drvdata->vmid_val[i] &= ~(0xFF << (j * 8));
2140                         maskbyte >>= 1;
2141                 }
2142                 /* Select the next vmid comparator mask value */
2143                 if (i == 3)
2144                         /* vmid comparators[4-7] */
2145                         mask = drvdata->vmid_mask1;
2146                 else
2147                         mask >>= 0x8;
2148         }
2149         spin_unlock(&drvdata->spinlock);
2150         return size;
2151 }
2152 static DEVICE_ATTR_RW(vmid_masks);
2153
2154 static ssize_t cpu_show(struct device *dev,
2155                         struct device_attribute *attr, char *buf)
2156 {
2157         int val;
2158         struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2159
2160         val = drvdata->cpu;
2161         return scnprintf(buf, PAGE_SIZE, "%d\n", val);
2162
2163 }
2164 static DEVICE_ATTR_RO(cpu);
2165
2166 static struct attribute *coresight_etmv4_attrs[] = {
2167         &dev_attr_nr_pe_cmp.attr,
2168         &dev_attr_nr_addr_cmp.attr,
2169         &dev_attr_nr_cntr.attr,
2170         &dev_attr_nr_ext_inp.attr,
2171         &dev_attr_numcidc.attr,
2172         &dev_attr_numvmidc.attr,
2173         &dev_attr_nrseqstate.attr,
2174         &dev_attr_nr_resource.attr,
2175         &dev_attr_nr_ss_cmp.attr,
2176         &dev_attr_reset.attr,
2177         &dev_attr_mode.attr,
2178         &dev_attr_pe.attr,
2179         &dev_attr_event.attr,
2180         &dev_attr_event_instren.attr,
2181         &dev_attr_event_ts.attr,
2182         &dev_attr_syncfreq.attr,
2183         &dev_attr_cyc_threshold.attr,
2184         &dev_attr_bb_ctrl.attr,
2185         &dev_attr_event_vinst.attr,
2186         &dev_attr_s_exlevel_vinst.attr,
2187         &dev_attr_ns_exlevel_vinst.attr,
2188         &dev_attr_addr_idx.attr,
2189         &dev_attr_addr_instdatatype.attr,
2190         &dev_attr_addr_single.attr,
2191         &dev_attr_addr_range.attr,
2192         &dev_attr_addr_start.attr,
2193         &dev_attr_addr_stop.attr,
2194         &dev_attr_addr_ctxtype.attr,
2195         &dev_attr_addr_context.attr,
2196         &dev_attr_seq_idx.attr,
2197         &dev_attr_seq_state.attr,
2198         &dev_attr_seq_event.attr,
2199         &dev_attr_seq_reset_event.attr,
2200         &dev_attr_cntr_idx.attr,
2201         &dev_attr_cntrldvr.attr,
2202         &dev_attr_cntr_val.attr,
2203         &dev_attr_cntr_ctrl.attr,
2204         &dev_attr_res_idx.attr,
2205         &dev_attr_res_ctrl.attr,
2206         &dev_attr_ctxid_idx.attr,
2207         &dev_attr_ctxid_pid.attr,
2208         &dev_attr_ctxid_masks.attr,
2209         &dev_attr_vmid_idx.attr,
2210         &dev_attr_vmid_val.attr,
2211         &dev_attr_vmid_masks.attr,
2212         &dev_attr_cpu.attr,
2213         NULL,
2214 };
2215
2216 #define coresight_simple_func(name, offset)                             \
2217 static ssize_t name##_show(struct device *_dev,                         \
2218                            struct device_attribute *attr, char *buf)    \
2219 {                                                                       \
2220         struct etmv4_drvdata *drvdata = dev_get_drvdata(_dev->parent);  \
2221         return scnprintf(buf, PAGE_SIZE, "0x%x\n",                      \
2222                          readl_relaxed(drvdata->base + offset));        \
2223 }                                                                       \
2224 static DEVICE_ATTR_RO(name)
2225
2226 coresight_simple_func(trcoslsr, TRCOSLSR);
2227 coresight_simple_func(trcpdcr, TRCPDCR);
2228 coresight_simple_func(trcpdsr, TRCPDSR);
2229 coresight_simple_func(trclsr, TRCLSR);
2230 coresight_simple_func(trcauthstatus, TRCAUTHSTATUS);
2231 coresight_simple_func(trcdevid, TRCDEVID);
2232 coresight_simple_func(trcdevtype, TRCDEVTYPE);
2233 coresight_simple_func(trcpidr0, TRCPIDR0);
2234 coresight_simple_func(trcpidr1, TRCPIDR1);
2235 coresight_simple_func(trcpidr2, TRCPIDR2);
2236 coresight_simple_func(trcpidr3, TRCPIDR3);
2237
2238 static struct attribute *coresight_etmv4_mgmt_attrs[] = {
2239         &dev_attr_trcoslsr.attr,
2240         &dev_attr_trcpdcr.attr,
2241         &dev_attr_trcpdsr.attr,
2242         &dev_attr_trclsr.attr,
2243         &dev_attr_trcauthstatus.attr,
2244         &dev_attr_trcdevid.attr,
2245         &dev_attr_trcdevtype.attr,
2246         &dev_attr_trcpidr0.attr,
2247         &dev_attr_trcpidr1.attr,
2248         &dev_attr_trcpidr2.attr,
2249         &dev_attr_trcpidr3.attr,
2250         NULL,
2251 };
2252
2253 coresight_simple_func(trcidr0, TRCIDR0);
2254 coresight_simple_func(trcidr1, TRCIDR1);
2255 coresight_simple_func(trcidr2, TRCIDR2);
2256 coresight_simple_func(trcidr3, TRCIDR3);
2257 coresight_simple_func(trcidr4, TRCIDR4);
2258 coresight_simple_func(trcidr5, TRCIDR5);
2259 /* trcidr[6,7] are reserved */
2260 coresight_simple_func(trcidr8, TRCIDR8);
2261 coresight_simple_func(trcidr9, TRCIDR9);
2262 coresight_simple_func(trcidr10, TRCIDR10);
2263 coresight_simple_func(trcidr11, TRCIDR11);
2264 coresight_simple_func(trcidr12, TRCIDR12);
2265 coresight_simple_func(trcidr13, TRCIDR13);
2266
2267 static struct attribute *coresight_etmv4_trcidr_attrs[] = {
2268         &dev_attr_trcidr0.attr,
2269         &dev_attr_trcidr1.attr,
2270         &dev_attr_trcidr2.attr,
2271         &dev_attr_trcidr3.attr,
2272         &dev_attr_trcidr4.attr,
2273         &dev_attr_trcidr5.attr,
2274         /* trcidr[6,7] are reserved */
2275         &dev_attr_trcidr8.attr,
2276         &dev_attr_trcidr9.attr,
2277         &dev_attr_trcidr10.attr,
2278         &dev_attr_trcidr11.attr,
2279         &dev_attr_trcidr12.attr,
2280         &dev_attr_trcidr13.attr,
2281         NULL,
2282 };
2283
2284 static const struct attribute_group coresight_etmv4_group = {
2285         .attrs = coresight_etmv4_attrs,
2286 };
2287
2288 static const struct attribute_group coresight_etmv4_mgmt_group = {
2289         .attrs = coresight_etmv4_mgmt_attrs,
2290         .name = "mgmt",
2291 };
2292
2293 static const struct attribute_group coresight_etmv4_trcidr_group = {
2294         .attrs = coresight_etmv4_trcidr_attrs,
2295         .name = "trcidr",
2296 };
2297
2298 static const struct attribute_group *coresight_etmv4_groups[] = {
2299         &coresight_etmv4_group,
2300         &coresight_etmv4_mgmt_group,
2301         &coresight_etmv4_trcidr_group,
2302         NULL,
2303 };
2304
2305 static void etm4_init_arch_data(void *info)
2306 {
2307         u32 etmidr0;
2308         u32 etmidr1;
2309         u32 etmidr2;
2310         u32 etmidr3;
2311         u32 etmidr4;
2312         u32 etmidr5;
2313         struct etmv4_drvdata *drvdata = info;
2314
2315         CS_UNLOCK(drvdata->base);
2316
2317         /* find all capabilities of the tracing unit */
2318         etmidr0 = readl_relaxed(drvdata->base + TRCIDR0);
2319
2320         /* INSTP0, bits[2:1] P0 tracing support field */
2321         if (BMVAL(etmidr0, 1, 1) && BMVAL(etmidr0, 2, 2))
2322                 drvdata->instrp0 = true;
2323         else
2324                 drvdata->instrp0 = false;
2325
2326         /* TRCBB, bit[5] Branch broadcast tracing support bit */
2327         if (BMVAL(etmidr0, 5, 5))
2328                 drvdata->trcbb = true;
2329         else
2330                 drvdata->trcbb = false;
2331
2332         /* TRCCOND, bit[6] Conditional instruction tracing support bit */
2333         if (BMVAL(etmidr0, 6, 6))
2334                 drvdata->trccond = true;
2335         else
2336                 drvdata->trccond = false;
2337
2338         /* TRCCCI, bit[7] Cycle counting instruction bit */
2339         if (BMVAL(etmidr0, 7, 7))
2340                 drvdata->trccci = true;
2341         else
2342                 drvdata->trccci = false;
2343
2344         /* RETSTACK, bit[9] Return stack bit */
2345         if (BMVAL(etmidr0, 9, 9))
2346                 drvdata->retstack = true;
2347         else
2348                 drvdata->retstack = false;
2349
2350         /* NUMEVENT, bits[11:10] Number of events field */
2351         drvdata->nr_event = BMVAL(etmidr0, 10, 11);
2352         /* QSUPP, bits[16:15] Q element support field */
2353         drvdata->q_support = BMVAL(etmidr0, 15, 16);
2354         /* TSSIZE, bits[28:24] Global timestamp size field */
2355         drvdata->ts_size = BMVAL(etmidr0, 24, 28);
2356
2357         /* base architecture of trace unit */
2358         etmidr1 = readl_relaxed(drvdata->base + TRCIDR1);
2359         /*
2360          * TRCARCHMIN, bits[7:4] architecture the minor version number
2361          * TRCARCHMAJ, bits[11:8] architecture major versin number
2362          */
2363         drvdata->arch = BMVAL(etmidr1, 4, 11);
2364
2365         /* maximum size of resources */
2366         etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);
2367         /* CIDSIZE, bits[9:5] Indicates the Context ID size */
2368         drvdata->ctxid_size = BMVAL(etmidr2, 5, 9);
2369         /* VMIDSIZE, bits[14:10] Indicates the VMID size */
2370         drvdata->vmid_size = BMVAL(etmidr2, 10, 14);
2371         /* CCSIZE, bits[28:25] size of the cycle counter in bits minus 12 */
2372         drvdata->ccsize = BMVAL(etmidr2, 25, 28);
2373
2374         etmidr3 = readl_relaxed(drvdata->base + TRCIDR3);
2375         /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
2376         drvdata->ccitmin = BMVAL(etmidr3, 0, 11);
2377         /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
2378         drvdata->s_ex_level = BMVAL(etmidr3, 16, 19);
2379         /* EXLEVEL_NS, bits[23:20] Non-secure state instruction tracing */
2380         drvdata->ns_ex_level = BMVAL(etmidr3, 20, 23);
2381
2382         /*
2383          * TRCERR, bit[24] whether a trace unit can trace a
2384          * system error exception.
2385          */
2386         if (BMVAL(etmidr3, 24, 24))
2387                 drvdata->trc_error = true;
2388         else
2389                 drvdata->trc_error = false;
2390
2391         /* SYNCPR, bit[25] implementation has a fixed synchronization period? */
2392         if (BMVAL(etmidr3, 25, 25))
2393                 drvdata->syncpr = true;
2394         else
2395                 drvdata->syncpr = false;
2396
2397         /* STALLCTL, bit[26] is stall control implemented? */
2398         if (BMVAL(etmidr3, 26, 26))
2399                 drvdata->stallctl = true;
2400         else
2401                 drvdata->stallctl = false;
2402
2403         /* SYSSTALL, bit[27] implementation can support stall control? */
2404         if (BMVAL(etmidr3, 27, 27))
2405                 drvdata->sysstall = true;
2406         else
2407                 drvdata->sysstall = false;
2408
2409         /* NUMPROC, bits[30:28] the number of PEs available for tracing */
2410         drvdata->nr_pe = BMVAL(etmidr3, 28, 30);
2411
2412         /* NOOVERFLOW, bit[31] is trace overflow prevention supported */
2413         if (BMVAL(etmidr3, 31, 31))
2414                 drvdata->nooverflow = true;
2415         else
2416                 drvdata->nooverflow = false;
2417
2418         /* number of resources trace unit supports */
2419         etmidr4 = readl_relaxed(drvdata->base + TRCIDR4);
2420         /* NUMACPAIRS, bits[0:3] number of addr comparator pairs for tracing */
2421         drvdata->nr_addr_cmp = BMVAL(etmidr4, 0, 3);
2422         /* NUMPC, bits[15:12] number of PE comparator inputs for tracing */
2423         drvdata->nr_pe_cmp = BMVAL(etmidr4, 12, 15);
2424         /*
2425          * NUMRSPAIR, bits[19:16]
2426          * The number of resource pairs conveyed by the HW starts at 0, i.e a
2427          * value of 0x0 indicate 1 resource pair, 0x1 indicate two and so on.
2428          * As such add 1 to the value of NUMRSPAIR for a better representation.
2429          */
2430         drvdata->nr_resource = BMVAL(etmidr4, 16, 19) + 1;
2431         /*
2432          * NUMSSCC, bits[23:20] the number of single-shot
2433          * comparator control for tracing
2434          */
2435         drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23);
2436         /* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */
2437         drvdata->numcidc = BMVAL(etmidr4, 24, 27);
2438         /* NUMVMIDC, bits[31:28] number of VMID comparators for tracing */
2439         drvdata->numvmidc = BMVAL(etmidr4, 28, 31);
2440
2441         etmidr5 = readl_relaxed(drvdata->base + TRCIDR5);
2442         /* NUMEXTIN, bits[8:0] number of external inputs implemented */
2443         drvdata->nr_ext_inp = BMVAL(etmidr5, 0, 8);
2444         /* TRACEIDSIZE, bits[21:16] indicates the trace ID width */
2445         drvdata->trcid_size = BMVAL(etmidr5, 16, 21);
2446         /* ATBTRIG, bit[22] implementation can support ATB triggers? */
2447         if (BMVAL(etmidr5, 22, 22))
2448                 drvdata->atbtrig = true;
2449         else
2450                 drvdata->atbtrig = false;
2451         /*
2452          * LPOVERRIDE, bit[23] implementation supports
2453          * low-power state override
2454          */
2455         if (BMVAL(etmidr5, 23, 23))
2456                 drvdata->lpoverride = true;
2457         else
2458                 drvdata->lpoverride = false;
2459         /* NUMSEQSTATE, bits[27:25] number of sequencer states implemented */
2460         drvdata->nrseqstate = BMVAL(etmidr5, 25, 27);
2461         /* NUMCNTR, bits[30:28] number of counters available for tracing */
2462         drvdata->nr_cntr = BMVAL(etmidr5, 28, 30);
2463         CS_LOCK(drvdata->base);
2464 }
2465
2466 static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
2467 {
2468         int i;
2469
2470         drvdata->pe_sel = 0x0;
2471         drvdata->cfg = (ETMv4_MODE_CTXID | ETM_MODE_VMID |
2472                         ETMv4_MODE_TIMESTAMP | ETM_MODE_RETURNSTACK);
2473
2474         /* disable all events tracing */
2475         drvdata->eventctrl0 = 0x0;
2476         drvdata->eventctrl1 = 0x0;
2477
2478         /* disable stalling */
2479         drvdata->stall_ctrl = 0x0;
2480
2481         /* disable timestamp event */
2482         drvdata->ts_ctrl = 0x0;
2483
2484         /* enable trace synchronization every 4096 bytes for trace */
2485         if (drvdata->syncpr == false)
2486                 drvdata->syncfreq = 0xC;
2487
2488         /*
2489          *  enable viewInst to trace everything with start-stop logic in
2490          *  started state
2491          */
2492         drvdata->vinst_ctrl |= BIT(0);
2493         /* set initial state of start-stop logic */
2494         if (drvdata->nr_addr_cmp)
2495                 drvdata->vinst_ctrl |= BIT(9);
2496
2497         /* no address range filtering for ViewInst */
2498         drvdata->viiectlr = 0x0;
2499         /* no start-stop filtering for ViewInst */
2500         drvdata->vissctlr = 0x0;
2501
2502         /* disable seq events */
2503         for (i = 0; i < drvdata->nrseqstate-1; i++)
2504                 drvdata->seq_ctrl[i] = 0x0;
2505         drvdata->seq_rst = 0x0;
2506         drvdata->seq_state = 0x0;
2507
2508         /* disable external input events */
2509         drvdata->ext_inp = 0x0;
2510
2511         for (i = 0; i < drvdata->nr_cntr; i++) {
2512                 drvdata->cntrldvr[i] = 0x0;
2513                 drvdata->cntr_ctrl[i] = 0x0;
2514                 drvdata->cntr_val[i] = 0x0;
2515         }
2516
2517         /* Resource selector pair 0 is always implemented and reserved */
2518         drvdata->res_idx = 0x2;
2519         for (i = 2; i < drvdata->nr_resource * 2; i++)
2520                 drvdata->res_ctrl[i] = 0x0;
2521
2522         for (i = 0; i < drvdata->nr_ss_cmp; i++) {
2523                 drvdata->ss_ctrl[i] = 0x0;
2524                 drvdata->ss_pe_cmp[i] = 0x0;
2525         }
2526
2527         if (drvdata->nr_addr_cmp >= 1) {
2528                 drvdata->addr_val[0] = (unsigned long)_stext;
2529                 drvdata->addr_val[1] = (unsigned long)_etext;
2530                 drvdata->addr_type[0] = ETM_ADDR_TYPE_RANGE;
2531                 drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE;
2532         }
2533
2534         for (i = 0; i < drvdata->numcidc; i++) {
2535                 drvdata->ctxid_pid[i] = 0x0;
2536                 drvdata->ctxid_vpid[i] = 0x0;
2537         }
2538
2539         drvdata->ctxid_mask0 = 0x0;
2540         drvdata->ctxid_mask1 = 0x0;
2541
2542         for (i = 0; i < drvdata->numvmidc; i++)
2543                 drvdata->vmid_val[i] = 0x0;
2544         drvdata->vmid_mask0 = 0x0;
2545         drvdata->vmid_mask1 = 0x0;
2546
2547         /*
2548          * A trace ID value of 0 is invalid, so let's start at some
2549          * random value that fits in 7 bits.  ETMv3.x has 0x10 so let's
2550          * start at 0x20.
2551          */
2552         drvdata->trcid = 0x20 + drvdata->cpu;
2553 }
2554
2555 static int etm4_cpu_callback(struct notifier_block *nfb, unsigned long action,
2556                             void *hcpu)
2557 {
2558         unsigned int cpu = (unsigned long)hcpu;
2559
2560         if (!etmdrvdata[cpu])
2561                 goto out;
2562
2563         switch (action & (~CPU_TASKS_FROZEN)) {
2564         case CPU_STARTING:
2565                 spin_lock(&etmdrvdata[cpu]->spinlock);
2566                 if (!etmdrvdata[cpu]->os_unlock) {
2567                         etm4_os_unlock(etmdrvdata[cpu]);
2568                         etmdrvdata[cpu]->os_unlock = true;
2569                 }
2570
2571                 if (etmdrvdata[cpu]->enable)
2572                         etm4_enable_hw(etmdrvdata[cpu]);
2573                 spin_unlock(&etmdrvdata[cpu]->spinlock);
2574                 break;
2575
2576         case CPU_ONLINE:
2577                 if (etmdrvdata[cpu]->boot_enable &&
2578                         !etmdrvdata[cpu]->sticky_enable)
2579                         coresight_enable(etmdrvdata[cpu]->csdev);
2580                 break;
2581
2582         case CPU_DYING:
2583                 spin_lock(&etmdrvdata[cpu]->spinlock);
2584                 if (etmdrvdata[cpu]->enable)
2585                         etm4_disable_hw(etmdrvdata[cpu]);
2586                 spin_unlock(&etmdrvdata[cpu]->spinlock);
2587                 break;
2588         }
2589 out:
2590         return NOTIFY_OK;
2591 }
2592
2593 static struct notifier_block etm4_cpu_notifier = {
2594         .notifier_call = etm4_cpu_callback,
2595 };
2596
2597 static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
2598 {
2599         int ret;
2600         void __iomem *base;
2601         struct device *dev = &adev->dev;
2602         struct coresight_platform_data *pdata = NULL;
2603         struct etmv4_drvdata *drvdata;
2604         struct resource *res = &adev->res;
2605         struct coresight_desc *desc;
2606         struct device_node *np = adev->dev.of_node;
2607
2608         desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
2609         if (!desc)
2610                 return -ENOMEM;
2611
2612         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
2613         if (!drvdata)
2614                 return -ENOMEM;
2615
2616         if (np) {
2617                 pdata = of_get_coresight_platform_data(dev, np);
2618                 if (IS_ERR(pdata))
2619                         return PTR_ERR(pdata);
2620                 adev->dev.platform_data = pdata;
2621         }
2622
2623         drvdata->dev = &adev->dev;
2624         dev_set_drvdata(dev, drvdata);
2625
2626         /* Validity for the resource is already checked by the AMBA core */
2627         base = devm_ioremap_resource(dev, res);
2628         if (IS_ERR(base))
2629                 return PTR_ERR(base);
2630
2631         drvdata->base = base;
2632
2633         spin_lock_init(&drvdata->spinlock);
2634
2635         drvdata->cpu = pdata ? pdata->cpu : 0;
2636
2637         get_online_cpus();
2638         etmdrvdata[drvdata->cpu] = drvdata;
2639
2640         if (!smp_call_function_single(drvdata->cpu, etm4_os_unlock, drvdata, 1))
2641                 drvdata->os_unlock = true;
2642
2643         if (smp_call_function_single(drvdata->cpu,
2644                                 etm4_init_arch_data,  drvdata, 1))
2645                 dev_err(dev, "ETM arch init failed\n");
2646
2647         if (!etm4_count++)
2648                 register_hotcpu_notifier(&etm4_cpu_notifier);
2649
2650         put_online_cpus();
2651
2652         if (etm4_arch_supported(drvdata->arch) == false) {
2653                 ret = -EINVAL;
2654                 goto err_arch_supported;
2655         }
2656         etm4_init_default_data(drvdata);
2657
2658         pm_runtime_put(&adev->dev);
2659
2660         desc->type = CORESIGHT_DEV_TYPE_SOURCE;
2661         desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
2662         desc->ops = &etm4_cs_ops;
2663         desc->pdata = pdata;
2664         desc->dev = dev;
2665         desc->groups = coresight_etmv4_groups;
2666         drvdata->csdev = coresight_register(desc);
2667         if (IS_ERR(drvdata->csdev)) {
2668                 ret = PTR_ERR(drvdata->csdev);
2669                 goto err_coresight_register;
2670         }
2671
2672         dev_info(dev, "%s initialized\n", (char *)id->data);
2673
2674         if (boot_enable) {
2675                 coresight_enable(drvdata->csdev);
2676                 drvdata->boot_enable = true;
2677         }
2678
2679         return 0;
2680
2681 err_arch_supported:
2682         pm_runtime_put(&adev->dev);
2683 err_coresight_register:
2684         if (--etm4_count == 0)
2685                 unregister_hotcpu_notifier(&etm4_cpu_notifier);
2686         return ret;
2687 }
2688
2689 static struct amba_id etm4_ids[] = {
2690         {       /* ETM 4.0 - Qualcomm */
2691                 .id     = 0x0003b95d,
2692                 .mask   = 0x0003ffff,
2693                 .data   = "ETM 4.0",
2694         },
2695         {       /* ETM 4.0 - Juno board */
2696                 .id     = 0x000bb95e,
2697                 .mask   = 0x000fffff,
2698                 .data   = "ETM 4.0",
2699         },
2700         { 0, 0},
2701 };
2702
2703 static struct amba_driver etm4x_driver = {
2704         .drv = {
2705                 .name   = "coresight-etm4x",
2706                 .suppress_bind_attrs = true,
2707         },
2708         .probe          = etm4_probe,
2709         .id_table       = etm4_ids,
2710 };
2711
2712 module_amba_driver(etm4x_driver);