2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9 Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
11 Shamelessly ripped from the w83627hf driver
12 Copyright (C) 2003 Mark Studebaker
14 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
15 in testing and debugging this driver.
17 This driver also supports the W83627EHG, which is the lead-free
18 version of the W83627EHF.
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
25 This program is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
30 You should have received a copy of the GNU General Public License
31 along with this program; if not, write to the Free Software
32 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
35 Supports the following chips:
37 Chip #vin #fan #pwm #temp chip IDs man ID
38 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
40 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
42 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
43 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
44 nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
45 nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
64 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg, w83667hg_b, nct6775,
67 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
68 static const char * const w83627ehf_device_names[] = {
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
82 static unsigned short fan_debounce;
83 module_param(fan_debounce, ushort, 0);
84 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
86 #define DRVNAME "w83627ehf"
89 * Super-I/O constants and functions
92 #define W83627EHF_LD_HWM 0x0b
93 #define W83667HG_LD_VID 0x0d
95 #define SIO_REG_LDSEL 0x07 /* Logical device select */
96 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
97 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
98 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
99 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
100 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
101 #define SIO_REG_VID_DATA 0xF1 /* VID data */
103 #define SIO_W83627EHF_ID 0x8850
104 #define SIO_W83627EHG_ID 0x8860
105 #define SIO_W83627DHG_ID 0xa020
106 #define SIO_W83627DHG_P_ID 0xb070
107 #define SIO_W83667HG_ID 0xa510
108 #define SIO_W83667HG_B_ID 0xb350
109 #define SIO_NCT6775_ID 0xb470
110 #define SIO_NCT6776_ID 0xc330
111 #define SIO_ID_MASK 0xFFF0
114 superio_outb(int ioreg, int reg, int val)
117 outb(val, ioreg + 1);
121 superio_inb(int ioreg, int reg)
124 return inb(ioreg + 1);
128 superio_select(int ioreg, int ld)
130 outb(SIO_REG_LDSEL, ioreg);
135 superio_enter(int ioreg)
142 superio_exit(int ioreg)
146 outb(0x02, ioreg + 1);
153 #define IOREGION_ALIGNMENT (~7)
154 #define IOREGION_OFFSET 5
155 #define IOREGION_LENGTH 2
156 #define ADDR_REG_OFFSET 0
157 #define DATA_REG_OFFSET 1
159 #define W83627EHF_REG_BANK 0x4E
160 #define W83627EHF_REG_CONFIG 0x40
162 /* Not currently used:
163 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
164 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
165 * REG_MAN_ID is at port 0x4f
166 * REG_CHIP_ID is at port 0x58 */
168 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
169 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
171 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
172 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
173 (0x554 + (((nr) - 7) * 2)))
174 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
175 (0x555 + (((nr) - 7) * 2)))
176 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
179 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
180 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
181 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
182 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
184 /* Fan clock dividers are spread over the following five registers */
185 #define W83627EHF_REG_FANDIV1 0x47
186 #define W83627EHF_REG_FANDIV2 0x4B
187 #define W83627EHF_REG_VBAT 0x5D
188 #define W83627EHF_REG_DIODE 0x59
189 #define W83627EHF_REG_SMI_OVT 0x4C
191 /* NCT6775F has its own fan divider registers */
192 #define NCT6775_REG_FANDIV1 0x506
193 #define NCT6775_REG_FANDIV2 0x507
194 #define NCT6775_REG_FAN_DEBOUNCE 0xf0
196 #define W83627EHF_REG_ALARM1 0x459
197 #define W83627EHF_REG_ALARM2 0x45A
198 #define W83627EHF_REG_ALARM3 0x45B
200 /* SmartFan registers */
201 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
202 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
204 /* DC or PWM output fan configuration */
205 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
206 0x04, /* SYS FAN0 output mode and PWM mode */
207 0x04, /* CPU FAN0 output mode and PWM mode */
208 0x12, /* AUX FAN mode */
209 0x62, /* CPU FAN1 mode */
212 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
213 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
215 /* FAN Duty Cycle, be used to control */
216 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
217 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
218 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
220 /* Advanced Fan control, some values are common for all fans */
221 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
222 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
223 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
225 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
226 = { 0xff, 0x67, 0xff, 0x69 };
227 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
228 = { 0xff, 0x68, 0xff, 0x6a };
230 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
231 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
232 = { 0x68, 0x6a, 0x6c };
234 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
235 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
236 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
237 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
239 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
240 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
241 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
242 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
243 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
245 static const u16 NCT6775_REG_TEMP[]
246 = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
247 static const u16 NCT6775_REG_TEMP_CONFIG[]
248 = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
249 static const u16 NCT6775_REG_TEMP_HYST[]
250 = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
251 static const u16 NCT6775_REG_TEMP_OVER[]
252 = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
253 static const u16 NCT6775_REG_TEMP_SOURCE[]
254 = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
256 static const char *const w83667hg_b_temp_label[] = {
267 static const char *const nct6775_temp_label[] = {
281 "PCH_CHIP_CPU_MAX_TEMP",
291 static const char *const nct6776_temp_label[] = {
306 "PCH_CHIP_CPU_MAX_TEMP",
317 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
319 static inline int is_word_sized(u16 reg)
321 return ((((reg & 0xff00) == 0x100
322 || (reg & 0xff00) == 0x200)
323 && ((reg & 0x00ff) == 0x50
324 || (reg & 0x00ff) == 0x53
325 || (reg & 0x00ff) == 0x55))
326 || (reg & 0xfff0) == 0x630
327 || reg == 0x640 || reg == 0x642
328 || ((reg & 0xfff0) == 0x650
329 && (reg & 0x000f) >= 0x06)
330 || reg == 0x73 || reg == 0x75 || reg == 0x77
338 /* 1 is PWM mode, output in ms */
339 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
341 return mode ? 100 * reg : 400 * reg;
344 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
346 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
347 (msec + 200) / 400), 1, 255);
350 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
352 if (reg == 0 || reg == 255)
354 return 1350000U / (reg << divreg);
357 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
359 if ((reg & 0xff1f) == 0xff1f)
362 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
367 return 1350000U / reg;
370 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
372 if (reg == 0 || reg == 0xffff)
376 * Even though the registers are 16 bit wide, the fan divisor
379 return 1350000U / (reg << divreg);
382 static inline unsigned int
389 temp_from_reg(u16 reg, s16 regval)
391 if (is_word_sized(reg))
392 return LM75_TEMP_FROM_REG(regval);
393 return ((s8)regval) * 1000;
397 temp_to_reg(u16 reg, long temp)
399 if (is_word_sized(reg))
400 return LM75_TEMP_TO_REG(temp);
401 return (s8)DIV_ROUND_CLOSEST(SENSORS_LIMIT(temp, -127000, 128000),
405 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
407 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
409 static inline long in_from_reg(u8 reg, u8 nr)
411 return reg * scale_in[nr];
414 static inline u8 in_to_reg(u32 val, u8 nr)
416 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0,
421 * Data structures and manipulation thereof
424 struct w83627ehf_data {
425 int addr; /* IO base of hw monitor block */
428 struct device *hwmon_dev;
431 u16 reg_temp[NUM_REG_TEMP];
432 u16 reg_temp_over[NUM_REG_TEMP];
433 u16 reg_temp_hyst[NUM_REG_TEMP];
434 u16 reg_temp_config[NUM_REG_TEMP];
435 u8 temp_src[NUM_REG_TEMP];
436 const char * const *temp_label;
439 const u16 *REG_TARGET;
441 const u16 *REG_FAN_MIN;
442 const u16 *REG_FAN_START_OUTPUT;
443 const u16 *REG_FAN_STOP_OUTPUT;
444 const u16 *REG_FAN_STOP_TIME;
445 const u16 *REG_FAN_MAX_OUTPUT;
446 const u16 *REG_FAN_STEP_OUTPUT;
448 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
449 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
451 struct mutex update_lock;
452 char valid; /* !=0 if following fields are valid */
453 unsigned long last_updated; /* In jiffies */
455 /* Register values */
456 u8 bank; /* current register bank */
457 u8 in_num; /* number of in inputs we have */
458 u8 in[10]; /* Register value */
459 u8 in_max[10]; /* Register value */
460 u8 in_min[10]; /* Register value */
464 u8 has_fan; /* some fan inputs can be disabled */
465 u8 has_fan_min; /* some fans don't have min register */
470 s16 temp_max_hyst[9];
473 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
474 u8 pwm_enable[4]; /* 1->manual
475 2->thermal cruise mode (also called SmartFan I)
476 3->fan speed cruise mode
477 4->variable thermal cruise (also called
479 5->enhanced variable thermal cruise (also called
481 u8 pwm_enable_orig[4]; /* original value of pwm_enable */
482 u8 pwm_num; /* number of pwm */
487 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
488 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
489 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
490 u8 fan_max_output[4]; /* maximum fan speed */
491 u8 fan_step_output[4]; /* rate of change output value */
500 struct w83627ehf_sio_data {
506 * On older chips, only registers 0x50-0x5f are banked.
507 * On more recent chips, all registers are banked.
508 * Assume that is the case and set the bank number for each access.
509 * Cache the bank number so it only needs to be set if it changes.
511 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
514 if (data->bank != bank) {
515 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
516 outb_p(bank, data->addr + DATA_REG_OFFSET);
521 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
523 int res, word_sized = is_word_sized(reg);
525 mutex_lock(&data->lock);
527 w83627ehf_set_bank(data, reg);
528 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
529 res = inb_p(data->addr + DATA_REG_OFFSET);
531 outb_p((reg & 0xff) + 1,
532 data->addr + ADDR_REG_OFFSET);
533 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
536 mutex_unlock(&data->lock);
540 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
543 int word_sized = is_word_sized(reg);
545 mutex_lock(&data->lock);
547 w83627ehf_set_bank(data, reg);
548 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
550 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
551 outb_p((reg & 0xff) + 1,
552 data->addr + ADDR_REG_OFFSET);
554 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
556 mutex_unlock(&data->lock);
560 /* This function assumes that the caller holds data->update_lock */
561 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
567 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
568 | (data->fan_div[0] & 0x7);
569 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
572 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
573 | ((data->fan_div[1] << 4) & 0x70);
574 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
576 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
577 | (data->fan_div[2] & 0x7);
578 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
581 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
582 | ((data->fan_div[3] << 4) & 0x70);
583 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
588 /* This function assumes that the caller holds data->update_lock */
589 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
595 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
596 | ((data->fan_div[0] & 0x03) << 4);
597 /* fan5 input control bit is write only, compute the value */
598 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
599 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
600 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
601 | ((data->fan_div[0] & 0x04) << 3);
602 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
605 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
606 | ((data->fan_div[1] & 0x03) << 6);
607 /* fan5 input control bit is write only, compute the value */
608 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
609 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
610 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
611 | ((data->fan_div[1] & 0x04) << 4);
612 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
615 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
616 | ((data->fan_div[2] & 0x03) << 6);
617 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
618 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
619 | ((data->fan_div[2] & 0x04) << 5);
620 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
623 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
624 | (data->fan_div[3] & 0x03);
625 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
626 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
627 | ((data->fan_div[3] & 0x04) << 5);
628 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
631 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
632 | ((data->fan_div[4] & 0x03) << 2)
633 | ((data->fan_div[4] & 0x04) << 5);
634 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
639 static void w83627ehf_write_fan_div_common(struct device *dev,
640 struct w83627ehf_data *data, int nr)
642 struct w83627ehf_sio_data *sio_data = dev->platform_data;
644 if (sio_data->kind == nct6776)
645 ; /* no dividers, do nothing */
646 else if (sio_data->kind == nct6775)
647 nct6775_write_fan_div(data, nr);
649 w83627ehf_write_fan_div(data, nr);
652 static void nct6775_update_fan_div(struct w83627ehf_data *data)
656 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
657 data->fan_div[0] = i & 0x7;
658 data->fan_div[1] = (i & 0x70) >> 4;
659 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
660 data->fan_div[2] = i & 0x7;
661 if (data->has_fan & (1<<3))
662 data->fan_div[3] = (i & 0x70) >> 4;
665 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
669 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
670 data->fan_div[0] = (i >> 4) & 0x03;
671 data->fan_div[1] = (i >> 6) & 0x03;
672 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
673 data->fan_div[2] = (i >> 6) & 0x03;
674 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
675 data->fan_div[0] |= (i >> 3) & 0x04;
676 data->fan_div[1] |= (i >> 4) & 0x04;
677 data->fan_div[2] |= (i >> 5) & 0x04;
678 if (data->has_fan & ((1 << 3) | (1 << 4))) {
679 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
680 data->fan_div[3] = i & 0x03;
681 data->fan_div[4] = ((i >> 2) & 0x03)
684 if (data->has_fan & (1 << 3)) {
685 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
686 data->fan_div[3] |= (i >> 5) & 0x04;
690 static void w83627ehf_update_fan_div_common(struct device *dev,
691 struct w83627ehf_data *data)
693 struct w83627ehf_sio_data *sio_data = dev->platform_data;
695 if (sio_data->kind == nct6776)
696 ; /* no dividers, do nothing */
697 else if (sio_data->kind == nct6775)
698 nct6775_update_fan_div(data);
700 w83627ehf_update_fan_div(data);
703 static void nct6775_update_pwm(struct w83627ehf_data *data)
706 int pwmcfg, fanmodecfg;
708 for (i = 0; i < data->pwm_num; i++) {
709 pwmcfg = w83627ehf_read_value(data,
710 W83627EHF_REG_PWM_ENABLE[i]);
711 fanmodecfg = w83627ehf_read_value(data,
712 NCT6775_REG_FAN_MODE[i]);
714 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
715 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
716 data->tolerance[i] = fanmodecfg & 0x0f;
717 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
721 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
724 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
726 for (i = 0; i < data->pwm_num; i++) {
727 if (!(data->has_fan & (1 << i)))
730 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
732 pwmcfg = w83627ehf_read_value(data,
733 W83627EHF_REG_PWM_ENABLE[i]);
734 tolerance = w83627ehf_read_value(data,
735 W83627EHF_REG_TOLERANCE[i]);
738 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
739 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
741 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
743 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
747 static void w83627ehf_update_pwm_common(struct device *dev,
748 struct w83627ehf_data *data)
750 struct w83627ehf_sio_data *sio_data = dev->platform_data;
752 if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
753 nct6775_update_pwm(data);
755 w83627ehf_update_pwm(data);
758 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
760 struct w83627ehf_data *data = dev_get_drvdata(dev);
761 struct w83627ehf_sio_data *sio_data = dev->platform_data;
765 mutex_lock(&data->update_lock);
767 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
769 /* Fan clock dividers */
770 w83627ehf_update_fan_div_common(dev, data);
772 /* Measured voltages and limits */
773 for (i = 0; i < data->in_num; i++) {
774 data->in[i] = w83627ehf_read_value(data,
775 W83627EHF_REG_IN(i));
776 data->in_min[i] = w83627ehf_read_value(data,
777 W83627EHF_REG_IN_MIN(i));
778 data->in_max[i] = w83627ehf_read_value(data,
779 W83627EHF_REG_IN_MAX(i));
782 /* Measured fan speeds and limits */
783 for (i = 0; i < 5; i++) {
786 if (!(data->has_fan & (1 << i)))
789 reg = w83627ehf_read_value(data, data->REG_FAN[i]);
790 data->rpm[i] = data->fan_from_reg(reg,
793 if (data->has_fan_min & (1 << i))
794 data->fan_min[i] = w83627ehf_read_value(data,
795 data->REG_FAN_MIN[i]);
797 /* If we failed to measure the fan speed and clock
798 divider can be increased, let's try that for next
800 if (data->has_fan_div
801 && (reg >= 0xff || (sio_data->kind == nct6775
803 && data->fan_div[i] < 0x07) {
804 dev_dbg(dev, "Increasing fan%d "
805 "clock divider from %u to %u\n",
806 i + 1, div_from_reg(data->fan_div[i]),
807 div_from_reg(data->fan_div[i] + 1));
809 w83627ehf_write_fan_div_common(dev, data, i);
810 /* Preserve min limit if possible */
811 if ((data->has_fan_min & (1 << i))
812 && data->fan_min[i] >= 2
813 && data->fan_min[i] != 255)
814 w83627ehf_write_value(data,
815 data->REG_FAN_MIN[i],
816 (data->fan_min[i] /= 2));
820 w83627ehf_update_pwm_common(dev, data);
822 for (i = 0; i < data->pwm_num; i++) {
823 if (!(data->has_fan & (1 << i)))
826 data->fan_start_output[i] =
827 w83627ehf_read_value(data,
828 data->REG_FAN_START_OUTPUT[i]);
829 data->fan_stop_output[i] =
830 w83627ehf_read_value(data,
831 data->REG_FAN_STOP_OUTPUT[i]);
832 data->fan_stop_time[i] =
833 w83627ehf_read_value(data,
834 data->REG_FAN_STOP_TIME[i]);
836 if (data->REG_FAN_MAX_OUTPUT &&
837 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
838 data->fan_max_output[i] =
839 w83627ehf_read_value(data,
840 data->REG_FAN_MAX_OUTPUT[i]);
842 if (data->REG_FAN_STEP_OUTPUT &&
843 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
844 data->fan_step_output[i] =
845 w83627ehf_read_value(data,
846 data->REG_FAN_STEP_OUTPUT[i]);
848 data->target_temp[i] =
849 w83627ehf_read_value(data,
850 data->REG_TARGET[i]) &
851 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
854 /* Measured temperatures and limits */
855 for (i = 0; i < NUM_REG_TEMP; i++) {
856 if (!(data->have_temp & (1 << i)))
858 data->temp[i] = w83627ehf_read_value(data,
860 if (data->reg_temp_over[i])
862 = w83627ehf_read_value(data,
863 data->reg_temp_over[i]);
864 if (data->reg_temp_hyst[i])
865 data->temp_max_hyst[i]
866 = w83627ehf_read_value(data,
867 data->reg_temp_hyst[i]);
870 data->alarms = w83627ehf_read_value(data,
871 W83627EHF_REG_ALARM1) |
872 (w83627ehf_read_value(data,
873 W83627EHF_REG_ALARM2) << 8) |
874 (w83627ehf_read_value(data,
875 W83627EHF_REG_ALARM3) << 16);
877 data->last_updated = jiffies;
881 mutex_unlock(&data->update_lock);
886 * Sysfs callback functions
888 #define show_in_reg(reg) \
890 show_##reg(struct device *dev, struct device_attribute *attr, \
893 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
894 struct sensor_device_attribute *sensor_attr = \
895 to_sensor_dev_attr(attr); \
896 int nr = sensor_attr->index; \
897 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
903 #define store_in_reg(REG, reg) \
905 store_in_##reg(struct device *dev, struct device_attribute *attr, \
906 const char *buf, size_t count) \
908 struct w83627ehf_data *data = dev_get_drvdata(dev); \
909 struct sensor_device_attribute *sensor_attr = \
910 to_sensor_dev_attr(attr); \
911 int nr = sensor_attr->index; \
914 err = strict_strtoul(buf, 10, &val); \
917 mutex_lock(&data->update_lock); \
918 data->in_##reg[nr] = in_to_reg(val, nr); \
919 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
920 data->in_##reg[nr]); \
921 mutex_unlock(&data->update_lock); \
925 store_in_reg(MIN, min)
926 store_in_reg(MAX, max)
928 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
931 struct w83627ehf_data *data = w83627ehf_update_device(dev);
932 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
933 int nr = sensor_attr->index;
934 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
937 static struct sensor_device_attribute sda_in_input[] = {
938 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
939 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
940 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
941 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
942 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
943 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
944 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
945 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
946 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
947 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
950 static struct sensor_device_attribute sda_in_alarm[] = {
951 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
952 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
953 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
954 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
955 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
956 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
957 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
958 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
959 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
960 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
963 static struct sensor_device_attribute sda_in_min[] = {
964 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
965 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
966 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
967 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
968 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
969 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
970 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
971 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
972 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
973 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
976 static struct sensor_device_attribute sda_in_max[] = {
977 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
978 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
979 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
980 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
981 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
982 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
983 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
984 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
985 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
986 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
990 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
992 struct w83627ehf_data *data = w83627ehf_update_device(dev);
993 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
994 int nr = sensor_attr->index;
995 return sprintf(buf, "%d\n", data->rpm[nr]);
999 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1001 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1002 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1003 int nr = sensor_attr->index;
1004 return sprintf(buf, "%d\n",
1005 data->fan_from_reg_min(data->fan_min[nr],
1006 data->fan_div[nr]));
1010 show_fan_div(struct device *dev, struct device_attribute *attr,
1013 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1014 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1015 int nr = sensor_attr->index;
1016 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1020 store_fan_min(struct device *dev, struct device_attribute *attr,
1021 const char *buf, size_t count)
1023 struct w83627ehf_data *data = dev_get_drvdata(dev);
1024 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1025 int nr = sensor_attr->index;
1031 err = strict_strtoul(buf, 10, &val);
1035 mutex_lock(&data->update_lock);
1036 if (!data->has_fan_div) {
1038 * Only NCT6776F for now, so we know that this is a 13 bit
1046 val = 1350000U / val;
1047 val = (val & 0x1f) | ((val << 3) & 0xff00);
1049 data->fan_min[nr] = val;
1050 goto done; /* Leave fan divider alone */
1053 /* No min limit, alarm disabled */
1054 data->fan_min[nr] = 255;
1055 new_div = data->fan_div[nr]; /* No change */
1056 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1057 } else if ((reg = 1350000U / val) >= 128 * 255) {
1058 /* Speed below this value cannot possibly be represented,
1059 even with the highest divider (128) */
1060 data->fan_min[nr] = 254;
1061 new_div = 7; /* 128 == (1 << 7) */
1062 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1063 "minimum\n", nr + 1, val,
1064 data->fan_from_reg_min(254, 7));
1066 /* Speed above this value cannot possibly be represented,
1067 even with the lowest divider (1) */
1068 data->fan_min[nr] = 1;
1069 new_div = 0; /* 1 == (1 << 0) */
1070 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1071 "maximum\n", nr + 1, val,
1072 data->fan_from_reg_min(1, 0));
1074 /* Automatically pick the best divider, i.e. the one such
1075 that the min limit will correspond to a register value
1076 in the 96..192 range */
1078 while (reg > 192 && new_div < 7) {
1082 data->fan_min[nr] = reg;
1085 /* Write both the fan clock divider (if it changed) and the new
1086 fan min (unconditionally) */
1087 if (new_div != data->fan_div[nr]) {
1088 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1089 nr + 1, div_from_reg(data->fan_div[nr]),
1090 div_from_reg(new_div));
1091 data->fan_div[nr] = new_div;
1092 w83627ehf_write_fan_div_common(dev, data, nr);
1093 /* Give the chip time to sample a new speed value */
1094 data->last_updated = jiffies;
1097 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1099 mutex_unlock(&data->update_lock);
1104 static struct sensor_device_attribute sda_fan_input[] = {
1105 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1106 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1107 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1108 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1109 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1112 static struct sensor_device_attribute sda_fan_alarm[] = {
1113 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1114 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1115 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1116 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1117 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1120 static struct sensor_device_attribute sda_fan_min[] = {
1121 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1123 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1125 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1127 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1129 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1133 static struct sensor_device_attribute sda_fan_div[] = {
1134 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1135 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1136 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1137 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1138 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1142 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1144 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1145 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1146 int nr = sensor_attr->index;
1147 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1150 #define show_temp_reg(addr, reg) \
1152 show_##reg(struct device *dev, struct device_attribute *attr, \
1155 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1156 struct sensor_device_attribute *sensor_attr = \
1157 to_sensor_dev_attr(attr); \
1158 int nr = sensor_attr->index; \
1159 return sprintf(buf, "%d\n", \
1160 temp_from_reg(data->addr[nr], data->reg[nr])); \
1162 show_temp_reg(reg_temp, temp);
1163 show_temp_reg(reg_temp_over, temp_max);
1164 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1166 #define store_temp_reg(addr, reg) \
1168 store_##reg(struct device *dev, struct device_attribute *attr, \
1169 const char *buf, size_t count) \
1171 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1172 struct sensor_device_attribute *sensor_attr = \
1173 to_sensor_dev_attr(attr); \
1174 int nr = sensor_attr->index; \
1177 err = strict_strtol(buf, 10, &val); \
1180 mutex_lock(&data->update_lock); \
1181 data->reg[nr] = temp_to_reg(data->addr[nr], val); \
1182 w83627ehf_write_value(data, data->addr[nr], \
1184 mutex_unlock(&data->update_lock); \
1187 store_temp_reg(reg_temp_over, temp_max);
1188 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1191 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1193 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1194 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1195 int nr = sensor_attr->index;
1196 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1199 static struct sensor_device_attribute sda_temp_input[] = {
1200 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1201 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1202 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1203 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1204 SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1205 SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1206 SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1207 SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1208 SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1211 static struct sensor_device_attribute sda_temp_label[] = {
1212 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1213 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1214 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1215 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1216 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1217 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1218 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1219 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1220 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1223 static struct sensor_device_attribute sda_temp_max[] = {
1224 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1226 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1228 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1230 SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1232 SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1234 SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1236 SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1238 SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1240 SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1244 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1245 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1246 store_temp_max_hyst, 0),
1247 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1248 store_temp_max_hyst, 1),
1249 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1250 store_temp_max_hyst, 2),
1251 SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1252 store_temp_max_hyst, 3),
1253 SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1254 store_temp_max_hyst, 4),
1255 SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1256 store_temp_max_hyst, 5),
1257 SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1258 store_temp_max_hyst, 6),
1259 SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1260 store_temp_max_hyst, 7),
1261 SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1262 store_temp_max_hyst, 8),
1265 static struct sensor_device_attribute sda_temp_alarm[] = {
1266 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1267 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1268 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1271 static struct sensor_device_attribute sda_temp_type[] = {
1272 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1273 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1274 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1277 #define show_pwm_reg(reg) \
1278 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1281 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1282 struct sensor_device_attribute *sensor_attr = \
1283 to_sensor_dev_attr(attr); \
1284 int nr = sensor_attr->index; \
1285 return sprintf(buf, "%d\n", data->reg[nr]); \
1288 show_pwm_reg(pwm_mode)
1289 show_pwm_reg(pwm_enable)
1293 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1294 const char *buf, size_t count)
1296 struct w83627ehf_data *data = dev_get_drvdata(dev);
1297 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1298 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1299 int nr = sensor_attr->index;
1304 err = strict_strtoul(buf, 10, &val);
1311 /* On NCT67766F, DC mode is only supported for pwm1 */
1312 if (sio_data->kind == nct6776 && nr && val != 1)
1315 mutex_lock(&data->update_lock);
1316 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1317 data->pwm_mode[nr] = val;
1318 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1320 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1321 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1322 mutex_unlock(&data->update_lock);
1327 store_pwm(struct device *dev, struct device_attribute *attr,
1328 const char *buf, size_t count)
1330 struct w83627ehf_data *data = dev_get_drvdata(dev);
1331 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1332 int nr = sensor_attr->index;
1336 err = strict_strtoul(buf, 10, &val);
1340 val = SENSORS_LIMIT(val, 0, 255);
1342 mutex_lock(&data->update_lock);
1343 data->pwm[nr] = val;
1344 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1345 mutex_unlock(&data->update_lock);
1350 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1351 const char *buf, size_t count)
1353 struct w83627ehf_data *data = dev_get_drvdata(dev);
1354 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1355 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1356 int nr = sensor_attr->index;
1361 err = strict_strtoul(buf, 10, &val);
1365 if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1367 /* SmartFan III mode is not supported on NCT6776F */
1368 if (sio_data->kind == nct6776 && val == 4)
1371 mutex_lock(&data->update_lock);
1372 data->pwm_enable[nr] = val;
1373 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1374 reg = w83627ehf_read_value(data,
1375 NCT6775_REG_FAN_MODE[nr]);
1377 reg |= (val - 1) << 4;
1378 w83627ehf_write_value(data,
1379 NCT6775_REG_FAN_MODE[nr], reg);
1381 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1382 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1383 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1384 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1386 mutex_unlock(&data->update_lock);
1391 #define show_tol_temp(reg) \
1392 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1395 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1396 struct sensor_device_attribute *sensor_attr = \
1397 to_sensor_dev_attr(attr); \
1398 int nr = sensor_attr->index; \
1399 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1402 show_tol_temp(tolerance)
1403 show_tol_temp(target_temp)
1406 store_target_temp(struct device *dev, struct device_attribute *attr,
1407 const char *buf, size_t count)
1409 struct w83627ehf_data *data = dev_get_drvdata(dev);
1410 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1411 int nr = sensor_attr->index;
1415 err = strict_strtol(buf, 10, &val);
1419 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1421 mutex_lock(&data->update_lock);
1422 data->target_temp[nr] = val;
1423 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1424 mutex_unlock(&data->update_lock);
1429 store_tolerance(struct device *dev, struct device_attribute *attr,
1430 const char *buf, size_t count)
1432 struct w83627ehf_data *data = dev_get_drvdata(dev);
1433 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1434 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1435 int nr = sensor_attr->index;
1440 err = strict_strtol(buf, 10, &val);
1444 /* Limit the temp to 0C - 15C */
1445 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1447 mutex_lock(&data->update_lock);
1448 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1449 /* Limit tolerance further for NCT6776F */
1450 if (sio_data->kind == nct6776 && val > 7)
1452 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1453 reg = (reg & 0xf0) | val;
1454 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1456 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1458 reg = (reg & 0x0f) | (val << 4);
1460 reg = (reg & 0xf0) | val;
1461 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1463 data->tolerance[nr] = val;
1464 mutex_unlock(&data->update_lock);
1468 static struct sensor_device_attribute sda_pwm[] = {
1469 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1470 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1471 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1472 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1475 static struct sensor_device_attribute sda_pwm_mode[] = {
1476 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1478 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1480 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1482 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1486 static struct sensor_device_attribute sda_pwm_enable[] = {
1487 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1488 store_pwm_enable, 0),
1489 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1490 store_pwm_enable, 1),
1491 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1492 store_pwm_enable, 2),
1493 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1494 store_pwm_enable, 3),
1497 static struct sensor_device_attribute sda_target_temp[] = {
1498 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1499 store_target_temp, 0),
1500 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1501 store_target_temp, 1),
1502 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1503 store_target_temp, 2),
1504 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1505 store_target_temp, 3),
1508 static struct sensor_device_attribute sda_tolerance[] = {
1509 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1510 store_tolerance, 0),
1511 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1512 store_tolerance, 1),
1513 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1514 store_tolerance, 2),
1515 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1516 store_tolerance, 3),
1519 /* Smart Fan registers */
1521 #define fan_functions(reg, REG) \
1522 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1525 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1526 struct sensor_device_attribute *sensor_attr = \
1527 to_sensor_dev_attr(attr); \
1528 int nr = sensor_attr->index; \
1529 return sprintf(buf, "%d\n", data->reg[nr]); \
1532 store_##reg(struct device *dev, struct device_attribute *attr, \
1533 const char *buf, size_t count) \
1535 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1536 struct sensor_device_attribute *sensor_attr = \
1537 to_sensor_dev_attr(attr); \
1538 int nr = sensor_attr->index; \
1539 unsigned long val; \
1541 err = strict_strtoul(buf, 10, &val); \
1544 val = SENSORS_LIMIT(val, 1, 255); \
1545 mutex_lock(&data->update_lock); \
1546 data->reg[nr] = val; \
1547 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1548 mutex_unlock(&data->update_lock); \
1552 fan_functions(fan_start_output, FAN_START_OUTPUT)
1553 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1554 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1555 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1557 #define fan_time_functions(reg, REG) \
1558 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1561 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1562 struct sensor_device_attribute *sensor_attr = \
1563 to_sensor_dev_attr(attr); \
1564 int nr = sensor_attr->index; \
1565 return sprintf(buf, "%d\n", \
1566 step_time_from_reg(data->reg[nr], \
1567 data->pwm_mode[nr])); \
1571 store_##reg(struct device *dev, struct device_attribute *attr, \
1572 const char *buf, size_t count) \
1574 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1575 struct sensor_device_attribute *sensor_attr = \
1576 to_sensor_dev_attr(attr); \
1577 int nr = sensor_attr->index; \
1578 unsigned long val; \
1580 err = strict_strtoul(buf, 10, &val); \
1583 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1584 mutex_lock(&data->update_lock); \
1585 data->reg[nr] = val; \
1586 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1587 mutex_unlock(&data->update_lock); \
1591 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1593 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1596 struct w83627ehf_data *data = dev_get_drvdata(dev);
1598 return sprintf(buf, "%s\n", data->name);
1600 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1602 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1603 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1604 store_fan_stop_time, 3),
1605 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1606 store_fan_start_output, 3),
1607 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1608 store_fan_stop_output, 3),
1609 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1610 store_fan_max_output, 3),
1611 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1612 store_fan_step_output, 3),
1615 static struct sensor_device_attribute sda_sf3_arrays[] = {
1616 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1617 store_fan_stop_time, 0),
1618 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1619 store_fan_stop_time, 1),
1620 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1621 store_fan_stop_time, 2),
1622 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1623 store_fan_start_output, 0),
1624 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1625 store_fan_start_output, 1),
1626 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1627 store_fan_start_output, 2),
1628 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1629 store_fan_stop_output, 0),
1630 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1631 store_fan_stop_output, 1),
1632 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1633 store_fan_stop_output, 2),
1638 * pwm1 and pwm3 don't support max and step settings on all chips.
1639 * Need to check support while generating/removing attribute files.
1641 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1642 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1643 store_fan_max_output, 0),
1644 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1645 store_fan_step_output, 0),
1646 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1647 store_fan_max_output, 1),
1648 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1649 store_fan_step_output, 1),
1650 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1651 store_fan_max_output, 2),
1652 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1653 store_fan_step_output, 2),
1657 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1659 struct w83627ehf_data *data = dev_get_drvdata(dev);
1660 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1662 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1665 * Driver and device management
1668 static void w83627ehf_device_remove_files(struct device *dev)
1670 /* some entries in the following arrays may not have been used in
1671 * device_create_file(), but device_remove_file() will ignore them */
1673 struct w83627ehf_data *data = dev_get_drvdata(dev);
1675 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1676 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1677 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1678 struct sensor_device_attribute *attr =
1679 &sda_sf3_max_step_arrays[i];
1680 if (data->REG_FAN_STEP_OUTPUT &&
1681 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1682 device_remove_file(dev, &attr->dev_attr);
1684 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1685 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1686 for (i = 0; i < data->in_num; i++) {
1687 if ((i == 6) && data->in6_skip)
1689 device_remove_file(dev, &sda_in_input[i].dev_attr);
1690 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1691 device_remove_file(dev, &sda_in_min[i].dev_attr);
1692 device_remove_file(dev, &sda_in_max[i].dev_attr);
1694 for (i = 0; i < 5; i++) {
1695 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1696 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1697 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1698 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1700 for (i = 0; i < data->pwm_num; i++) {
1701 device_remove_file(dev, &sda_pwm[i].dev_attr);
1702 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1703 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1704 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1705 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1707 for (i = 0; i < NUM_REG_TEMP; i++) {
1708 if (!(data->have_temp & (1 << i)))
1710 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1711 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1712 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1713 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1716 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1717 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1720 device_remove_file(dev, &dev_attr_name);
1721 device_remove_file(dev, &dev_attr_cpu0_vid);
1724 /* Get the monitoring functions started */
1725 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1731 /* Start monitoring is needed */
1732 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1734 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1737 /* Enable temperature sensors if needed */
1738 for (i = 0; i < NUM_REG_TEMP; i++) {
1739 if (!(data->have_temp & (1 << i)))
1741 if (!data->reg_temp_config[i])
1743 tmp = w83627ehf_read_value(data,
1744 data->reg_temp_config[i]);
1746 w83627ehf_write_value(data,
1747 data->reg_temp_config[i],
1751 /* Enable VBAT monitoring if needed */
1752 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1754 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1756 /* Get thermal sensor types */
1759 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1764 for (i = 0; i < 3; i++) {
1765 const char *label = NULL;
1767 if (data->temp_label)
1768 label = data->temp_label[data->temp_src[i]];
1770 /* Digital source overrides analog type */
1771 if (label && strncmp(label, "PECI", 4) == 0)
1772 data->temp_type[i] = 6;
1773 else if (label && strncmp(label, "AMD", 3) == 0)
1774 data->temp_type[i] = 5;
1775 else if ((tmp & (0x02 << i)))
1776 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1778 data->temp_type[i] = 4; /* thermistor */
1782 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1787 tmp = data->temp_src[r1];
1788 data->temp_src[r1] = data->temp_src[r2];
1789 data->temp_src[r2] = tmp;
1791 tmp = data->reg_temp[r1];
1792 data->reg_temp[r1] = data->reg_temp[r2];
1793 data->reg_temp[r2] = tmp;
1795 tmp = data->reg_temp_over[r1];
1796 data->reg_temp_over[r1] = data->reg_temp_over[r2];
1797 data->reg_temp_over[r2] = tmp;
1799 tmp = data->reg_temp_hyst[r1];
1800 data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1801 data->reg_temp_hyst[r2] = tmp;
1803 tmp = data->reg_temp_config[r1];
1804 data->reg_temp_config[r1] = data->reg_temp_config[r2];
1805 data->reg_temp_config[r2] = tmp;
1808 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1810 struct device *dev = &pdev->dev;
1811 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1812 struct w83627ehf_data *data;
1813 struct resource *res;
1814 u8 fan3pin, fan4pin, fan4min, fan5pin, en_vrm10;
1817 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1818 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1820 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1821 (unsigned long)res->start,
1822 (unsigned long)res->start + IOREGION_LENGTH - 1);
1826 data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
1833 data->addr = res->start;
1834 mutex_init(&data->lock);
1835 mutex_init(&data->update_lock);
1836 data->name = w83627ehf_device_names[sio_data->kind];
1837 platform_set_drvdata(pdev, data);
1839 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1840 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1841 /* 667HG, NCT6775F, and NCT6776F have 3 pwms */
1842 data->pwm_num = (sio_data->kind == w83667hg
1843 || sio_data->kind == w83667hg_b
1844 || sio_data->kind == nct6775
1845 || sio_data->kind == nct6776) ? 3 : 4;
1847 data->have_temp = 0x07;
1848 /* Check temp3 configuration bit for 667HG */
1849 if (sio_data->kind == w83667hg) {
1852 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1854 data->have_temp &= ~(1 << 2);
1856 data->in6_skip = 1; /* either temp3 or in6 */
1859 /* Deal with temperature register setup first. */
1860 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1864 * Display temperature sensor output only if it monitors
1865 * a source other than one already reported. Always display
1866 * first three temperature registers, though.
1868 for (i = 0; i < NUM_REG_TEMP; i++) {
1871 data->reg_temp[i] = NCT6775_REG_TEMP[i];
1872 data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
1873 data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
1874 data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
1876 src = w83627ehf_read_value(data,
1877 NCT6775_REG_TEMP_SOURCE[i]);
1879 if (src && !(mask & (1 << src))) {
1880 data->have_temp |= 1 << i;
1884 data->temp_src[i] = src;
1887 * Now do some register swapping if index 0..2 don't
1888 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
1889 * Idea is to have the first three attributes
1890 * report SYSTIN, CPUIN, and AUXIN if possible
1891 * without overriding the basic system configuration.
1893 if (i > 0 && data->temp_src[0] != 1
1894 && data->temp_src[i] == 1)
1895 w82627ehf_swap_tempreg(data, 0, i);
1896 if (i > 1 && data->temp_src[1] != 2
1897 && data->temp_src[i] == 2)
1898 w82627ehf_swap_tempreg(data, 1, i);
1899 if (i > 2 && data->temp_src[2] != 3
1900 && data->temp_src[i] == 3)
1901 w82627ehf_swap_tempreg(data, 2, i);
1903 if (sio_data->kind == nct6776) {
1905 * On NCT6776, AUXTIN and VIN3 pins are shared.
1906 * Only way to detect it is to check if AUXTIN is used
1907 * as a temperature source, and if that source is
1910 * If that is the case, disable in6, which reports VIN3.
1911 * Otherwise disable temp3.
1913 if (data->temp_src[2] == 3) {
1916 if (data->reg_temp_config[2])
1917 reg = w83627ehf_read_value(data,
1918 data->reg_temp_config[2]);
1920 reg = 0; /* Assume AUXTIN is used */
1923 data->have_temp &= ~(1 << 2);
1927 data->temp_label = nct6776_temp_label;
1929 data->temp_label = nct6775_temp_label;
1931 } else if (sio_data->kind == w83667hg_b) {
1935 * Temperature sources are selected with bank 0, registers 0x49
1938 for (i = 0; i < ARRAY_SIZE(W83627EHF_REG_TEMP); i++) {
1939 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1940 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1941 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1942 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1944 reg = w83627ehf_read_value(data, 0x4a);
1945 data->temp_src[0] = reg >> 5;
1946 reg = w83627ehf_read_value(data, 0x49);
1947 data->temp_src[1] = reg & 0x07;
1948 data->temp_src[2] = (reg >> 4) & 0x07;
1951 * W83667HG-B has another temperature register at 0x7e.
1952 * The temperature source is selected with register 0x7d.
1953 * Support it if the source differs from already reported
1956 reg = w83627ehf_read_value(data, 0x7d);
1958 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1959 && reg != data->temp_src[2]) {
1960 data->temp_src[3] = reg;
1961 data->have_temp |= 1 << 3;
1965 * Chip supports either AUXTIN or VIN3. Try to find out which
1968 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1969 if (data->temp_src[2] == 2 && (reg & 0x01))
1970 data->have_temp &= ~(1 << 2);
1972 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1973 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1976 data->temp_label = w83667hg_b_temp_label;
1978 /* Temperature sources are fixed */
1979 for (i = 0; i < 3; i++) {
1980 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1981 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1982 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1983 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1987 if (sio_data->kind == nct6775) {
1988 data->has_fan_div = true;
1989 data->fan_from_reg = fan_from_reg16;
1990 data->fan_from_reg_min = fan_from_reg8;
1991 data->REG_PWM = NCT6775_REG_PWM;
1992 data->REG_TARGET = NCT6775_REG_TARGET;
1993 data->REG_FAN = NCT6775_REG_FAN;
1994 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
1995 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
1996 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
1997 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
1998 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
1999 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2000 } else if (sio_data->kind == nct6776) {
2001 data->has_fan_div = false;
2002 data->fan_from_reg = fan_from_reg13;
2003 data->fan_from_reg_min = fan_from_reg13;
2004 data->REG_PWM = NCT6775_REG_PWM;
2005 data->REG_TARGET = NCT6775_REG_TARGET;
2006 data->REG_FAN = NCT6775_REG_FAN;
2007 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2008 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2009 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2010 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2011 } else if (sio_data->kind == w83667hg_b) {
2012 data->has_fan_div = true;
2013 data->fan_from_reg = fan_from_reg8;
2014 data->fan_from_reg_min = fan_from_reg8;
2015 data->REG_PWM = W83627EHF_REG_PWM;
2016 data->REG_TARGET = W83627EHF_REG_TARGET;
2017 data->REG_FAN = W83627EHF_REG_FAN;
2018 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2019 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2020 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2021 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2022 data->REG_FAN_MAX_OUTPUT =
2023 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2024 data->REG_FAN_STEP_OUTPUT =
2025 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2027 data->has_fan_div = true;
2028 data->fan_from_reg = fan_from_reg8;
2029 data->fan_from_reg_min = fan_from_reg8;
2030 data->REG_PWM = W83627EHF_REG_PWM;
2031 data->REG_TARGET = W83627EHF_REG_TARGET;
2032 data->REG_FAN = W83627EHF_REG_FAN;
2033 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2034 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2035 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2036 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2037 data->REG_FAN_MAX_OUTPUT =
2038 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2039 data->REG_FAN_STEP_OUTPUT =
2040 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2043 /* Initialize the chip */
2044 w83627ehf_init_device(data, sio_data->kind);
2046 data->vrm = vid_which_vrm();
2047 superio_enter(sio_data->sioreg);
2048 /* Read VID value */
2049 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2050 sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2051 /* W83667HG has different pins for VID input and output, so
2052 we can get the VID input values directly at logical device D
2054 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2055 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2056 err = device_create_file(dev, &dev_attr_cpu0_vid);
2060 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2061 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2062 /* Set VID input sensibility if needed. In theory the
2063 BIOS should have set it, but in practice it's not
2064 always the case. We only do it for the W83627EHF/EHG
2065 because the W83627DHG is more complex in this
2067 if (sio_data->kind == w83627ehf) {
2068 en_vrm10 = superio_inb(sio_data->sioreg,
2070 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2071 dev_warn(dev, "Setting VID input "
2072 "voltage to TTL\n");
2073 superio_outb(sio_data->sioreg,
2076 } else if (!(en_vrm10 & 0x08)
2077 && data->vrm == 100) {
2078 dev_warn(dev, "Setting VID input "
2079 "voltage to VRM10\n");
2080 superio_outb(sio_data->sioreg,
2086 data->vid = superio_inb(sio_data->sioreg,
2088 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2091 err = device_create_file(dev, &dev_attr_cpu0_vid);
2095 dev_info(dev, "VID pins in output mode, CPU VID not "
2100 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2101 if (sio_data->kind == nct6775) {
2102 /* On NCT6775, fan4 shares pins with the fdc interface */
2104 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2107 } else if (sio_data->kind == nct6776) {
2108 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2111 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2112 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2117 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2122 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C)
2128 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C)
2132 } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
2134 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
2135 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
2139 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
2140 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
2145 (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2148 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2149 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2150 if (sio_data->kind == nct6776)
2151 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2154 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2156 pr_info("Enabled fan debounce for chip %s\n", data->name);
2159 superio_exit(sio_data->sioreg);
2161 /* It looks like fan4 and fan5 pins can be alternatively used
2162 as fan on/off switches, but fan5 control is write only :/
2163 We assume that if the serial interface is disabled, designers
2164 connected fan5 as input unless they are emitting log 1, which
2165 is not the default. */
2167 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2169 data->has_fan |= (fan3pin << 2);
2170 data->has_fan_min |= (fan3pin << 2);
2173 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 register
2175 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2176 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2177 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2179 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
2180 if ((i & (1 << 2)) && fan4pin) {
2181 data->has_fan |= (1 << 3);
2182 data->has_fan_min |= (1 << 3);
2184 if (!(i & (1 << 1)) && fan5pin) {
2185 data->has_fan |= (1 << 4);
2186 data->has_fan_min |= (1 << 4);
2190 /* Read fan clock dividers immediately */
2191 w83627ehf_update_fan_div_common(dev, data);
2193 /* Read pwm data to save original values */
2194 w83627ehf_update_pwm_common(dev, data);
2195 for (i = 0; i < data->pwm_num; i++)
2196 data->pwm_enable_orig[i] = data->pwm_enable[i];
2198 /* Read pwm data to save original values */
2199 w83627ehf_update_pwm_common(dev, data);
2200 for (i = 0; i < data->pwm_num; i++)
2201 data->pwm_enable_orig[i] = data->pwm_enable[i];
2203 /* Register sysfs hooks */
2204 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2205 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2210 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2211 struct sensor_device_attribute *attr =
2212 &sda_sf3_max_step_arrays[i];
2213 if (data->REG_FAN_STEP_OUTPUT &&
2214 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2215 err = device_create_file(dev, &attr->dev_attr);
2220 /* if fan4 is enabled create the sf3 files for it */
2221 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2222 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2223 err = device_create_file(dev,
2224 &sda_sf3_arrays_fan4[i].dev_attr);
2229 for (i = 0; i < data->in_num; i++) {
2230 if ((i == 6) && data->in6_skip)
2232 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2233 || (err = device_create_file(dev,
2234 &sda_in_alarm[i].dev_attr))
2235 || (err = device_create_file(dev,
2236 &sda_in_min[i].dev_attr))
2237 || (err = device_create_file(dev,
2238 &sda_in_max[i].dev_attr)))
2242 for (i = 0; i < 5; i++) {
2243 if (data->has_fan & (1 << i)) {
2244 if ((err = device_create_file(dev,
2245 &sda_fan_input[i].dev_attr))
2246 || (err = device_create_file(dev,
2247 &sda_fan_alarm[i].dev_attr)))
2249 if (sio_data->kind != nct6776) {
2250 err = device_create_file(dev,
2251 &sda_fan_div[i].dev_attr);
2255 if (data->has_fan_min & (1 << i)) {
2256 err = device_create_file(dev,
2257 &sda_fan_min[i].dev_attr);
2261 if (i < data->pwm_num &&
2262 ((err = device_create_file(dev,
2263 &sda_pwm[i].dev_attr))
2264 || (err = device_create_file(dev,
2265 &sda_pwm_mode[i].dev_attr))
2266 || (err = device_create_file(dev,
2267 &sda_pwm_enable[i].dev_attr))
2268 || (err = device_create_file(dev,
2269 &sda_target_temp[i].dev_attr))
2270 || (err = device_create_file(dev,
2271 &sda_tolerance[i].dev_attr))))
2276 for (i = 0; i < NUM_REG_TEMP; i++) {
2277 if (!(data->have_temp & (1 << i)))
2279 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2282 if (data->temp_label) {
2283 err = device_create_file(dev,
2284 &sda_temp_label[i].dev_attr);
2288 if (data->reg_temp_over[i]) {
2289 err = device_create_file(dev,
2290 &sda_temp_max[i].dev_attr);
2294 if (data->reg_temp_hyst[i]) {
2295 err = device_create_file(dev,
2296 &sda_temp_max_hyst[i].dev_attr);
2302 if ((err = device_create_file(dev,
2303 &sda_temp_alarm[i].dev_attr))
2304 || (err = device_create_file(dev,
2305 &sda_temp_type[i].dev_attr)))
2309 err = device_create_file(dev, &dev_attr_name);
2313 data->hwmon_dev = hwmon_device_register(dev);
2314 if (IS_ERR(data->hwmon_dev)) {
2315 err = PTR_ERR(data->hwmon_dev);
2322 w83627ehf_device_remove_files(dev);
2324 platform_set_drvdata(pdev, NULL);
2325 release_region(res->start, IOREGION_LENGTH);
2330 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2332 struct w83627ehf_data *data = platform_get_drvdata(pdev);
2334 hwmon_device_unregister(data->hwmon_dev);
2335 w83627ehf_device_remove_files(&pdev->dev);
2336 release_region(data->addr, IOREGION_LENGTH);
2337 platform_set_drvdata(pdev, NULL);
2342 static struct platform_driver w83627ehf_driver = {
2344 .owner = THIS_MODULE,
2347 .probe = w83627ehf_probe,
2348 .remove = __devexit_p(w83627ehf_remove),
2351 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2352 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2353 struct w83627ehf_sio_data *sio_data)
2355 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2356 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2357 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2358 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2359 static const char __initdata sio_name_W83667HG[] = "W83667HG";
2360 static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2361 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2362 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2365 const char *sio_name;
2367 superio_enter(sioaddr);
2372 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2373 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2374 switch (val & SIO_ID_MASK) {
2375 case SIO_W83627EHF_ID:
2376 sio_data->kind = w83627ehf;
2377 sio_name = sio_name_W83627EHF;
2379 case SIO_W83627EHG_ID:
2380 sio_data->kind = w83627ehf;
2381 sio_name = sio_name_W83627EHG;
2383 case SIO_W83627DHG_ID:
2384 sio_data->kind = w83627dhg;
2385 sio_name = sio_name_W83627DHG;
2387 case SIO_W83627DHG_P_ID:
2388 sio_data->kind = w83627dhg_p;
2389 sio_name = sio_name_W83627DHG_P;
2391 case SIO_W83667HG_ID:
2392 sio_data->kind = w83667hg;
2393 sio_name = sio_name_W83667HG;
2395 case SIO_W83667HG_B_ID:
2396 sio_data->kind = w83667hg_b;
2397 sio_name = sio_name_W83667HG_B;
2399 case SIO_NCT6775_ID:
2400 sio_data->kind = nct6775;
2401 sio_name = sio_name_NCT6775;
2403 case SIO_NCT6776_ID:
2404 sio_data->kind = nct6776;
2405 sio_name = sio_name_NCT6776;
2409 pr_debug("unsupported chip ID: 0x%04x\n", val);
2410 superio_exit(sioaddr);
2414 /* We have a known chip, find the HWM I/O address */
2415 superio_select(sioaddr, W83627EHF_LD_HWM);
2416 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2417 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2418 *addr = val & IOREGION_ALIGNMENT;
2420 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2421 superio_exit(sioaddr);
2425 /* Activate logical device if needed */
2426 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2427 if (!(val & 0x01)) {
2428 pr_warn("Forcibly enabling Super-I/O. "
2429 "Sensor is probably unusable.\n");
2430 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2433 superio_exit(sioaddr);
2434 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2435 sio_data->sioreg = sioaddr;
2440 /* when Super-I/O functions move to a separate file, the Super-I/O
2441 * bus will manage the lifetime of the device and this module will only keep
2442 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2443 * must keep track of the device */
2444 static struct platform_device *pdev;
2446 static int __init sensors_w83627ehf_init(void)
2449 unsigned short address;
2450 struct resource res;
2451 struct w83627ehf_sio_data sio_data;
2453 /* initialize sio_data->kind and sio_data->sioreg.
2455 * when Super-I/O functions move to a separate file, the Super-I/O
2456 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2457 * w83627ehf hardware monitor, and call probe() */
2458 if (w83627ehf_find(0x2e, &address, &sio_data) &&
2459 w83627ehf_find(0x4e, &address, &sio_data))
2462 err = platform_driver_register(&w83627ehf_driver);
2466 pdev = platform_device_alloc(DRVNAME, address);
2469 pr_err("Device allocation failed\n");
2470 goto exit_unregister;
2473 err = platform_device_add_data(pdev, &sio_data,
2474 sizeof(struct w83627ehf_sio_data));
2476 pr_err("Platform data allocation failed\n");
2477 goto exit_device_put;
2480 memset(&res, 0, sizeof(res));
2482 res.start = address + IOREGION_OFFSET;
2483 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2484 res.flags = IORESOURCE_IO;
2486 err = acpi_check_resource_conflict(&res);
2488 goto exit_device_put;
2490 err = platform_device_add_resources(pdev, &res, 1);
2492 pr_err("Device resource addition failed (%d)\n", err);
2493 goto exit_device_put;
2496 /* platform_device_add calls probe() */
2497 err = platform_device_add(pdev);
2499 pr_err("Device addition failed (%d)\n", err);
2500 goto exit_device_put;
2506 platform_device_put(pdev);
2508 platform_driver_unregister(&w83627ehf_driver);
2513 static void __exit sensors_w83627ehf_exit(void)
2515 platform_device_unregister(pdev);
2516 platform_driver_unregister(&w83627ehf_driver);
2519 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2520 MODULE_DESCRIPTION("W83627EHF driver");
2521 MODULE_LICENSE("GPL");
2523 module_init(sensors_w83627ehf_init);
2524 module_exit(sensors_w83627ehf_exit);