2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
9 Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
11 Shamelessly ripped from the w83627hf driver
12 Copyright (C) 2003 Mark Studebaker
14 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
15 in testing and debugging this driver.
17 This driver also supports the W83627EHG, which is the lead-free
18 version of the W83627EHF.
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
25 This program is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
30 You should have received a copy of the GNU General Public License
31 along with this program; if not, write to the Free Software
32 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
35 Supports the following chips:
37 Chip #vin #fan #pwm #temp chip IDs man ID
38 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
40 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
42 w83627uhg 8 2 2 2 0xa230 0xc1 0x5ca3
43 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
44 w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3
45 nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
46 nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3
49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
51 #include <linux/module.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/jiffies.h>
55 #include <linux/platform_device.h>
56 #include <linux/hwmon.h>
57 #include <linux/hwmon-sysfs.h>
58 #include <linux/hwmon-vid.h>
59 #include <linux/err.h>
60 #include <linux/mutex.h>
61 #include <linux/acpi.h>
66 w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
67 w83667hg, w83667hg_b, nct6775, nct6776,
70 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
71 static const char * const w83627ehf_device_names[] = {
82 static unsigned short force_id;
83 module_param(force_id, ushort, 0);
84 MODULE_PARM_DESC(force_id, "Override the detected device ID");
86 static unsigned short fan_debounce;
87 module_param(fan_debounce, ushort, 0);
88 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
90 #define DRVNAME "w83627ehf"
93 * Super-I/O constants and functions
96 #define W83627EHF_LD_HWM 0x0b
97 #define W83667HG_LD_VID 0x0d
99 #define SIO_REG_LDSEL 0x07 /* Logical device select */
100 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
101 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
102 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
103 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
104 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
105 #define SIO_REG_VID_DATA 0xF1 /* VID data */
107 #define SIO_W83627EHF_ID 0x8850
108 #define SIO_W83627EHG_ID 0x8860
109 #define SIO_W83627DHG_ID 0xa020
110 #define SIO_W83627DHG_P_ID 0xb070
111 #define SIO_W83627UHG_ID 0xa230
112 #define SIO_W83667HG_ID 0xa510
113 #define SIO_W83667HG_B_ID 0xb350
114 #define SIO_NCT6775_ID 0xb470
115 #define SIO_NCT6776_ID 0xc330
116 #define SIO_ID_MASK 0xFFF0
119 superio_outb(int ioreg, int reg, int val)
122 outb(val, ioreg + 1);
126 superio_inb(int ioreg, int reg)
129 return inb(ioreg + 1);
133 superio_select(int ioreg, int ld)
135 outb(SIO_REG_LDSEL, ioreg);
140 superio_enter(int ioreg)
147 superio_exit(int ioreg)
151 outb(0x02, ioreg + 1);
158 #define IOREGION_ALIGNMENT (~7)
159 #define IOREGION_OFFSET 5
160 #define IOREGION_LENGTH 2
161 #define ADDR_REG_OFFSET 0
162 #define DATA_REG_OFFSET 1
164 #define W83627EHF_REG_BANK 0x4E
165 #define W83627EHF_REG_CONFIG 0x40
167 /* Not currently used:
168 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
169 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
170 * REG_MAN_ID is at port 0x4f
171 * REG_CHIP_ID is at port 0x58 */
173 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
174 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
176 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
177 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
178 (0x554 + (((nr) - 7) * 2)))
179 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
180 (0x555 + (((nr) - 7) * 2)))
181 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
184 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
185 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
186 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
187 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
189 /* Fan clock dividers are spread over the following five registers */
190 #define W83627EHF_REG_FANDIV1 0x47
191 #define W83627EHF_REG_FANDIV2 0x4B
192 #define W83627EHF_REG_VBAT 0x5D
193 #define W83627EHF_REG_DIODE 0x59
194 #define W83627EHF_REG_SMI_OVT 0x4C
196 /* NCT6775F has its own fan divider registers */
197 #define NCT6775_REG_FANDIV1 0x506
198 #define NCT6775_REG_FANDIV2 0x507
199 #define NCT6775_REG_FAN_DEBOUNCE 0xf0
201 #define W83627EHF_REG_ALARM1 0x459
202 #define W83627EHF_REG_ALARM2 0x45A
203 #define W83627EHF_REG_ALARM3 0x45B
205 #define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */
206 #define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */
208 /* SmartFan registers */
209 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
210 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
212 /* DC or PWM output fan configuration */
213 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
214 0x04, /* SYS FAN0 output mode and PWM mode */
215 0x04, /* CPU FAN0 output mode and PWM mode */
216 0x12, /* AUX FAN mode */
217 0x62, /* CPU FAN1 mode */
220 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
221 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
223 /* FAN Duty Cycle, be used to control */
224 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
225 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
226 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
228 /* Advanced Fan control, some values are common for all fans */
229 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
230 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
231 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
233 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
234 = { 0xff, 0x67, 0xff, 0x69 };
235 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
236 = { 0xff, 0x68, 0xff, 0x6a };
238 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
239 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
240 = { 0x68, 0x6a, 0x6c };
242 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
243 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
244 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
245 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
246 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
247 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
248 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
249 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
250 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
251 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
253 static const u16 NCT6775_REG_TEMP[]
254 = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
255 static const u16 NCT6775_REG_TEMP_CONFIG[]
256 = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
257 static const u16 NCT6775_REG_TEMP_HYST[]
258 = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
259 static const u16 NCT6775_REG_TEMP_OVER[]
260 = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
261 static const u16 NCT6775_REG_TEMP_SOURCE[]
262 = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
264 static const char *const w83667hg_b_temp_label[] = {
275 static const char *const nct6775_temp_label[] = {
289 "PCH_CHIP_CPU_MAX_TEMP",
299 static const char *const nct6776_temp_label[] = {
314 "PCH_CHIP_CPU_MAX_TEMP",
325 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
327 static int is_word_sized(u16 reg)
329 return ((((reg & 0xff00) == 0x100
330 || (reg & 0xff00) == 0x200)
331 && ((reg & 0x00ff) == 0x50
332 || (reg & 0x00ff) == 0x53
333 || (reg & 0x00ff) == 0x55))
334 || (reg & 0xfff0) == 0x630
335 || reg == 0x640 || reg == 0x642
336 || ((reg & 0xfff0) == 0x650
337 && (reg & 0x000f) >= 0x06)
338 || reg == 0x73 || reg == 0x75 || reg == 0x77
346 /* 1 is PWM mode, output in ms */
347 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
349 return mode ? 100 * reg : 400 * reg;
352 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
354 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
355 (msec + 200) / 400), 1, 255);
358 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
360 if (reg == 0 || reg == 255)
362 return 1350000U / (reg << divreg);
365 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
367 if ((reg & 0xff1f) == 0xff1f)
370 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
375 return 1350000U / reg;
378 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
380 if (reg == 0 || reg == 0xffff)
384 * Even though the registers are 16 bit wide, the fan divisor
387 return 1350000U / (reg << divreg);
390 static inline unsigned int
396 /* Some of the voltage inputs have internal scaling, the tables below
397 * contain 8 (the ADC LSB in mV) * scaling factor * 100 */
398 static const u16 scale_in_common[10] = {
399 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
401 static const u16 scale_in_w83627uhg[9] = {
402 800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
405 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
407 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
410 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
412 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
417 * Data structures and manipulation thereof
420 struct w83627ehf_data {
421 int addr; /* IO base of hw monitor block */
424 struct device *hwmon_dev;
427 u16 reg_temp[NUM_REG_TEMP];
428 u16 reg_temp_over[NUM_REG_TEMP];
429 u16 reg_temp_hyst[NUM_REG_TEMP];
430 u16 reg_temp_config[NUM_REG_TEMP];
431 u8 temp_src[NUM_REG_TEMP];
432 const char * const *temp_label;
435 const u16 *REG_TARGET;
437 const u16 *REG_FAN_MIN;
438 const u16 *REG_FAN_START_OUTPUT;
439 const u16 *REG_FAN_STOP_OUTPUT;
440 const u16 *REG_FAN_STOP_TIME;
441 const u16 *REG_FAN_MAX_OUTPUT;
442 const u16 *REG_FAN_STEP_OUTPUT;
445 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
446 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
448 struct mutex update_lock;
449 char valid; /* !=0 if following fields are valid */
450 unsigned long last_updated; /* In jiffies */
452 /* Register values */
453 u8 bank; /* current register bank */
454 u8 in_num; /* number of in inputs we have */
455 u8 in[10]; /* Register value */
456 u8 in_max[10]; /* Register value */
457 u8 in_min[10]; /* Register value */
461 u8 has_fan; /* some fan inputs can be disabled */
462 u8 has_fan_min; /* some fans don't have min register */
467 s16 temp_max_hyst[9];
471 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
472 u8 pwm_enable[4]; /* 1->manual
473 2->thermal cruise mode (also called SmartFan I)
474 3->fan speed cruise mode
475 4->variable thermal cruise (also called
477 5->enhanced variable thermal cruise (also called
479 u8 pwm_enable_orig[4]; /* original value of pwm_enable */
480 u8 pwm_num; /* number of pwm */
485 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
486 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
487 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
488 u8 fan_max_output[4]; /* maximum fan speed */
489 u8 fan_step_output[4]; /* rate of change output value */
499 struct w83627ehf_sio_data {
505 * On older chips, only registers 0x50-0x5f are banked.
506 * On more recent chips, all registers are banked.
507 * Assume that is the case and set the bank number for each access.
508 * Cache the bank number so it only needs to be set if it changes.
510 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
513 if (data->bank != bank) {
514 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
515 outb_p(bank, data->addr + DATA_REG_OFFSET);
520 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
522 int res, word_sized = is_word_sized(reg);
524 mutex_lock(&data->lock);
526 w83627ehf_set_bank(data, reg);
527 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
528 res = inb_p(data->addr + DATA_REG_OFFSET);
530 outb_p((reg & 0xff) + 1,
531 data->addr + ADDR_REG_OFFSET);
532 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
535 mutex_unlock(&data->lock);
539 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
542 int word_sized = is_word_sized(reg);
544 mutex_lock(&data->lock);
546 w83627ehf_set_bank(data, reg);
547 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
549 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
550 outb_p((reg & 0xff) + 1,
551 data->addr + ADDR_REG_OFFSET);
553 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
555 mutex_unlock(&data->lock);
559 /* We left-align 8-bit temperature values to make the code simpler */
560 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
564 res = w83627ehf_read_value(data, reg);
565 if (!is_word_sized(reg))
571 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
574 if (!is_word_sized(reg))
576 return w83627ehf_write_value(data, reg, value);
579 /* This function assumes that the caller holds data->update_lock */
580 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
586 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
587 | (data->fan_div[0] & 0x7);
588 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
591 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
592 | ((data->fan_div[1] << 4) & 0x70);
593 w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
595 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
596 | (data->fan_div[2] & 0x7);
597 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
600 reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
601 | ((data->fan_div[3] << 4) & 0x70);
602 w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
607 /* This function assumes that the caller holds data->update_lock */
608 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
614 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
615 | ((data->fan_div[0] & 0x03) << 4);
616 /* fan5 input control bit is write only, compute the value */
617 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
618 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
619 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
620 | ((data->fan_div[0] & 0x04) << 3);
621 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
624 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
625 | ((data->fan_div[1] & 0x03) << 6);
626 /* fan5 input control bit is write only, compute the value */
627 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
628 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
629 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
630 | ((data->fan_div[1] & 0x04) << 4);
631 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
634 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
635 | ((data->fan_div[2] & 0x03) << 6);
636 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
637 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
638 | ((data->fan_div[2] & 0x04) << 5);
639 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
642 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
643 | (data->fan_div[3] & 0x03);
644 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
645 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
646 | ((data->fan_div[3] & 0x04) << 5);
647 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
650 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
651 | ((data->fan_div[4] & 0x03) << 2)
652 | ((data->fan_div[4] & 0x04) << 5);
653 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
658 static void w83627ehf_write_fan_div_common(struct device *dev,
659 struct w83627ehf_data *data, int nr)
661 struct w83627ehf_sio_data *sio_data = dev->platform_data;
663 if (sio_data->kind == nct6776)
664 ; /* no dividers, do nothing */
665 else if (sio_data->kind == nct6775)
666 nct6775_write_fan_div(data, nr);
668 w83627ehf_write_fan_div(data, nr);
671 static void nct6775_update_fan_div(struct w83627ehf_data *data)
675 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
676 data->fan_div[0] = i & 0x7;
677 data->fan_div[1] = (i & 0x70) >> 4;
678 i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
679 data->fan_div[2] = i & 0x7;
680 if (data->has_fan & (1<<3))
681 data->fan_div[3] = (i & 0x70) >> 4;
684 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
688 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
689 data->fan_div[0] = (i >> 4) & 0x03;
690 data->fan_div[1] = (i >> 6) & 0x03;
691 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
692 data->fan_div[2] = (i >> 6) & 0x03;
693 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
694 data->fan_div[0] |= (i >> 3) & 0x04;
695 data->fan_div[1] |= (i >> 4) & 0x04;
696 data->fan_div[2] |= (i >> 5) & 0x04;
697 if (data->has_fan & ((1 << 3) | (1 << 4))) {
698 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
699 data->fan_div[3] = i & 0x03;
700 data->fan_div[4] = ((i >> 2) & 0x03)
703 if (data->has_fan & (1 << 3)) {
704 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
705 data->fan_div[3] |= (i >> 5) & 0x04;
709 static void w83627ehf_update_fan_div_common(struct device *dev,
710 struct w83627ehf_data *data)
712 struct w83627ehf_sio_data *sio_data = dev->platform_data;
714 if (sio_data->kind == nct6776)
715 ; /* no dividers, do nothing */
716 else if (sio_data->kind == nct6775)
717 nct6775_update_fan_div(data);
719 w83627ehf_update_fan_div(data);
722 static void nct6775_update_pwm(struct w83627ehf_data *data)
725 int pwmcfg, fanmodecfg;
727 for (i = 0; i < data->pwm_num; i++) {
728 pwmcfg = w83627ehf_read_value(data,
729 W83627EHF_REG_PWM_ENABLE[i]);
730 fanmodecfg = w83627ehf_read_value(data,
731 NCT6775_REG_FAN_MODE[i]);
733 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
734 data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
735 data->tolerance[i] = fanmodecfg & 0x0f;
736 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
740 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
743 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
745 for (i = 0; i < data->pwm_num; i++) {
746 if (!(data->has_fan & (1 << i)))
749 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
751 pwmcfg = w83627ehf_read_value(data,
752 W83627EHF_REG_PWM_ENABLE[i]);
753 tolerance = w83627ehf_read_value(data,
754 W83627EHF_REG_TOLERANCE[i]);
757 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
758 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
760 data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
762 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
766 static void w83627ehf_update_pwm_common(struct device *dev,
767 struct w83627ehf_data *data)
769 struct w83627ehf_sio_data *sio_data = dev->platform_data;
771 if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
772 nct6775_update_pwm(data);
774 w83627ehf_update_pwm(data);
777 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
779 struct w83627ehf_data *data = dev_get_drvdata(dev);
780 struct w83627ehf_sio_data *sio_data = dev->platform_data;
784 mutex_lock(&data->update_lock);
786 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
788 /* Fan clock dividers */
789 w83627ehf_update_fan_div_common(dev, data);
791 /* Measured voltages and limits */
792 for (i = 0; i < data->in_num; i++) {
793 if ((i == 6) && data->in6_skip)
796 data->in[i] = w83627ehf_read_value(data,
797 W83627EHF_REG_IN(i));
798 data->in_min[i] = w83627ehf_read_value(data,
799 W83627EHF_REG_IN_MIN(i));
800 data->in_max[i] = w83627ehf_read_value(data,
801 W83627EHF_REG_IN_MAX(i));
804 /* Measured fan speeds and limits */
805 for (i = 0; i < 5; i++) {
808 if (!(data->has_fan & (1 << i)))
811 reg = w83627ehf_read_value(data, data->REG_FAN[i]);
812 data->rpm[i] = data->fan_from_reg(reg,
815 if (data->has_fan_min & (1 << i))
816 data->fan_min[i] = w83627ehf_read_value(data,
817 data->REG_FAN_MIN[i]);
819 /* If we failed to measure the fan speed and clock
820 divider can be increased, let's try that for next
822 if (data->has_fan_div
823 && (reg >= 0xff || (sio_data->kind == nct6775
825 && data->fan_div[i] < 0x07) {
826 dev_dbg(dev, "Increasing fan%d "
827 "clock divider from %u to %u\n",
828 i + 1, div_from_reg(data->fan_div[i]),
829 div_from_reg(data->fan_div[i] + 1));
831 w83627ehf_write_fan_div_common(dev, data, i);
832 /* Preserve min limit if possible */
833 if ((data->has_fan_min & (1 << i))
834 && data->fan_min[i] >= 2
835 && data->fan_min[i] != 255)
836 w83627ehf_write_value(data,
837 data->REG_FAN_MIN[i],
838 (data->fan_min[i] /= 2));
842 w83627ehf_update_pwm_common(dev, data);
844 for (i = 0; i < data->pwm_num; i++) {
845 if (!(data->has_fan & (1 << i)))
848 data->fan_start_output[i] =
849 w83627ehf_read_value(data,
850 data->REG_FAN_START_OUTPUT[i]);
851 data->fan_stop_output[i] =
852 w83627ehf_read_value(data,
853 data->REG_FAN_STOP_OUTPUT[i]);
854 data->fan_stop_time[i] =
855 w83627ehf_read_value(data,
856 data->REG_FAN_STOP_TIME[i]);
858 if (data->REG_FAN_MAX_OUTPUT &&
859 data->REG_FAN_MAX_OUTPUT[i] != 0xff)
860 data->fan_max_output[i] =
861 w83627ehf_read_value(data,
862 data->REG_FAN_MAX_OUTPUT[i]);
864 if (data->REG_FAN_STEP_OUTPUT &&
865 data->REG_FAN_STEP_OUTPUT[i] != 0xff)
866 data->fan_step_output[i] =
867 w83627ehf_read_value(data,
868 data->REG_FAN_STEP_OUTPUT[i]);
870 data->target_temp[i] =
871 w83627ehf_read_value(data,
872 data->REG_TARGET[i]) &
873 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
876 /* Measured temperatures and limits */
877 for (i = 0; i < NUM_REG_TEMP; i++) {
878 if (!(data->have_temp & (1 << i)))
880 data->temp[i] = w83627ehf_read_temp(data,
882 if (data->reg_temp_over[i])
884 = w83627ehf_read_temp(data,
885 data->reg_temp_over[i]);
886 if (data->reg_temp_hyst[i])
887 data->temp_max_hyst[i]
888 = w83627ehf_read_temp(data,
889 data->reg_temp_hyst[i]);
892 data->alarms = w83627ehf_read_value(data,
893 W83627EHF_REG_ALARM1) |
894 (w83627ehf_read_value(data,
895 W83627EHF_REG_ALARM2) << 8) |
896 (w83627ehf_read_value(data,
897 W83627EHF_REG_ALARM3) << 16);
899 data->caseopen = w83627ehf_read_value(data,
900 W83627EHF_REG_CASEOPEN_DET);
902 data->last_updated = jiffies;
906 mutex_unlock(&data->update_lock);
911 * Sysfs callback functions
913 #define show_in_reg(reg) \
915 show_##reg(struct device *dev, struct device_attribute *attr, \
918 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
919 struct sensor_device_attribute *sensor_attr = \
920 to_sensor_dev_attr(attr); \
921 int nr = sensor_attr->index; \
922 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
929 #define store_in_reg(REG, reg) \
931 store_in_##reg(struct device *dev, struct device_attribute *attr, \
932 const char *buf, size_t count) \
934 struct w83627ehf_data *data = dev_get_drvdata(dev); \
935 struct sensor_device_attribute *sensor_attr = \
936 to_sensor_dev_attr(attr); \
937 int nr = sensor_attr->index; \
940 err = strict_strtoul(buf, 10, &val); \
943 mutex_lock(&data->update_lock); \
944 data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
945 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
946 data->in_##reg[nr]); \
947 mutex_unlock(&data->update_lock); \
951 store_in_reg(MIN, min)
952 store_in_reg(MAX, max)
954 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
957 struct w83627ehf_data *data = w83627ehf_update_device(dev);
958 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
959 int nr = sensor_attr->index;
960 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
963 static struct sensor_device_attribute sda_in_input[] = {
964 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
965 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
966 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
967 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
968 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
969 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
970 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
971 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
972 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
973 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
976 static struct sensor_device_attribute sda_in_alarm[] = {
977 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
978 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
979 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
980 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
981 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
982 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
983 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
984 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
985 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
986 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
989 static struct sensor_device_attribute sda_in_min[] = {
990 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
991 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
992 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
993 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
994 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
995 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
996 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
997 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
998 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
999 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
1002 static struct sensor_device_attribute sda_in_max[] = {
1003 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
1004 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
1005 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
1006 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
1007 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
1008 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
1009 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
1010 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
1011 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
1012 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
1016 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1018 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1019 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1020 int nr = sensor_attr->index;
1021 return sprintf(buf, "%d\n", data->rpm[nr]);
1025 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1027 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1028 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1029 int nr = sensor_attr->index;
1030 return sprintf(buf, "%d\n",
1031 data->fan_from_reg_min(data->fan_min[nr],
1032 data->fan_div[nr]));
1036 show_fan_div(struct device *dev, struct device_attribute *attr,
1039 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1040 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1041 int nr = sensor_attr->index;
1042 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1046 store_fan_min(struct device *dev, struct device_attribute *attr,
1047 const char *buf, size_t count)
1049 struct w83627ehf_data *data = dev_get_drvdata(dev);
1050 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1051 int nr = sensor_attr->index;
1057 err = strict_strtoul(buf, 10, &val);
1061 mutex_lock(&data->update_lock);
1062 if (!data->has_fan_div) {
1064 * Only NCT6776F for now, so we know that this is a 13 bit
1072 val = 1350000U / val;
1073 val = (val & 0x1f) | ((val << 3) & 0xff00);
1075 data->fan_min[nr] = val;
1076 goto done; /* Leave fan divider alone */
1079 /* No min limit, alarm disabled */
1080 data->fan_min[nr] = 255;
1081 new_div = data->fan_div[nr]; /* No change */
1082 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1083 } else if ((reg = 1350000U / val) >= 128 * 255) {
1084 /* Speed below this value cannot possibly be represented,
1085 even with the highest divider (128) */
1086 data->fan_min[nr] = 254;
1087 new_div = 7; /* 128 == (1 << 7) */
1088 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1089 "minimum\n", nr + 1, val,
1090 data->fan_from_reg_min(254, 7));
1092 /* Speed above this value cannot possibly be represented,
1093 even with the lowest divider (1) */
1094 data->fan_min[nr] = 1;
1095 new_div = 0; /* 1 == (1 << 0) */
1096 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1097 "maximum\n", nr + 1, val,
1098 data->fan_from_reg_min(1, 0));
1100 /* Automatically pick the best divider, i.e. the one such
1101 that the min limit will correspond to a register value
1102 in the 96..192 range */
1104 while (reg > 192 && new_div < 7) {
1108 data->fan_min[nr] = reg;
1111 /* Write both the fan clock divider (if it changed) and the new
1112 fan min (unconditionally) */
1113 if (new_div != data->fan_div[nr]) {
1114 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1115 nr + 1, div_from_reg(data->fan_div[nr]),
1116 div_from_reg(new_div));
1117 data->fan_div[nr] = new_div;
1118 w83627ehf_write_fan_div_common(dev, data, nr);
1119 /* Give the chip time to sample a new speed value */
1120 data->last_updated = jiffies;
1123 w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
1125 mutex_unlock(&data->update_lock);
1130 static struct sensor_device_attribute sda_fan_input[] = {
1131 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1132 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1133 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1134 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1135 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1138 static struct sensor_device_attribute sda_fan_alarm[] = {
1139 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1140 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1141 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1142 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1143 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1146 static struct sensor_device_attribute sda_fan_min[] = {
1147 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1149 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1151 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1153 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1155 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1159 static struct sensor_device_attribute sda_fan_div[] = {
1160 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1161 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1162 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1163 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1164 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1168 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1170 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1171 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1172 int nr = sensor_attr->index;
1173 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1176 #define show_temp_reg(addr, reg) \
1178 show_##reg(struct device *dev, struct device_attribute *attr, \
1181 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1182 struct sensor_device_attribute *sensor_attr = \
1183 to_sensor_dev_attr(attr); \
1184 int nr = sensor_attr->index; \
1185 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
1187 show_temp_reg(reg_temp, temp);
1188 show_temp_reg(reg_temp_over, temp_max);
1189 show_temp_reg(reg_temp_hyst, temp_max_hyst);
1191 #define store_temp_reg(addr, reg) \
1193 store_##reg(struct device *dev, struct device_attribute *attr, \
1194 const char *buf, size_t count) \
1196 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1197 struct sensor_device_attribute *sensor_attr = \
1198 to_sensor_dev_attr(attr); \
1199 int nr = sensor_attr->index; \
1202 err = strict_strtol(buf, 10, &val); \
1205 mutex_lock(&data->update_lock); \
1206 data->reg[nr] = LM75_TEMP_TO_REG(val); \
1207 w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
1208 mutex_unlock(&data->update_lock); \
1211 store_temp_reg(reg_temp_over, temp_max);
1212 store_temp_reg(reg_temp_hyst, temp_max_hyst);
1215 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1217 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1218 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1219 int nr = sensor_attr->index;
1220 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1223 static struct sensor_device_attribute sda_temp_input[] = {
1224 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
1225 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
1226 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
1227 SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
1228 SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
1229 SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
1230 SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
1231 SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
1232 SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
1235 static struct sensor_device_attribute sda_temp_label[] = {
1236 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1237 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1238 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1239 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1240 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1241 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1242 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1243 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1244 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1247 static struct sensor_device_attribute sda_temp_max[] = {
1248 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
1250 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
1252 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
1254 SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
1256 SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
1258 SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
1260 SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
1262 SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
1264 SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
1268 static struct sensor_device_attribute sda_temp_max_hyst[] = {
1269 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1270 store_temp_max_hyst, 0),
1271 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1272 store_temp_max_hyst, 1),
1273 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1274 store_temp_max_hyst, 2),
1275 SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1276 store_temp_max_hyst, 3),
1277 SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1278 store_temp_max_hyst, 4),
1279 SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1280 store_temp_max_hyst, 5),
1281 SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1282 store_temp_max_hyst, 6),
1283 SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1284 store_temp_max_hyst, 7),
1285 SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
1286 store_temp_max_hyst, 8),
1289 static struct sensor_device_attribute sda_temp_alarm[] = {
1290 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1291 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1292 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1295 static struct sensor_device_attribute sda_temp_type[] = {
1296 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1297 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1298 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1301 #define show_pwm_reg(reg) \
1302 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1305 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1306 struct sensor_device_attribute *sensor_attr = \
1307 to_sensor_dev_attr(attr); \
1308 int nr = sensor_attr->index; \
1309 return sprintf(buf, "%d\n", data->reg[nr]); \
1312 show_pwm_reg(pwm_mode)
1313 show_pwm_reg(pwm_enable)
1317 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1318 const char *buf, size_t count)
1320 struct w83627ehf_data *data = dev_get_drvdata(dev);
1321 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1322 int nr = sensor_attr->index;
1327 err = strict_strtoul(buf, 10, &val);
1333 mutex_lock(&data->update_lock);
1334 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1335 data->pwm_mode[nr] = val;
1336 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
1338 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
1339 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1340 mutex_unlock(&data->update_lock);
1345 store_pwm(struct device *dev, struct device_attribute *attr,
1346 const char *buf, size_t count)
1348 struct w83627ehf_data *data = dev_get_drvdata(dev);
1349 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1350 int nr = sensor_attr->index;
1354 err = strict_strtoul(buf, 10, &val);
1358 val = SENSORS_LIMIT(val, 0, 255);
1360 mutex_lock(&data->update_lock);
1361 data->pwm[nr] = val;
1362 w83627ehf_write_value(data, data->REG_PWM[nr], val);
1363 mutex_unlock(&data->update_lock);
1368 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1369 const char *buf, size_t count)
1371 struct w83627ehf_data *data = dev_get_drvdata(dev);
1372 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1373 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1374 int nr = sensor_attr->index;
1379 err = strict_strtoul(buf, 10, &val);
1383 if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
1385 /* SmartFan III mode is not supported on NCT6776F */
1386 if (sio_data->kind == nct6776 && val == 4)
1389 mutex_lock(&data->update_lock);
1390 data->pwm_enable[nr] = val;
1391 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1392 reg = w83627ehf_read_value(data,
1393 NCT6775_REG_FAN_MODE[nr]);
1395 reg |= (val - 1) << 4;
1396 w83627ehf_write_value(data,
1397 NCT6775_REG_FAN_MODE[nr], reg);
1399 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1400 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1401 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1402 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1404 mutex_unlock(&data->update_lock);
1409 #define show_tol_temp(reg) \
1410 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1413 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1414 struct sensor_device_attribute *sensor_attr = \
1415 to_sensor_dev_attr(attr); \
1416 int nr = sensor_attr->index; \
1417 return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
1420 show_tol_temp(tolerance)
1421 show_tol_temp(target_temp)
1424 store_target_temp(struct device *dev, struct device_attribute *attr,
1425 const char *buf, size_t count)
1427 struct w83627ehf_data *data = dev_get_drvdata(dev);
1428 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1429 int nr = sensor_attr->index;
1433 err = strict_strtol(buf, 10, &val);
1437 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1439 mutex_lock(&data->update_lock);
1440 data->target_temp[nr] = val;
1441 w83627ehf_write_value(data, data->REG_TARGET[nr], val);
1442 mutex_unlock(&data->update_lock);
1447 store_tolerance(struct device *dev, struct device_attribute *attr,
1448 const char *buf, size_t count)
1450 struct w83627ehf_data *data = dev_get_drvdata(dev);
1451 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1452 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1453 int nr = sensor_attr->index;
1458 err = strict_strtol(buf, 10, &val);
1462 /* Limit the temp to 0C - 15C */
1463 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
1465 mutex_lock(&data->update_lock);
1466 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1467 /* Limit tolerance further for NCT6776F */
1468 if (sio_data->kind == nct6776 && val > 7)
1470 reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
1471 reg = (reg & 0xf0) | val;
1472 w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
1474 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1476 reg = (reg & 0x0f) | (val << 4);
1478 reg = (reg & 0xf0) | val;
1479 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1481 data->tolerance[nr] = val;
1482 mutex_unlock(&data->update_lock);
1486 static struct sensor_device_attribute sda_pwm[] = {
1487 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1488 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1489 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1490 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1493 static struct sensor_device_attribute sda_pwm_mode[] = {
1494 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1496 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1498 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1500 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1504 static struct sensor_device_attribute sda_pwm_enable[] = {
1505 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1506 store_pwm_enable, 0),
1507 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1508 store_pwm_enable, 1),
1509 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1510 store_pwm_enable, 2),
1511 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1512 store_pwm_enable, 3),
1515 static struct sensor_device_attribute sda_target_temp[] = {
1516 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1517 store_target_temp, 0),
1518 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1519 store_target_temp, 1),
1520 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1521 store_target_temp, 2),
1522 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1523 store_target_temp, 3),
1526 static struct sensor_device_attribute sda_tolerance[] = {
1527 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1528 store_tolerance, 0),
1529 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1530 store_tolerance, 1),
1531 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1532 store_tolerance, 2),
1533 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1534 store_tolerance, 3),
1537 /* Smart Fan registers */
1539 #define fan_functions(reg, REG) \
1540 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1543 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1544 struct sensor_device_attribute *sensor_attr = \
1545 to_sensor_dev_attr(attr); \
1546 int nr = sensor_attr->index; \
1547 return sprintf(buf, "%d\n", data->reg[nr]); \
1550 store_##reg(struct device *dev, struct device_attribute *attr, \
1551 const char *buf, size_t count) \
1553 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1554 struct sensor_device_attribute *sensor_attr = \
1555 to_sensor_dev_attr(attr); \
1556 int nr = sensor_attr->index; \
1557 unsigned long val; \
1559 err = strict_strtoul(buf, 10, &val); \
1562 val = SENSORS_LIMIT(val, 1, 255); \
1563 mutex_lock(&data->update_lock); \
1564 data->reg[nr] = val; \
1565 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1566 mutex_unlock(&data->update_lock); \
1570 fan_functions(fan_start_output, FAN_START_OUTPUT)
1571 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1572 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1573 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1575 #define fan_time_functions(reg, REG) \
1576 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1579 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1580 struct sensor_device_attribute *sensor_attr = \
1581 to_sensor_dev_attr(attr); \
1582 int nr = sensor_attr->index; \
1583 return sprintf(buf, "%d\n", \
1584 step_time_from_reg(data->reg[nr], \
1585 data->pwm_mode[nr])); \
1589 store_##reg(struct device *dev, struct device_attribute *attr, \
1590 const char *buf, size_t count) \
1592 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1593 struct sensor_device_attribute *sensor_attr = \
1594 to_sensor_dev_attr(attr); \
1595 int nr = sensor_attr->index; \
1596 unsigned long val; \
1598 err = strict_strtoul(buf, 10, &val); \
1601 val = step_time_to_reg(val, data->pwm_mode[nr]); \
1602 mutex_lock(&data->update_lock); \
1603 data->reg[nr] = val; \
1604 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1605 mutex_unlock(&data->update_lock); \
1609 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1611 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1614 struct w83627ehf_data *data = dev_get_drvdata(dev);
1616 return sprintf(buf, "%s\n", data->name);
1618 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1620 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1621 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1622 store_fan_stop_time, 3),
1623 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1624 store_fan_start_output, 3),
1625 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1626 store_fan_stop_output, 3),
1627 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1628 store_fan_max_output, 3),
1629 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1630 store_fan_step_output, 3),
1633 static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
1634 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1635 store_fan_stop_time, 2),
1636 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1637 store_fan_start_output, 2),
1638 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1639 store_fan_stop_output, 2),
1642 static struct sensor_device_attribute sda_sf3_arrays[] = {
1643 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1644 store_fan_stop_time, 0),
1645 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1646 store_fan_stop_time, 1),
1647 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1648 store_fan_start_output, 0),
1649 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1650 store_fan_start_output, 1),
1651 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1652 store_fan_stop_output, 0),
1653 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1654 store_fan_stop_output, 1),
1659 * pwm1 and pwm3 don't support max and step settings on all chips.
1660 * Need to check support while generating/removing attribute files.
1662 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1663 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1664 store_fan_max_output, 0),
1665 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1666 store_fan_step_output, 0),
1667 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1668 store_fan_max_output, 1),
1669 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1670 store_fan_step_output, 1),
1671 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1672 store_fan_max_output, 2),
1673 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1674 store_fan_step_output, 2),
1678 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1680 struct w83627ehf_data *data = dev_get_drvdata(dev);
1681 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1683 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1686 /* Case open detection */
1689 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
1691 struct w83627ehf_data *data = w83627ehf_update_device(dev);
1693 return sprintf(buf, "%d\n",
1694 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
1698 clear_caseopen(struct device *dev, struct device_attribute *attr,
1699 const char *buf, size_t count)
1701 struct w83627ehf_data *data = dev_get_drvdata(dev);
1705 if (strict_strtoul(buf, 10, &val) || val != 0)
1708 mask = to_sensor_dev_attr_2(attr)->nr;
1710 mutex_lock(&data->update_lock);
1711 reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1712 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1713 w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1714 data->valid = 0; /* Force cache refresh */
1715 mutex_unlock(&data->update_lock);
1720 static struct sensor_device_attribute_2 sda_caseopen[] = {
1721 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1722 clear_caseopen, 0x80, 0x10),
1723 SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
1724 clear_caseopen, 0x40, 0x40),
1728 * Driver and device management
1731 static void w83627ehf_device_remove_files(struct device *dev)
1733 /* some entries in the following arrays may not have been used in
1734 * device_create_file(), but device_remove_file() will ignore them */
1736 struct w83627ehf_data *data = dev_get_drvdata(dev);
1738 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1739 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1740 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1741 struct sensor_device_attribute *attr =
1742 &sda_sf3_max_step_arrays[i];
1743 if (data->REG_FAN_STEP_OUTPUT &&
1744 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1745 device_remove_file(dev, &attr->dev_attr);
1747 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
1748 device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
1749 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1750 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1751 for (i = 0; i < data->in_num; i++) {
1752 if ((i == 6) && data->in6_skip)
1754 device_remove_file(dev, &sda_in_input[i].dev_attr);
1755 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1756 device_remove_file(dev, &sda_in_min[i].dev_attr);
1757 device_remove_file(dev, &sda_in_max[i].dev_attr);
1759 for (i = 0; i < 5; i++) {
1760 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1761 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1762 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1763 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1765 for (i = 0; i < data->pwm_num; i++) {
1766 device_remove_file(dev, &sda_pwm[i].dev_attr);
1767 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1768 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1769 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1770 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1772 for (i = 0; i < NUM_REG_TEMP; i++) {
1773 if (!(data->have_temp & (1 << i)))
1775 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1776 device_remove_file(dev, &sda_temp_label[i].dev_attr);
1777 if (i == 2 && data->temp3_val_only)
1779 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1780 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1783 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1784 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1787 device_remove_file(dev, &sda_caseopen[0].dev_attr);
1788 device_remove_file(dev, &sda_caseopen[1].dev_attr);
1790 device_remove_file(dev, &dev_attr_name);
1791 device_remove_file(dev, &dev_attr_cpu0_vid);
1794 /* Get the monitoring functions started */
1795 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data,
1801 /* Start monitoring is needed */
1802 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1804 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1807 /* Enable temperature sensors if needed */
1808 for (i = 0; i < NUM_REG_TEMP; i++) {
1809 if (!(data->have_temp & (1 << i)))
1811 if (!data->reg_temp_config[i])
1813 tmp = w83627ehf_read_value(data,
1814 data->reg_temp_config[i]);
1816 w83627ehf_write_value(data,
1817 data->reg_temp_config[i],
1821 /* Enable VBAT monitoring if needed */
1822 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1824 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1826 /* Get thermal sensor types */
1829 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1837 for (i = 0; i < 3; i++) {
1838 const char *label = data->temp_label[data->temp_src[i]];
1840 /* Digital source overrides analog type */
1841 if (strncmp(label, "PECI", 4) == 0)
1842 data->temp_type[i] = 6;
1843 else if (strncmp(label, "AMD", 3) == 0)
1844 data->temp_type[i] = 5;
1845 else if ((tmp & (0x02 << i)))
1846 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1848 data->temp_type[i] = 4; /* thermistor */
1852 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
1857 tmp = data->temp_src[r1];
1858 data->temp_src[r1] = data->temp_src[r2];
1859 data->temp_src[r2] = tmp;
1861 tmp = data->reg_temp[r1];
1862 data->reg_temp[r1] = data->reg_temp[r2];
1863 data->reg_temp[r2] = tmp;
1865 tmp = data->reg_temp_over[r1];
1866 data->reg_temp_over[r1] = data->reg_temp_over[r2];
1867 data->reg_temp_over[r2] = tmp;
1869 tmp = data->reg_temp_hyst[r1];
1870 data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
1871 data->reg_temp_hyst[r2] = tmp;
1873 tmp = data->reg_temp_config[r1];
1874 data->reg_temp_config[r1] = data->reg_temp_config[r2];
1875 data->reg_temp_config[r2] = tmp;
1878 static void __devinit
1879 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1883 for (i = 0; i < n_temp; i++) {
1884 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1885 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1886 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1887 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1891 static void __devinit
1892 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1893 struct w83627ehf_data *data)
1895 int fan3pin, fan4pin, fan4min, fan5pin, regval;
1897 /* The W83627UHG is simple, only two fan inputs, no config */
1898 if (sio_data->kind == w83627uhg) {
1899 data->has_fan = 0x03; /* fan1 and fan2 */
1900 data->has_fan_min = 0x03;
1904 superio_enter(sio_data->sioreg);
1906 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1907 if (sio_data->kind == nct6775) {
1908 /* On NCT6775, fan4 shares pins with the fdc interface */
1910 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
1913 } else if (sio_data->kind == nct6776) {
1914 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
1915 fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
1916 fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
1918 } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1920 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1921 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1925 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1926 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1930 superio_exit(sio_data->sioreg);
1932 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1933 data->has_fan |= (fan3pin << 2);
1934 data->has_fan_min |= (fan3pin << 2);
1936 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
1938 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
1941 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
1942 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
1945 * It looks like fan4 and fan5 pins can be alternatively used
1946 * as fan on/off switches, but fan5 control is write only :/
1947 * We assume that if the serial interface is disabled, designers
1948 * connected fan5 as input unless they are emitting log 1, which
1949 * is not the default.
1951 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1952 if ((regval & (1 << 2)) && fan4pin) {
1953 data->has_fan |= (1 << 3);
1954 data->has_fan_min |= (1 << 3);
1956 if (!(regval & (1 << 1)) && fan5pin) {
1957 data->has_fan |= (1 << 4);
1958 data->has_fan_min |= (1 << 4);
1963 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1965 struct device *dev = &pdev->dev;
1966 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1967 struct w83627ehf_data *data;
1968 struct resource *res;
1972 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1973 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1975 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1976 (unsigned long)res->start,
1977 (unsigned long)res->start + IOREGION_LENGTH - 1);
1981 data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL);
1987 data->addr = res->start;
1988 mutex_init(&data->lock);
1989 mutex_init(&data->update_lock);
1990 data->name = w83627ehf_device_names[sio_data->kind];
1991 platform_set_drvdata(pdev, data);
1993 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1994 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1995 /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
1996 switch (sio_data->kind) {
2011 /* Default to 3 temperature inputs, code below will adjust as needed */
2012 data->have_temp = 0x07;
2014 /* Deal with temperature register setup first. */
2015 if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2019 * Display temperature sensor output only if it monitors
2020 * a source other than one already reported. Always display
2021 * first three temperature registers, though.
2023 for (i = 0; i < NUM_REG_TEMP; i++) {
2026 data->reg_temp[i] = NCT6775_REG_TEMP[i];
2027 data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
2028 data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
2029 data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
2031 src = w83627ehf_read_value(data,
2032 NCT6775_REG_TEMP_SOURCE[i]);
2034 if (src && !(mask & (1 << src))) {
2035 data->have_temp |= 1 << i;
2039 data->temp_src[i] = src;
2042 * Now do some register swapping if index 0..2 don't
2043 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2044 * Idea is to have the first three attributes
2045 * report SYSTIN, CPUIN, and AUXIN if possible
2046 * without overriding the basic system configuration.
2048 if (i > 0 && data->temp_src[0] != 1
2049 && data->temp_src[i] == 1)
2050 w82627ehf_swap_tempreg(data, 0, i);
2051 if (i > 1 && data->temp_src[1] != 2
2052 && data->temp_src[i] == 2)
2053 w82627ehf_swap_tempreg(data, 1, i);
2054 if (i > 2 && data->temp_src[2] != 3
2055 && data->temp_src[i] == 3)
2056 w82627ehf_swap_tempreg(data, 2, i);
2058 if (sio_data->kind == nct6776) {
2060 * On NCT6776, AUXTIN and VIN3 pins are shared.
2061 * Only way to detect it is to check if AUXTIN is used
2062 * as a temperature source, and if that source is
2065 * If that is the case, disable in6, which reports VIN3.
2066 * Otherwise disable temp3.
2068 if (data->temp_src[2] == 3) {
2071 if (data->reg_temp_config[2])
2072 reg = w83627ehf_read_value(data,
2073 data->reg_temp_config[2]);
2075 reg = 0; /* Assume AUXTIN is used */
2078 data->have_temp &= ~(1 << 2);
2082 data->temp_label = nct6776_temp_label;
2084 data->temp_label = nct6775_temp_label;
2086 } else if (sio_data->kind == w83667hg_b) {
2089 w83627ehf_set_temp_reg_ehf(data, 4);
2092 * Temperature sources are selected with bank 0, registers 0x49
2095 reg = w83627ehf_read_value(data, 0x4a);
2096 data->temp_src[0] = reg >> 5;
2097 reg = w83627ehf_read_value(data, 0x49);
2098 data->temp_src[1] = reg & 0x07;
2099 data->temp_src[2] = (reg >> 4) & 0x07;
2102 * W83667HG-B has another temperature register at 0x7e.
2103 * The temperature source is selected with register 0x7d.
2104 * Support it if the source differs from already reported
2107 reg = w83627ehf_read_value(data, 0x7d);
2109 if (reg != data->temp_src[0] && reg != data->temp_src[1]
2110 && reg != data->temp_src[2]) {
2111 data->temp_src[3] = reg;
2112 data->have_temp |= 1 << 3;
2116 * Chip supports either AUXTIN or VIN3. Try to find out which
2119 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
2120 if (data->temp_src[2] == 2 && (reg & 0x01))
2121 data->have_temp &= ~(1 << 2);
2123 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
2124 || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
2127 data->temp_label = w83667hg_b_temp_label;
2128 } else if (sio_data->kind == w83627uhg) {
2131 w83627ehf_set_temp_reg_ehf(data, 3);
2134 * Temperature sources for temp1 and temp2 are selected with
2135 * bank 0, registers 0x49 and 0x4a.
2137 data->temp_src[0] = 0; /* SYSTIN */
2138 reg = w83627ehf_read_value(data, 0x49) & 0x07;
2139 /* Adjust to have the same mapping as other source registers */
2141 data->temp_src[1]++;
2142 else if (reg >= 2 && reg <= 5)
2143 data->temp_src[1] += 2;
2144 else /* should never happen */
2145 data->have_temp &= ~(1 << 1);
2146 reg = w83627ehf_read_value(data, 0x4a);
2147 data->temp_src[2] = reg >> 5;
2150 * Skip temp3 if source is invalid or the same as temp1
2153 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
2154 data->temp_src[2] == data->temp_src[0] ||
2155 ((data->have_temp & (1 << 1)) &&
2156 data->temp_src[2] == data->temp_src[1]))
2157 data->have_temp &= ~(1 << 2);
2159 data->temp3_val_only = 1; /* No limit regs */
2161 data->in6_skip = 1; /* No VIN3 */
2163 data->temp_label = w83667hg_b_temp_label;
2165 w83627ehf_set_temp_reg_ehf(data, 3);
2167 /* Temperature sources are fixed */
2169 if (sio_data->kind == w83667hg) {
2173 * Chip supports either AUXTIN or VIN3. Try to find
2176 reg = w83627ehf_read_value(data,
2177 W83627EHF_REG_TEMP_CONFIG[2]);
2179 data->have_temp &= ~(1 << 2);
2185 if (sio_data->kind == nct6775) {
2186 data->has_fan_div = true;
2187 data->fan_from_reg = fan_from_reg16;
2188 data->fan_from_reg_min = fan_from_reg8;
2189 data->REG_PWM = NCT6775_REG_PWM;
2190 data->REG_TARGET = NCT6775_REG_TARGET;
2191 data->REG_FAN = NCT6775_REG_FAN;
2192 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2193 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2194 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2195 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2196 data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
2197 data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
2198 } else if (sio_data->kind == nct6776) {
2199 data->has_fan_div = false;
2200 data->fan_from_reg = fan_from_reg13;
2201 data->fan_from_reg_min = fan_from_reg13;
2202 data->REG_PWM = NCT6775_REG_PWM;
2203 data->REG_TARGET = NCT6775_REG_TARGET;
2204 data->REG_FAN = NCT6775_REG_FAN;
2205 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2206 data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
2207 data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
2208 data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
2209 } else if (sio_data->kind == w83667hg_b) {
2210 data->has_fan_div = true;
2211 data->fan_from_reg = fan_from_reg8;
2212 data->fan_from_reg_min = fan_from_reg8;
2213 data->REG_PWM = W83627EHF_REG_PWM;
2214 data->REG_TARGET = W83627EHF_REG_TARGET;
2215 data->REG_FAN = W83627EHF_REG_FAN;
2216 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2217 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2218 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2219 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2220 data->REG_FAN_MAX_OUTPUT =
2221 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
2222 data->REG_FAN_STEP_OUTPUT =
2223 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
2225 data->has_fan_div = true;
2226 data->fan_from_reg = fan_from_reg8;
2227 data->fan_from_reg_min = fan_from_reg8;
2228 data->REG_PWM = W83627EHF_REG_PWM;
2229 data->REG_TARGET = W83627EHF_REG_TARGET;
2230 data->REG_FAN = W83627EHF_REG_FAN;
2231 data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
2232 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
2233 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
2234 data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
2235 data->REG_FAN_MAX_OUTPUT =
2236 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
2237 data->REG_FAN_STEP_OUTPUT =
2238 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
2241 /* Setup input voltage scaling factors */
2242 if (sio_data->kind == w83627uhg)
2243 data->scale_in = scale_in_w83627uhg;
2245 data->scale_in = scale_in_common;
2247 /* Initialize the chip */
2248 w83627ehf_init_device(data, sio_data->kind);
2250 data->vrm = vid_which_vrm();
2251 superio_enter(sio_data->sioreg);
2252 /* Read VID value */
2253 if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
2254 sio_data->kind == nct6775 || sio_data->kind == nct6776) {
2255 /* W83667HG has different pins for VID input and output, so
2256 we can get the VID input values directly at logical device D
2258 superio_select(sio_data->sioreg, W83667HG_LD_VID);
2259 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2260 err = device_create_file(dev, &dev_attr_cpu0_vid);
2263 } else if (sio_data->kind != w83627uhg) {
2264 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2265 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
2266 /* Set VID input sensibility if needed. In theory the
2267 BIOS should have set it, but in practice it's not
2268 always the case. We only do it for the W83627EHF/EHG
2269 because the W83627DHG is more complex in this
2271 if (sio_data->kind == w83627ehf) {
2272 en_vrm10 = superio_inb(sio_data->sioreg,
2274 if ((en_vrm10 & 0x08) && data->vrm == 90) {
2275 dev_warn(dev, "Setting VID input "
2276 "voltage to TTL\n");
2277 superio_outb(sio_data->sioreg,
2280 } else if (!(en_vrm10 & 0x08)
2281 && data->vrm == 100) {
2282 dev_warn(dev, "Setting VID input "
2283 "voltage to VRM10\n");
2284 superio_outb(sio_data->sioreg,
2290 data->vid = superio_inb(sio_data->sioreg,
2292 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
2295 err = device_create_file(dev, &dev_attr_cpu0_vid);
2299 dev_info(dev, "VID pins in output mode, CPU VID not "
2305 (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
2308 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
2309 tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
2310 if (sio_data->kind == nct6776)
2311 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2314 superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
2316 pr_info("Enabled fan debounce for chip %s\n", data->name);
2319 superio_exit(sio_data->sioreg);
2321 w83627ehf_check_fan_inputs(sio_data, data);
2323 /* Read fan clock dividers immediately */
2324 w83627ehf_update_fan_div_common(dev, data);
2326 /* Read pwm data to save original values */
2327 w83627ehf_update_pwm_common(dev, data);
2328 for (i = 0; i < data->pwm_num; i++)
2329 data->pwm_enable_orig[i] = data->pwm_enable[i];
2331 /* Read pwm data to save original values */
2332 w83627ehf_update_pwm_common(dev, data);
2333 for (i = 0; i < data->pwm_num; i++)
2334 data->pwm_enable_orig[i] = data->pwm_enable[i];
2336 /* Register sysfs hooks */
2337 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
2338 err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
2343 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
2344 struct sensor_device_attribute *attr =
2345 &sda_sf3_max_step_arrays[i];
2346 if (data->REG_FAN_STEP_OUTPUT &&
2347 data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
2348 err = device_create_file(dev, &attr->dev_attr);
2353 /* if fan3 and fan4 are enabled create the sf3 files for them */
2354 if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
2355 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
2356 err = device_create_file(dev,
2357 &sda_sf3_arrays_fan3[i].dev_attr);
2361 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
2362 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
2363 err = device_create_file(dev,
2364 &sda_sf3_arrays_fan4[i].dev_attr);
2369 for (i = 0; i < data->in_num; i++) {
2370 if ((i == 6) && data->in6_skip)
2372 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
2373 || (err = device_create_file(dev,
2374 &sda_in_alarm[i].dev_attr))
2375 || (err = device_create_file(dev,
2376 &sda_in_min[i].dev_attr))
2377 || (err = device_create_file(dev,
2378 &sda_in_max[i].dev_attr)))
2382 for (i = 0; i < 5; i++) {
2383 if (data->has_fan & (1 << i)) {
2384 if ((err = device_create_file(dev,
2385 &sda_fan_input[i].dev_attr))
2386 || (err = device_create_file(dev,
2387 &sda_fan_alarm[i].dev_attr)))
2389 if (sio_data->kind != nct6776) {
2390 err = device_create_file(dev,
2391 &sda_fan_div[i].dev_attr);
2395 if (data->has_fan_min & (1 << i)) {
2396 err = device_create_file(dev,
2397 &sda_fan_min[i].dev_attr);
2401 if (i < data->pwm_num &&
2402 ((err = device_create_file(dev,
2403 &sda_pwm[i].dev_attr))
2404 || (err = device_create_file(dev,
2405 &sda_pwm_mode[i].dev_attr))
2406 || (err = device_create_file(dev,
2407 &sda_pwm_enable[i].dev_attr))
2408 || (err = device_create_file(dev,
2409 &sda_target_temp[i].dev_attr))
2410 || (err = device_create_file(dev,
2411 &sda_tolerance[i].dev_attr))))
2416 for (i = 0; i < NUM_REG_TEMP; i++) {
2417 if (!(data->have_temp & (1 << i)))
2419 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2422 if (data->temp_label) {
2423 err = device_create_file(dev,
2424 &sda_temp_label[i].dev_attr);
2428 if (i == 2 && data->temp3_val_only)
2430 if (data->reg_temp_over[i]) {
2431 err = device_create_file(dev,
2432 &sda_temp_max[i].dev_attr);
2436 if (data->reg_temp_hyst[i]) {
2437 err = device_create_file(dev,
2438 &sda_temp_max_hyst[i].dev_attr);
2444 if ((err = device_create_file(dev,
2445 &sda_temp_alarm[i].dev_attr))
2446 || (err = device_create_file(dev,
2447 &sda_temp_type[i].dev_attr)))
2451 err = device_create_file(dev, &sda_caseopen[0].dev_attr);
2455 if (sio_data->kind == nct6776) {
2456 err = device_create_file(dev, &sda_caseopen[1].dev_attr);
2461 err = device_create_file(dev, &dev_attr_name);
2465 data->hwmon_dev = hwmon_device_register(dev);
2466 if (IS_ERR(data->hwmon_dev)) {
2467 err = PTR_ERR(data->hwmon_dev);
2474 w83627ehf_device_remove_files(dev);
2476 platform_set_drvdata(pdev, NULL);
2478 release_region(res->start, IOREGION_LENGTH);
2483 static int __devexit w83627ehf_remove(struct platform_device *pdev)
2485 struct w83627ehf_data *data = platform_get_drvdata(pdev);
2487 hwmon_device_unregister(data->hwmon_dev);
2488 w83627ehf_device_remove_files(&pdev->dev);
2489 release_region(data->addr, IOREGION_LENGTH);
2490 platform_set_drvdata(pdev, NULL);
2496 static struct platform_driver w83627ehf_driver = {
2498 .owner = THIS_MODULE,
2501 .probe = w83627ehf_probe,
2502 .remove = __devexit_p(w83627ehf_remove),
2505 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2506 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2507 struct w83627ehf_sio_data *sio_data)
2509 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
2510 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
2511 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
2512 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
2513 static const char __initdata sio_name_W83627UHG[] = "W83627UHG";
2514 static const char __initdata sio_name_W83667HG[] = "W83667HG";
2515 static const char __initdata sio_name_W83667HG_B[] = "W83667HG-B";
2516 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
2517 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
2520 const char *sio_name;
2522 superio_enter(sioaddr);
2527 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2528 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2529 switch (val & SIO_ID_MASK) {
2530 case SIO_W83627EHF_ID:
2531 sio_data->kind = w83627ehf;
2532 sio_name = sio_name_W83627EHF;
2534 case SIO_W83627EHG_ID:
2535 sio_data->kind = w83627ehf;
2536 sio_name = sio_name_W83627EHG;
2538 case SIO_W83627DHG_ID:
2539 sio_data->kind = w83627dhg;
2540 sio_name = sio_name_W83627DHG;
2542 case SIO_W83627DHG_P_ID:
2543 sio_data->kind = w83627dhg_p;
2544 sio_name = sio_name_W83627DHG_P;
2546 case SIO_W83627UHG_ID:
2547 sio_data->kind = w83627uhg;
2548 sio_name = sio_name_W83627UHG;
2550 case SIO_W83667HG_ID:
2551 sio_data->kind = w83667hg;
2552 sio_name = sio_name_W83667HG;
2554 case SIO_W83667HG_B_ID:
2555 sio_data->kind = w83667hg_b;
2556 sio_name = sio_name_W83667HG_B;
2558 case SIO_NCT6775_ID:
2559 sio_data->kind = nct6775;
2560 sio_name = sio_name_NCT6775;
2562 case SIO_NCT6776_ID:
2563 sio_data->kind = nct6776;
2564 sio_name = sio_name_NCT6776;
2568 pr_debug("unsupported chip ID: 0x%04x\n", val);
2569 superio_exit(sioaddr);
2573 /* We have a known chip, find the HWM I/O address */
2574 superio_select(sioaddr, W83627EHF_LD_HWM);
2575 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2576 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2577 *addr = val & IOREGION_ALIGNMENT;
2579 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2580 superio_exit(sioaddr);
2584 /* Activate logical device if needed */
2585 val = superio_inb(sioaddr, SIO_REG_ENABLE);
2586 if (!(val & 0x01)) {
2587 pr_warn("Forcibly enabling Super-I/O. "
2588 "Sensor is probably unusable.\n");
2589 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2592 superio_exit(sioaddr);
2593 pr_info("Found %s chip at %#x\n", sio_name, *addr);
2594 sio_data->sioreg = sioaddr;
2599 /* when Super-I/O functions move to a separate file, the Super-I/O
2600 * bus will manage the lifetime of the device and this module will only keep
2601 * track of the w83627ehf driver. But since we platform_device_alloc(), we
2602 * must keep track of the device */
2603 static struct platform_device *pdev;
2605 static int __init sensors_w83627ehf_init(void)
2608 unsigned short address;
2609 struct resource res;
2610 struct w83627ehf_sio_data sio_data;
2612 /* initialize sio_data->kind and sio_data->sioreg.
2614 * when Super-I/O functions move to a separate file, the Super-I/O
2615 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2616 * w83627ehf hardware monitor, and call probe() */
2617 if (w83627ehf_find(0x2e, &address, &sio_data) &&
2618 w83627ehf_find(0x4e, &address, &sio_data))
2621 err = platform_driver_register(&w83627ehf_driver);
2625 pdev = platform_device_alloc(DRVNAME, address);
2628 pr_err("Device allocation failed\n");
2629 goto exit_unregister;
2632 err = platform_device_add_data(pdev, &sio_data,
2633 sizeof(struct w83627ehf_sio_data));
2635 pr_err("Platform data allocation failed\n");
2636 goto exit_device_put;
2639 memset(&res, 0, sizeof(res));
2641 res.start = address + IOREGION_OFFSET;
2642 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2643 res.flags = IORESOURCE_IO;
2645 err = acpi_check_resource_conflict(&res);
2647 goto exit_device_put;
2649 err = platform_device_add_resources(pdev, &res, 1);
2651 pr_err("Device resource addition failed (%d)\n", err);
2652 goto exit_device_put;
2655 /* platform_device_add calls probe() */
2656 err = platform_device_add(pdev);
2658 pr_err("Device addition failed (%d)\n", err);
2659 goto exit_device_put;
2665 platform_device_put(pdev);
2667 platform_driver_unregister(&w83627ehf_driver);
2672 static void __exit sensors_w83627ehf_exit(void)
2674 platform_device_unregister(pdev);
2675 platform_driver_unregister(&w83627ehf_driver);
2678 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
2679 MODULE_DESCRIPTION("W83627EHF driver");
2680 MODULE_LICENSE("GPL");
2682 module_init(sensors_w83627ehf_init);
2683 module_exit(sensors_w83627ehf_exit);