2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #include <linux/module.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/slab.h>
27 #include <linux/jiffies.h>
28 #include <linux/hwmon.h>
29 #include <linux/sysfs.h>
30 #include <linux/hwmon-sysfs.h>
31 #include <linux/err.h>
32 #include <linux/mutex.h>
33 #include <linux/list.h>
34 #include <linux/platform_device.h>
35 #include <linux/cpu.h>
36 #include <linux/pci.h>
38 #include <asm/processor.h>
40 #define DRVNAME "coretemp"
42 typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_TTARGET, SHOW_LABEL,
46 * Functions declaration
49 static struct coretemp_data *coretemp_update_device(struct device *dev);
51 struct coretemp_data {
52 struct device *hwmon_dev;
53 struct mutex update_lock;
56 char valid; /* zero until following fields are valid */
57 unsigned long last_updated; /* in jiffies */
68 static ssize_t show_name(struct device *dev, struct device_attribute
72 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
73 struct coretemp_data *data = dev_get_drvdata(dev);
75 if (attr->index == SHOW_NAME)
76 ret = sprintf(buf, "%s\n", data->name);
78 ret = sprintf(buf, "Core %d\n", data->id);
82 static ssize_t show_alarm(struct device *dev, struct device_attribute
85 struct coretemp_data *data = coretemp_update_device(dev);
86 /* read the Out-of-spec log, never clear */
87 return sprintf(buf, "%d\n", data->alarm);
90 static ssize_t show_temp(struct device *dev,
91 struct device_attribute *devattr, char *buf)
93 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
94 struct coretemp_data *data = coretemp_update_device(dev);
97 if (attr->index == SHOW_TEMP)
98 err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN;
99 else if (attr->index == SHOW_TJMAX)
100 err = sprintf(buf, "%d\n", data->tjmax);
102 err = sprintf(buf, "%d\n", data->ttarget);
106 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL,
108 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, NULL,
110 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL,
112 static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL);
113 static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL);
114 static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
116 static struct attribute *coretemp_attributes[] = {
117 &sensor_dev_attr_name.dev_attr.attr,
118 &sensor_dev_attr_temp1_label.dev_attr.attr,
119 &dev_attr_temp1_crit_alarm.attr,
120 &sensor_dev_attr_temp1_input.dev_attr.attr,
121 &sensor_dev_attr_temp1_crit.dev_attr.attr,
125 static const struct attribute_group coretemp_group = {
126 .attrs = coretemp_attributes,
129 static struct coretemp_data *coretemp_update_device(struct device *dev)
131 struct coretemp_data *data = dev_get_drvdata(dev);
133 mutex_lock(&data->update_lock);
135 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) {
139 rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx);
140 data->alarm = (eax >> 5) & 1;
141 /* update only if data has been valid */
142 if (eax & 0x80000000) {
143 data->temp = data->tjmax - (((eax >> 16)
147 dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax);
149 data->last_updated = jiffies;
152 mutex_unlock(&data->update_lock);
156 static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
158 /* The 100C is default for both mobile and non mobile CPUs */
161 int tjmax_ee = 85000;
165 struct pci_dev *host_bridge;
167 /* Early chips have no MSR for TjMax */
169 if ((c->x86_model == 0xf) && (c->x86_mask < 4)) {
175 if (c->x86_model == 0x1c) {
178 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
180 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
181 && (host_bridge->device == 0xa000 /* NM10 based nettop */
182 || host_bridge->device == 0xa010)) /* NM10 based netbook */
187 pci_dev_put(host_bridge);
190 if ((c->x86_model > 0xe) && (usemsr_ee)) {
193 /* Now we can detect the mobile CPU using Intel provided table
194 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
195 For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
198 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
201 "Unable to access MSR 0x17, assuming desktop"
204 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
205 /* Trust bit 28 up to Penryn, I could not find any
206 documentation on that; if you happen to know
207 someone at Intel please ask */
210 /* Platform ID bits 52:50 (EDX starts at bit 32) */
211 platform_id = (edx >> 18) & 0x7;
213 /* Mobile Penryn CPU seems to be platform ID 7 or 5
215 if ((c->x86_model == 0x17) &&
216 ((platform_id == 5) || (platform_id == 7))) {
217 /* If MSR EE bit is set, set it to 90 degrees C,
218 otherwise 105 degrees C */
227 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
230 "Unable to access MSR 0xEE, for Tjmax, left"
232 } else if (eax & 0x40000000) {
235 /* if we dont use msr EE it means we are desktop CPU (with exeception
237 } else if (tjmax == 100000) {
238 dev_warn(dev, "Using relative temperature scale!\n");
244 static int __devinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
247 /* The 100C is default for both mobile and non mobile CPUs */
252 /* A new feature of current Intel(R) processors, the
253 IA32_TEMPERATURE_TARGET contains the TjMax value */
254 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
256 dev_warn(dev, "Unable to read TjMax from CPU.\n");
258 val = (eax >> 16) & 0xff;
260 * If the TjMax is not plausible, an assumption
263 if ((val > 80) && (val < 120)) {
264 dev_info(dev, "TjMax is %d C.\n", val);
270 * An assumption is made for early CPUs and unreadable MSR.
271 * NOTE: the given value may not be correct.
274 switch (c->x86_model) {
279 dev_warn(dev, "TjMax is assumed as 100 C!\n");
283 case 0x1c: /* Atom CPUs */
284 return adjust_tjmax(c, id, dev);
287 dev_warn(dev, "CPU (model=0x%x) is not supported yet,"
288 " using default TjMax of 100C.\n", c->x86_model);
293 static int __devinit coretemp_probe(struct platform_device *pdev)
295 struct coretemp_data *data;
296 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
300 if (!(data = kzalloc(sizeof(struct coretemp_data), GFP_KERNEL))) {
302 dev_err(&pdev->dev, "Out of memory\n");
307 data->name = "coretemp";
308 mutex_init(&data->update_lock);
310 /* test if we can access the THERM_STATUS MSR */
311 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx);
314 "Unable to access THERM_STATUS MSR, giving up\n");
318 /* Check if we have problem with errata AE18 of Core processors:
319 Readings might stop update when processor visited too deep sleep,
320 fixed for stepping D0 (6EC).
323 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) {
324 /* check for microcode update */
325 rdmsr_on_cpu(data->id, MSR_IA32_UCODE_REV, &eax, &edx);
329 "Errata AE18 not fixed, update BIOS or "
330 "microcode of the CPU!\n");
335 data->tjmax = get_tjmax(c, data->id, &pdev->dev);
336 platform_set_drvdata(pdev, data);
339 * read the still undocumented IA32_TEMPERATURE_TARGET. It exists
340 * on older CPUs but not in this register,
341 * Atoms don't have it either.
344 if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) {
345 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_TEMPERATURE_TARGET,
348 dev_warn(&pdev->dev, "Unable to read"
349 " IA32_TEMPERATURE_TARGET MSR\n");
351 data->ttarget = data->tjmax -
352 (((eax >> 8) & 0xff) * 1000);
353 err = device_create_file(&pdev->dev,
354 &sensor_dev_attr_temp1_max.dev_attr);
360 if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group)))
363 data->hwmon_dev = hwmon_device_register(&pdev->dev);
364 if (IS_ERR(data->hwmon_dev)) {
365 err = PTR_ERR(data->hwmon_dev);
366 dev_err(&pdev->dev, "Class registration failed (%d)\n",
374 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group);
376 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr);
383 static int __devexit coretemp_remove(struct platform_device *pdev)
385 struct coretemp_data *data = platform_get_drvdata(pdev);
387 hwmon_device_unregister(data->hwmon_dev);
388 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group);
389 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr);
390 platform_set_drvdata(pdev, NULL);
395 static struct platform_driver coretemp_driver = {
397 .owner = THIS_MODULE,
400 .probe = coretemp_probe,
401 .remove = __devexit_p(coretemp_remove),
405 struct list_head list;
406 struct platform_device *pdev;
410 static LIST_HEAD(pdev_list);
411 static DEFINE_MUTEX(pdev_list_mutex);
413 static int __cpuinit coretemp_device_add(unsigned int cpu)
416 struct platform_device *pdev;
417 struct pdev_entry *pdev_entry;
419 pdev = platform_device_alloc(DRVNAME, cpu);
422 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
426 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
429 goto exit_device_put;
432 err = platform_device_add(pdev);
434 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
436 goto exit_device_free;
439 pdev_entry->pdev = pdev;
440 pdev_entry->cpu = cpu;
441 mutex_lock(&pdev_list_mutex);
442 list_add_tail(&pdev_entry->list, &pdev_list);
443 mutex_unlock(&pdev_list_mutex);
450 platform_device_put(pdev);
455 #ifdef CONFIG_HOTPLUG_CPU
456 static void coretemp_device_remove(unsigned int cpu)
458 struct pdev_entry *p, *n;
459 mutex_lock(&pdev_list_mutex);
460 list_for_each_entry_safe(p, n, &pdev_list, list) {
462 platform_device_unregister(p->pdev);
467 mutex_unlock(&pdev_list_mutex);
470 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
471 unsigned long action, void *hcpu)
473 unsigned int cpu = (unsigned long) hcpu;
477 case CPU_DOWN_FAILED:
478 coretemp_device_add(cpu);
480 case CPU_DOWN_PREPARE:
481 coretemp_device_remove(cpu);
487 static struct notifier_block coretemp_cpu_notifier __refdata = {
488 .notifier_call = coretemp_cpu_callback,
490 #endif /* !CONFIG_HOTPLUG_CPU */
492 static int __init coretemp_init(void)
494 int i, err = -ENODEV;
495 struct pdev_entry *p, *n;
497 /* quick check if we run Intel */
498 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
501 err = platform_driver_register(&coretemp_driver);
505 for_each_online_cpu(i) {
506 struct cpuinfo_x86 *c = &cpu_data(i);
508 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
509 * sensors. We check this bit only, all the early CPUs
510 * without thermal sensors will be filtered out.
512 if (c->cpuid_level >= 6 && (cpuid_eax(0x06) & 0x01)) {
513 err = coretemp_device_add(i);
515 goto exit_devices_unreg;
518 printk(KERN_INFO DRVNAME ": CPU (model=0x%x)"
519 " has no thermal sensor.\n", c->x86_model);
522 if (list_empty(&pdev_list)) {
524 goto exit_driver_unreg;
527 #ifdef CONFIG_HOTPLUG_CPU
528 register_hotcpu_notifier(&coretemp_cpu_notifier);
533 mutex_lock(&pdev_list_mutex);
534 list_for_each_entry_safe(p, n, &pdev_list, list) {
535 platform_device_unregister(p->pdev);
539 mutex_unlock(&pdev_list_mutex);
541 platform_driver_unregister(&coretemp_driver);
546 static void __exit coretemp_exit(void)
548 struct pdev_entry *p, *n;
549 #ifdef CONFIG_HOTPLUG_CPU
550 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
552 mutex_lock(&pdev_list_mutex);
553 list_for_each_entry_safe(p, n, &pdev_list, list) {
554 platform_device_unregister(p->pdev);
558 mutex_unlock(&pdev_list_mutex);
559 platform_driver_unregister(&coretemp_driver);
562 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
563 MODULE_DESCRIPTION("Intel Core temperature monitor");
564 MODULE_LICENSE("GPL");
566 module_init(coretemp_init)
567 module_exit(coretemp_exit)