2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
39 #include <asm/processor.h>
42 #define DRVNAME "coretemp"
44 typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_TTARGET, SHOW_LABEL,
48 * Functions declaration
51 static struct coretemp_data *coretemp_update_device(struct device *dev);
53 struct coretemp_data {
54 struct device *hwmon_dev;
55 struct mutex update_lock;
59 char valid; /* zero until following fields are valid */
60 unsigned long last_updated; /* in jiffies */
71 static ssize_t show_name(struct device *dev, struct device_attribute
75 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
76 struct coretemp_data *data = dev_get_drvdata(dev);
78 if (attr->index == SHOW_NAME)
79 ret = sprintf(buf, "%s\n", data->name);
81 ret = sprintf(buf, "Core %d\n", data->core_id);
85 static ssize_t show_alarm(struct device *dev, struct device_attribute
88 struct coretemp_data *data = coretemp_update_device(dev);
89 /* read the Out-of-spec log, never clear */
90 return sprintf(buf, "%d\n", data->alarm);
93 static ssize_t show_temp(struct device *dev,
94 struct device_attribute *devattr, char *buf)
96 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
97 struct coretemp_data *data = coretemp_update_device(dev);
100 if (attr->index == SHOW_TEMP)
101 err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN;
102 else if (attr->index == SHOW_TJMAX)
103 err = sprintf(buf, "%d\n", data->tjmax);
105 err = sprintf(buf, "%d\n", data->ttarget);
109 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL,
111 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, NULL,
113 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL,
115 static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL);
116 static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL);
117 static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
119 static struct attribute *coretemp_attributes[] = {
120 &sensor_dev_attr_name.dev_attr.attr,
121 &sensor_dev_attr_temp1_label.dev_attr.attr,
122 &dev_attr_temp1_crit_alarm.attr,
123 &sensor_dev_attr_temp1_input.dev_attr.attr,
124 &sensor_dev_attr_temp1_crit.dev_attr.attr,
128 static const struct attribute_group coretemp_group = {
129 .attrs = coretemp_attributes,
132 static struct coretemp_data *coretemp_update_device(struct device *dev)
134 struct coretemp_data *data = dev_get_drvdata(dev);
136 mutex_lock(&data->update_lock);
138 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) {
142 rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx);
143 data->alarm = (eax >> 5) & 1;
144 /* update only if data has been valid */
145 if (eax & 0x80000000) {
146 data->temp = data->tjmax - (((eax >> 16)
150 dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax);
152 data->last_updated = jiffies;
155 mutex_unlock(&data->update_lock);
159 static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
161 /* The 100C is default for both mobile and non mobile CPUs */
164 int tjmax_ee = 85000;
168 struct pci_dev *host_bridge;
170 /* Early chips have no MSR for TjMax */
172 if ((c->x86_model == 0xf) && (c->x86_mask < 4)) {
178 if (c->x86_model == 0x1c) {
181 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
183 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
184 && (host_bridge->device == 0xa000 /* NM10 based nettop */
185 || host_bridge->device == 0xa010)) /* NM10 based netbook */
190 pci_dev_put(host_bridge);
193 if ((c->x86_model > 0xe) && (usemsr_ee)) {
196 /* Now we can detect the mobile CPU using Intel provided table
197 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
198 For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
201 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
204 "Unable to access MSR 0x17, assuming desktop"
207 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
208 /* Trust bit 28 up to Penryn, I could not find any
209 documentation on that; if you happen to know
210 someone at Intel please ask */
213 /* Platform ID bits 52:50 (EDX starts at bit 32) */
214 platform_id = (edx >> 18) & 0x7;
216 /* Mobile Penryn CPU seems to be platform ID 7 or 5
218 if ((c->x86_model == 0x17) &&
219 ((platform_id == 5) || (platform_id == 7))) {
220 /* If MSR EE bit is set, set it to 90 degrees C,
221 otherwise 105 degrees C */
230 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
233 "Unable to access MSR 0xEE, for Tjmax, left"
235 } else if (eax & 0x40000000) {
238 /* if we dont use msr EE it means we are desktop CPU (with exeception
240 } else if (tjmax == 100000) {
241 dev_warn(dev, "Using relative temperature scale!\n");
247 static int __devinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
250 /* The 100C is default for both mobile and non mobile CPUs */
255 /* A new feature of current Intel(R) processors, the
256 IA32_TEMPERATURE_TARGET contains the TjMax value */
257 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
259 dev_warn(dev, "Unable to read TjMax from CPU.\n");
261 val = (eax >> 16) & 0xff;
263 * If the TjMax is not plausible, an assumption
266 if ((val > 80) && (val < 120)) {
267 dev_info(dev, "TjMax is %d C.\n", val);
273 * An assumption is made for early CPUs and unreadable MSR.
274 * NOTE: the given value may not be correct.
277 switch (c->x86_model) {
282 dev_warn(dev, "TjMax is assumed as 100 C!\n");
285 case 0x1c: /* Atom CPUs */
286 return adjust_tjmax(c, id, dev);
288 dev_warn(dev, "CPU (model=0x%x) is not supported yet,"
289 " using default TjMax of 100C.\n", c->x86_model);
294 static void __devinit get_ucode_rev_on_cpu(void *edx)
298 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
300 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
303 static int __devinit coretemp_probe(struct platform_device *pdev)
305 struct coretemp_data *data;
306 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
310 if (!(data = kzalloc(sizeof(struct coretemp_data), GFP_KERNEL))) {
312 dev_err(&pdev->dev, "Out of memory\n");
318 data->core_id = c->cpu_core_id;
320 data->name = "coretemp";
321 mutex_init(&data->update_lock);
323 /* test if we can access the THERM_STATUS MSR */
324 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx);
327 "Unable to access THERM_STATUS MSR, giving up\n");
331 /* Check if we have problem with errata AE18 of Core processors:
332 Readings might stop update when processor visited too deep sleep,
333 fixed for stepping D0 (6EC).
336 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) {
337 /* check for microcode update */
338 err = smp_call_function_single(data->id, get_ucode_rev_on_cpu,
342 "Cannot determine microcode revision of "
343 "CPU#%u (%d)!\n", data->id, err);
346 } else if (edx < 0x39) {
349 "Errata AE18 not fixed, update BIOS or "
350 "microcode of the CPU!\n");
355 data->tjmax = get_tjmax(c, data->id, &pdev->dev);
356 platform_set_drvdata(pdev, data);
359 * read the still undocumented IA32_TEMPERATURE_TARGET. It exists
360 * on older CPUs but not in this register,
361 * Atoms don't have it either.
364 if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) {
365 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_TEMPERATURE_TARGET,
368 dev_warn(&pdev->dev, "Unable to read"
369 " IA32_TEMPERATURE_TARGET MSR\n");
371 data->ttarget = data->tjmax -
372 (((eax >> 8) & 0xff) * 1000);
373 err = device_create_file(&pdev->dev,
374 &sensor_dev_attr_temp1_max.dev_attr);
380 if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group)))
383 data->hwmon_dev = hwmon_device_register(&pdev->dev);
384 if (IS_ERR(data->hwmon_dev)) {
385 err = PTR_ERR(data->hwmon_dev);
386 dev_err(&pdev->dev, "Class registration failed (%d)\n",
394 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group);
396 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr);
403 static int __devexit coretemp_remove(struct platform_device *pdev)
405 struct coretemp_data *data = platform_get_drvdata(pdev);
407 hwmon_device_unregister(data->hwmon_dev);
408 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group);
409 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr);
410 platform_set_drvdata(pdev, NULL);
415 static struct platform_driver coretemp_driver = {
417 .owner = THIS_MODULE,
420 .probe = coretemp_probe,
421 .remove = __devexit_p(coretemp_remove),
425 struct list_head list;
426 struct platform_device *pdev;
434 static LIST_HEAD(pdev_list);
435 static DEFINE_MUTEX(pdev_list_mutex);
437 static int __cpuinit coretemp_device_add(unsigned int cpu)
440 struct platform_device *pdev;
441 struct pdev_entry *pdev_entry;
442 struct cpuinfo_x86 *c = &cpu_data(cpu);
445 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
446 * sensors. We check this bit only, all the early CPUs
447 * without thermal sensors will be filtered out.
449 if (!cpu_has(c, X86_FEATURE_DTS)) {
450 pr_info("CPU (model=0x%x) has no thermal sensor\n",
455 mutex_lock(&pdev_list_mutex);
458 /* Skip second HT entry of each core */
459 list_for_each_entry(pdev_entry, &pdev_list, list) {
460 if (c->phys_proc_id == pdev_entry->phys_proc_id &&
461 c->cpu_core_id == pdev_entry->cpu_core_id) {
462 err = 0; /* Not an error */
468 pdev = platform_device_alloc(DRVNAME, cpu);
471 pr_err("Device allocation failed\n");
475 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
478 goto exit_device_put;
481 err = platform_device_add(pdev);
483 pr_err("Device addition failed (%d)\n", err);
484 goto exit_device_free;
487 pdev_entry->pdev = pdev;
488 pdev_entry->cpu = cpu;
490 pdev_entry->phys_proc_id = c->phys_proc_id;
491 pdev_entry->cpu_core_id = c->cpu_core_id;
493 list_add_tail(&pdev_entry->list, &pdev_list);
494 mutex_unlock(&pdev_list_mutex);
501 platform_device_put(pdev);
503 mutex_unlock(&pdev_list_mutex);
507 static void __cpuinit coretemp_device_remove(unsigned int cpu)
509 struct pdev_entry *p;
512 mutex_lock(&pdev_list_mutex);
513 list_for_each_entry(p, &pdev_list, list) {
517 platform_device_unregister(p->pdev);
519 mutex_unlock(&pdev_list_mutex);
521 for_each_cpu(i, cpu_sibling_mask(cpu))
522 if (i != cpu && !coretemp_device_add(i))
526 mutex_unlock(&pdev_list_mutex);
529 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
530 unsigned long action, void *hcpu)
532 unsigned int cpu = (unsigned long) hcpu;
536 case CPU_DOWN_FAILED:
537 coretemp_device_add(cpu);
539 case CPU_DOWN_PREPARE:
540 coretemp_device_remove(cpu);
546 static struct notifier_block coretemp_cpu_notifier __refdata = {
547 .notifier_call = coretemp_cpu_callback,
550 static int __init coretemp_init(void)
552 int i, err = -ENODEV;
554 /* quick check if we run Intel */
555 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
558 err = platform_driver_register(&coretemp_driver);
562 for_each_online_cpu(i)
563 coretemp_device_add(i);
565 #ifndef CONFIG_HOTPLUG_CPU
566 if (list_empty(&pdev_list)) {
568 goto exit_driver_unreg;
572 register_hotcpu_notifier(&coretemp_cpu_notifier);
575 #ifndef CONFIG_HOTPLUG_CPU
577 platform_driver_unregister(&coretemp_driver);
583 static void __exit coretemp_exit(void)
585 struct pdev_entry *p, *n;
587 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
588 mutex_lock(&pdev_list_mutex);
589 list_for_each_entry_safe(p, n, &pdev_list, list) {
590 platform_device_unregister(p->pdev);
594 mutex_unlock(&pdev_list_mutex);
595 platform_driver_unregister(&coretemp_driver);
598 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
599 MODULE_DESCRIPTION("Intel Core temperature monitor");
600 MODULE_LICENSE("GPL");
602 module_init(coretemp_init)
603 module_exit(coretemp_exit)