drivers/gpu/rogue_m/system/rk3368/sysconfig.c

   1 /*************************************************************************/ /*!
   2 @File
   3 @Title          System Configuration
   4 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
   5 @Description    System Configuration functions
   6 @License        Dual MIT/GPLv2
   7
   8 The contents of this file are subject to the MIT license as set out below.
   9
  10 Permission is hereby granted, free of charge, to any person obtaining a copy
  11 of this software and associated documentation files (the "Software"), to deal
  12 in the Software without restriction, including without limitation the rights
  13 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14 copies of the Software, and to permit persons to whom the Software is
  15 furnished to do so, subject to the following conditions:
  16
  17 The above copyright notice and this permission notice shall be included in
  18 all copies or substantial portions of the Software.
  19
  20 Alternatively, the contents of this file may be used under the terms of
  21 the GNU General Public License Version 2 ("GPL") in which case the provisions
  22 of GPL are applicable instead of those above.
  23
  24 If you wish to allow use of your version of this file only under the terms of
  25 GPL, and not to allow others to use your version of this file under the terms
  26 of the MIT license, indicate your decision by deleting the provisions above
  27 and replace them with the notice and other provisions required by GPL as set
  28 out in the file called "GPL-COPYING" included in this distribution. If you do
  29 not delete the provisions above, a recipient may use your version of this file
  30 under the terms of either the MIT license or GPL.
  31
  32 This License is also included in this distribution in the file called
  33 "MIT-COPYING".
  34
  35 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  36 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  37 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  38 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  39 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  40 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  41 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  42 */ /**************************************************************************/
  43
  44 #include "pvrsrv_device.h"
  45 #include "syscommon.h"
  46 #include "sysconfig.h"
  47 #include "physheap.h"
  48 #if defined(SUPPORT_ION)
  49 #include "ion_support.h"
  50 #endif
  51 #include "rk_init.h"
  52
  53 static RGX_TIMING_INFORMATION   gsRGXTimingInfo;
  54 static RGX_DATA                 gsRGXData;
  55 static PVRSRV_DEVICE_CONFIG     gsDevices[1];
  56 static PVRSRV_SYSTEM_CONFIG     gsSysConfig;
  57
  58 static PHYS_HEAP_FUNCTIONS      gsPhysHeapFuncs;
  59 #if defined(TDMETACODE)
  60 static PHYS_HEAP_CONFIG         gsPhysHeapConfig[3];
  61 #else
  62 static PHYS_HEAP_CONFIG         gsPhysHeapConfig[1];
  63 #endif
  64
  65 /*
  66         CPU to Device physcial address translation
  67 */
  68 static
  69 IMG_VOID UMAPhysHeapCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
  70                                                                            IMG_UINT32 ui32NumOfAddr,
  71                                                                            IMG_DEV_PHYADDR *psDevPAddr,
  72                                                                            IMG_CPU_PHYADDR *psCpuPAddr)
  73 {
  74         PVR_UNREFERENCED_PARAMETER(hPrivData);
  75
  76         /* Optimise common case */
  77         psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr;
  78         if (ui32NumOfAddr > 1)
  79         {
  80                 IMG_UINT32 ui32Idx;
  81                 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
  82                 {
  83                         psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr;
  84                 }
  85         }
  86 }
  87
  88 /*
  89         Device to CPU physcial address translation
  90 */
  91 static
  92 IMG_VOID UMAPhysHeapDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
  93                                                                            IMG_UINT32 ui32NumOfAddr,
  94                                                                            IMG_CPU_PHYADDR *psCpuPAddr,
  95                                                                            IMG_DEV_PHYADDR *psDevPAddr)
  96 {
  97         PVR_UNREFERENCED_PARAMETER(hPrivData);
  98
  99         /* Optimise common case */
 100         psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr;
 101         if (ui32NumOfAddr > 1)
 102         {
 103                 IMG_UINT32 ui32Idx;
 104                 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
 105                 {
 106                         psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr;
 107                 }
 108         }
 109 }
 110
 111 /*
 112         SysCreateConfigData
 113 */
 114 PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *hDevice)
 115 {
 116         PVR_UNREFERENCED_PARAMETER(hDevice);
 117         /* Rk Init */
 118         RgxRkInit();
 119
 120         /*
 121          * Setup information about physical memory heap(s) we have
 122          */
 123         gsPhysHeapFuncs.pfnCpuPAddrToDevPAddr = UMAPhysHeapCpuPAddrToDevPAddr;
 124         gsPhysHeapFuncs.pfnDevPAddrToCpuPAddr = UMAPhysHeapDevPAddrToCpuPAddr;
 125
 126         gsPhysHeapConfig[0].ui32PhysHeapID = 0;
 127         gsPhysHeapConfig[0].pszPDumpMemspaceName = "SYSMEM";
 128         gsPhysHeapConfig[0].eType = PHYS_HEAP_TYPE_UMA;
 129         gsPhysHeapConfig[0].psMemFuncs = &gsPhysHeapFuncs;
 130         gsPhysHeapConfig[0].hPrivData = IMG_NULL;
 131
 132 #if defined(TDMETACODE)
 133         gsPhysHeapConfig[1].ui32PhysHeapID = 1;
 134         gsPhysHeapConfig[1].pszPDumpMemspaceName = "TDMETACODEMEM";
 135         gsPhysHeapConfig[1].eType = PHYS_HEAP_TYPE_UMA;
 136         gsPhysHeapConfig[1].psMemFuncs = &gsPhysHeapFuncs;
 137         gsPhysHeapConfig[1].hPrivData = IMG_NULL;
 138
 139         gsPhysHeapConfig[2].ui32PhysHeapID = 2;
 140         gsPhysHeapConfig[2].pszPDumpMemspaceName = "TDSECUREBUFMEM";
 141         gsPhysHeapConfig[2].eType = PHYS_HEAP_TYPE_UMA;
 142         gsPhysHeapConfig[2].psMemFuncs = &gsPhysHeapFuncs;
 143         gsPhysHeapConfig[2].hPrivData = IMG_NULL;
 144 #endif
 145
 146         gsSysConfig.pasPhysHeaps = &(gsPhysHeapConfig[0]);
 147         gsSysConfig.ui32PhysHeapCount = IMG_ARR_NUM_ELEMS(gsPhysHeapConfig);
 148
 149         gsSysConfig.pui32BIFTilingHeapConfigs = gauiBIFTilingHeapXStrides;
 150         gsSysConfig.ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);
 151
 152         /*
 153          * Setup RGX specific timing data
 154          */
 155         gsRGXTimingInfo.ui32CoreClockSpeed        = RGX_RK_CORE_CLOCK_SPEED;
 156         gsRGXTimingInfo.bEnableActivePM           = IMG_TRUE;
 157         gsRGXTimingInfo.bEnableRDPowIsland        = IMG_FALSE;
 158         gsRGXTimingInfo.ui32ActivePMLatencyms     = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
 159
 160         /*
 161          *Setup RGX specific data
 162          */
 163         gsRGXData.psRGXTimingInfo = &gsRGXTimingInfo;
 164 #if defined(TDMETACODE)
 165         gsRGXData.bHasTDMetaCodePhysHeap = IMG_TRUE;
 166         gsRGXData.uiTDMetaCodePhysHeapID = 1;
 167
 168         gsRGXData.bHasTDSecureBufPhysHeap = IMG_TRUE;
 169         gsRGXData.uiTDSecureBufPhysHeapID = 2;
 170 #endif
 171
 172         /*
 173          * Setup RGX device
 174          */
 175         gsDevices[0].eDeviceType            = PVRSRV_DEVICE_TYPE_RGX;
 176         gsDevices[0].pszName                = "RGX";
 177
 178         /* Device setup information */
 179         gsDevices[0].sRegsCpuPBase.uiAddr   = RK_GPU_PBASE;
 180         gsDevices[0].ui32RegsSize           = RK_GPU_SIZE;
 181         gsDevices[0].ui32IRQ                = RK_IRQ_GPU;
 182         gsDevices[0].bIRQIsShared           = IMG_FALSE;
 183
 184         /* Device's physical heap IDs */
 185         gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] = 0;
 186         gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] = 0;
 187
 188         /* No power management on RK system */
 189         gsDevices[0].pfnPrePowerState       = RkPrePowerState;
 190         gsDevices[0].pfnPostPowerState      = RkPostPowerState;
 191
 192         /* No clock frequency either */
 193         gsDevices[0].pfnClockFreqGet        = IMG_NULL;
 194
 195         /* No interrupt handled either */
 196         gsDevices[0].pfnInterruptHandled    = IMG_NULL;
 197
 198         gsDevices[0].pfnCheckMemAllocSize   = SysCheckMemAllocSize;
 199
 200         gsDevices[0].hDevData               = &gsRGXData;
 201
 202         /*
 203          * Setup system config
 204          */
 205         gsSysConfig.pszSystemName = RGX_RK_SYSTEM_NAME;
 206         gsSysConfig.uiDeviceCount = sizeof(gsDevices)/sizeof(gsDevices[0]);
 207         gsSysConfig.pasDevices = &gsDevices[0];
 208
 209         /* No power management on no HW system */
 210         gsSysConfig.pfnSysPrePowerState = IMG_NULL;
 211         gsSysConfig.pfnSysPostPowerState = IMG_NULL;
 212
 213         /* no cache snooping */
 214         gsSysConfig.eCacheSnoopingMode = PVRSRV_SYSTEM_SNOOP_NONE;
 215
 216         /* Setup other system specific stuff */
 217 #if defined(SUPPORT_ION)
 218         IonInit(NULL);
 219 #endif
 220
 221         *ppsSysConfig = &gsSysConfig;
 222
 223         return PVRSRV_OK;
 224 }
 225
 226 /*
 227         SysDestroyConfigData
 228 */
 229 IMG_VOID SysDestroyConfigData(PVRSRV_SYSTEM_CONFIG *psSysConfig)
 230 {
 231         PVR_UNREFERENCED_PARAMETER(psSysConfig);
 232
 233         /* Rk UnInit */
 234         RgxRkUnInit();
 235
 236 #if defined(SUPPORT_ION)
 237         IonDeinit();
 238 #endif
 239 }
 240
 241 PVRSRV_ERROR SysAcquireSystemData(IMG_HANDLE hSysData)
 242 {
 243         PVR_UNREFERENCED_PARAMETER(hSysData);
 244
 245         return PVRSRV_ERROR_NOT_SUPPORTED;
 246 }
 247
 248 PVRSRV_ERROR SysReleaseSystemData(IMG_HANDLE hSysData)
 249 {
 250         PVR_UNREFERENCED_PARAMETER(hSysData);
 251
 252         return PVRSRV_ERROR_NOT_SUPPORTED;
 253 }
 254
 255 PVRSRV_ERROR SysDebugInfo(PVRSRV_SYSTEM_CONFIG *psSysConfig, DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf)
 256 {
 257         PVR_UNREFERENCED_PARAMETER(psSysConfig);
 258         PVR_UNREFERENCED_PARAMETER(pfnDumpDebugPrintf);
 259         return PVRSRV_OK;
 260 }
 261
 262 /******************************************************************************
 263  End of file (sysconfig.c)
 264 ******************************************************************************/