RK3368 GPU version Rogue M 1.28
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / rogue_m / services / system / rgx_sunxi / sysconfig.c
1 /*************************************************************************/ /*!
2 @Title          System Configuration
3 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
4 @License        Dual MIT/GPLv2
5
6 The contents of this file are subject to the MIT license as set out below.
7
8 Permission is hereby granted, free of charge, to any person obtaining a copy
9 of this software and associated documentation files (the "Software"), to deal
10 in the Software without restriction, including without limitation the rights
11 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 copies of the Software, and to permit persons to whom the Software is
13 furnished to do so, subject to the following conditions:
14
15 The above copyright notice and this permission notice shall be included in
16 all copies or substantial portions of the Software.
17
18 Alternatively, the contents of this file may be used under the terms of
19 the GNU General Public License Version 2 ("GPL") in which case the provisions
20 of GPL are applicable instead of those above.
21
22 If you wish to allow use of your version of this file only under the terms of
23 GPL, and not to allow others to use your version of this file under the terms
24 of the MIT license, indicate your decision by deleting the provisions above
25 and replace them with the notice and other provisions required by GPL as set
26 out in the file called "GPL-COPYING" included in this distribution. If you do
27 not delete the provisions above, a recipient may use your version of this file
28 under the terms of either the MIT license or GPL.
29
30 This License is also included in this distribution in the file called
31 "MIT-COPYING".
32
33 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
34 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
35 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
36 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
37 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
38 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
39 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
40 @Description    System Configuration functions
41 */ /**************************************************************************/
42
43 #include "pvrsrv_device.h"
44 #include "syscommon.h"
45 #include "sysconfig.h"
46 #include "physheap.h"
47 #if defined(SUPPORT_ION)
48 #include "ion_support.h"
49 #endif
50
51 #include <mach/platform.h>
52 #include <mach/irqs.h>
53 #include "sunxi_init.h"
54
55 static RGX_TIMING_INFORMATION   gsRGXTimingInfo;
56 static RGX_DATA                 gsRGXData;
57 static PVRSRV_DEVICE_CONFIG     gsDevices[1];
58 static PVRSRV_SYSTEM_CONFIG     gsSysConfig;
59
60 static PHYS_HEAP_FUNCTIONS      gsPhysHeapFuncs;
61 static PHYS_HEAP_CONFIG         gsPhysHeapConfig[1];
62
63
64 /*
65         CPU to Device physcial address translation
66 */
67 static
68 IMG_VOID UMAPhysHeapCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
69                                                                            IMG_UINT32 ui32NumOfAddr,
70                                                                            IMG_DEV_PHYADDR *psDevPAddr,
71                                                                            IMG_CPU_PHYADDR *psCpuPAddr)
72 {
73         PVR_UNREFERENCED_PARAMETER(hPrivData);
74
75         /* Optimise common case */
76         psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr;
77         if (ui32NumOfAddr > 1)
78         {
79                 IMG_UINT32 ui32Idx;
80                 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
81                 {
82                         psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr;
83                 }
84         }
85 }
86
87 /*
88         Device to CPU physcial address translation
89 */
90 static
91 IMG_VOID UMAPhysHeapDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
92                                                                            IMG_UINT32 ui32NumOfAddr,
93                                                                            IMG_CPU_PHYADDR *psCpuPAddr,
94                                                                            IMG_DEV_PHYADDR *psDevPAddr)                           
95 {
96         PVR_UNREFERENCED_PARAMETER(hPrivData);
97
98         /* Optimise common case */
99         psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr;
100         if (ui32NumOfAddr > 1)
101         {
102                 IMG_UINT32 ui32Idx;
103                 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
104                 {
105                         psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr;
106                 }
107         }
108 }
109
110 /*
111         SysCreateConfigData
112 */
113 PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *hDevice)
114 {
115         PVR_UNREFERENCED_PARAMETER(hDevice);
116
117         /* Sunxi Init */
118         RgxSunxiInit(&gsDevices[0]);
119         
120         /*
121          * Setup information about physical memory heap(s) we have
122          */
123         gsPhysHeapFuncs.pfnCpuPAddrToDevPAddr = UMAPhysHeapCpuPAddrToDevPAddr;
124         gsPhysHeapFuncs.pfnDevPAddrToCpuPAddr = UMAPhysHeapDevPAddrToCpuPAddr;
125
126         gsPhysHeapConfig[0].ui32PhysHeapID = 0;
127         gsPhysHeapConfig[0].pszPDumpMemspaceName = "SYSMEM";
128         gsPhysHeapConfig[0].eType = PHYS_HEAP_TYPE_UMA;
129         gsPhysHeapConfig[0].psMemFuncs = &gsPhysHeapFuncs;
130         gsPhysHeapConfig[0].hPrivData = IMG_NULL;
131
132         gsSysConfig.pasPhysHeaps = &(gsPhysHeapConfig[0]);
133         gsSysConfig.ui32PhysHeapCount = IMG_ARR_NUM_ELEMS(gsPhysHeapConfig);
134
135         gsSysConfig.pui32BIFTilingHeapConfigs = gauiBIFTilingHeapXStrides;
136         gsSysConfig.ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);
137
138         /*
139          * Setup RGX specific timing data
140          */
141         gsRGXTimingInfo.ui32CoreClockSpeed        = GetConfigFreq();
142         gsRGXTimingInfo.bEnableActivePM           = IMG_TRUE;
143         gsRGXTimingInfo.bEnableRDPowIsland        = IMG_TRUE;
144         gsRGXTimingInfo.ui32ActivePMLatencyms     = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
145
146         /*
147          *Setup RGX specific data
148          */
149         gsRGXData.psRGXTimingInfo = &gsRGXTimingInfo;
150
151         /*
152          * Setup RGX device
153          */
154         gsDevices[0].eDeviceType            = PVRSRV_DEVICE_TYPE_RGX;
155         gsDevices[0].pszName                = "RGX";
156
157         /* Device setup information */
158         gsDevices[0].sRegsCpuPBase.uiAddr   = SUNXI_GPU_PBASE;
159         gsDevices[0].ui32RegsSize           = SUNXI_GPU_SIZE;
160         gsDevices[0].ui32IRQ                = SUNXI_IRQ_GPU;
161         gsDevices[0].bIRQIsShared           = IMG_FALSE;
162
163         /* Device's physical heap IDs */
164         gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] = 0;
165         gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] = 0;
166
167         /* Power management on SUNXI system */
168         gsDevices[0].pfnPrePowerState       = AwPrePowerState;
169         gsDevices[0].pfnPostPowerState      = AwPostPowerState;
170
171         /* No clock frequency either */
172         gsDevices[0].pfnClockFreqGet        = IMG_NULL;
173
174         /* No interrupt handled either */
175         gsDevices[0].pfnInterruptHandled    = IMG_NULL;
176
177         gsDevices[0].pfnCheckMemAllocSize   = SysCheckMemAllocSize;
178
179         gsDevices[0].hDevData               = &gsRGXData;
180
181 #if defined(PVR_DVFS)
182         gsDevices[0].sDVFS.sDVFSDeviceCfg.ui32PollMs = 100;
183         gsDevices[0].sDVFS.sDVFSDeviceCfg.bIdleReq = IMG_FALSE;
184
185         gsDevices[0].sDVFS.sDVFSGovernorCfg.ui32UpThreshold = 90;
186         gsDevices[0].sDVFS.sDVFSGovernorCfg.ui32DownDifferential = 10;
187
188 #if defined(PVR_POWER_ACTOR)
189         gsDevices[0].sDVFS.sDVFSPACfg.i32Ta = 113;
190         gsDevices[0].sDVFS.sDVFSPACfg.i32Tb = -11375;
191         gsDevices[0].sDVFS.sDVFSPACfg.i32Tc = 800472;
192         gsDevices[0].sDVFS.sDVFSPACfg.i32Td = -7651043;
193         gsDevices[0].sDVFS.sDVFSPACfg.ui32Other = 0;
194         gsDevices[0].sDVFS.sDVFSPACfg.ui32Weight = 0;
195 #endif
196 #endif
197
198         /*
199          * Setup system config
200          */
201         gsSysConfig.pszSystemName = RGX_SUNXI_SYSTEM_NAME;
202         gsSysConfig.uiDeviceCount = sizeof(gsDevices)/sizeof(gsDevices[0]);
203         gsSysConfig.pasDevices = &gsDevices[0];
204
205         /* No power management on no HW system */
206         gsSysConfig.pfnSysPrePowerState = IMG_NULL;
207         gsSysConfig.pfnSysPostPowerState = IMG_NULL;
208
209         /* no cache snooping */
210         gsSysConfig.eCacheSnoopingMode = PVRSRV_SYSTEM_SNOOP_NONE;
211
212         /* Setup other system specific stuff */
213 #if defined(SUPPORT_ION)
214         IonInit(NULL);
215 #endif
216
217         *ppsSysConfig = &gsSysConfig;
218
219         return PVRSRV_OK;
220 }
221
222 /*
223         SysDestroyConfigData
224 */
225 void SysDestroyConfigData(PVRSRV_SYSTEM_CONFIG *psSysConfig)
226 {
227         PVR_UNREFERENCED_PARAMETER(psSysConfig);
228
229         /* Sunxi DeInit */
230         RgxSunxiDeInit();
231
232 #if defined(SUPPORT_ION)
233         IonDeinit();
234 #endif
235 }
236
237 PVRSRV_ERROR SysAcquireSystemData(IMG_HANDLE hSysData)
238 {
239         PVR_UNREFERENCED_PARAMETER(hSysData);
240
241         return PVRSRV_ERROR_NOT_SUPPORTED;
242 }
243
244 PVRSRV_ERROR SysReleaseSystemData(IMG_HANDLE hSysData)
245 {
246         PVR_UNREFERENCED_PARAMETER(hSysData);
247
248         return PVRSRV_ERROR_NOT_SUPPORTED;
249 }
250
251 PVRSRV_ERROR SysDebugInfo(PVRSRV_SYSTEM_CONFIG *psSysConfig, DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf)
252 {
253         PVR_UNREFERENCED_PARAMETER(psSysConfig);
254         PVR_UNREFERENCED_PARAMETER(pfnDumpDebugPrintf);
255         return PVRSRV_OK;
256 }
257
258 /******************************************************************************
259  End of file (sysconfig.c)
260 ******************************************************************************/