1 /*************************************************************************/ /*!
3 @Title System Configuration
4 @Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
5 @Description System Configuration functions
6 @License Dual MIT/GPLv2
8 The contents of this file are subject to the MIT license as set out below.
10 Permission is hereby granted, free of charge, to any person obtaining a copy
11 of this software and associated documentation files (the "Software"), to deal
12 in the Software without restriction, including without limitation the rights
13 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 copies of the Software, and to permit persons to whom the Software is
15 furnished to do so, subject to the following conditions:
17 The above copyright notice and this permission notice shall be included in
18 all copies or substantial portions of the Software.
20 Alternatively, the contents of this file may be used under the terms of
21 the GNU General Public License Version 2 ("GPL") in which case the provisions
22 of GPL are applicable instead of those above.
24 If you wish to allow use of your version of this file only under the terms of
25 GPL, and not to allow others to use your version of this file under the terms
26 of the MIT license, indicate your decision by deleting the provisions above
27 and replace them with the notice and other provisions required by GPL as set
28 out in the file called "GPL-COPYING" included in this distribution. If you do
29 not delete the provisions above, a recipient may use your version of this file
30 under the terms of either the MIT license or GPL.
32 This License is also included in this distribution in the file called
35 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
36 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
37 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
38 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
39 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
40 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
41 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
42 */ /**************************************************************************/
44 #include "pvrsrv_device.h"
45 #include "syscommon.h"
46 #include "sysconfig.h"
48 #if defined(SUPPORT_ION)
49 #include "ion_support.h"
52 static RGX_TIMING_INFORMATION gsRGXTimingInfo;
53 static RGX_DATA gsRGXData;
54 static PVRSRV_DEVICE_CONFIG gsDevices[1];
55 static PVRSRV_SYSTEM_CONFIG gsSysConfig;
57 static PHYS_HEAP_FUNCTIONS gsPhysHeapFuncs;
58 #if defined(TDMETACODE)
59 static PHYS_HEAP_CONFIG gsPhysHeapConfig[3];
61 static PHYS_HEAP_CONFIG gsPhysHeapConfig[1];
65 CPU to Device physcial address translation
68 IMG_VOID UMAPhysHeapCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
69 IMG_UINT32 ui32NumOfAddr,
70 IMG_DEV_PHYADDR *psDevPAddr,
71 IMG_CPU_PHYADDR *psCpuPAddr)
73 PVR_UNREFERENCED_PARAMETER(hPrivData);
75 /* Optimise common case */
76 psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr;
77 if (ui32NumOfAddr > 1)
80 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
82 psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr;
88 Device to CPU physcial address translation
91 IMG_VOID UMAPhysHeapDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
92 IMG_UINT32 ui32NumOfAddr,
93 IMG_CPU_PHYADDR *psCpuPAddr,
94 IMG_DEV_PHYADDR *psDevPAddr)
96 PVR_UNREFERENCED_PARAMETER(hPrivData);
98 /* Optimise common case */
99 psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr;
100 if (ui32NumOfAddr > 1)
103 for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
105 psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr;
113 PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *device)
115 PVR_UNREFERENCED_PARAMETER(device);
118 * Setup information about physical memory heap(s) we have
120 gsPhysHeapFuncs.pfnCpuPAddrToDevPAddr = UMAPhysHeapCpuPAddrToDevPAddr;
121 gsPhysHeapFuncs.pfnDevPAddrToCpuPAddr = UMAPhysHeapDevPAddrToCpuPAddr;
123 gsPhysHeapConfig[0].ui32PhysHeapID = 0;
124 gsPhysHeapConfig[0].pszPDumpMemspaceName = "SYSMEM";
125 gsPhysHeapConfig[0].eType = PHYS_HEAP_TYPE_UMA;
126 gsPhysHeapConfig[0].psMemFuncs = &gsPhysHeapFuncs;
127 gsPhysHeapConfig[0].hPrivData = IMG_NULL;
129 #if defined(TDMETACODE)
130 gsPhysHeapConfig[1].ui32PhysHeapID = 1;
131 gsPhysHeapConfig[1].pszPDumpMemspaceName = "TDMETACODEMEM";
132 gsPhysHeapConfig[1].eType = PHYS_HEAP_TYPE_UMA;
133 gsPhysHeapConfig[1].psMemFuncs = &gsPhysHeapFuncs;
134 gsPhysHeapConfig[1].hPrivData = IMG_NULL;
136 gsPhysHeapConfig[2].ui32PhysHeapID = 2;
137 gsPhysHeapConfig[2].pszPDumpMemspaceName = "TDSECUREBUFMEM";
138 gsPhysHeapConfig[2].eType = PHYS_HEAP_TYPE_UMA;
139 gsPhysHeapConfig[2].psMemFuncs = &gsPhysHeapFuncs;
140 gsPhysHeapConfig[2].hPrivData = IMG_NULL;
143 gsSysConfig.pasPhysHeaps = &(gsPhysHeapConfig[0]);
144 gsSysConfig.ui32PhysHeapCount = IMG_ARR_NUM_ELEMS(gsPhysHeapConfig);
146 gsSysConfig.pui32BIFTilingHeapConfigs = gauiBIFTilingHeapXStrides;
147 gsSysConfig.ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);
150 * Setup RGX specific timing data
152 gsRGXTimingInfo.ui32CoreClockSpeed = RGX_NOHW_CORE_CLOCK_SPEED;
153 gsRGXTimingInfo.bEnableActivePM = IMG_FALSE;
154 gsRGXTimingInfo.bEnableRDPowIsland = IMG_FALSE;
155 gsRGXTimingInfo.ui32ActivePMLatencyms = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
158 *Setup RGX specific data
160 gsRGXData.psRGXTimingInfo = &gsRGXTimingInfo;
161 #if defined(TDMETACODE)
162 gsRGXData.bHasTDMetaCodePhysHeap = IMG_TRUE;
163 gsRGXData.uiTDMetaCodePhysHeapID = 1;
165 gsRGXData.bHasTDSecureBufPhysHeap = IMG_TRUE;
166 gsRGXData.uiTDSecureBufPhysHeapID = 2;
172 gsDevices[0].eDeviceType = PVRSRV_DEVICE_TYPE_RGX;
173 gsDevices[0].pszName = "RGX";
175 /* Device setup information */
176 gsDevices[0].sRegsCpuPBase.uiAddr = 0x00f00baa;
177 gsDevices[0].ui32RegsSize = 0x4000;
178 gsDevices[0].ui32IRQ = 0x00000bad;
179 gsDevices[0].bIRQIsShared = IMG_FALSE;
181 /* Device's physical heap IDs */
182 gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] = 0;
183 gsDevices[0].aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] = 0;
185 /* No power management on no HW system */
186 gsDevices[0].pfnPrePowerState = IMG_NULL;
187 gsDevices[0].pfnPostPowerState = IMG_NULL;
189 /* No clock frequency either */
190 gsDevices[0].pfnClockFreqGet = IMG_NULL;
192 /* No interrupt handled either */
193 gsDevices[0].pfnInterruptHandled = IMG_NULL;
195 gsDevices[0].pfnCheckMemAllocSize = SysCheckMemAllocSize;
197 gsDevices[0].hDevData = &gsRGXData;
200 * Setup system config
202 gsSysConfig.pszSystemName = RGX_NOHW_SYSTEM_NAME;
203 gsSysConfig.uiDeviceCount = sizeof(gsDevices)/sizeof(gsDevices[0]);
204 gsSysConfig.pasDevices = &gsDevices[0];
206 /* No power management on no HW system */
207 gsSysConfig.pfnSysPrePowerState = IMG_NULL;
208 gsSysConfig.pfnSysPostPowerState = IMG_NULL;
210 /* no cache snooping */
211 gsSysConfig.eCacheSnoopingMode = PVRSRV_SYSTEM_SNOOP_NONE;
213 /* Setup other system specific stuff */
214 #if defined(SUPPORT_ION)
218 *ppsSysConfig = &gsSysConfig;
226 IMG_VOID SysDestroyConfigData(PVRSRV_SYSTEM_CONFIG *psSysConfig)
228 PVR_UNREFERENCED_PARAMETER(psSysConfig);
230 #if defined(SUPPORT_ION)
235 PVRSRV_ERROR SysAcquireSystemData(IMG_HANDLE hSysData)
237 PVR_UNREFERENCED_PARAMETER(hSysData);
239 return PVRSRV_ERROR_NOT_SUPPORTED;
242 PVRSRV_ERROR SysReleaseSystemData(IMG_HANDLE hSysData)
244 PVR_UNREFERENCED_PARAMETER(hSysData);
246 return PVRSRV_ERROR_NOT_SUPPORTED;
249 PVRSRV_ERROR SysDebugInfo(PVRSRV_SYSTEM_CONFIG *psSysConfig, DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf)
251 PVR_UNREFERENCED_PARAMETER(psSysConfig);
252 PVR_UNREFERENCED_PARAMETER(pfnDumpDebugPrintf);
256 /******************************************************************************
257 End of file (sysconfig.c)
258 ******************************************************************************/