drivers/gpu/drm/rockchip/rockchip_drm_rga.c

   1 #include <linux/clk.h>
   2 #include <linux/debugfs.h>
   3 #include <linux/delay.h>
   4 #include <linux/dma-buf.h>
   5 #include <linux/dma-mapping.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/of.h>
   8 #include <linux/of_address.h>
   9 #include <linux/of_device.h>
  10 #include <linux/pm_runtime.h>
  11 #include <linux/reset.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/slab.h>
  14 #include <linux/uaccess.h>
  15
  16 #include <asm/cacheflush.h>
  17 #include <drm/drmP.h>
  18 #include <drm/rockchip_drm.h>
  19
  20 #include "rockchip_drm_drv.h"
  21 #include "rockchip_drm_rga.h"
  22
  23 #define RGA_MODE_BASE_REG               0x0100
  24 #define RGA_MODE_MAX_REG                0x017C
  25
  26 #define RGA_SYS_CTRL                    0x0000
  27 #define RGA_CMD_CTRL                    0x0004
  28 #define RGA_CMD_BASE                    0x0008
  29 #define RGA_INT                         0x0010
  30 #define RGA_MMU_CTRL0                   0x0014
  31 #define RGA_VERSION_INFO                0x0028
  32
  33 #define RGA_SRC_Y_RGB_BASE_ADDR         0x0108
  34 #define RGA_SRC_CB_BASE_ADDR            0x010C
  35 #define RGA_SRC_CR_BASE_ADDR            0x0110
  36 #define RGA_SRC1_RGB_BASE_ADDR          0x0114
  37 #define RGA_DST_Y_RGB_BASE_ADDR         0x013C
  38 #define RGA_DST_CB_BASE_ADDR            0x0140
  39 #define RGA_DST_CR_BASE_ADDR            0x014C
  40 #define RGA_MMU_CTRL1                   0x016C
  41 #define RGA_MMU_SRC_BASE                0x0170
  42 #define RGA_MMU_SRC1_BASE               0x0174
  43 #define RGA_MMU_DST_BASE                0x0178
  44
  45 static void __user *rga_compat_ptr(u64 value)
  46 {
  47 #ifdef CONFIG_ARM64
  48         return (void __user *)(value);
  49 #else
  50         return (void __user *)((u32)(value));
  51 #endif
  52 }
  53
  54 static void rga_dma_flush_range(void *ptr, int size)
  55 {
  56 #ifdef CONFIG_ARM
  57         dmac_flush_range(ptr, ptr + size);
  58         outer_flush_range(virt_to_phys(ptr), virt_to_phys(ptr + size));
  59 #elif defined CONFIG_ARM64
  60         __dma_flush_range(ptr, ptr + size);
  61 #endif
  62 }
  63
  64 static inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value)
  65 {
  66         writel(value, rga->regs + reg);
  67 }
  68
  69 static inline u32 rga_read(struct rockchip_rga *rga, u32 reg)
  70 {
  71         return readl(rga->regs + reg);
  72 }
  73
  74 static inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask)
  75 {
  76         u32 temp = rga_read(rga, reg) & ~(mask);
  77
  78         temp |= val & mask;
  79         rga_write(rga, reg, temp);
  80 }
  81
  82 static int rga_enable_clocks(struct rockchip_rga *rga)
  83 {
  84         int ret;
  85
  86         ret = clk_prepare_enable(rga->sclk);
  87         if (ret) {
  88                 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
  89                 return ret;
  90         }
  91
  92         ret = clk_prepare_enable(rga->aclk);
  93         if (ret) {
  94                 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
  95                 goto err_disable_sclk;
  96         }
  97
  98         ret = clk_prepare_enable(rga->hclk);
  99         if (ret) {
 100                 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
 101                 goto err_disable_aclk;
 102         }
 103
 104         return 0;
 105
 106 err_disable_sclk:
 107         clk_disable_unprepare(rga->sclk);
 108 err_disable_aclk:
 109         clk_disable_unprepare(rga->aclk);
 110
 111         return ret;
 112 }
 113
 114 static void rga_disable_clocks(struct rockchip_rga *rga)
 115 {
 116         clk_disable_unprepare(rga->sclk);
 117         clk_disable_unprepare(rga->hclk);
 118         clk_disable_unprepare(rga->aclk);
 119 }
 120
 121 static void rga_init_cmdlist(struct rockchip_rga *rga)
 122 {
 123         struct rga_cmdlist_node *node;
 124         int nr;
 125
 126         node = rga->cmdlist_node;
 127
 128         for (nr = 0; nr < ARRAY_SIZE(rga->cmdlist_node); nr++)
 129                 list_add_tail(&node[nr].list, &rga->free_cmdlist);
 130 }
 131
 132 static int rga_alloc_dma_buf_for_cmdlist(struct rga_runqueue_node *runqueue)
 133 {
 134         struct list_head *run_cmdlist = &runqueue->run_cmdlist;
 135         struct device *dev = runqueue->dev;
 136         struct dma_attrs cmdlist_dma_attrs;
 137         struct rga_cmdlist_node *node;
 138         void *cmdlist_pool_virt;
 139         dma_addr_t cmdlist_pool;
 140         int cmdlist_cnt = 0;
 141         int count = 0;
 142
 143         list_for_each_entry(node, run_cmdlist, list)
 144                 cmdlist_cnt++;
 145
 146         init_dma_attrs(&cmdlist_dma_attrs);
 147         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &runqueue->cmdlist_dma_attrs);
 148
 149         cmdlist_pool_virt = dma_alloc_attrs(dev, cmdlist_cnt * RGA_CMDLIST_SIZE,
 150                                             &cmdlist_pool, GFP_KERNEL,
 151                                             &cmdlist_dma_attrs);
 152         if (!cmdlist_pool_virt) {
 153                 dev_err(dev, "failed to allocate cmdlist dma memory\n");
 154                 return -ENOMEM;
 155         }
 156
 157         /*
 158          * Fill in the RGA operation registers from cmdlist command buffer,
 159          * and also filled in the MMU TLB base information.
 160          */
 161         list_for_each_entry(node, run_cmdlist, list) {
 162                 struct rga_cmdlist *cmdlist = &node->cmdlist;
 163                 unsigned int mmu_ctrl = 0;
 164                 unsigned int reg;
 165                 u32 *dest;
 166                 int i;
 167
 168                 dest = cmdlist_pool_virt + RGA_CMDLIST_SIZE * 4 * count++;
 169
 170                 for (i = 0; i < cmdlist->last / 2; i++) {
 171                         reg = (node->cmdlist.data[2 * i] - RGA_MODE_BASE_REG);
 172                         if (reg > RGA_MODE_BASE_REG)
 173                                 continue;
 174                         dest[reg >> 2] = cmdlist->data[2 * i + 1];
 175                 }
 176
 177                 if (cmdlist->src_mmu_pages) {
 178                         reg = RGA_MMU_SRC_BASE - RGA_MODE_BASE_REG;
 179                         dest[reg >> 2] = virt_to_phys(cmdlist->src_mmu_pages) >> 4;
 180                         mmu_ctrl |= 0x7;
 181                 }
 182
 183                 if (cmdlist->dst_mmu_pages) {
 184                         reg = RGA_MMU_DST_BASE - RGA_MODE_BASE_REG;
 185                         dest[reg >> 2] = virt_to_phys(cmdlist->dst_mmu_pages) >> 4;
 186                         mmu_ctrl |= 0x7 << 8;
 187                 }
 188
 189                 if (cmdlist->src1_mmu_pages) {
 190                         reg = RGA_MMU_SRC1_BASE - RGA_MODE_BASE_REG;
 191                         dest[reg >> 2] = virt_to_phys(cmdlist->src1_mmu_pages) >> 4;
 192                         mmu_ctrl |= 0x7 << 4;
 193                 }
 194
 195                 reg = RGA_MMU_CTRL1 - RGA_MODE_BASE_REG;
 196                 dest[reg >> 2] = mmu_ctrl;
 197         }
 198
 199         rga_dma_flush_range(cmdlist_pool_virt, cmdlist_cnt * RGA_CMDLIST_SIZE);
 200
 201         runqueue->cmdlist_dma_attrs = cmdlist_dma_attrs;
 202         runqueue->cmdlist_pool_virt = cmdlist_pool_virt;
 203         runqueue->cmdlist_pool = cmdlist_pool;
 204         runqueue->cmdlist_cnt = cmdlist_cnt;
 205
 206         return 0;
 207 }
 208
 209 static int rga_check_reg_offset(struct device *dev,
 210                                 struct rga_cmdlist_node *node)
 211 {
 212         struct rga_cmdlist *cmdlist = &node->cmdlist;
 213         int index;
 214         int reg;
 215         int i;
 216
 217         for (i = 0; i < cmdlist->last / 2; i++) {
 218                 index = cmdlist->last - 2 * (i + 1);
 219                 reg = cmdlist->data[index];
 220
 221                 switch (reg) {
 222                 case RGA_BUF_TYPE_GEMFD | RGA_DST_Y_RGB_BASE_ADDR:
 223                 case RGA_BUF_TYPE_GEMFD | RGA_SRC_Y_RGB_BASE_ADDR:
 224                         break;
 225
 226                 case RGA_BUF_TYPE_USERPTR | RGA_DST_Y_RGB_BASE_ADDR:
 227                 case RGA_BUF_TYPE_USERPTR | RGA_SRC_Y_RGB_BASE_ADDR:
 228                         goto err;
 229
 230                 default:
 231                         if (reg < RGA_MODE_BASE_REG || reg > RGA_MODE_MAX_REG)
 232                                 goto err;
 233
 234                         if (reg % 4)
 235                                 goto err;
 236                 }
 237         }
 238
 239         return 0;
 240
 241 err:
 242         dev_err(dev, "Bad register offset: 0x%x\n", cmdlist->data[index]);
 243         return -EINVAL;
 244 }
 245
 246 static struct dma_buf_attachment *
 247 rga_gem_buf_to_pages(struct rockchip_rga *rga, void **mmu_pages, int fd)
 248 {
 249         struct dma_buf_attachment *attach;
 250         struct dma_buf *dmabuf;
 251         struct sg_table *sgt;
 252         struct scatterlist *sgl;
 253         unsigned int mapped_size = 0;
 254         unsigned int address;
 255         unsigned int len;
 256         unsigned int i, p;
 257         unsigned int *pages;
 258         int ret;
 259
 260         dmabuf = dma_buf_get(fd);
 261         if (IS_ERR(dmabuf)) {
 262                 dev_err(rga->dev, "Failed to get dma_buf with fd %d\n", fd);
 263                 return ERR_PTR(-EINVAL);
 264         }
 265
 266         attach = dma_buf_attach(dmabuf, rga->dev);
 267         if (IS_ERR(attach)) {
 268                 dev_err(rga->dev, "Failed to attach dma_buf\n");
 269                 ret = PTR_ERR(attach);
 270                 goto failed_attach;
 271         }
 272
 273         sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
 274         if (IS_ERR(sgt)) {
 275                 dev_err(rga->dev, "Failed to map dma_buf attachment\n");
 276                 ret = PTR_ERR(sgt);
 277                 goto failed_detach;
 278         }
 279
 280         /*
 281          * Alloc (2^3 * 4K) = 32K byte for storing pages, those space could
 282          * cover 32K * 4K = 128M ram address.
 283          */
 284         pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 285
 286         for_each_sg(sgt->sgl, sgl, sgt->nents, i) {
 287                 len = sg_dma_len(sgl) >> PAGE_SHIFT;
 288                 address = sg_phys(sgl);
 289
 290                 for (p = 0; p < len; p++) {
 291                         dma_addr_t phys = address + (p << PAGE_SHIFT);
 292                         void *virt = phys_to_virt(phys);
 293
 294                         rga_dma_flush_range(virt, 4 * 1024);
 295                         pages[mapped_size + p] = phys;
 296                 }
 297
 298                 mapped_size += len;
 299         }
 300
 301         rga_dma_flush_range(pages, 32 * 1024);
 302
 303         *mmu_pages = pages;
 304
 305         dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
 306
 307         return attach;
 308
 309 failed_detach:
 310         dma_buf_detach(dmabuf, attach);
 311 failed_attach:
 312         dma_buf_put(dmabuf);
 313
 314         return ERR_PTR(ret);
 315 }
 316
 317 static int rga_map_cmdlist_gem(struct rockchip_rga *rga,
 318                                struct rga_cmdlist_node *node,
 319                                struct drm_device *drm_dev,
 320                                struct drm_file *file)
 321 {
 322         struct rga_cmdlist *cmdlist = &node->cmdlist;
 323         struct dma_buf_attachment *attach;
 324         void *mmu_pages;
 325         int fd;
 326         int i;
 327
 328         for (i = 0; i < cmdlist->last / 2; i++) {
 329                 int index = cmdlist->last - 2 * (i + 1);
 330
 331                 switch (cmdlist->data[index]) {
 332                 case RGA_SRC_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
 333                         fd = cmdlist->data[index + 1];
 334                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
 335                         if (IS_ERR(attach))
 336                                 return PTR_ERR(attach);
 337
 338                         cmdlist->src_attach = attach;
 339                         cmdlist->src_mmu_pages = mmu_pages;
 340                         break;
 341
 342                 case RGA_DST_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
 343                         fd = cmdlist->data[index + 1];
 344                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
 345                         if (IS_ERR(attach))
 346                                 return PTR_ERR(attach);
 347
 348                         cmdlist->dst_attach = attach;
 349                         cmdlist->dst_mmu_pages = mmu_pages;
 350                         break;
 351                 }
 352         }
 353
 354         return 0;
 355 }
 356
 357 static void rga_unmap_cmdlist_gem(struct rockchip_rga *rga,
 358                                   struct rga_cmdlist_node *node)
 359 {
 360         struct dma_buf_attachment *attach;
 361         struct dma_buf *dma_buf;
 362
 363         attach = node->cmdlist.src_attach;
 364         if (attach) {
 365                 dma_buf = attach->dmabuf;
 366                 dma_buf_detach(dma_buf, attach);
 367                 dma_buf_put(dma_buf);
 368         }
 369         node->cmdlist.src_attach = NULL;
 370
 371         attach = node->cmdlist.dst_attach;
 372         if (attach) {
 373                 dma_buf = attach->dmabuf;
 374                 dma_buf_detach(dma_buf, attach);
 375                 dma_buf_put(dma_buf);
 376         }
 377         node->cmdlist.dst_attach = NULL;
 378
 379         if (node->cmdlist.src_mmu_pages)
 380                 free_pages((unsigned long)node->cmdlist.src_mmu_pages, 3);
 381         node->cmdlist.src_mmu_pages = NULL;
 382
 383         if (node->cmdlist.src1_mmu_pages)
 384                 free_pages((unsigned long)node->cmdlist.src1_mmu_pages, 3);
 385         node->cmdlist.src1_mmu_pages = NULL;
 386
 387         if (node->cmdlist.dst_mmu_pages)
 388                 free_pages((unsigned long)node->cmdlist.dst_mmu_pages, 3);
 389         node->cmdlist.dst_mmu_pages = NULL;
 390 }
 391
 392 static void rga_cmd_start(struct rockchip_rga *rga,
 393                           struct rga_runqueue_node *runqueue)
 394 {
 395         int ret;
 396
 397         ret = pm_runtime_get_sync(rga->dev);
 398         if (ret < 0)
 399                 return;
 400
 401         rga_write(rga, RGA_SYS_CTRL, 0x00);
 402
 403         rga_write(rga, RGA_CMD_BASE, runqueue->cmdlist_pool);
 404
 405         rga_write(rga, RGA_SYS_CTRL, 0x22);
 406
 407         rga_write(rga, RGA_INT, 0x600);
 408
 409         rga_write(rga, RGA_CMD_CTRL, ((runqueue->cmdlist_cnt - 1) << 3) | 0x1);
 410 }
 411
 412 static void rga_free_runqueue_node(struct rockchip_rga *rga,
 413                                    struct rga_runqueue_node *runqueue)
 414 {
 415         struct rga_cmdlist_node *node;
 416
 417         if (!runqueue)
 418                 return;
 419
 420         if (runqueue->cmdlist_pool_virt && runqueue->cmdlist_pool)
 421                 dma_free_attrs(rga->dev, runqueue->cmdlist_cnt * RGA_CMDLIST_SIZE,
 422                                runqueue->cmdlist_pool_virt,
 423                                runqueue->cmdlist_pool,
 424                                &runqueue->cmdlist_dma_attrs);
 425
 426         mutex_lock(&rga->cmdlist_mutex);
 427         /*
 428          * commands in run_cmdlist have been completed so unmap all gem
 429          * objects in each command node so that they are unreferenced.
 430          */
 431         list_for_each_entry(node, &runqueue->run_cmdlist, list)
 432                 rga_unmap_cmdlist_gem(rga, node);
 433         list_splice_tail_init(&runqueue->run_cmdlist, &rga->free_cmdlist);
 434         mutex_unlock(&rga->cmdlist_mutex);
 435
 436         kmem_cache_free(rga->runqueue_slab, runqueue);
 437 }
 438
 439 static struct rga_runqueue_node *rga_get_runqueue(struct rockchip_rga *rga)
 440 {
 441         struct rga_runqueue_node *runqueue;
 442
 443         if (list_empty(&rga->runqueue_list))
 444                 return NULL;
 445
 446         runqueue = list_first_entry(&rga->runqueue_list,
 447                                     struct rga_runqueue_node, list);
 448         list_del_init(&runqueue->list);
 449
 450         return runqueue;
 451 }
 452
 453 static void rga_exec_runqueue(struct rockchip_rga *rga)
 454 {
 455         rga->runqueue_node = rga_get_runqueue(rga);
 456         if (rga->runqueue_node)
 457                 rga_cmd_start(rga, rga->runqueue_node);
 458 }
 459
 460 static struct rga_cmdlist_node *rga_get_cmdlist(struct rockchip_rga *rga)
 461 {
 462         struct rga_cmdlist_node *node;
 463         struct device *dev = rga->dev;
 464
 465         mutex_lock(&rga->cmdlist_mutex);
 466         if (list_empty(&rga->free_cmdlist)) {
 467                 dev_err(dev, "there is no free cmdlist\n");
 468                 mutex_unlock(&rga->cmdlist_mutex);
 469                 return NULL;
 470         }
 471
 472         node = list_first_entry(&rga->free_cmdlist,
 473                                 struct rga_cmdlist_node, list);
 474         list_del_init(&node->list);
 475         mutex_unlock(&rga->cmdlist_mutex);
 476
 477         return node;
 478 }
 479
 480 static void rga_put_cmdlist(struct rockchip_rga *rga, struct rga_cmdlist_node *node)
 481 {
 482         mutex_lock(&rga->cmdlist_mutex);
 483         list_move_tail(&node->list, &rga->free_cmdlist);
 484         mutex_unlock(&rga->cmdlist_mutex);
 485 }
 486
 487 static void rga_add_cmdlist_to_inuse(struct rockchip_drm_rga_private *rga_priv,
 488                                      struct rga_cmdlist_node *node)
 489 {
 490         struct rga_cmdlist_node *lnode;
 491
 492         if (list_empty(&rga_priv->inuse_cmdlist))
 493                 goto add_to_list;
 494
 495         /* this links to base address of new cmdlist */
 496         lnode = list_entry(rga_priv->inuse_cmdlist.prev,
 497                            struct rga_cmdlist_node, list);
 498
 499 add_to_list:
 500         list_add_tail(&node->list, &rga_priv->inuse_cmdlist);
 501 }
 502
 503 /*
 504  * IOCRL functions for userspace to get RGA version.
 505  */
 506 int rockchip_rga_get_ver_ioctl(struct drm_device *drm_dev, void *data,
 507                                struct drm_file *file)
 508 {
 509         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 510         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 511         struct drm_rockchip_rga_get_ver *ver = data;
 512         struct rockchip_rga *rga;
 513         struct device *dev;
 514
 515         if (!rga_priv)
 516                 return -ENODEV;
 517
 518         dev = rga_priv->dev;
 519         if (!dev)
 520                 return -ENODEV;
 521
 522         rga = dev_get_drvdata(dev);
 523         if (!rga)
 524                 return -EFAULT;
 525
 526         ver->major = rga->version.major;
 527         ver->minor = rga->version.minor;
 528
 529         return 0;
 530 }
 531
 532 /*
 533  * IOCRL functions for userspace to send an RGA request.
 534  */
 535 int rockchip_rga_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
 536                                    struct drm_file *file)
 537 {
 538         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 539         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 540         struct drm_rockchip_rga_set_cmdlist *req = data;
 541         struct rga_cmdlist_node *node;
 542         struct rga_cmdlist *cmdlist;
 543         struct rockchip_rga *rga;
 544         int ret;
 545
 546         if (!rga_priv)
 547                 return -ENODEV;
 548
 549         if (!rga_priv->dev)
 550                 return -ENODEV;
 551
 552         rga = dev_get_drvdata(rga_priv->dev);
 553         if (!rga)
 554                 return -EFAULT;
 555
 556         if (req->cmd_nr > RGA_CMDLIST_SIZE || req->cmd_buf_nr > RGA_CMDBUF_SIZE) {
 557                 dev_err(rga->dev, "cmdlist size is too big\n");
 558                 return -EINVAL;
 559         }
 560
 561         node = rga_get_cmdlist(rga);
 562         if (!node)
 563                 return -ENOMEM;
 564
 565         cmdlist = &node->cmdlist;
 566         cmdlist->last = 0;
 567
 568         /*
 569          * Copy the command / buffer registers setting from userspace, each
 570          * command have two integer, one for register offset, another for
 571          * register value.
 572          */
 573         if (copy_from_user(cmdlist->data, rga_compat_ptr(req->cmd),
 574                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_nr))
 575                 return -EFAULT;
 576         cmdlist->last += req->cmd_nr * 2;
 577
 578         if (copy_from_user(&cmdlist->data[cmdlist->last],
 579                            rga_compat_ptr(req->cmd_buf),
 580                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_buf_nr))
 581                 return -EFAULT;
 582         cmdlist->last += req->cmd_buf_nr * 2;
 583
 584         /*
 585          * Check the userspace command registers, and mapping the framebuffer,
 586          * create the RGA mmu pages or get the framebuffer dma address.
 587          */
 588         ret = rga_check_reg_offset(rga->dev, node);
 589         if (ret < 0) {
 590                 dev_err(rga->dev, "Check reg offset failed\n");
 591                 goto err_free_cmdlist;
 592         }
 593
 594         ret = rga_map_cmdlist_gem(rga, node, drm_dev, file);
 595         if (ret < 0) {
 596                 dev_err(rga->dev, "Failed to map cmdlist\n");
 597                 goto err_unmap_cmdlist;
 598         }
 599
 600         rga_add_cmdlist_to_inuse(rga_priv, node);
 601
 602         return 0;
 603
 604 err_unmap_cmdlist:
 605         rga_unmap_cmdlist_gem(rga, node);
 606 err_free_cmdlist:
 607         rga_put_cmdlist(rga, node);
 608
 609         return ret;
 610 }
 611
 612 /*
 613  * IOCRL functions for userspace to start RGA transform.
 614  */
 615 int rockchip_rga_exec_ioctl(struct drm_device *drm_dev, void *data,
 616                             struct drm_file *file)
 617 {
 618         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 619         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 620         struct rga_runqueue_node *runqueue;
 621         struct rockchip_rga *rga;
 622         struct device *dev;
 623         int ret;
 624
 625         if (!rga_priv)
 626                 return -ENODEV;
 627
 628         dev = rga_priv->dev;
 629         if (!dev)
 630                 return -ENODEV;
 631
 632         rga = dev_get_drvdata(dev);
 633         if (!rga)
 634                 return -EFAULT;
 635
 636         runqueue = kmem_cache_alloc(rga->runqueue_slab, GFP_KERNEL);
 637         if (!runqueue) {
 638                 dev_err(rga->dev, "failed to allocate memory\n");
 639                 return -ENOMEM;
 640         }
 641
 642         runqueue->dev = rga->dev;
 643
 644         init_completion(&runqueue->complete);
 645
 646         INIT_LIST_HEAD(&runqueue->run_cmdlist);
 647
 648         list_splice_init(&rga_priv->inuse_cmdlist, &runqueue->run_cmdlist);
 649
 650         if (list_empty(&runqueue->run_cmdlist)) {
 651                 dev_err(rga->dev, "there is no inuse cmdlist\n");
 652                 kmem_cache_free(rga->runqueue_slab, runqueue);
 653                 return -EPERM;
 654         }
 655
 656         ret = rga_alloc_dma_buf_for_cmdlist(runqueue);
 657         if (ret < 0) {
 658                 dev_err(rga->dev, "cmdlist init failed\n");
 659                 return ret;
 660         }
 661
 662         mutex_lock(&rga->runqueue_mutex);
 663         runqueue->pid = current->pid;
 664         runqueue->file = file;
 665         list_add_tail(&runqueue->list, &rga->runqueue_list);
 666         if (!rga->runqueue_node)
 667                 rga_exec_runqueue(rga);
 668         mutex_unlock(&rga->runqueue_mutex);
 669
 670         wait_for_completion(&runqueue->complete);
 671         rga_free_runqueue_node(rga, runqueue);
 672
 673         return 0;
 674 }
 675
 676 static int rockchip_rga_open(struct drm_device *drm_dev, struct device *dev,
 677                              struct drm_file *file)
 678 {
 679         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 680         struct rockchip_drm_rga_private *rga_priv;
 681
 682         rga_priv = kzalloc(sizeof(*rga_priv), GFP_KERNEL);
 683         if (!rga_priv)
 684                 return -ENOMEM;
 685
 686         rga_priv->dev = dev;
 687         file_priv->rga_priv = rga_priv;
 688
 689         INIT_LIST_HEAD(&rga_priv->inuse_cmdlist);
 690
 691         return 0;
 692 }
 693
 694 static void rockchip_rga_close(struct drm_device *drm_dev, struct device *dev,
 695                                struct drm_file *file)
 696 {
 697         struct rockchip_drm_file_private *file_priv = file->driver_priv;
 698         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
 699         struct rga_cmdlist_node *node, *n;
 700         struct rockchip_rga *rga;
 701
 702         if (!dev)
 703                 return;
 704
 705         rga = dev_get_drvdata(dev);
 706         if (!rga)
 707                 return;
 708
 709         mutex_lock(&rga->cmdlist_mutex);
 710         list_for_each_entry_safe(node, n, &rga_priv->inuse_cmdlist, list) {
 711                 /*
 712                  * unmap all gem objects not completed.
 713                  *
 714                  * P.S. if current process was terminated forcely then
 715                  * there may be some commands in inuse_cmdlist so unmap
 716                  * them.
 717                  */
 718                 rga_unmap_cmdlist_gem(rga, node);
 719                 list_move_tail(&node->list, &rga->free_cmdlist);
 720         }
 721         mutex_unlock(&rga->cmdlist_mutex);
 722
 723         kfree(file_priv->rga_priv);
 724 }
 725
 726 static void rga_runqueue_worker(struct work_struct *work)
 727 {
 728         struct rockchip_rga *rga = container_of(work, struct rockchip_rga,
 729                                             runqueue_work);
 730
 731         mutex_lock(&rga->runqueue_mutex);
 732         pm_runtime_put_sync(rga->dev);
 733
 734         complete(&rga->runqueue_node->complete);
 735
 736         if (rga->suspended)
 737                 rga->runqueue_node = NULL;
 738         else
 739                 rga_exec_runqueue(rga);
 740
 741         mutex_unlock(&rga->runqueue_mutex);
 742 }
 743
 744 static irqreturn_t rga_irq_handler(int irq, void *dev_id)
 745 {
 746         struct rockchip_rga *rga = dev_id;
 747         int intr;
 748
 749         intr = rga_read(rga, RGA_INT) & 0xf;
 750
 751         rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
 752
 753         if (intr & 0x04)
 754                 queue_work(rga->rga_workq, &rga->runqueue_work);
 755
 756         return IRQ_HANDLED;
 757 }
 758
 759 static int rga_parse_dt(struct rockchip_rga *rga)
 760 {
 761         struct reset_control *core_rst, *axi_rst, *ahb_rst;
 762
 763         core_rst = devm_reset_control_get(rga->dev, "core");
 764         if (IS_ERR(core_rst)) {
 765                 dev_err(rga->dev, "failed to get core reset controller\n");
 766                 return PTR_ERR(core_rst);
 767         }
 768
 769         axi_rst = devm_reset_control_get(rga->dev, "axi");
 770         if (IS_ERR(axi_rst)) {
 771                 dev_err(rga->dev, "failed to get axi reset controller\n");
 772                 return PTR_ERR(axi_rst);
 773         }
 774
 775         ahb_rst = devm_reset_control_get(rga->dev, "ahb");
 776         if (IS_ERR(ahb_rst)) {
 777                 dev_err(rga->dev, "failed to get ahb reset controller\n");
 778                 return PTR_ERR(ahb_rst);
 779         }
 780
 781         reset_control_assert(core_rst);
 782         udelay(1);
 783         reset_control_deassert(core_rst);
 784
 785         reset_control_assert(axi_rst);
 786         udelay(1);
 787         reset_control_deassert(axi_rst);
 788
 789         reset_control_assert(ahb_rst);
 790         udelay(1);
 791         reset_control_deassert(ahb_rst);
 792
 793         rga->sclk = devm_clk_get(rga->dev, "sclk");
 794         if (IS_ERR(rga->sclk)) {
 795                 dev_err(rga->dev, "failed to get sclk clock\n");
 796                 return PTR_ERR(rga->sclk);
 797         }
 798
 799         rga->aclk = devm_clk_get(rga->dev, "aclk");
 800         if (IS_ERR(rga->aclk)) {
 801                 dev_err(rga->dev, "failed to get aclk clock\n");
 802                 return PTR_ERR(rga->aclk);
 803         }
 804
 805         rga->hclk = devm_clk_get(rga->dev, "hclk");
 806         if (IS_ERR(rga->hclk)) {
 807                 dev_err(rga->dev, "failed to get hclk clock\n");
 808                 return PTR_ERR(rga->hclk);
 809         }
 810
 811         return rga_enable_clocks(rga);
 812 }
 813
 814 static const struct of_device_id rockchip_rga_dt_ids[] = {
 815         { .compatible = "rockchip,rk3288-rga", },
 816         { .compatible = "rockchip,rk3228-rga", },
 817         { .compatible = "rockchip,rk3399-rga", },
 818         {},
 819 };
 820 MODULE_DEVICE_TABLE(of, rockchip_rga_dt_ids);
 821
 822 static int rga_probe(struct platform_device *pdev)
 823 {
 824         struct drm_rockchip_subdrv *subdrv;
 825         struct rockchip_rga *rga;
 826         struct resource *iores;
 827         int irq;
 828         int ret;
 829
 830         if (!pdev->dev.of_node)
 831                 return -ENODEV;
 832
 833         rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
 834         if (!rga)
 835                 return -ENOMEM;
 836
 837         rga->dev = &pdev->dev;
 838
 839         rga->runqueue_slab = kmem_cache_create("rga_runqueue_slab",
 840                                                sizeof(struct rga_runqueue_node),
 841                                                0, 0, NULL);
 842         if (!rga->runqueue_slab)
 843                 return -ENOMEM;
 844
 845         rga->rga_workq = create_singlethread_workqueue("rga");
 846         if (!rga->rga_workq) {
 847                 dev_err(rga->dev, "failed to create workqueue\n");
 848                 ret = -ENOMEM;
 849                 goto err_destroy_slab;
 850         }
 851
 852         INIT_WORK(&rga->runqueue_work, rga_runqueue_worker);
 853         INIT_LIST_HEAD(&rga->runqueue_list);
 854         mutex_init(&rga->runqueue_mutex);
 855
 856         INIT_LIST_HEAD(&rga->free_cmdlist);
 857         mutex_init(&rga->cmdlist_mutex);
 858
 859         rga_init_cmdlist(rga);
 860
 861         ret = rga_parse_dt(rga);
 862         if (ret) {
 863                 dev_err(rga->dev, "Unable to parse OF data\n");
 864                 goto err_destroy_workqueue;
 865         }
 866
 867         pm_runtime_enable(rga->dev);
 868
 869         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 870
 871         rga->regs = devm_ioremap_resource(rga->dev, iores);
 872         if (IS_ERR(rga->regs)) {
 873                 ret = PTR_ERR(rga->regs);
 874                 goto err_put_clk;
 875         }
 876
 877         irq = platform_get_irq(pdev, 0);
 878         if (irq < 0) {
 879                 dev_err(rga->dev, "failed to get irq\n");
 880                 ret = irq;
 881                 goto err_put_clk;
 882         }
 883
 884         ret = devm_request_irq(rga->dev, irq, rga_irq_handler, 0,
 885                                dev_name(rga->dev), rga);
 886         if (ret < 0) {
 887                 dev_err(rga->dev, "failed to request irq\n");
 888                 goto err_put_clk;
 889         }
 890
 891         platform_set_drvdata(pdev, rga);
 892
 893         rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
 894         rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
 895
 896         subdrv = &rga->subdrv;
 897         subdrv->dev = rga->dev;
 898         subdrv->open = rockchip_rga_open;
 899         subdrv->close = rockchip_rga_close;
 900
 901         rockchip_drm_register_subdrv(subdrv);
 902
 903         return 0;
 904
 905 err_put_clk:
 906         pm_runtime_disable(rga->dev);
 907 err_destroy_workqueue:
 908         destroy_workqueue(rga->rga_workq);
 909 err_destroy_slab:
 910         kmem_cache_destroy(rga->runqueue_slab);
 911
 912         return ret;
 913 }
 914
 915 static int rga_remove(struct platform_device *pdev)
 916 {
 917         struct rockchip_rga *rga = platform_get_drvdata(pdev);
 918
 919         cancel_work_sync(&rga->runqueue_work);
 920
 921         while (rga->runqueue_node) {
 922                 rga_free_runqueue_node(rga, rga->runqueue_node);
 923                 rga->runqueue_node = rga_get_runqueue(rga);
 924         }
 925
 926         rockchip_drm_unregister_subdrv(&rga->subdrv);
 927
 928         pm_runtime_disable(rga->dev);
 929
 930         return 0;
 931 }
 932
 933 static int rga_suspend(struct device *dev)
 934 {
 935         struct rockchip_rga *rga = dev_get_drvdata(dev);
 936
 937         mutex_lock(&rga->runqueue_mutex);
 938         rga->suspended = true;
 939         mutex_unlock(&rga->runqueue_mutex);
 940
 941         flush_work(&rga->runqueue_work);
 942
 943         return 0;
 944 }
 945
 946 static int rga_resume(struct device *dev)
 947 {
 948         struct rockchip_rga *rga = dev_get_drvdata(dev);
 949
 950         rga->suspended = false;
 951         rga_exec_runqueue(rga);
 952
 953         return 0;
 954 }
 955
 956 #ifdef CONFIG_PM
 957 static int rga_runtime_suspend(struct device *dev)
 958 {
 959         struct rockchip_rga *rga = dev_get_drvdata(dev);
 960
 961         rga_disable_clocks(rga);
 962
 963         return 0;
 964 }
 965
 966 static int rga_runtime_resume(struct device *dev)
 967 {
 968         struct rockchip_rga *rga = dev_get_drvdata(dev);
 969
 970         return rga_enable_clocks(rga);
 971 }
 972 #endif
 973
 974 static const struct dev_pm_ops rga_pm = {
 975         SET_SYSTEM_SLEEP_PM_OPS(rga_suspend, rga_resume)
 976         SET_RUNTIME_PM_OPS(rga_runtime_suspend,
 977                            rga_runtime_resume, NULL)
 978 };
 979
 980 static struct platform_driver rga_pltfm_driver = {
 981         .probe  = rga_probe,
 982         .remove = rga_remove,
 983         .driver = {
 984                 .name = "rockchip-rga",
 985                 .pm = &rga_pm,
 986                 .of_match_table = rockchip_rga_dt_ids,
 987         },
 988 };
 989
 990 module_platform_driver(rga_pltfm_driver);
 991
 992 MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
 993 MODULE_DESCRIPTION("Rockchip RGA Driver Extension");
 994 MODULE_LICENSE("GPL");
 995 MODULE_ALIAS("platform:rockchip-rga");