2 * Copyright 2009 VMware, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Michel Dänzer
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_TEST_COPY_BLIT 1
30 #define RADEON_TEST_COPY_DMA 0
33 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
34 static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
36 struct radeon_bo *vram_obj = NULL;
37 struct radeon_bo **gtt_obj = NULL;
38 uint64_t gtt_addr, vram_addr;
43 case RADEON_TEST_COPY_DMA:
44 ring = radeon_copy_dma_ring_index(rdev);
46 case RADEON_TEST_COPY_BLIT:
47 ring = radeon_copy_blit_ring_index(rdev);
50 DRM_ERROR("Unknown copy method\n");
57 * (Total GTT - IB pool - writeback page - ring buffers) / test size
59 n = rdev->mc.gtt_size - rdev->gart_pin_size;
62 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
64 DRM_ERROR("Failed to allocate %d pointers\n", n);
69 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
72 DRM_ERROR("Failed to create VRAM object\n");
75 r = radeon_bo_reserve(vram_obj, false);
78 r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
80 DRM_ERROR("Failed to pin VRAM object\n");
83 for (i = 0; i < n; i++) {
84 void *gtt_map, *vram_map;
85 void **gtt_start, **gtt_end;
86 void **vram_start, **vram_end;
87 struct radeon_fence *fence = NULL;
89 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
90 RADEON_GEM_DOMAIN_GTT, 0, NULL, gtt_obj + i);
92 DRM_ERROR("Failed to create GTT object %d\n", i);
96 r = radeon_bo_reserve(gtt_obj[i], false);
98 goto out_lclean_unref;
99 r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr);
101 DRM_ERROR("Failed to pin GTT object %d\n", i);
102 goto out_lclean_unres;
105 r = radeon_bo_kmap(gtt_obj[i], >t_map);
107 DRM_ERROR("Failed to map GTT object %d\n", i);
108 goto out_lclean_unpin;
111 for (gtt_start = gtt_map, gtt_end = gtt_map + size;
114 *gtt_start = gtt_start;
116 radeon_bo_kunmap(gtt_obj[i]);
118 if (ring == R600_RING_TYPE_DMA_INDEX)
119 r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
121 r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
123 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
124 goto out_lclean_unpin;
127 r = radeon_fence_wait(fence, false);
129 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
130 goto out_lclean_unpin;
133 radeon_fence_unref(&fence);
135 r = radeon_bo_kmap(vram_obj, &vram_map);
137 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
138 goto out_lclean_unpin;
141 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
142 vram_start = vram_map, vram_end = vram_map + size;
143 vram_start < vram_end;
144 gtt_start++, vram_start++) {
145 if (*vram_start != gtt_start) {
146 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
147 "expected 0x%p (GTT/VRAM offset "
148 "0x%16llx/0x%16llx)\n",
149 i, *vram_start, gtt_start,
151 (gtt_addr - rdev->mc.gtt_start +
152 (void*)gtt_start - gtt_map),
154 (vram_addr - rdev->mc.vram_start +
155 (void*)gtt_start - gtt_map));
156 radeon_bo_kunmap(vram_obj);
157 goto out_lclean_unpin;
159 *vram_start = vram_start;
162 radeon_bo_kunmap(vram_obj);
164 if (ring == R600_RING_TYPE_DMA_INDEX)
165 r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
167 r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
169 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
170 goto out_lclean_unpin;
173 r = radeon_fence_wait(fence, false);
175 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
176 goto out_lclean_unpin;
179 radeon_fence_unref(&fence);
181 r = radeon_bo_kmap(gtt_obj[i], >t_map);
183 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
184 goto out_lclean_unpin;
187 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
188 vram_start = vram_map, vram_end = vram_map + size;
190 gtt_start++, vram_start++) {
191 if (*gtt_start != vram_start) {
192 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
193 "expected 0x%p (VRAM/GTT offset "
194 "0x%16llx/0x%16llx)\n",
195 i, *gtt_start, vram_start,
197 (vram_addr - rdev->mc.vram_start +
198 (void*)vram_start - vram_map),
200 (gtt_addr - rdev->mc.gtt_start +
201 (void*)vram_start - vram_map));
202 radeon_bo_kunmap(gtt_obj[i]);
203 goto out_lclean_unpin;
207 radeon_bo_kunmap(gtt_obj[i]);
209 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
210 gtt_addr - rdev->mc.gtt_start);
214 radeon_bo_unpin(gtt_obj[i]);
216 radeon_bo_unreserve(gtt_obj[i]);
218 radeon_bo_unref(>t_obj[i]);
220 for (--i; i >= 0; --i) {
221 radeon_bo_unpin(gtt_obj[i]);
222 radeon_bo_unreserve(gtt_obj[i]);
223 radeon_bo_unref(>t_obj[i]);
226 radeon_fence_unref(&fence);
230 radeon_bo_unpin(vram_obj);
232 radeon_bo_unreserve(vram_obj);
234 radeon_bo_unref(&vram_obj);
238 printk(KERN_WARNING "Error while testing BO move.\n");
242 void radeon_test_moves(struct radeon_device *rdev)
244 if (rdev->asic->copy.dma)
245 radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
246 if (rdev->asic->copy.blit)
247 radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
250 static int radeon_test_create_and_emit_fence(struct radeon_device *rdev,
251 struct radeon_ring *ring,
252 struct radeon_fence **fence)
254 uint32_t handle = ring->idx ^ 0xdeafbeef;
257 if (ring->idx == R600_RING_TYPE_UVD_INDEX) {
258 r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL);
260 DRM_ERROR("Failed to get dummy create msg\n");
264 r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);
266 DRM_ERROR("Failed to get dummy destroy msg\n");
270 } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX ||
271 ring->idx == TN_RING_TYPE_VCE2_INDEX) {
272 r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL);
274 DRM_ERROR("Failed to get dummy create msg\n");
278 r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);
280 DRM_ERROR("Failed to get dummy destroy msg\n");
285 r = radeon_ring_lock(rdev, ring, 64);
287 DRM_ERROR("Failed to lock ring A %d\n", ring->idx);
290 radeon_fence_emit(rdev, fence, ring->idx);
291 radeon_ring_unlock_commit(rdev, ring, false);
296 void radeon_test_ring_sync(struct radeon_device *rdev,
297 struct radeon_ring *ringA,
298 struct radeon_ring *ringB)
300 struct radeon_fence *fence1 = NULL, *fence2 = NULL;
301 struct radeon_semaphore *semaphore = NULL;
304 r = radeon_semaphore_create(rdev, &semaphore);
306 DRM_ERROR("Failed to create semaphore\n");
310 r = radeon_ring_lock(rdev, ringA, 64);
312 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
315 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
316 radeon_ring_unlock_commit(rdev, ringA, false);
318 r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1);
322 r = radeon_ring_lock(rdev, ringA, 64);
324 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
327 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
328 radeon_ring_unlock_commit(rdev, ringA, false);
330 r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2);
336 if (radeon_fence_signaled(fence1)) {
337 DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
341 r = radeon_ring_lock(rdev, ringB, 64);
343 DRM_ERROR("Failed to lock ring B %p\n", ringB);
346 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
347 radeon_ring_unlock_commit(rdev, ringB, false);
349 r = radeon_fence_wait(fence1, false);
351 DRM_ERROR("Failed to wait for sync fence 1\n");
357 if (radeon_fence_signaled(fence2)) {
358 DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
362 r = radeon_ring_lock(rdev, ringB, 64);
364 DRM_ERROR("Failed to lock ring B %p\n", ringB);
367 radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
368 radeon_ring_unlock_commit(rdev, ringB, false);
370 r = radeon_fence_wait(fence2, false);
372 DRM_ERROR("Failed to wait for sync fence 1\n");
377 radeon_semaphore_free(rdev, &semaphore, NULL);
380 radeon_fence_unref(&fence1);
383 radeon_fence_unref(&fence2);
386 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
389 static void radeon_test_ring_sync2(struct radeon_device *rdev,
390 struct radeon_ring *ringA,
391 struct radeon_ring *ringB,
392 struct radeon_ring *ringC)
394 struct radeon_fence *fenceA = NULL, *fenceB = NULL;
395 struct radeon_semaphore *semaphore = NULL;
399 r = radeon_semaphore_create(rdev, &semaphore);
401 DRM_ERROR("Failed to create semaphore\n");
405 r = radeon_ring_lock(rdev, ringA, 64);
407 DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
410 radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
411 radeon_ring_unlock_commit(rdev, ringA, false);
413 r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA);
417 r = radeon_ring_lock(rdev, ringB, 64);
419 DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
422 radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
423 radeon_ring_unlock_commit(rdev, ringB, false);
424 r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB);
430 if (radeon_fence_signaled(fenceA)) {
431 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
434 if (radeon_fence_signaled(fenceB)) {
435 DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
439 r = radeon_ring_lock(rdev, ringC, 64);
441 DRM_ERROR("Failed to lock ring B %p\n", ringC);
444 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
445 radeon_ring_unlock_commit(rdev, ringC, false);
447 for (i = 0; i < 30; ++i) {
449 sigA = radeon_fence_signaled(fenceA);
450 sigB = radeon_fence_signaled(fenceB);
455 if (!sigA && !sigB) {
456 DRM_ERROR("Neither fence A nor B has been signaled\n");
458 } else if (sigA && sigB) {
459 DRM_ERROR("Both fence A and B has been signaled\n");
463 DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
465 r = radeon_ring_lock(rdev, ringC, 64);
467 DRM_ERROR("Failed to lock ring B %p\n", ringC);
470 radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
471 radeon_ring_unlock_commit(rdev, ringC, false);
475 r = radeon_fence_wait(fenceA, false);
477 DRM_ERROR("Failed to wait for sync fence A\n");
480 r = radeon_fence_wait(fenceB, false);
482 DRM_ERROR("Failed to wait for sync fence B\n");
487 radeon_semaphore_free(rdev, &semaphore, NULL);
490 radeon_fence_unref(&fenceA);
493 radeon_fence_unref(&fenceB);
496 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
499 static bool radeon_test_sync_possible(struct radeon_ring *ringA,
500 struct radeon_ring *ringB)
502 if (ringA->idx == TN_RING_TYPE_VCE2_INDEX &&
503 ringB->idx == TN_RING_TYPE_VCE1_INDEX)
509 void radeon_test_syncing(struct radeon_device *rdev)
513 for (i = 1; i < RADEON_NUM_RINGS; ++i) {
514 struct radeon_ring *ringA = &rdev->ring[i];
518 for (j = 0; j < i; ++j) {
519 struct radeon_ring *ringB = &rdev->ring[j];
523 if (!radeon_test_sync_possible(ringA, ringB))
526 DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
527 radeon_test_ring_sync(rdev, ringA, ringB);
529 DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
530 radeon_test_ring_sync(rdev, ringB, ringA);
532 for (k = 0; k < j; ++k) {
533 struct radeon_ring *ringC = &rdev->ring[k];
537 if (!radeon_test_sync_possible(ringA, ringC))
540 if (!radeon_test_sync_possible(ringB, ringC))
543 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
544 radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
546 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
547 radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
549 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
550 radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
552 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
553 radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
555 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
556 radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
558 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
559 radeon_test_ring_sync2(rdev, ringC, ringB, ringA);