2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_dp_helper.h>
36 #include <drm/drm_fixed.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-algo-bit.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 enum radeon_rmx_type {
68 enum radeon_underscan_type {
81 RADEON_HPD_NONE = 0xff,
84 #define RADEON_MAX_I2C_BUS 16
86 /* radeon gpio-based i2c
87 * 1. "mask" reg and bits
88 * grabs the gpio pins for software use
93 * 3. "en" reg and bits
94 * sets the pin direction
100 struct radeon_i2c_bus_rec {
102 /* id used by atom */
104 /* id used by atom */
105 enum radeon_hpd_id hpd;
106 /* can be used with hw i2c engine */
108 /* uses multi-media i2c engine */
111 uint32_t mask_clk_reg;
112 uint32_t mask_data_reg;
116 uint32_t en_data_reg;
119 uint32_t mask_clk_mask;
120 uint32_t mask_data_mask;
122 uint32_t a_data_mask;
123 uint32_t en_clk_mask;
124 uint32_t en_data_mask;
126 uint32_t y_data_mask;
129 struct radeon_tmds_pll {
134 #define RADEON_MAX_BIOS_CONNECTOR 16
137 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
138 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
139 #define RADEON_PLL_USE_REF_DIV (1 << 2)
140 #define RADEON_PLL_LEGACY (1 << 3)
141 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
142 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
143 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
144 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
145 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
146 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
147 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
148 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
149 #define RADEON_PLL_USE_POST_DIV (1 << 12)
150 #define RADEON_PLL_IS_LCD (1 << 13)
151 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
154 /* reference frequency */
155 uint32_t reference_freq;
158 uint32_t reference_div;
161 /* pll in/out limits */
164 uint32_t pll_out_min;
165 uint32_t pll_out_max;
166 uint32_t lcd_pll_out_min;
167 uint32_t lcd_pll_out_max;
171 uint32_t min_ref_div;
172 uint32_t max_ref_div;
173 uint32_t min_post_div;
174 uint32_t max_post_div;
175 uint32_t min_feedback_div;
176 uint32_t max_feedback_div;
177 uint32_t min_frac_feedback_div;
178 uint32_t max_frac_feedback_div;
180 /* flags for the current clock */
187 struct radeon_i2c_chan {
188 struct i2c_adapter adapter;
189 struct drm_device *dev;
191 struct i2c_algo_bit_data bit;
192 struct i2c_algo_dp_aux_data dp;
194 struct radeon_i2c_bus_rec rec;
197 /* mostly for macs, but really any system without connector tables */
198 enum radeon_connector_table {
202 CT_POWERBOOK_EXTERNAL,
203 CT_POWERBOOK_INTERNAL,
216 enum radeon_dvo_chip {
226 bool last_buffer_filled_status;
230 struct radeon_mode_info {
231 struct atom_context *atom_context;
232 struct card_info *atom_card_info;
233 enum radeon_connector_table connector_table;
234 bool mode_config_initialized;
235 struct radeon_crtc *crtcs[6];
236 struct radeon_afmt *afmt[6];
237 /* DVI-I properties */
238 struct drm_property *coherent_mode_property;
239 /* DAC enable load detect */
240 struct drm_property *load_detect_property;
242 struct drm_property *tv_std_property;
243 /* legacy TMDS PLL detect */
244 struct drm_property *tmds_pll_property;
246 struct drm_property *underscan_property;
247 struct drm_property *underscan_hborder_property;
248 struct drm_property *underscan_vborder_property;
249 /* hardcoded DFP edid from BIOS */
250 struct edid *bios_hardcoded_edid;
251 int bios_hardcoded_edid_size;
253 /* pointer to fbdev info structure */
254 struct radeon_fbdev *rfbdev;
257 /* pointer to backlight encoder */
258 struct radeon_encoder *bl_encoder;
261 #define RADEON_MAX_BL_LEVEL 0xFF
263 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
265 struct radeon_backlight_privdata {
266 struct radeon_encoder *encoder;
272 #define MAX_H_CODE_TIMING_LEN 32
273 #define MAX_V_CODE_TIMING_LEN 32
275 /* need to store these as reading
276 back code tables is excessive */
277 struct radeon_tv_regs {
279 uint32_t timing_cntl;
283 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
284 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
287 struct radeon_atom_ss {
300 struct drm_crtc base;
302 u16 lut_r[256], lut_g[256], lut_b[256];
305 uint32_t crtc_offset;
306 struct drm_gem_object *cursor_bo;
307 uint64_t cursor_addr;
310 int max_cursor_width;
311 int max_cursor_height;
312 uint32_t legacy_display_base_addr;
313 uint32_t legacy_cursor_offset;
314 enum radeon_rmx_type rmx_type;
319 struct drm_display_mode native_mode;
322 struct radeon_unpin_work *unpin_work;
323 int deferred_flip_completion;
325 struct radeon_atom_ss ss;
329 u32 pll_reference_div;
332 struct drm_encoder *encoder;
333 struct drm_connector *connector;
336 struct radeon_encoder_primary_dac {
337 /* legacy primary dac */
338 uint32_t ps2_pdac_adj;
341 struct radeon_encoder_lvds {
343 uint16_t panel_vcc_delay;
344 uint8_t panel_pwr_delay;
345 uint8_t panel_digon_delay;
346 uint8_t panel_blon_delay;
347 uint16_t panel_ref_divider;
348 uint8_t panel_post_divider;
349 uint16_t panel_fb_divider;
350 bool use_bios_dividers;
351 uint32_t lvds_gen_cntl;
353 struct drm_display_mode native_mode;
354 struct backlight_device *bl_dev;
356 uint8_t backlight_level;
359 struct radeon_encoder_tv_dac {
361 uint32_t ps2_tvdac_adj;
362 uint32_t ntsc_tvdac_adj;
363 uint32_t pal_tvdac_adj;
368 int supported_tv_stds;
370 enum radeon_tv_std tv_std;
371 struct radeon_tv_regs tv;
374 struct radeon_encoder_int_tmds {
375 /* legacy int tmds */
376 struct radeon_tmds_pll tmds_pll[4];
379 struct radeon_encoder_ext_tmds {
381 struct radeon_i2c_chan *i2c_bus;
383 enum radeon_dvo_chip dvo_chip;
386 /* spread spectrum */
387 struct radeon_encoder_atom_dig {
391 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
394 uint16_t panel_pwr_delay;
397 struct drm_display_mode native_mode;
398 struct backlight_device *bl_dev;
400 uint8_t backlight_level;
402 struct radeon_afmt *afmt;
405 struct radeon_encoder_atom_dac {
406 enum radeon_tv_std tv_std;
409 struct radeon_encoder {
410 struct drm_encoder base;
411 uint32_t encoder_enum;
414 uint32_t active_device;
416 uint32_t pixel_clock;
417 enum radeon_rmx_type rmx_type;
418 enum radeon_underscan_type underscan_type;
419 uint32_t underscan_hborder;
420 uint32_t underscan_vborder;
421 struct drm_display_mode native_mode;
423 int audio_polling_active;
428 struct radeon_connector_atom_dig {
429 uint32_t igp_lane_info;
431 struct radeon_i2c_chan *dp_i2c_bus;
432 u8 dpcd[DP_RECEIVER_CAP_SIZE];
439 struct radeon_gpio_rec {
447 enum radeon_hpd_id hpd;
449 struct radeon_gpio_rec gpio;
452 struct radeon_router {
454 struct radeon_i2c_bus_rec i2c_info;
459 u8 ddc_mux_control_pin;
464 u8 cd_mux_control_pin;
468 struct radeon_connector {
469 struct drm_connector base;
470 uint32_t connector_id;
472 struct radeon_i2c_chan *ddc_bus;
473 /* some systems have an hdmi and vga port with a shared ddc line */
476 /* we need to mind the EDID between detect
477 and get modes due to analog/digital/tvencoder */
480 bool dac_load_detect;
481 bool detected_by_load; /* if the connection status was determined by load */
482 uint16_t connector_object_id;
483 struct radeon_hpd hpd;
484 struct radeon_router router;
485 struct radeon_i2c_chan *router_bus;
488 struct radeon_framebuffer {
489 struct drm_framebuffer base;
490 struct drm_gem_object *obj;
493 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
494 ((em) == ATOM_ENCODER_MODE_DP_MST))
496 struct atom_clock_dividers {
502 u32 whole_fb_div : 12;
503 u32 frac_fb_div : 14;
505 u32 frac_fb_div : 14;
506 u32 whole_fb_div : 12;
513 bool enable_post_div;
522 struct atom_mpll_param {
546 #define MEM_TYPE_GDDR5 0x50
547 #define MEM_TYPE_GDDR4 0x40
548 #define MEM_TYPE_GDDR3 0x30
549 #define MEM_TYPE_DDR2 0x20
550 #define MEM_TYPE_GDDR1 0x10
551 #define MEM_TYPE_DDR3 0xb0
552 #define MEM_TYPE_MASK 0xf0
554 struct atom_memory_info {
559 #define MAX_AC_TIMING_ENTRIES 16
561 struct atom_memory_clock_range_table
565 u32 mclk[MAX_AC_TIMING_ENTRIES];
568 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
569 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
571 struct atom_mc_reg_entry {
573 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
576 struct atom_mc_register_address {
581 struct atom_mc_reg_table {
584 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
585 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
588 #define MAX_VOLTAGE_ENTRIES 32
590 struct atom_voltage_table_entry
596 struct atom_voltage_table
601 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
604 extern enum radeon_tv_std
605 radeon_combios_get_tv_info(struct radeon_device *rdev);
606 extern enum radeon_tv_std
607 radeon_atombios_get_tv_info(struct radeon_device *rdev);
608 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
609 u16 *vddc, u16 *vddci);
611 extern struct drm_connector *
612 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
613 extern struct drm_connector *
614 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
615 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
618 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
619 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
620 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
621 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
622 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
624 extern void radeon_connector_hotplug(struct drm_connector *connector);
625 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
626 struct drm_display_mode *mode);
627 extern void radeon_dp_set_link_config(struct drm_connector *connector,
628 const struct drm_display_mode *mode);
629 extern void radeon_dp_link_train(struct drm_encoder *encoder,
630 struct drm_connector *connector);
631 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
632 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
633 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
634 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
635 struct drm_connector *connector);
636 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
637 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
638 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
639 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
640 int action, uint8_t lane_num,
642 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
643 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
644 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
645 u8 write_byte, u8 *read_byte);
647 extern void radeon_i2c_init(struct radeon_device *rdev);
648 extern void radeon_i2c_fini(struct radeon_device *rdev);
649 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
650 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
651 extern void radeon_i2c_add(struct radeon_device *rdev,
652 struct radeon_i2c_bus_rec *rec,
654 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
655 struct radeon_i2c_bus_rec *i2c_bus);
656 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
657 struct radeon_i2c_bus_rec *rec,
659 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
660 struct radeon_i2c_bus_rec *rec,
662 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
663 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
667 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
671 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
672 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
673 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
674 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
676 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
678 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
679 struct radeon_atom_ss *ss,
681 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
682 struct radeon_atom_ss *ss,
685 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
687 uint32_t *dot_clock_p,
689 uint32_t *frac_fb_div_p,
691 uint32_t *post_div_p);
693 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
701 extern void radeon_setup_encoder_clones(struct drm_device *dev);
703 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
704 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
705 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
706 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
707 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
708 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
709 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
710 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
711 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
712 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
714 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
715 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
716 struct drm_framebuffer *old_fb);
717 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
718 struct drm_framebuffer *fb,
720 enum mode_set_atomic state);
721 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
722 struct drm_display_mode *mode,
723 struct drm_display_mode *adjusted_mode,
725 struct drm_framebuffer *old_fb);
726 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
728 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
729 struct drm_framebuffer *old_fb);
730 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
731 struct drm_framebuffer *fb,
733 enum mode_set_atomic state);
734 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
735 struct drm_framebuffer *fb,
736 int x, int y, int atomic);
737 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
738 struct drm_file *file_priv,
742 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
745 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
746 int *vpos, int *hpos);
748 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
750 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
751 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
752 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
753 extern struct radeon_encoder_atom_dig *
754 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
755 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
756 struct radeon_encoder_int_tmds *tmds);
757 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
758 struct radeon_encoder_int_tmds *tmds);
759 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
760 struct radeon_encoder_int_tmds *tmds);
761 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
762 struct radeon_encoder_ext_tmds *tmds);
763 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
764 struct radeon_encoder_ext_tmds *tmds);
765 extern struct radeon_encoder_primary_dac *
766 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
767 extern struct radeon_encoder_tv_dac *
768 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
769 extern struct radeon_encoder_lvds *
770 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
771 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
772 extern struct radeon_encoder_tv_dac *
773 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
774 extern struct radeon_encoder_primary_dac *
775 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
776 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
777 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
778 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
779 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
780 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
781 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
782 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
783 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
785 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
787 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
789 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
791 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
792 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
793 u16 blue, int regno);
794 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
795 u16 *blue, int regno);
796 int radeon_framebuffer_init(struct drm_device *dev,
797 struct radeon_framebuffer *rfb,
798 struct drm_mode_fb_cmd2 *mode_cmd,
799 struct drm_gem_object *obj);
801 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
802 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
803 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
804 void radeon_atombios_init_crtc(struct drm_device *dev,
805 struct radeon_crtc *radeon_crtc);
806 void radeon_legacy_init_crtc(struct drm_device *dev,
807 struct radeon_crtc *radeon_crtc);
809 void radeon_get_clock_info(struct drm_device *dev);
811 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
812 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
814 void radeon_enc_destroy(struct drm_encoder *encoder);
815 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
816 void radeon_combios_asic_init(struct drm_device *dev);
817 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
818 const struct drm_display_mode *mode,
819 struct drm_display_mode *adjusted_mode);
820 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
821 struct drm_display_mode *adjusted_mode);
822 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
825 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
826 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
827 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
828 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
829 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
830 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
831 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
832 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
833 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
834 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
835 struct drm_display_mode *mode,
836 struct drm_display_mode *adjusted_mode);
839 int radeon_fbdev_init(struct radeon_device *rdev);
840 void radeon_fbdev_fini(struct radeon_device *rdev);
841 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
842 int radeon_fbdev_total_size(struct radeon_device *rdev);
843 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
845 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
847 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
849 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);