Merge git://git.infradead.org/intel-iommu
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon_dp_mst.c
1
2 #include <drm/drmP.h>
3 #include <drm/drm_dp_mst_helper.h>
4 #include <drm/drm_fb_helper.h>
5
6 #include "radeon.h"
7 #include "atom.h"
8 #include "ni_reg.h"
9
10 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
11
12 static int radeon_atom_set_enc_offset(int id)
13 {
14         static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
15                                        EVERGREEN_CRTC1_REGISTER_OFFSET,
16                                        EVERGREEN_CRTC2_REGISTER_OFFSET,
17                                        EVERGREEN_CRTC3_REGISTER_OFFSET,
18                                        EVERGREEN_CRTC4_REGISTER_OFFSET,
19                                        EVERGREEN_CRTC5_REGISTER_OFFSET,
20                                        0x13830 - 0x7030 };
21
22         return offsets[id];
23 }
24
25 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
26                                      struct radeon_encoder_mst *mst_enc,
27                                      enum radeon_hpd_id hpd, bool enable)
28 {
29         struct drm_device *dev = primary->base.dev;
30         struct radeon_device *rdev = dev->dev_private;
31         uint32_t reg;
32         int retries = 0;
33         uint32_t temp;
34
35         reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
36
37         /* set MST mode */
38         reg &= ~NI_DIG_FE_DIG_MODE(7);
39         reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
40
41         if (enable)
42                 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
43         else
44                 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
45
46         reg |= NI_DIG_HPD_SELECT(hpd);
47         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
48         WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
49
50         if (enable) {
51                 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
52
53                 do {
54                         temp = RREG32(NI_DIG_FE_CNTL + offset);
55                 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
56                 if (retries == 10000)
57                         DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
58         }
59         return 0;
60 }
61
62 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
63                                            int stream_number,
64                                            int fe,
65                                            int slots)
66 {
67         struct drm_device *dev = primary->base.dev;
68         struct radeon_device *rdev = dev->dev_private;
69         u32 temp, val;
70         int retries  = 0;
71         int satreg, satidx;
72
73         satreg = stream_number >> 1;
74         satidx = stream_number & 1;
75
76         temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
77
78         val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
79
80         val <<= (16 * satidx);
81
82         temp &= ~(0xffff << (16 * satidx));
83
84         temp |= val;
85
86         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
87         WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
88
89         WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
90
91         do {
92                 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
93         } while ((temp & 0x1) && retries++ < 10000);
94
95         if (retries == 10000)
96                 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
97
98         /* MTP 16 ? */
99         return 0;
100 }
101
102 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
103                                                struct radeon_encoder *primary)
104 {
105         struct drm_device *dev = mst_conn->base.dev;
106         struct stream_attribs new_attribs[6];
107         int i;
108         int idx = 0;
109         struct radeon_connector *radeon_connector;
110         struct drm_connector *connector;
111
112         memset(new_attribs, 0, sizeof(new_attribs));
113         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
114                 struct radeon_encoder *subenc;
115                 struct radeon_encoder_mst *mst_enc;
116
117                 radeon_connector = to_radeon_connector(connector);
118                 if (!radeon_connector->is_mst_connector)
119                         continue;
120
121                 if (radeon_connector->mst_port != mst_conn)
122                         continue;
123
124                 subenc = radeon_connector->mst_encoder;
125                 mst_enc = subenc->enc_priv;
126
127                 if (!mst_enc->enc_active)
128                         continue;
129
130                 new_attribs[idx].fe = mst_enc->fe;
131                 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
132                 idx++;
133         }
134
135         for (i = 0; i < idx; i++) {
136                 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
137                     new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
138                         radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
139                         mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
140                         mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
141                 }
142         }
143
144         for (i = idx; i < mst_conn->enabled_attribs; i++) {
145                 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
146                 mst_conn->cur_stream_attribs[i].fe = 0;
147                 mst_conn->cur_stream_attribs[i].slots = 0;
148         }
149         mst_conn->enabled_attribs = idx;
150         return 0;
151 }
152
153 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
154 {
155         struct drm_device *dev = mst->base.dev;
156         struct radeon_device *rdev = dev->dev_private;
157         struct radeon_encoder_mst *mst_enc = mst->enc_priv;
158         uint32_t val, temp;
159         uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
160         int retries = 0;
161
162         val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
163
164         WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
165
166         do {
167                 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
168         } while ((temp & 0x1) && (retries++ < 10000));
169
170         if (retries >= 10000)
171                 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
172         return 0;
173 }
174
175 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
176 {
177         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
178         struct radeon_connector *master = radeon_connector->mst_port;
179         struct edid *edid;
180         int ret = 0;
181
182         edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
183         radeon_connector->edid = edid;
184         DRM_DEBUG_KMS("edid retrieved %p\n", edid);
185         if (radeon_connector->edid) {
186                 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
187                 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
188                 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
189                 return ret;
190         }
191         drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
192
193         return ret;
194 }
195
196 static int radeon_dp_mst_get_modes(struct drm_connector *connector)
197 {
198         return radeon_dp_mst_get_ddc_modes(connector);
199 }
200
201 static enum drm_mode_status
202 radeon_dp_mst_mode_valid(struct drm_connector *connector,
203                         struct drm_display_mode *mode)
204 {
205         /* TODO - validate mode against available PBN for link */
206         if (mode->clock < 10000)
207                 return MODE_CLOCK_LOW;
208
209         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
210                 return MODE_H_ILLEGAL;
211
212         return MODE_OK;
213 }
214
215 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
216 {
217         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
218
219         return &radeon_connector->mst_encoder->base;
220 }
221
222 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
223         .get_modes = radeon_dp_mst_get_modes,
224         .mode_valid = radeon_dp_mst_mode_valid,
225         .best_encoder = radeon_mst_best_encoder,
226 };
227
228 static enum drm_connector_status
229 radeon_dp_mst_detect(struct drm_connector *connector, bool force)
230 {
231         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
232         struct radeon_connector *master = radeon_connector->mst_port;
233
234         return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
235 }
236
237 static void
238 radeon_dp_mst_connector_destroy(struct drm_connector *connector)
239 {
240         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
241         struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
242
243         drm_encoder_cleanup(&radeon_encoder->base);
244         kfree(radeon_encoder);
245         drm_connector_cleanup(connector);
246         kfree(radeon_connector);
247 }
248
249 static int radeon_connector_dpms(struct drm_connector *connector, int mode)
250 {
251         DRM_DEBUG_KMS("\n");
252         return 0;
253 }
254
255 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
256         .dpms = radeon_connector_dpms,
257         .detect = radeon_dp_mst_detect,
258         .fill_modes = drm_helper_probe_single_connector_modes,
259         .destroy = radeon_dp_mst_connector_destroy,
260 };
261
262 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
263                                                          struct drm_dp_mst_port *port,
264                                                          const char *pathprop)
265 {
266         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
267         struct drm_device *dev = master->base.dev;
268         struct radeon_connector *radeon_connector;
269         struct drm_connector *connector;
270
271         radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
272         if (!radeon_connector)
273                 return NULL;
274
275         radeon_connector->is_mst_connector = true;
276         connector = &radeon_connector->base;
277         radeon_connector->port = port;
278         radeon_connector->mst_port = master;
279         DRM_DEBUG_KMS("\n");
280
281         drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
282         drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
283         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
284
285         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
286         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
287         drm_mode_connector_set_path_property(connector, pathprop);
288
289         return connector;
290 }
291
292 static void radeon_dp_register_mst_connector(struct drm_connector *connector)
293 {
294         struct drm_device *dev = connector->dev;
295         struct radeon_device *rdev = dev->dev_private;
296
297         drm_modeset_lock_all(dev);
298         radeon_fb_add_connector(rdev, connector);
299         drm_modeset_unlock_all(dev);
300
301         drm_connector_register(connector);
302 }
303
304 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
305                                             struct drm_connector *connector)
306 {
307         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
308         struct drm_device *dev = master->base.dev;
309         struct radeon_device *rdev = dev->dev_private;
310
311         drm_connector_unregister(connector);
312         /* need to nuke the connector */
313         drm_modeset_lock_all(dev);
314         /* dpms off */
315         radeon_fb_remove_connector(rdev, connector);
316
317         drm_connector_cleanup(connector);
318         drm_modeset_unlock_all(dev);
319
320         kfree(connector);
321         DRM_DEBUG_KMS("\n");
322 }
323
324 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
325 {
326         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
327         struct drm_device *dev = master->base.dev;
328
329         drm_kms_helper_hotplug_event(dev);
330 }
331
332 struct drm_dp_mst_topology_cbs mst_cbs = {
333         .add_connector = radeon_dp_add_mst_connector,
334         .register_connector = radeon_dp_register_mst_connector,
335         .destroy_connector = radeon_dp_destroy_mst_connector,
336         .hotplug = radeon_dp_mst_hotplug,
337 };
338
339 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
340 {
341         struct drm_device *dev = encoder->dev;
342         struct drm_connector *connector;
343
344         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
345                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
346                 if (!connector->encoder)
347                         continue;
348                 if (!radeon_connector->is_mst_connector)
349                         continue;
350
351                 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
352                 if (connector->encoder == encoder)
353                         return radeon_connector;
354         }
355         return NULL;
356 }
357
358 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
359 {
360         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
361         struct drm_device *dev = crtc->dev;
362         struct radeon_device *rdev = dev->dev_private;
363         struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
364         struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
365         struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
366         int dp_clock;
367         struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
368
369         if (radeon_connector) {
370                 radeon_connector->pixelclock_for_modeset = mode->clock;
371                 if (radeon_connector->base.display_info.bpc)
372                         radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
373                 else
374                         radeon_crtc->bpc = 8;
375         }
376
377         DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
378         dp_clock = dig_connector->dp_clock;
379         radeon_crtc->ss_enabled =
380                 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
381                                                  ASIC_INTERNAL_SS_ON_DP,
382                                                  dp_clock);
383 }
384
385 static void
386 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
387 {
388         struct drm_device *dev = encoder->dev;
389         struct radeon_device *rdev = dev->dev_private;
390         struct radeon_encoder *radeon_encoder, *primary;
391         struct radeon_encoder_mst *mst_enc;
392         struct radeon_encoder_atom_dig *dig_enc;
393         struct radeon_connector *radeon_connector;
394         struct drm_crtc *crtc;
395         struct radeon_crtc *radeon_crtc;
396         int ret, slots;
397
398         if (!ASIC_IS_DCE5(rdev)) {
399                 DRM_ERROR("got mst dpms on non-DCE5\n");
400                 return;
401         }
402
403         radeon_connector = radeon_mst_find_connector(encoder);
404         if (!radeon_connector)
405                 return;
406
407         radeon_encoder = to_radeon_encoder(encoder);
408
409         mst_enc = radeon_encoder->enc_priv;
410
411         primary = mst_enc->primary;
412
413         dig_enc = primary->enc_priv;
414
415         crtc = encoder->crtc;
416         DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
417
418         switch (mode) {
419         case DRM_MODE_DPMS_ON:
420                 dig_enc->active_mst_links++;
421
422                 radeon_crtc = to_radeon_crtc(crtc);
423
424                 if (dig_enc->active_mst_links == 1) {
425                         mst_enc->fe = dig_enc->dig_encoder;
426                         mst_enc->fe_from_be = true;
427                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
428
429                         atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
430                         atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
431                                                         0, 0, dig_enc->dig_encoder);
432
433                         if (radeon_dp_needs_link_train(mst_enc->connector) ||
434                             dig_enc->active_mst_links == 1) {
435                                 radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
436                         }
437
438                 } else {
439                         mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
440                         if (mst_enc->fe == -1)
441                                 DRM_ERROR("failed to get frontend for dig encoder\n");
442                         mst_enc->fe_from_be = false;
443                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
444                 }
445
446                 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
447                               dig_enc->linkb, radeon_crtc->crtc_id);
448
449                 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
450                                                radeon_connector->port,
451                                                mst_enc->pbn, &slots);
452                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
453
454                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
455                                           radeon_connector->mst_port->hpd.hpd, true);
456
457                 mst_enc->enc_active = true;
458                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
459                 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
460
461                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
462                                             mst_enc->fe);
463                 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
464
465                 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
466
467                 break;
468         case DRM_MODE_DPMS_STANDBY:
469         case DRM_MODE_DPMS_SUSPEND:
470         case DRM_MODE_DPMS_OFF:
471                 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
472
473                 if (!mst_enc->enc_active)
474                         return;
475
476                 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
477                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
478
479                 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
480                 /* and this can also fail */
481                 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
482
483                 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
484
485                 mst_enc->enc_active = false;
486                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
487
488                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
489                                           radeon_connector->mst_port->hpd.hpd, false);
490                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
491                                             mst_enc->fe);
492
493                 if (!mst_enc->fe_from_be)
494                         radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
495
496                 mst_enc->fe_from_be = false;
497                 dig_enc->active_mst_links--;
498                 if (dig_enc->active_mst_links == 0) {
499                         /* drop link */
500                 }
501
502                 break;
503         }
504
505 }
506
507 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
508                                    const struct drm_display_mode *mode,
509                                    struct drm_display_mode *adjusted_mode)
510 {
511         struct radeon_encoder_mst *mst_enc;
512         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
513         int bpp = 24;
514
515         mst_enc = radeon_encoder->enc_priv;
516
517         mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
518
519         mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
520         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
521                       mst_enc->primary->active_device, mst_enc->primary->devices,
522                       mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
523
524
525         drm_mode_set_crtcinfo(adjusted_mode, 0);
526         {
527           struct radeon_connector_atom_dig *dig_connector;
528
529           dig_connector = mst_enc->connector->con_priv;
530           dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
531           dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
532                                                                 dig_connector->dpcd);
533           DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
534                         dig_connector->dp_lane_count, dig_connector->dp_clock);
535         }
536         return true;
537 }
538
539 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
540 {
541         struct radeon_connector *radeon_connector;
542         struct radeon_encoder *radeon_encoder, *primary;
543         struct radeon_encoder_mst *mst_enc;
544         struct radeon_encoder_atom_dig *dig_enc;
545
546         radeon_connector = radeon_mst_find_connector(encoder);
547         if (!radeon_connector) {
548                 DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
549                 return;
550         }
551         radeon_encoder = to_radeon_encoder(encoder);
552
553         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
554
555         mst_enc = radeon_encoder->enc_priv;
556
557         primary = mst_enc->primary;
558
559         dig_enc = primary->enc_priv;
560
561         mst_enc->port = radeon_connector->port;
562
563         if (dig_enc->dig_encoder == -1) {
564                 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
565                 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
566                 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
567
568
569         }
570         DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
571 }
572
573 static void
574 radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
575                              struct drm_display_mode *mode,
576                              struct drm_display_mode *adjusted_mode)
577 {
578         DRM_DEBUG_KMS("\n");
579 }
580
581 static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
582 {
583         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
584         DRM_DEBUG_KMS("\n");
585 }
586
587 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
588         .dpms = radeon_mst_encoder_dpms,
589         .mode_fixup = radeon_mst_mode_fixup,
590         .prepare = radeon_mst_encoder_prepare,
591         .mode_set = radeon_mst_encoder_mode_set,
592         .commit = radeon_mst_encoder_commit,
593 };
594
595 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
596 {
597         drm_encoder_cleanup(encoder);
598         kfree(encoder);
599 }
600
601 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
602         .destroy = radeon_dp_mst_encoder_destroy,
603 };
604
605 static struct radeon_encoder *
606 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
607 {
608         struct drm_device *dev = connector->base.dev;
609         struct radeon_device *rdev = dev->dev_private;
610         struct radeon_encoder *radeon_encoder;
611         struct radeon_encoder_mst *mst_enc;
612         struct drm_encoder *encoder;
613         const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
614         struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
615
616         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
617         radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
618         if (!radeon_encoder)
619                 return NULL;
620
621         radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
622         if (!radeon_encoder->enc_priv) {
623                 kfree(radeon_encoder);
624                 return NULL;
625         }
626         encoder = &radeon_encoder->base;
627         switch (rdev->num_crtc) {
628         case 1:
629                 encoder->possible_crtcs = 0x1;
630                 break;
631         case 2:
632         default:
633                 encoder->possible_crtcs = 0x3;
634                 break;
635         case 4:
636                 encoder->possible_crtcs = 0xf;
637                 break;
638         case 6:
639                 encoder->possible_crtcs = 0x3f;
640                 break;
641         }
642
643         drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
644                          DRM_MODE_ENCODER_DPMST);
645         drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
646
647         mst_enc = radeon_encoder->enc_priv;
648         mst_enc->connector = connector;
649         mst_enc->primary = to_radeon_encoder(enc_master);
650         radeon_encoder->is_mst_encoder = true;
651         return radeon_encoder;
652 }
653
654 int
655 radeon_dp_mst_init(struct radeon_connector *radeon_connector)
656 {
657         struct drm_device *dev = radeon_connector->base.dev;
658
659         if (!radeon_connector->ddc_bus->has_aux)
660                 return 0;
661
662         radeon_connector->mst_mgr.cbs = &mst_cbs;
663         return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
664                                             &radeon_connector->ddc_bus->aux, 16, 6,
665                                             radeon_connector->base.base.id);
666 }
667
668 int
669 radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
670 {
671         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
672         struct drm_device *dev = radeon_connector->base.dev;
673         struct radeon_device *rdev = dev->dev_private;
674         int ret;
675         u8 msg[1];
676
677         if (!radeon_mst)
678                 return 0;
679
680         if (!ASIC_IS_DCE5(rdev))
681                 return 0;
682
683         if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
684                 return 0;
685
686         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
687                                1);
688         if (ret) {
689                 if (msg[0] & DP_MST_CAP) {
690                         DRM_DEBUG_KMS("Sink is MST capable\n");
691                         dig_connector->is_mst = true;
692                 } else {
693                         DRM_DEBUG_KMS("Sink is not MST capable\n");
694                         dig_connector->is_mst = false;
695                 }
696
697         }
698         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
699                                         dig_connector->is_mst);
700         return dig_connector->is_mst;
701 }
702
703 int
704 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
705 {
706         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
707         int retry;
708
709         if (dig_connector->is_mst) {
710                 u8 esi[16] = { 0 };
711                 int dret;
712                 int ret = 0;
713                 bool handled;
714
715                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
716                                        DP_SINK_COUNT_ESI, esi, 8);
717 go_again:
718                 if (dret == 8) {
719                         DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
720                         ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
721
722                         if (handled) {
723                                 for (retry = 0; retry < 3; retry++) {
724                                         int wret;
725                                         wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
726                                                                  DP_SINK_COUNT_ESI + 1, &esi[1], 3);
727                                         if (wret == 3)
728                                                 break;
729                                 }
730
731                                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
732                                                         DP_SINK_COUNT_ESI, esi, 8);
733                                 if (dret == 8) {
734                                         DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
735                                         goto go_again;
736                                 }
737                         } else
738                                 ret = 0;
739
740                         return ret;
741                 } else {
742                         DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
743                         dig_connector->is_mst = false;
744                         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
745                                                         dig_connector->is_mst);
746                         /* send a hotplug event */
747                 }
748         }
749         return -EINVAL;
750 }
751
752 #if defined(CONFIG_DEBUG_FS)
753
754 static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
755 {
756         struct drm_info_node *node = (struct drm_info_node *)m->private;
757         struct drm_device *dev = node->minor->dev;
758         struct drm_connector *connector;
759         struct radeon_connector *radeon_connector;
760         struct radeon_connector_atom_dig *dig_connector;
761         int i;
762
763         drm_modeset_lock_all(dev);
764         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
765                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
766                         continue;
767
768                 radeon_connector = to_radeon_connector(connector);
769                 dig_connector = radeon_connector->con_priv;
770                 if (radeon_connector->is_mst_connector)
771                         continue;
772                 if (!dig_connector->is_mst)
773                         continue;
774                 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
775
776                 for (i = 0; i < radeon_connector->enabled_attribs; i++)
777                         seq_printf(m, "attrib %d: %d %d\n", i,
778                                    radeon_connector->cur_stream_attribs[i].fe,
779                                    radeon_connector->cur_stream_attribs[i].slots);
780         }
781         drm_modeset_unlock_all(dev);
782         return 0;
783 }
784
785 static struct drm_info_list radeon_debugfs_mst_list[] = {
786         {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
787 };
788 #endif
789
790 int radeon_mst_debugfs_init(struct radeon_device *rdev)
791 {
792 #if defined(CONFIG_DEBUG_FS)
793         return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
794 #endif
795         return 0;
796 }