drm/radeon/kms: attempt to avoid copying data twice on coherent cards. (v3)
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon_cs.c
1 /*
2  * Copyright 2008 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Jerome Glisse <glisse@freedesktop.org>
26  */
27 #include "drmP.h"
28 #include "radeon_drm.h"
29 #include "radeon_reg.h"
30 #include "radeon.h"
31
32 void r100_cs_dump_packet(struct radeon_cs_parser *p,
33                          struct radeon_cs_packet *pkt);
34
35 int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
36 {
37         struct drm_device *ddev = p->rdev->ddev;
38         struct radeon_cs_chunk *chunk;
39         unsigned i, j;
40         bool duplicate;
41
42         if (p->chunk_relocs_idx == -1) {
43                 return 0;
44         }
45         chunk = &p->chunks[p->chunk_relocs_idx];
46         /* FIXME: we assume that each relocs use 4 dwords */
47         p->nrelocs = chunk->length_dw / 4;
48         p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL);
49         if (p->relocs_ptr == NULL) {
50                 return -ENOMEM;
51         }
52         p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
53         if (p->relocs == NULL) {
54                 return -ENOMEM;
55         }
56         for (i = 0; i < p->nrelocs; i++) {
57                 struct drm_radeon_cs_reloc *r;
58
59                 duplicate = false;
60                 r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4];
61                 for (j = 0; j < i; j++) {
62                         if (r->handle == p->relocs[j].handle) {
63                                 p->relocs_ptr[i] = &p->relocs[j];
64                                 duplicate = true;
65                                 break;
66                         }
67                 }
68                 if (!duplicate) {
69                         p->relocs[i].gobj = drm_gem_object_lookup(ddev,
70                                                                   p->filp,
71                                                                   r->handle);
72                         if (p->relocs[i].gobj == NULL) {
73                                 DRM_ERROR("gem object lookup failed 0x%x\n",
74                                           r->handle);
75                                 return -ENOENT;
76                         }
77                         p->relocs_ptr[i] = &p->relocs[i];
78                         p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
79                         p->relocs[i].lobj.bo = p->relocs[i].robj;
80                         p->relocs[i].lobj.wdomain = r->write_domain;
81                         p->relocs[i].lobj.rdomain = r->read_domains;
82                         p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
83                         p->relocs[i].handle = r->handle;
84                         p->relocs[i].flags = r->flags;
85                         radeon_bo_list_add_object(&p->relocs[i].lobj,
86                                                   &p->validated);
87
88                 } else
89                         p->relocs[i].handle = 0;
90         }
91         return radeon_bo_list_validate(&p->validated);
92 }
93
94 static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
95 {
96         p->priority = priority;
97
98         switch (ring) {
99         default:
100                 DRM_ERROR("unknown ring id: %d\n", ring);
101                 return -EINVAL;
102         case RADEON_CS_RING_GFX:
103                 p->ring = RADEON_RING_TYPE_GFX_INDEX;
104                 break;
105         case RADEON_CS_RING_COMPUTE:
106                 if (p->rdev->family >= CHIP_TAHITI) {
107                         if (p->priority > 0)
108                                 p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
109                         else
110                                 p->ring = CAYMAN_RING_TYPE_CP2_INDEX;
111                 } else
112                         p->ring = RADEON_RING_TYPE_GFX_INDEX;
113                 break;
114         }
115         return 0;
116 }
117
118 static int radeon_cs_sync_rings(struct radeon_cs_parser *p)
119 {
120         bool sync_to_ring[RADEON_NUM_RINGS] = { };
121         int i, r;
122
123         for (i = 0; i < p->nrelocs; i++) {
124                 if (!p->relocs[i].robj || !p->relocs[i].robj->tbo.sync_obj)
125                         continue;
126
127                 if (!(p->relocs[i].flags & RADEON_RELOC_DONT_SYNC)) {
128                         struct radeon_fence *fence = p->relocs[i].robj->tbo.sync_obj;
129                         if (!radeon_fence_signaled(fence)) {
130                                 sync_to_ring[fence->ring] = true;
131                         }
132                 }
133         }
134
135         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
136                 /* no need to sync to our own or unused rings */
137                 if (i == p->ring || !sync_to_ring[i] || !p->rdev->ring[i].ready)
138                         continue;
139
140                 if (!p->ib->fence->semaphore) {
141                         r = radeon_semaphore_create(p->rdev, &p->ib->fence->semaphore);
142                         if (r)
143                                 return r;
144                 }
145
146                 r = radeon_ring_lock(p->rdev, &p->rdev->ring[i], 3);
147                 if (r)
148                         return r;
149                 radeon_semaphore_emit_signal(p->rdev, i, p->ib->fence->semaphore);
150                 radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[i]);
151
152                 r = radeon_ring_lock(p->rdev, &p->rdev->ring[p->ring], 3);
153                 if (r)
154                         return r;
155                 radeon_semaphore_emit_wait(p->rdev, p->ring, p->ib->fence->semaphore);
156                 radeon_ring_unlock_commit(p->rdev, &p->rdev->ring[p->ring]);
157         }
158         return 0;
159 }
160
161 int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
162 {
163         struct drm_radeon_cs *cs = data;
164         uint64_t *chunk_array_ptr;
165         unsigned size, i;
166         u32 ring = RADEON_CS_RING_GFX;
167         s32 priority = 0;
168
169         if (!cs->num_chunks) {
170                 return 0;
171         }
172         /* get chunks */
173         INIT_LIST_HEAD(&p->validated);
174         p->idx = 0;
175         p->chunk_ib_idx = -1;
176         p->chunk_relocs_idx = -1;
177         p->chunk_flags_idx = -1;
178         p->chunk_const_ib_idx = -1;
179         p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL);
180         if (p->chunks_array == NULL) {
181                 return -ENOMEM;
182         }
183         chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
184         if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
185                                sizeof(uint64_t)*cs->num_chunks)) {
186                 return -EFAULT;
187         }
188         p->cs_flags = 0;
189         p->nchunks = cs->num_chunks;
190         p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL);
191         if (p->chunks == NULL) {
192                 return -ENOMEM;
193         }
194         for (i = 0; i < p->nchunks; i++) {
195                 struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
196                 struct drm_radeon_cs_chunk user_chunk;
197                 uint32_t __user *cdata;
198
199                 chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
200                 if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
201                                        sizeof(struct drm_radeon_cs_chunk))) {
202                         return -EFAULT;
203                 }
204                 p->chunks[i].length_dw = user_chunk.length_dw;
205                 p->chunks[i].kdata = NULL;
206                 p->chunks[i].chunk_id = user_chunk.chunk_id;
207
208                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
209                         p->chunk_relocs_idx = i;
210                 }
211                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
212                         p->chunk_ib_idx = i;
213                         /* zero length IB isn't useful */
214                         if (p->chunks[i].length_dw == 0)
215                                 return -EINVAL;
216                 }
217                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
218                         p->chunk_const_ib_idx = i;
219                         /* zero length CONST IB isn't useful */
220                         if (p->chunks[i].length_dw == 0)
221                                 return -EINVAL;
222                 }
223                 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
224                         p->chunk_flags_idx = i;
225                         /* zero length flags aren't useful */
226                         if (p->chunks[i].length_dw == 0)
227                                 return -EINVAL;
228                 }
229
230                 p->chunks[i].length_dw = user_chunk.length_dw;
231                 p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;
232
233                 cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
234                 if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) ||
235                     (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
236                         size = p->chunks[i].length_dw * sizeof(uint32_t);
237                         p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
238                         if (p->chunks[i].kdata == NULL) {
239                                 return -ENOMEM;
240                         }
241                         if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
242                                                p->chunks[i].user_ptr, size)) {
243                                 return -EFAULT;
244                         }
245                         if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
246                                 p->cs_flags = p->chunks[i].kdata[0];
247                                 if (p->chunks[i].length_dw > 1)
248                                         ring = p->chunks[i].kdata[1];
249                                 if (p->chunks[i].length_dw > 2)
250                                         priority = (s32)p->chunks[i].kdata[2];
251                         }
252                 }
253         }
254
255         if ((p->cs_flags & RADEON_CS_USE_VM) &&
256             !p->rdev->vm_manager.enabled) {
257                 DRM_ERROR("VM not active on asic!\n");
258                 return -EINVAL;
259         }
260
261         /* we only support VM on SI+ */
262         if ((p->rdev->family >= CHIP_TAHITI) &&
263             ((p->cs_flags & RADEON_CS_USE_VM) == 0)) {
264                 DRM_ERROR("VM required on SI+!\n");
265                 return -EINVAL;
266         }
267
268         if (radeon_cs_get_ring(p, ring, priority))
269                 return -EINVAL;
270
271
272         /* deal with non-vm */
273         if ((p->chunk_ib_idx != -1) &&
274             ((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
275             (p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
276                 if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
277                         DRM_ERROR("cs IB too big: %d\n",
278                                   p->chunks[p->chunk_ib_idx].length_dw);
279                         return -EINVAL;
280                 }
281                 if ((p->rdev->flags & RADEON_IS_AGP)) {
282                         p->chunks[p->chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);
283                         p->chunks[p->chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);
284                         if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL ||
285                             p->chunks[p->chunk_ib_idx].kpage[1] == NULL) {
286                                 kfree(p->chunks[i].kpage[0]);
287                                 kfree(p->chunks[i].kpage[1]);
288                                 return -ENOMEM;
289                         }
290                 }
291                 p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
292                 p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
293                 p->chunks[p->chunk_ib_idx].last_copied_page = -1;
294                 p->chunks[p->chunk_ib_idx].last_page_index =
295                         ((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
296         }
297
298         return 0;
299 }
300
301 /**
302  * cs_parser_fini() - clean parser states
303  * @parser:     parser structure holding parsing context.
304  * @error:      error number
305  *
306  * If error is set than unvalidate buffer, otherwise just free memory
307  * used by parsing context.
308  **/
309 static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
310 {
311         unsigned i;
312
313
314         if (!error && parser->ib)
315                 ttm_eu_fence_buffer_objects(&parser->validated,
316                                             parser->ib->fence);
317         else
318                 ttm_eu_backoff_reservation(&parser->validated);
319
320         if (parser->relocs != NULL) {
321                 for (i = 0; i < parser->nrelocs; i++) {
322                         if (parser->relocs[i].gobj)
323                                 drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
324                 }
325         }
326         kfree(parser->track);
327         kfree(parser->relocs);
328         kfree(parser->relocs_ptr);
329         for (i = 0; i < parser->nchunks; i++) {
330                 kfree(parser->chunks[i].kdata);
331                 if ((parser->rdev->flags & RADEON_IS_AGP)) {
332                         kfree(parser->chunks[i].kpage[0]);
333                         kfree(parser->chunks[i].kpage[1]);
334                 }
335         }
336         kfree(parser->chunks);
337         kfree(parser->chunks_array);
338         radeon_ib_free(parser->rdev, &parser->ib);
339 }
340
341 static int radeon_cs_ib_chunk(struct radeon_device *rdev,
342                               struct radeon_cs_parser *parser)
343 {
344         struct radeon_cs_chunk *ib_chunk;
345         int r;
346
347         if (parser->chunk_ib_idx == -1)
348                 return 0;
349
350         if (parser->cs_flags & RADEON_CS_USE_VM)
351                 return 0;
352
353         ib_chunk = &parser->chunks[parser->chunk_ib_idx];
354         /* Copy the packet into the IB, the parser will read from the
355          * input memory (cached) and write to the IB (which can be
356          * uncached).
357          */
358         r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
359                            ib_chunk->length_dw * 4);
360         if (r) {
361                 DRM_ERROR("Failed to get ib !\n");
362                 return r;
363         }
364         parser->ib->length_dw = ib_chunk->length_dw;
365         r = radeon_cs_parse(rdev, parser->ring, parser);
366         if (r || parser->parser_error) {
367                 DRM_ERROR("Invalid command stream !\n");
368                 return r;
369         }
370         r = radeon_cs_finish_pages(parser);
371         if (r) {
372                 DRM_ERROR("Invalid command stream !\n");
373                 return r;
374         }
375         r = radeon_cs_sync_rings(parser);
376         if (r) {
377                 DRM_ERROR("Failed to synchronize rings !\n");
378         }
379         parser->ib->vm_id = 0;
380         r = radeon_ib_schedule(rdev, parser->ib);
381         if (r) {
382                 DRM_ERROR("Failed to schedule IB !\n");
383         }
384         return 0;
385 }
386
387 static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
388                                    struct radeon_vm *vm)
389 {
390         struct radeon_bo_list *lobj;
391         struct radeon_bo *bo;
392         int r;
393
394         list_for_each_entry(lobj, &parser->validated, tv.head) {
395                 bo = lobj->bo;
396                 r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
397                 if (r) {
398                         return r;
399                 }
400         }
401         return 0;
402 }
403
404 static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
405                                  struct radeon_cs_parser *parser)
406 {
407         struct radeon_cs_chunk *ib_chunk;
408         struct radeon_fpriv *fpriv = parser->filp->driver_priv;
409         struct radeon_vm *vm = &fpriv->vm;
410         int r;
411
412         if (parser->chunk_ib_idx == -1)
413                 return 0;
414
415         if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
416                 return 0;
417
418         if ((rdev->family >= CHIP_TAHITI) &&
419             (parser->chunk_const_ib_idx != -1)) {
420                 ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
421                 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
422                         DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
423                         return -EINVAL;
424                 }
425                 r =  radeon_ib_get(rdev, parser->ring, &parser->const_ib,
426                                    ib_chunk->length_dw * 4);
427                 if (r) {
428                         DRM_ERROR("Failed to get const ib !\n");
429                         return r;
430                 }
431                 parser->const_ib->is_const_ib = true;
432                 parser->const_ib->length_dw = ib_chunk->length_dw;
433                 /* Copy the packet into the IB */
434                 if (DRM_COPY_FROM_USER(parser->const_ib->ptr, ib_chunk->user_ptr,
435                                        ib_chunk->length_dw * 4)) {
436                         return -EFAULT;
437                 }
438                 r = radeon_ring_ib_parse(rdev, parser->ring, parser->const_ib);
439                 if (r) {
440                         return r;
441                 }
442         }
443
444         ib_chunk = &parser->chunks[parser->chunk_ib_idx];
445         if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
446                 DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
447                 return -EINVAL;
448         }
449         r =  radeon_ib_get(rdev, parser->ring, &parser->ib,
450                            ib_chunk->length_dw * 4);
451         if (r) {
452                 DRM_ERROR("Failed to get ib !\n");
453                 return r;
454         }
455         parser->ib->length_dw = ib_chunk->length_dw;
456         /* Copy the packet into the IB */
457         if (DRM_COPY_FROM_USER(parser->ib->ptr, ib_chunk->user_ptr,
458                                ib_chunk->length_dw * 4)) {
459                 return -EFAULT;
460         }
461         r = radeon_ring_ib_parse(rdev, parser->ring, parser->ib);
462         if (r) {
463                 return r;
464         }
465
466         mutex_lock(&vm->mutex);
467         r = radeon_vm_bind(rdev, vm);
468         if (r) {
469                 goto out;
470         }
471         r = radeon_bo_vm_update_pte(parser, vm);
472         if (r) {
473                 goto out;
474         }
475         r = radeon_cs_sync_rings(parser);
476         if (r) {
477                 DRM_ERROR("Failed to synchronize rings !\n");
478         }
479
480         if ((rdev->family >= CHIP_TAHITI) &&
481             (parser->chunk_const_ib_idx != -1)) {
482                 parser->const_ib->vm_id = vm->id;
483                 /* ib pool is bind at 0 in virtual address space to gpu_addr is the
484                  * offset inside the pool bo
485                  */
486                 parser->const_ib->gpu_addr = parser->const_ib->sa_bo.offset;
487                 r = radeon_ib_schedule(rdev, parser->const_ib);
488                 if (r)
489                         goto out;
490         }
491
492         parser->ib->vm_id = vm->id;
493         /* ib pool is bind at 0 in virtual address space to gpu_addr is the
494          * offset inside the pool bo
495          */
496         parser->ib->gpu_addr = parser->ib->sa_bo.offset;
497         parser->ib->is_const_ib = false;
498         r = radeon_ib_schedule(rdev, parser->ib);
499 out:
500         if (!r) {
501                 if (vm->fence) {
502                         radeon_fence_unref(&vm->fence);
503                 }
504                 vm->fence = radeon_fence_ref(parser->ib->fence);
505         }
506         mutex_unlock(&fpriv->vm.mutex);
507         return r;
508 }
509
510 int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
511 {
512         struct radeon_device *rdev = dev->dev_private;
513         struct radeon_cs_parser parser;
514         int r;
515
516         radeon_mutex_lock(&rdev->cs_mutex);
517         if (!rdev->accel_working) {
518                 radeon_mutex_unlock(&rdev->cs_mutex);
519                 return -EBUSY;
520         }
521         /* initialize parser */
522         memset(&parser, 0, sizeof(struct radeon_cs_parser));
523         parser.filp = filp;
524         parser.rdev = rdev;
525         parser.dev = rdev->dev;
526         parser.family = rdev->family;
527         r = radeon_cs_parser_init(&parser, data);
528         if (r) {
529                 DRM_ERROR("Failed to initialize parser !\n");
530                 radeon_cs_parser_fini(&parser, r);
531                 radeon_mutex_unlock(&rdev->cs_mutex);
532                 return r;
533         }
534         r = radeon_cs_parser_relocs(&parser);
535         if (r) {
536                 if (r != -ERESTARTSYS)
537                         DRM_ERROR("Failed to parse relocation %d!\n", r);
538                 radeon_cs_parser_fini(&parser, r);
539                 radeon_mutex_unlock(&rdev->cs_mutex);
540                 return r;
541         }
542         r = radeon_cs_ib_chunk(rdev, &parser);
543         if (r) {
544                 goto out;
545         }
546         r = radeon_cs_ib_vm_chunk(rdev, &parser);
547         if (r) {
548                 goto out;
549         }
550 out:
551         radeon_cs_parser_fini(&parser, r);
552         radeon_mutex_unlock(&rdev->cs_mutex);
553         return r;
554 }
555
556 int radeon_cs_finish_pages(struct radeon_cs_parser *p)
557 {
558         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
559         int i;
560         int size = PAGE_SIZE;
561
562         for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
563                 if (i == ibc->last_page_index) {
564                         size = (ibc->length_dw * 4) % PAGE_SIZE;
565                         if (size == 0)
566                                 size = PAGE_SIZE;
567                 }
568                 
569                 if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
570                                        ibc->user_ptr + (i * PAGE_SIZE),
571                                        size))
572                         return -EFAULT;
573         }
574         return 0;
575 }
576
577 int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
578 {
579         int new_page;
580         struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
581         int i;
582         int size = PAGE_SIZE;
583         bool copy1 = (p->rdev->flags & RADEON_IS_AGP) ? false : true;
584
585         for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
586                 if (DRM_COPY_FROM_USER(p->ib->ptr + (i * (PAGE_SIZE/4)),
587                                        ibc->user_ptr + (i * PAGE_SIZE),
588                                        PAGE_SIZE)) {
589                         p->parser_error = -EFAULT;
590                         return 0;
591                 }
592         }
593
594         if (pg_idx == ibc->last_page_index) {
595                 size = (ibc->length_dw * 4) % PAGE_SIZE;
596                 if (size == 0)
597                         size = PAGE_SIZE;
598         }
599
600         new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;
601         if (copy1)
602                 ibc->kpage[new_page] = p->ib->ptr + (pg_idx * (PAGE_SIZE / 4));
603
604         if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
605                                ibc->user_ptr + (pg_idx * PAGE_SIZE),
606                                size)) {
607                 p->parser_error = -EFAULT;
608                 return 0;
609         }
610
611         /* copy to IB for non single case */
612         if (!copy1)
613                 memcpy((void *)(p->ib->ptr+(pg_idx*(PAGE_SIZE/4))), ibc->kpage[new_page], size);
614
615         ibc->last_copied_page = pg_idx;
616         ibc->kpage_idx[new_page] = pg_idx;
617
618         return new_page;
619 }