0fc7a93a6fb2a7ed7ca71bd73dc0fbefd648bb30
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon_audio.c
1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Slava Grigorev <slava.grigorev@amd.com>
23  */
24
25 #include <drm/drmP.h>
26 #include <drm/drm_crtc.h>
27 #include "radeon.h"
28 #include "atom.h"
29 #include "radeon_audio.h"
30
31 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
32                 u8 enable_mask);
33 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
34                 u8 enable_mask);
35 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
36 void dce6_endpoint_wreg(struct radeon_device *rdev,
37                 u32 offset, u32 reg, u32 v);
38 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
39                 struct cea_sad *sads, int sad_count);
40 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
41                 struct cea_sad *sads, int sad_count);
42 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
43                 struct cea_sad *sads, int sad_count);
44
45 static const u32 pin_offsets[7] =
46 {
47         (0x5e00 - 0x5e00),
48         (0x5e18 - 0x5e00),
49         (0x5e30 - 0x5e00),
50         (0x5e48 - 0x5e00),
51         (0x5e60 - 0x5e00),
52         (0x5e78 - 0x5e00),
53         (0x5e90 - 0x5e00),
54 };
55
56 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
57 {
58         return RREG32(reg);
59 }
60
61 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
62                 u32 reg, u32 v)
63 {
64         WREG32(reg, v);
65 }
66
67 static struct radeon_audio_basic_funcs dce32_funcs = {
68         .endpoint_rreg = radeon_audio_rreg,
69         .endpoint_wreg = radeon_audio_wreg,
70 };
71
72 static struct radeon_audio_basic_funcs dce4_funcs = {
73         .endpoint_rreg = radeon_audio_rreg,
74         .endpoint_wreg = radeon_audio_wreg,
75 };
76
77 static struct radeon_audio_basic_funcs dce6_funcs = {
78         .endpoint_rreg = dce6_endpoint_rreg,
79         .endpoint_wreg = dce6_endpoint_wreg,
80 };
81
82 static struct radeon_audio_funcs dce32_hdmi_funcs = {
83         .write_sad_regs = dce3_2_afmt_write_sad_regs,
84 };
85
86 static struct radeon_audio_funcs dce32_dp_funcs = {
87         .write_sad_regs = dce3_2_afmt_write_sad_regs,
88 };
89
90 static struct radeon_audio_funcs dce4_hdmi_funcs = {
91         .write_sad_regs = evergreen_hdmi_write_sad_regs,
92 };
93
94 static struct radeon_audio_funcs dce4_dp_funcs = {
95         .write_sad_regs = evergreen_hdmi_write_sad_regs,
96 };
97
98 static struct radeon_audio_funcs dce6_hdmi_funcs = {
99         .write_sad_regs = dce6_afmt_write_sad_regs,
100 };
101
102 static struct radeon_audio_funcs dce6_dp_funcs = {
103         .write_sad_regs = dce6_afmt_write_sad_regs,
104 };
105
106 static void radeon_audio_interface_init(struct radeon_device *rdev)
107 {
108         if (ASIC_IS_DCE6(rdev)) {
109                 rdev->audio.funcs = &dce6_funcs;
110                 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
111                 rdev->audio.dp_funcs = &dce6_dp_funcs;
112         } else if (ASIC_IS_DCE4(rdev)) {
113                 rdev->audio.funcs = &dce4_funcs;
114                 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
115                 rdev->audio.dp_funcs = &dce4_dp_funcs;
116         } else {
117                 rdev->audio.funcs = &dce32_funcs;
118                 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
119                 rdev->audio.dp_funcs = &dce32_dp_funcs;
120         }
121 }
122
123 static int radeon_audio_chipset_supported(struct radeon_device *rdev)
124 {
125         return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
126 }
127
128 int radeon_audio_init(struct radeon_device *rdev)
129 {
130         int i;
131
132         if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
133                 return 0;
134
135         rdev->audio.enabled = true;
136
137         if (ASIC_IS_DCE83(rdev))                /* KB: 2 streams, 3 endpoints */
138                 rdev->audio.num_pins = 3;
139         else if (ASIC_IS_DCE81(rdev))   /* KV: 4 streams, 7 endpoints */
140                 rdev->audio.num_pins = 7;
141         else if (ASIC_IS_DCE8(rdev))    /* BN/HW: 6 streams, 7 endpoints */
142                 rdev->audio.num_pins = 7;
143         else if (ASIC_IS_DCE64(rdev))   /* OL: 2 streams, 2 endpoints */
144                 rdev->audio.num_pins = 2;
145         else if (ASIC_IS_DCE61(rdev))   /* TN: 4 streams, 6 endpoints */
146                 rdev->audio.num_pins = 6;
147         else if (ASIC_IS_DCE6(rdev))    /* SI: 6 streams, 6 endpoints */
148                 rdev->audio.num_pins = 6;
149         else
150                 rdev->audio.num_pins = 1;
151
152         for (i = 0; i < rdev->audio.num_pins; i++) {
153                 rdev->audio.pin[i].channels = -1;
154                 rdev->audio.pin[i].rate = -1;
155                 rdev->audio.pin[i].bits_per_sample = -1;
156                 rdev->audio.pin[i].status_bits = 0;
157                 rdev->audio.pin[i].category_code = 0;
158                 rdev->audio.pin[i].connected = false;
159                 rdev->audio.pin[i].offset = pin_offsets[i];
160                 rdev->audio.pin[i].id = i;
161         }
162
163         radeon_audio_interface_init(rdev);
164
165         /* disable audio.  it will be set up later */
166         for (i = 0; i < rdev->audio.num_pins; i++)
167                 if (ASIC_IS_DCE6(rdev))
168                         dce6_audio_enable(rdev, &rdev->audio.pin[i], false);
169                 else
170                         r600_audio_enable(rdev, &rdev->audio.pin[i], false);
171
172         return 0;
173 }
174
175 void radeon_audio_detect(struct drm_connector *connector,
176         enum drm_connector_status status)
177 {
178         if (!connector || !connector->encoder)
179                 return;
180
181         if (status == connector_status_connected) {
182                 int sink_type;
183                 struct radeon_device *rdev = connector->encoder->dev->dev_private;
184                 struct radeon_connector *radeon_connector;
185                 struct radeon_encoder *radeon_encoder =
186                         to_radeon_encoder(connector->encoder);
187
188                 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
189                         radeon_encoder->audio = 0;
190                         return;
191                 }
192
193                 radeon_connector = to_radeon_connector(connector);
194                 sink_type = radeon_dp_getsinktype(radeon_connector);
195
196                 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
197                         sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
198                         radeon_encoder->audio = rdev->audio.dp_funcs;
199                 else
200                         radeon_encoder->audio = rdev->audio.hdmi_funcs;
201                 /* TODO: set up the sads, etc. and set the audio enable_mask */
202         } else {
203                 /* TODO: reset the audio enable_mask */
204         }
205 }
206
207 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
208 {
209         if (rdev->audio.funcs->endpoint_rreg)
210                 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
211
212         return 0;
213 }
214
215 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
216         u32 reg, u32 v)
217 {
218         if (rdev->audio.funcs->endpoint_wreg)
219                 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
220 }
221
222 void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
223 {
224         struct radeon_encoder *radeon_encoder;
225         struct drm_connector *connector;
226         struct radeon_connector *radeon_connector = NULL;
227         struct cea_sad *sads;
228         int sad_count;
229
230         list_for_each_entry(connector,
231                 &encoder->dev->mode_config.connector_list, head) {
232                 if (connector->encoder == encoder) {
233                         radeon_connector = to_radeon_connector(connector);
234                         break;
235                 }
236         }
237
238         if (!radeon_connector) {
239                 DRM_ERROR("Couldn't find encoder's connector\n");
240                 return;
241         }
242
243         sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
244         if (sad_count <= 0) {
245                 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
246                 return;
247         }
248         BUG_ON(!sads);
249
250         radeon_encoder = to_radeon_encoder(encoder);
251
252         if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
253                 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
254
255         kfree(sads);
256 }