2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include <linux/backlight.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/module.h>
27 #include <linux/of_platform.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/consumer.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_mipi_dsi.h>
34 #include <drm/drm_panel.h>
36 #include <video/display_timing.h>
37 #include <video/of_display_timing.h>
38 #include <video/videomode.h>
41 const struct drm_display_mode *modes;
42 unsigned int num_modes;
43 const struct display_timing *timings;
44 unsigned int num_timings;
54 * @prepare: the time (in milliseconds) that it takes for the panel to
55 * become ready and start receiving video data
56 * @enable: the time (in milliseconds) that it takes for the panel to
57 * display the first valid frame after starting to receive
59 * @disable: the time (in milliseconds) that it takes for the panel to
60 * turn the display off (no content is visible)
61 * @unprepare: the time (in milliseconds) that it takes for the panel
62 * to power itself down completely
68 unsigned int unprepare;
75 struct drm_panel base;
80 const struct panel_desc *desc;
82 struct backlight_device *backlight;
83 struct regulator *supply;
84 struct i2c_adapter *ddc;
86 struct gpio_desc *enable_gpio;
89 static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
91 return container_of(panel, struct panel_simple, base);
94 static int panel_simple_get_fixed_modes(struct panel_simple *panel)
96 struct drm_connector *connector = panel->base.connector;
97 struct drm_device *drm = panel->base.drm;
98 struct drm_display_mode *mode;
99 unsigned int i, num = 0;
104 for (i = 0; i < panel->desc->num_timings; i++) {
105 const struct display_timing *dt = &panel->desc->timings[i];
108 videomode_from_timing(dt, &vm);
109 mode = drm_mode_create(drm);
111 dev_err(drm->dev, "failed to add mode %ux%u\n",
112 dt->hactive.typ, dt->vactive.typ);
116 drm_display_mode_from_videomode(&vm, mode);
117 drm_mode_set_name(mode);
119 drm_mode_probed_add(connector, mode);
123 for (i = 0; i < panel->desc->num_modes; i++) {
124 const struct drm_display_mode *m = &panel->desc->modes[i];
126 mode = drm_mode_duplicate(drm, m);
128 dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
129 m->hdisplay, m->vdisplay, m->vrefresh);
133 drm_mode_set_name(mode);
135 drm_mode_probed_add(connector, mode);
139 connector->display_info.bpc = panel->desc->bpc;
140 connector->display_info.width_mm = panel->desc->size.width;
141 connector->display_info.height_mm = panel->desc->size.height;
142 if (panel->desc->bus_format)
143 drm_display_info_set_bus_formats(&connector->display_info,
144 &panel->desc->bus_format, 1);
149 static int panel_simple_of_get_native_mode(struct panel_simple *panel)
151 struct drm_connector *connector = panel->base.connector;
152 struct drm_device *drm = panel->base.drm;
153 struct drm_display_mode *mode;
154 struct device_node *timings_np;
157 timings_np = of_get_child_by_name(panel->dev->of_node,
160 dev_dbg(panel->dev, "failed to find display-timings node\n");
164 of_node_put(timings_np);
165 mode = drm_mode_create(drm);
169 ret = of_get_drm_display_mode(panel->dev->of_node, mode,
172 dev_dbg(panel->dev, "failed to find dts display timings\n");
173 drm_mode_destroy(drm, mode);
177 drm_mode_set_name(mode);
178 mode->type |= DRM_MODE_TYPE_PREFERRED;
179 drm_mode_probed_add(connector, mode);
184 static int panel_simple_disable(struct drm_panel *panel)
186 struct panel_simple *p = to_panel_simple(panel);
192 p->backlight->props.power = FB_BLANK_POWERDOWN;
193 backlight_update_status(p->backlight);
196 if (p->desc && p->desc->delay.disable)
197 msleep(p->desc->delay.disable);
204 static int panel_simple_unprepare(struct drm_panel *panel)
206 struct panel_simple *p = to_panel_simple(panel);
212 gpiod_direction_output(p->enable_gpio, 0);
214 regulator_disable(p->supply);
216 if (p->desc && p->desc->delay.unprepare)
217 msleep(p->desc->delay.unprepare);
224 static int panel_simple_prepare(struct drm_panel *panel)
226 struct panel_simple *p = to_panel_simple(panel);
232 err = regulator_enable(p->supply);
234 dev_err(panel->dev, "failed to enable supply: %d\n", err);
239 gpiod_direction_output(p->enable_gpio, 1);
241 if (p->desc && p->desc->delay.prepare)
242 msleep(p->desc->delay.prepare);
249 static int panel_simple_enable(struct drm_panel *panel)
251 struct panel_simple *p = to_panel_simple(panel);
256 if (p->desc && p->desc->delay.enable)
257 msleep(p->desc->delay.enable);
260 p->backlight->props.power = FB_BLANK_UNBLANK;
261 backlight_update_status(p->backlight);
269 static int panel_simple_get_modes(struct drm_panel *panel)
271 struct panel_simple *p = to_panel_simple(panel);
274 /* add device node plane modes */
275 num += panel_simple_of_get_native_mode(p);
277 /* add hard-coded panel modes */
278 num += panel_simple_get_fixed_modes(p);
280 /* probe EDID if a DDC bus is available */
282 struct edid *edid = drm_get_edid(panel->connector, p->ddc);
283 drm_mode_connector_update_edid_property(panel->connector, edid);
285 num += drm_add_edid_modes(panel->connector, edid);
293 static int panel_simple_get_timings(struct drm_panel *panel,
294 unsigned int num_timings,
295 struct display_timing *timings)
297 struct panel_simple *p = to_panel_simple(panel);
303 if (p->desc->num_timings < num_timings)
304 num_timings = p->desc->num_timings;
307 for (i = 0; i < num_timings; i++)
308 timings[i] = p->desc->timings[i];
310 return p->desc->num_timings;
313 static const struct drm_panel_funcs panel_simple_funcs = {
314 .disable = panel_simple_disable,
315 .unprepare = panel_simple_unprepare,
316 .prepare = panel_simple_prepare,
317 .enable = panel_simple_enable,
318 .get_modes = panel_simple_get_modes,
319 .get_timings = panel_simple_get_timings,
322 static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
324 struct device_node *backlight, *ddc;
325 struct panel_simple *panel;
326 struct panel_desc *of_desc;
330 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
335 of_desc = devm_kzalloc(dev, sizeof(*of_desc), GFP_KERNEL);
337 of_desc = devm_kmemdup(dev, desc, sizeof(*of_desc), GFP_KERNEL);
339 if (!of_property_read_u32(dev->of_node, "bus-format", &val))
340 of_desc->bus_format = val;
341 if (!of_property_read_u32(dev->of_node, "delay,prepare", &val))
342 of_desc->delay.prepare = val;
343 if (!of_property_read_u32(dev->of_node, "delay,enable", &val))
344 of_desc->delay.enable = val;
345 if (!of_property_read_u32(dev->of_node, "delay,disable", &val))
346 of_desc->delay.disable = val;
347 if (!of_property_read_u32(dev->of_node, "delay,unprepare", &val))
348 of_desc->delay.unprepare = val;
350 panel->enabled = false;
351 panel->prepared = false;
352 panel->desc = of_desc;
355 panel->supply = devm_regulator_get(dev, "power");
356 if (IS_ERR(panel->supply))
357 return PTR_ERR(panel->supply);
359 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 0);
360 if (IS_ERR(panel->enable_gpio)) {
361 err = PTR_ERR(panel->enable_gpio);
362 dev_err(dev, "failed to request GPIO: %d\n", err);
366 backlight = of_parse_phandle(dev->of_node, "backlight", 0);
368 panel->backlight = of_find_backlight_by_node(backlight);
369 of_node_put(backlight);
371 if (!panel->backlight)
372 return -EPROBE_DEFER;
375 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
377 panel->ddc = of_find_i2c_adapter_by_node(ddc);
386 drm_panel_init(&panel->base);
387 panel->base.dev = dev;
388 panel->base.funcs = &panel_simple_funcs;
390 err = drm_panel_add(&panel->base);
394 dev_set_drvdata(dev, panel);
400 put_device(&panel->ddc->dev);
402 if (panel->backlight)
403 put_device(&panel->backlight->dev);
408 static int panel_simple_remove(struct device *dev)
410 struct panel_simple *panel = dev_get_drvdata(dev);
412 drm_panel_detach(&panel->base);
413 drm_panel_remove(&panel->base);
415 panel_simple_disable(&panel->base);
418 put_device(&panel->ddc->dev);
420 if (panel->backlight)
421 put_device(&panel->backlight->dev);
426 static void panel_simple_shutdown(struct device *dev)
428 struct panel_simple *panel = dev_get_drvdata(dev);
430 panel_simple_disable(&panel->base);
433 static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
436 .hsync_start = 800 + 0,
437 .hsync_end = 800 + 0 + 255,
438 .htotal = 800 + 0 + 255 + 0,
440 .vsync_start = 480 + 2,
441 .vsync_end = 480 + 2 + 45,
442 .vtotal = 480 + 2 + 45 + 0,
444 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
447 static const struct panel_desc ampire_am800480r3tmqwa1h = {
448 .modes = &ire_am800480r3tmqwa1h_mode,
455 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
458 static const struct drm_display_mode auo_b101aw03_mode = {
461 .hsync_start = 1024 + 156,
462 .hsync_end = 1024 + 156 + 8,
463 .htotal = 1024 + 156 + 8 + 156,
465 .vsync_start = 600 + 16,
466 .vsync_end = 600 + 16 + 6,
467 .vtotal = 600 + 16 + 6 + 16,
471 static const struct panel_desc auo_b101aw03 = {
472 .modes = &auo_b101aw03_mode,
481 static const struct drm_display_mode auo_b101ean01_mode = {
484 .hsync_start = 1280 + 119,
485 .hsync_end = 1280 + 119 + 32,
486 .htotal = 1280 + 119 + 32 + 21,
488 .vsync_start = 800 + 4,
489 .vsync_end = 800 + 4 + 20,
490 .vtotal = 800 + 4 + 20 + 8,
494 static const struct panel_desc auo_b101ean01 = {
495 .modes = &auo_b101ean01_mode,
504 static const struct drm_display_mode auo_b101ew05_mode = {
507 .hsync_start = 1280 + 18,
508 .hsync_end = 1280 + 18 + 10,
509 .htotal = 1280 + 18 + 10 + 100,
511 .vsync_start = 800 + 6,
512 .vsync_end = 800 + 6 + 2,
513 .vtotal = 800 + 6 + 2 + 8,
517 static const struct panel_desc auo_b101ew05 = {
518 .modes = &auo_b101ew05_mode,
527 static const struct drm_display_mode auo_b101xtn01_mode = {
530 .hsync_start = 1366 + 20,
531 .hsync_end = 1366 + 20 + 70,
532 .htotal = 1366 + 20 + 70,
534 .vsync_start = 768 + 14,
535 .vsync_end = 768 + 14 + 42,
536 .vtotal = 768 + 14 + 42,
538 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
541 static const struct panel_desc auo_b101xtn01 = {
542 .modes = &auo_b101xtn01_mode,
551 static const struct drm_display_mode auo_b116xw03_mode = {
554 .hsync_start = 1366 + 40,
555 .hsync_end = 1366 + 40 + 40,
556 .htotal = 1366 + 40 + 40 + 32,
558 .vsync_start = 768 + 10,
559 .vsync_end = 768 + 10 + 12,
560 .vtotal = 768 + 10 + 12 + 6,
564 static const struct panel_desc auo_b116xw03 = {
565 .modes = &auo_b116xw03_mode,
574 static const struct drm_display_mode auo_b125han03_mode = {
577 .hsync_start = 1920 + 48,
578 .hsync_end = 1920 + 48 + 32,
579 .htotal = 1920 + 48 + 32 + 140,
581 .vsync_start = 1080 + 2,
582 .vsync_end = 1080 + 2 + 5,
583 .vtotal = 1080 + 2 + 5 + 57,
585 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
588 static const struct panel_desc auo_b125han03 = {
589 .modes = &auo_b125han03_mode,
596 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
599 static const struct drm_display_mode auo_b133xtn01_mode = {
602 .hsync_start = 1366 + 48,
603 .hsync_end = 1366 + 48 + 32,
604 .htotal = 1366 + 48 + 32 + 20,
606 .vsync_start = 768 + 3,
607 .vsync_end = 768 + 3 + 6,
608 .vtotal = 768 + 3 + 6 + 13,
612 static const struct panel_desc auo_b133xtn01 = {
613 .modes = &auo_b133xtn01_mode,
622 static const struct drm_display_mode auo_b133htn01_mode = {
625 .hsync_start = 1920 + 172,
626 .hsync_end = 1920 + 172 + 80,
627 .htotal = 1920 + 172 + 80 + 60,
629 .vsync_start = 1080 + 25,
630 .vsync_end = 1080 + 25 + 10,
631 .vtotal = 1080 + 25 + 10 + 10,
635 static const struct panel_desc auo_b133htn01 = {
636 .modes = &auo_b133htn01_mode,
650 static const struct drm_display_mode avic_tm070ddh03_mode = {
653 .hsync_start = 1024 + 160,
654 .hsync_end = 1024 + 160 + 4,
655 .htotal = 1024 + 160 + 4 + 156,
657 .vsync_start = 600 + 17,
658 .vsync_end = 600 + 17 + 1,
659 .vtotal = 600 + 17 + 1 + 17,
663 static const struct panel_desc avic_tm070ddh03 = {
664 .modes = &avic_tm070ddh03_mode,
678 static const struct drm_display_mode boe_nv125fhm_n73_mode = {
681 .hsync_start = 1366 + 80,
682 .hsync_end = 1366 + 80 + 20,
683 .htotal = 1366 + 80 + 20 + 60,
685 .vsync_start = 768 + 12,
686 .vsync_end = 768 + 12 + 2,
687 .vtotal = 768 + 12 + 2 + 8,
689 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
692 static const struct panel_desc boe_nv125fhm_n73 = {
693 .modes = &boe_nv125fhm_n73_mode,
703 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
706 static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
709 .hsync_start = 800 + 24,
710 .hsync_end = 800 + 24 + 16,
711 .htotal = 800 + 24 + 16 + 24,
713 .vsync_start = 1280 + 2,
714 .vsync_end = 1280 + 2 + 2,
715 .vtotal = 1280 + 2 + 2 + 4,
719 static const struct panel_desc chunghwa_claa070wp03xg = {
720 .modes = &chunghwa_claa070wp03xg_mode,
729 static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
732 .hsync_start = 1366 + 58,
733 .hsync_end = 1366 + 58 + 58,
734 .htotal = 1366 + 58 + 58 + 58,
736 .vsync_start = 768 + 4,
737 .vsync_end = 768 + 4 + 4,
738 .vtotal = 768 + 4 + 4 + 4,
742 static const struct panel_desc chunghwa_claa101wa01a = {
743 .modes = &chunghwa_claa101wa01a_mode,
752 static const struct drm_display_mode chunghwa_claa101wb01_mode = {
755 .hsync_start = 1366 + 48,
756 .hsync_end = 1366 + 48 + 32,
757 .htotal = 1366 + 48 + 32 + 20,
759 .vsync_start = 768 + 16,
760 .vsync_end = 768 + 16 + 8,
761 .vtotal = 768 + 16 + 8 + 16,
765 static const struct panel_desc chunghwa_claa101wb01 = {
766 .modes = &chunghwa_claa101wb01_mode,
775 static const struct drm_display_mode edt_et057090dhu_mode = {
778 .hsync_start = 640 + 16,
779 .hsync_end = 640 + 16 + 30,
780 .htotal = 640 + 16 + 30 + 114,
782 .vsync_start = 480 + 10,
783 .vsync_end = 480 + 10 + 3,
784 .vtotal = 480 + 10 + 3 + 32,
786 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
789 static const struct panel_desc edt_et057090dhu = {
790 .modes = &edt_et057090dhu_mode,
799 static const struct drm_display_mode edt_etm0700g0dh6_mode = {
802 .hsync_start = 800 + 40,
803 .hsync_end = 800 + 40 + 128,
804 .htotal = 800 + 40 + 128 + 88,
806 .vsync_start = 480 + 10,
807 .vsync_end = 480 + 10 + 2,
808 .vtotal = 480 + 10 + 2 + 33,
810 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
813 static const struct panel_desc edt_etm0700g0dh6 = {
814 .modes = &edt_etm0700g0dh6_mode,
823 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
826 .hsync_start = 800 + 168,
827 .hsync_end = 800 + 168 + 64,
828 .htotal = 800 + 168 + 64 + 88,
830 .vsync_start = 480 + 37,
831 .vsync_end = 480 + 37 + 2,
832 .vtotal = 480 + 37 + 2 + 8,
836 static const struct panel_desc foxlink_fl500wvr00_a0t = {
837 .modes = &foxlink_fl500wvr00_a0t_mode,
844 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
847 static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
850 .hsync_start = 480 + 5,
851 .hsync_end = 480 + 5 + 1,
852 .htotal = 480 + 5 + 1 + 40,
854 .vsync_start = 272 + 8,
855 .vsync_end = 272 + 8 + 1,
856 .vtotal = 272 + 8 + 1 + 8,
860 static const struct panel_desc giantplus_gpg482739qs5 = {
861 .modes = &giantplus_gpg482739qs5_mode,
868 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
871 static const struct display_timing hannstar_hsd070pww1_timing = {
872 .pixelclock = { 64300000, 71100000, 82000000 },
873 .hactive = { 1280, 1280, 1280 },
874 .hfront_porch = { 1, 1, 10 },
875 .hback_porch = { 1, 1, 10 },
877 * According to the data sheet, the minimum horizontal blanking interval
878 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
879 * minimum working horizontal blanking interval to be 60 clocks.
881 .hsync_len = { 58, 158, 661 },
882 .vactive = { 800, 800, 800 },
883 .vfront_porch = { 1, 1, 10 },
884 .vback_porch = { 1, 1, 10 },
885 .vsync_len = { 1, 21, 203 },
886 .flags = DISPLAY_FLAGS_DE_HIGH,
889 static const struct panel_desc hannstar_hsd070pww1 = {
890 .timings = &hannstar_hsd070pww1_timing,
897 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
900 static const struct display_timing hannstar_hsd100pxn1_timing = {
901 .pixelclock = { 55000000, 65000000, 75000000 },
902 .hactive = { 1024, 1024, 1024 },
903 .hfront_porch = { 40, 40, 40 },
904 .hback_porch = { 220, 220, 220 },
905 .hsync_len = { 20, 60, 100 },
906 .vactive = { 768, 768, 768 },
907 .vfront_porch = { 7, 7, 7 },
908 .vback_porch = { 21, 21, 21 },
909 .vsync_len = { 10, 10, 10 },
910 .flags = DISPLAY_FLAGS_DE_HIGH,
913 static const struct panel_desc hannstar_hsd100pxn1 = {
914 .timings = &hannstar_hsd100pxn1_timing,
921 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
924 static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
927 .hsync_start = 800 + 85,
928 .hsync_end = 800 + 85 + 86,
929 .htotal = 800 + 85 + 86 + 85,
931 .vsync_start = 480 + 16,
932 .vsync_end = 480 + 16 + 13,
933 .vtotal = 480 + 16 + 13 + 16,
937 static const struct panel_desc hitachi_tx23d38vm0caa = {
938 .modes = &hitachi_tx23d38vm0caa_mode,
947 static const struct drm_display_mode innolux_at043tn24_mode = {
950 .hsync_start = 480 + 2,
951 .hsync_end = 480 + 2 + 41,
952 .htotal = 480 + 2 + 41 + 2,
954 .vsync_start = 272 + 2,
955 .vsync_end = 272 + 2 + 11,
956 .vtotal = 272 + 2 + 11 + 2,
958 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
961 static const struct panel_desc innolux_at043tn24 = {
962 .modes = &innolux_at043tn24_mode,
969 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
972 static const struct drm_display_mode innolux_g121i1_l01_mode = {
975 .hsync_start = 1280 + 64,
976 .hsync_end = 1280 + 64 + 32,
977 .htotal = 1280 + 64 + 32 + 64,
979 .vsync_start = 800 + 9,
980 .vsync_end = 800 + 9 + 6,
981 .vtotal = 800 + 9 + 6 + 9,
985 static const struct panel_desc innolux_g121i1_l01 = {
986 .modes = &innolux_g121i1_l01_mode,
995 static const struct drm_display_mode innolux_n116bge_mode = {
998 .hsync_start = 1366 + 136,
999 .hsync_end = 1366 + 136 + 30,
1000 .htotal = 1366 + 136 + 30 + 60,
1002 .vsync_start = 768 + 8,
1003 .vsync_end = 768 + 8 + 12,
1004 .vtotal = 768 + 8 + 12 + 12,
1006 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1009 static const struct panel_desc innolux_n116bge = {
1010 .modes = &innolux_n116bge_mode,
1019 static const struct drm_display_mode innolux_n125hce_mode = {
1022 .hsync_start = 1920 + 80,
1023 .hsync_end = 1920 + 80 + 30,
1024 .htotal = 1920 + 80 + 30 + 50,
1026 .vsync_start = 1080 + 12,
1027 .vsync_end = 1080 + 12 + 4,
1028 .vtotal = 1080 + 12 + 4 + 16,
1030 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1033 static const struct panel_desc innolux_n125hce = {
1034 .modes = &innolux_n125hce_mode,
1045 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1048 static const struct drm_display_mode innolux_n156bge_l21_mode = {
1051 .hsync_start = 1366 + 16,
1052 .hsync_end = 1366 + 16 + 34,
1053 .htotal = 1366 + 16 + 34 + 50,
1055 .vsync_start = 768 + 2,
1056 .vsync_end = 768 + 2 + 6,
1057 .vtotal = 768 + 2 + 6 + 12,
1061 static const struct panel_desc innolux_n156bge_l21 = {
1062 .modes = &innolux_n156bge_l21_mode,
1071 static const struct drm_display_mode innolux_zj070na_01p_mode = {
1074 .hsync_start = 1024 + 128,
1075 .hsync_end = 1024 + 128 + 64,
1076 .htotal = 1024 + 128 + 64 + 128,
1078 .vsync_start = 600 + 16,
1079 .vsync_end = 600 + 16 + 4,
1080 .vtotal = 600 + 16 + 4 + 16,
1084 static const struct panel_desc innolux_zj070na_01p = {
1085 .modes = &innolux_zj070na_01p_mode,
1094 static const struct drm_display_mode lg_lb070wv8_mode = {
1097 .hsync_start = 800 + 88,
1098 .hsync_end = 800 + 88 + 80,
1099 .htotal = 800 + 88 + 80 + 88,
1101 .vsync_start = 480 + 10,
1102 .vsync_end = 480 + 10 + 25,
1103 .vtotal = 480 + 10 + 25 + 10,
1107 static const struct panel_desc lg_lb070wv8 = {
1108 .modes = &lg_lb070wv8_mode,
1115 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1118 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1121 .hsync_start = 1536 + 12,
1122 .hsync_end = 1536 + 12 + 16,
1123 .htotal = 1536 + 12 + 16 + 48,
1125 .vsync_start = 2048 + 8,
1126 .vsync_end = 2048 + 8 + 4,
1127 .vtotal = 2048 + 8 + 4 + 8,
1129 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1132 static const struct panel_desc lg_lp079qx1_sp0v = {
1133 .modes = &lg_lp079qx1_sp0v_mode,
1139 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1142 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1145 .hsync_start = 2048 + 150,
1146 .hsync_end = 2048 + 150 + 5,
1147 .htotal = 2048 + 150 + 5 + 5,
1149 .vsync_start = 1536 + 3,
1150 .vsync_end = 1536 + 3 + 1,
1151 .vtotal = 1536 + 3 + 1 + 9,
1155 static const struct panel_desc lg_lp097qx1_spa1 = {
1156 .modes = &lg_lp097qx1_spa1_mode,
1164 static const struct drm_display_mode lg_lp129qe_mode = {
1167 .hsync_start = 2560 + 48,
1168 .hsync_end = 2560 + 48 + 32,
1169 .htotal = 2560 + 48 + 32 + 80,
1171 .vsync_start = 1700 + 3,
1172 .vsync_end = 1700 + 3 + 10,
1173 .vtotal = 1700 + 3 + 10 + 36,
1177 static const struct panel_desc lg_lp129qe = {
1178 .modes = &lg_lp129qe_mode,
1187 static const struct drm_display_mode nec_nl4827hc19_05b_mode = {
1190 .hsync_start = 480 + 2,
1191 .hsync_end = 480 + 2 + 41,
1192 .htotal = 480 + 2 + 41 + 2,
1194 .vsync_start = 272 + 2,
1195 .vsync_end = 272 + 2 + 4,
1196 .vtotal = 272 + 2 + 4 + 2,
1200 static const struct panel_desc nec_nl4827hc19_05b = {
1201 .modes = &nec_nl4827hc19_05b_mode,
1208 .bus_format = MEDIA_BUS_FMT_RGB888_1X24
1211 static const struct display_timing okaya_rs800480t_7x0gp_timing = {
1212 .pixelclock = { 30000000, 30000000, 40000000 },
1213 .hactive = { 800, 800, 800 },
1214 .hfront_porch = { 40, 40, 40 },
1215 .hback_porch = { 40, 40, 40 },
1216 .hsync_len = { 1, 48, 48 },
1217 .vactive = { 480, 480, 480 },
1218 .vfront_porch = { 13, 13, 13 },
1219 .vback_porch = { 29, 29, 29 },
1220 .vsync_len = { 3, 3, 3 },
1221 .flags = DISPLAY_FLAGS_DE_HIGH,
1224 static const struct panel_desc okaya_rs800480t_7x0gp = {
1225 .timings = &okaya_rs800480t_7x0gp_timing,
1238 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1241 static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
1244 .hsync_start = 480 + 10,
1245 .hsync_end = 480 + 10 + 10,
1246 .htotal = 480 + 10 + 10 + 15,
1248 .vsync_start = 800 + 3,
1249 .vsync_end = 800 + 3 + 3,
1250 .vtotal = 800 + 3 + 3 + 3,
1254 static const struct panel_desc ortustech_com43h4m85ulc = {
1255 .modes = &ortustech_com43h4m85ulc_mode,
1262 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1265 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1268 .hsync_start = 2560 + 48,
1269 .hsync_end = 2560 + 48 + 32,
1270 .htotal = 2560 + 48 + 32 + 80,
1272 .vsync_start = 1600 + 2,
1273 .vsync_end = 1600 + 2 + 5,
1274 .vtotal = 1600 + 2 + 5 + 57,
1278 static const struct panel_desc samsung_lsn122dl01_c01 = {
1279 .modes = &samsung_lsn122dl01_c01_mode,
1287 static const struct drm_display_mode samsung_ltn101nt05_mode = {
1290 .hsync_start = 1024 + 24,
1291 .hsync_end = 1024 + 24 + 136,
1292 .htotal = 1024 + 24 + 136 + 160,
1294 .vsync_start = 600 + 3,
1295 .vsync_end = 600 + 3 + 6,
1296 .vtotal = 600 + 3 + 6 + 61,
1300 static const struct panel_desc samsung_ltn101nt05 = {
1301 .modes = &samsung_ltn101nt05_mode,
1310 static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1313 .hsync_start = 1366 + 64,
1314 .hsync_end = 1366 + 64 + 48,
1315 .htotal = 1366 + 64 + 48 + 128,
1317 .vsync_start = 768 + 2,
1318 .vsync_end = 768 + 2 + 5,
1319 .vtotal = 768 + 2 + 5 + 17,
1323 static const struct panel_desc samsung_ltn140at29_301 = {
1324 .modes = &samsung_ltn140at29_301_mode,
1333 static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = {
1336 .hsync_start = 800 + 1,
1337 .hsync_end = 800 + 1 + 64,
1338 .htotal = 800 + 1 + 64 + 64,
1340 .vsync_start = 480 + 1,
1341 .vsync_end = 480 + 1 + 23,
1342 .vtotal = 480 + 1 + 23 + 22,
1346 static const struct panel_desc shelly_sca07010_bfn_lnn = {
1347 .modes = &shelly_sca07010_bfn_lnn_mode,
1353 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1356 static const struct of_device_id platform_of_match[] = {
1358 .compatible = "simple-panel",
1361 .compatible = "ampire,am800480r3tmqwa1h",
1362 .data = &ire_am800480r3tmqwa1h,
1364 .compatible = "auo,b101aw03",
1365 .data = &auo_b101aw03,
1367 .compatible = "auo,b101ean01",
1368 .data = &auo_b101ean01,
1370 .compatible = "auo,b101ew05",
1371 .data = &auo_b101ew05,
1373 .compatible = "auo,b101xtn01",
1374 .data = &auo_b101xtn01,
1376 .compatible = "auo,b116xw03",
1377 .data = &auo_b116xw03,
1379 .compatible = "auo,b125han03",
1380 .data = &auo_b125han03,
1382 .compatible = "auo,b133htn01",
1383 .data = &auo_b133htn01,
1385 .compatible = "auo,b133xtn01",
1386 .data = &auo_b133xtn01,
1388 .compatible = "avic,tm070ddh03",
1389 .data = &avic_tm070ddh03,
1391 .compatible = "boe,nv125fhm-n73",
1392 .data = &boe_nv125fhm_n73,
1394 .compatible = "chunghwa,claa070wp03xg",
1395 .data = &chunghwa_claa070wp03xg,
1397 .compatible = "chunghwa,claa101wa01a",
1398 .data = &chunghwa_claa101wa01a
1400 .compatible = "chunghwa,claa101wb01",
1401 .data = &chunghwa_claa101wb01
1403 .compatible = "edt,et057090dhu",
1404 .data = &edt_et057090dhu,
1406 .compatible = "edt,et070080dh6",
1407 .data = &edt_etm0700g0dh6,
1409 .compatible = "edt,etm0700g0dh6",
1410 .data = &edt_etm0700g0dh6,
1412 .compatible = "foxlink,fl500wvr00-a0t",
1413 .data = &foxlink_fl500wvr00_a0t,
1415 .compatible = "giantplus,gpg482739qs5",
1416 .data = &giantplus_gpg482739qs5
1418 .compatible = "hannstar,hsd070pww1",
1419 .data = &hannstar_hsd070pww1,
1421 .compatible = "hannstar,hsd100pxn1",
1422 .data = &hannstar_hsd100pxn1,
1424 .compatible = "hit,tx23d38vm0caa",
1425 .data = &hitachi_tx23d38vm0caa
1427 .compatible = "innolux,at043tn24",
1428 .data = &innolux_at043tn24,
1430 .compatible ="innolux,g121i1-l01",
1431 .data = &innolux_g121i1_l01
1433 .compatible = "innolux,n116bge",
1434 .data = &innolux_n116bge,
1436 .compatible = "innolux,n125hce",
1437 .data = &innolux_n125hce,
1439 .compatible = "innolux,n156bge-l21",
1440 .data = &innolux_n156bge_l21,
1442 .compatible = "innolux,zj070na-01p",
1443 .data = &innolux_zj070na_01p,
1445 .compatible = "lg,lb070wv8",
1446 .data = &lg_lb070wv8,
1448 .compatible = "lg,lp079qx1-sp0v",
1449 .data = &lg_lp079qx1_sp0v,
1451 .compatible = "lg,lp097qx1-spa1",
1452 .data = &lg_lp097qx1_spa1,
1454 .compatible = "lg,lp129qe",
1455 .data = &lg_lp129qe,
1457 .compatible = "nec,nl4827hc19-05b",
1458 .data = &nec_nl4827hc19_05b,
1460 .compatible = "okaya,rs800480t-7x0gp",
1461 .data = &okaya_rs800480t_7x0gp,
1463 .compatible = "ortustech,com43h4m85ulc",
1464 .data = &ortustech_com43h4m85ulc,
1466 .compatible = "samsung,lsn122dl01-c01",
1467 .data = &samsung_lsn122dl01_c01,
1469 .compatible = "samsung,ltn101nt05",
1470 .data = &samsung_ltn101nt05,
1472 .compatible = "samsung,ltn140at29-301",
1473 .data = &samsung_ltn140at29_301,
1475 .compatible = "shelly,sca07010-bfn-lnn",
1476 .data = &shelly_sca07010_bfn_lnn,
1481 MODULE_DEVICE_TABLE(of, platform_of_match);
1483 static int panel_simple_platform_probe(struct platform_device *pdev)
1485 const struct of_device_id *id;
1487 id = of_match_node(platform_of_match, pdev->dev.of_node);
1491 return panel_simple_probe(&pdev->dev, id->data);
1494 static int panel_simple_platform_remove(struct platform_device *pdev)
1496 return panel_simple_remove(&pdev->dev);
1499 static void panel_simple_platform_shutdown(struct platform_device *pdev)
1501 panel_simple_shutdown(&pdev->dev);
1504 static struct platform_driver panel_simple_platform_driver = {
1506 .name = "panel-simple",
1507 .of_match_table = platform_of_match,
1509 .probe = panel_simple_platform_probe,
1510 .remove = panel_simple_platform_remove,
1511 .shutdown = panel_simple_platform_shutdown,
1514 struct panel_desc_dsi {
1515 struct panel_desc desc;
1517 unsigned long flags;
1518 enum mipi_dsi_pixel_format format;
1522 static const struct drm_display_mode auo_b080uan01_mode = {
1525 .hsync_start = 1200 + 62,
1526 .hsync_end = 1200 + 62 + 4,
1527 .htotal = 1200 + 62 + 4 + 62,
1529 .vsync_start = 1920 + 9,
1530 .vsync_end = 1920 + 9 + 2,
1531 .vtotal = 1920 + 9 + 2 + 8,
1535 static const struct panel_desc_dsi auo_b080uan01 = {
1537 .modes = &auo_b080uan01_mode,
1545 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
1546 .format = MIPI_DSI_FMT_RGB888,
1550 static const struct drm_display_mode boe_tv080wum_nl0_mode = {
1553 .hsync_start = 1200 + 120,
1554 .hsync_end = 1200 + 120 + 20,
1555 .htotal = 1200 + 120 + 20 + 21,
1557 .vsync_start = 1920 + 21,
1558 .vsync_end = 1920 + 21 + 3,
1559 .vtotal = 1920 + 21 + 3 + 18,
1561 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1564 static const struct panel_desc_dsi boe_tv080wum_nl0 = {
1566 .modes = &boe_tv080wum_nl0_mode,
1573 .flags = MIPI_DSI_MODE_VIDEO |
1574 MIPI_DSI_MODE_VIDEO_BURST |
1575 MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
1576 .format = MIPI_DSI_FMT_RGB888,
1580 static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
1583 .hsync_start = 800 + 32,
1584 .hsync_end = 800 + 32 + 1,
1585 .htotal = 800 + 32 + 1 + 57,
1587 .vsync_start = 1280 + 28,
1588 .vsync_end = 1280 + 28 + 1,
1589 .vtotal = 1280 + 28 + 1 + 14,
1593 static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
1595 .modes = &lg_ld070wx3_sl01_mode,
1603 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
1604 .format = MIPI_DSI_FMT_RGB888,
1608 static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
1611 .hsync_start = 720 + 12,
1612 .hsync_end = 720 + 12 + 4,
1613 .htotal = 720 + 12 + 4 + 112,
1615 .vsync_start = 1280 + 8,
1616 .vsync_end = 1280 + 8 + 4,
1617 .vtotal = 1280 + 8 + 4 + 12,
1621 static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
1623 .modes = &lg_lh500wx1_sd03_mode,
1631 .flags = MIPI_DSI_MODE_VIDEO,
1632 .format = MIPI_DSI_FMT_RGB888,
1636 static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
1639 .hsync_start = 1920 + 154,
1640 .hsync_end = 1920 + 154 + 16,
1641 .htotal = 1920 + 154 + 16 + 32,
1643 .vsync_start = 1200 + 17,
1644 .vsync_end = 1200 + 17 + 2,
1645 .vtotal = 1200 + 17 + 2 + 16,
1649 static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
1651 .modes = &panasonic_vvx10f004b00_mode,
1659 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1660 MIPI_DSI_CLOCK_NON_CONTINUOUS,
1661 .format = MIPI_DSI_FMT_RGB888,
1666 static const struct of_device_id dsi_of_match[] = {
1668 .compatible = "simple-panel-dsi",
1671 .compatible = "auo,b080uan01",
1672 .data = &auo_b080uan01
1674 .compatible = "boe,tv080wum-nl0",
1675 .data = &boe_tv080wum_nl0
1677 .compatible = "lg,ld070wx3-sl01",
1678 .data = &lg_ld070wx3_sl01
1680 .compatible = "lg,lh500wx1-sd03",
1681 .data = &lg_lh500wx1_sd03
1683 .compatible = "panasonic,vvx10f004b00",
1684 .data = &panasonic_vvx10f004b00
1689 MODULE_DEVICE_TABLE(of, dsi_of_match);
1691 static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
1693 const struct panel_desc_dsi *desc;
1694 const struct of_device_id *id;
1695 const struct panel_desc *pdesc;
1699 id = of_match_node(dsi_of_match, dsi->dev.of_node);
1706 dsi->mode_flags = desc->flags;
1707 dsi->format = desc->format;
1708 dsi->lanes = desc->lanes;
1709 pdesc = &desc->desc;
1714 err = panel_simple_probe(&dsi->dev, pdesc);
1718 if (!of_property_read_u32(dsi->dev.of_node, "dsi,flags", &val))
1719 dsi->mode_flags = val;
1721 if (!of_property_read_u32(dsi->dev.of_node, "dsi,format", &val))
1724 if (!of_property_read_u32(dsi->dev.of_node, "dsi,lanes", &val))
1727 return mipi_dsi_attach(dsi);
1730 static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
1734 err = mipi_dsi_detach(dsi);
1736 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
1738 return panel_simple_remove(&dsi->dev);
1741 static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
1743 panel_simple_shutdown(&dsi->dev);
1746 static struct mipi_dsi_driver panel_simple_dsi_driver = {
1748 .name = "panel-simple-dsi",
1749 .of_match_table = dsi_of_match,
1751 .probe = panel_simple_dsi_probe,
1752 .remove = panel_simple_dsi_remove,
1753 .shutdown = panel_simple_dsi_shutdown,
1756 static int __init panel_simple_init(void)
1760 err = platform_driver_register(&panel_simple_platform_driver);
1764 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
1765 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
1772 module_init(panel_simple_init);
1774 static void __exit panel_simple_exit(void)
1776 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1777 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
1779 platform_driver_unregister(&panel_simple_platform_driver);
1781 module_exit(panel_simple_exit);
1783 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1784 MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1785 MODULE_LICENSE("GPL and additional rights");