drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  *          Martin Peres
  24  */
  25 #include "priv.h"
  26
  27 static int
  28 pwm_info(struct nvkm_therm *therm, int *line, int *ctrl, int *indx)
  29 {
  30         if (*line == 0x04) {
  31                 *ctrl = 0x00e100;
  32                 *line = 4;
  33                 *indx = 0;
  34         } else
  35         if (*line == 0x09) {
  36                 *ctrl = 0x00e100;
  37                 *line = 9;
  38                 *indx = 1;
  39         } else
  40         if (*line == 0x10) {
  41                 *ctrl = 0x00e28c;
  42                 *line = 0;
  43                 *indx = 0;
  44         } else {
  45                 nv_error(therm, "unknown pwm ctrl for gpio %d\n", *line);
  46                 return -ENODEV;
  47         }
  48
  49         return 0;
  50 }
  51
  52 int
  53 nv50_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
  54 {
  55         struct nvkm_device *device = therm->subdev.device;
  56         u32 data = enable ? 0x00000001 : 0x00000000;
  57         int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
  58         if (ret == 0)
  59                 nvkm_mask(device, ctrl, 0x00010001 << line, data << line);
  60         return ret;
  61 }
  62
  63 int
  64 nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
  65 {
  66         struct nvkm_device *device = therm->subdev.device;
  67         int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
  68         if (ret)
  69                 return ret;
  70
  71         if (nvkm_rd32(device, ctrl) & (1 << line)) {
  72                 *divs = nvkm_rd32(device, 0x00e114 + (id * 8));
  73                 *duty = nvkm_rd32(device, 0x00e118 + (id * 8));
  74                 return 0;
  75         }
  76
  77         return -EINVAL;
  78 }
  79
  80 int
  81 nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
  82 {
  83         struct nvkm_device *device = therm->subdev.device;
  84         int ctrl, id, ret = pwm_info(therm, &line, &ctrl, &id);
  85         if (ret)
  86                 return ret;
  87
  88         nvkm_wr32(device, 0x00e114 + (id * 8), divs);
  89         nvkm_wr32(device, 0x00e118 + (id * 8), duty | 0x80000000);
  90         return 0;
  91 }
  92
  93 int
  94 nv50_fan_pwm_clock(struct nvkm_therm *therm, int line)
  95 {
  96         struct nvkm_device *device = therm->subdev.device;
  97         int pwm_clock;
  98
  99         /* determine the PWM source clock */
 100         if (device->chipset > 0x50 && device->chipset < 0x94) {
 101                 u8 pwm_div = nvkm_rd32(device, 0x410c);
 102                 if (nvkm_rd32(device, 0xc040) & 0x800000) {
 103                         /* Use the HOST clock (100 MHz)
 104                         * Where does this constant(2.4) comes from? */
 105                         pwm_clock = (100000000 >> pwm_div) * 10 / 24;
 106                 } else {
 107                         /* Where does this constant(20) comes from? */
 108                         pwm_clock = (device->crystal * 1000) >> pwm_div;
 109                         pwm_clock /= 20;
 110                 }
 111         } else {
 112                 pwm_clock = (device->crystal * 1000) / 20;
 113         }
 114
 115         return pwm_clock;
 116 }
 117
 118 static void
 119 nv50_sensor_setup(struct nvkm_therm *therm)
 120 {
 121         struct nvkm_device *device = therm->subdev.device;
 122         nvkm_mask(device, 0x20010, 0x40000000, 0x0);
 123         mdelay(20); /* wait for the temperature to stabilize */
 124 }
 125
 126 static int
 127 nv50_temp_get(struct nvkm_therm *obj)
 128 {
 129         struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
 130         struct nvkm_device *device = therm->base.subdev.device;
 131         struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
 132         int core_temp;
 133
 134         core_temp = nvkm_rd32(device, 0x20014) & 0x3fff;
 135
 136         /* if the slope or the offset is unset, do no use the sensor */
 137         if (!sensor->slope_div || !sensor->slope_mult ||
 138             !sensor->offset_num || !sensor->offset_den)
 139             return -ENODEV;
 140
 141         core_temp = core_temp * sensor->slope_mult / sensor->slope_div;
 142         core_temp = core_temp + sensor->offset_num / sensor->offset_den;
 143         core_temp = core_temp + sensor->offset_constant - 8;
 144
 145         /* reserve negative temperatures for errors */
 146         if (core_temp < 0)
 147                 core_temp = 0;
 148
 149         return core_temp;
 150 }
 151
 152 static int
 153 nv50_therm_ctor(struct nvkm_object *parent,
 154                 struct nvkm_object *engine,
 155                 struct nvkm_oclass *oclass, void *data, u32 size,
 156                 struct nvkm_object **pobject)
 157 {
 158         struct nvkm_therm_priv *therm;
 159         int ret;
 160
 161         ret = nvkm_therm_create(parent, engine, oclass, &therm);
 162         *pobject = nv_object(therm);
 163         if (ret)
 164                 return ret;
 165
 166         therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
 167         therm->base.pwm_get = nv50_fan_pwm_get;
 168         therm->base.pwm_set = nv50_fan_pwm_set;
 169         therm->base.pwm_clock = nv50_fan_pwm_clock;
 170         therm->base.temp_get = nv50_temp_get;
 171         therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
 172         nv_subdev(therm)->intr = nv40_therm_intr;
 173
 174         return nvkm_therm_preinit(&therm->base);
 175 }
 176
 177 static int
 178 nv50_therm_init(struct nvkm_object *object)
 179 {
 180         struct nvkm_therm *therm = (void *)object;
 181
 182         nv50_sensor_setup(therm);
 183
 184         return _nvkm_therm_init(object);
 185 }
 186
 187 struct nvkm_oclass
 188 nv50_therm_oclass = {
 189         .handle = NV_SUBDEV(THERM, 0x50),
 190         .ofuncs = &(struct nvkm_ofuncs) {
 191                 .ctor = nv50_therm_ctor,
 192                 .dtor = _nvkm_therm_dtor,
 193                 .init = nv50_therm_init,
 194                 .fini = _nvkm_therm_fini,
 195         },
 196 };