drivers/gpu/drm/nouveau/nouveau_chan.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/object.h>
  26 #include <core/client.h>
  27 #include <core/device.h>
  28 #include <core/class.h>
  29
  30 #include <subdev/fb.h>
  31 #include <subdev/vm.h>
  32 #include <subdev/instmem.h>
  33
  34 #include <engine/software.h>
  35
  36 #include "nouveau_drm.h"
  37 #include "nouveau_dma.h"
  38 #include "nouveau_bo.h"
  39 #include "nouveau_chan.h"
  40 #include "nouveau_fence.h"
  41 #include "nouveau_abi16.h"
  42
  43 MODULE_PARM_DESC(vram_pushbuf, "Create DMA push buffers in VRAM");
  44 static int nouveau_vram_pushbuf;
  45 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  46
  47 int
  48 nouveau_channel_idle(struct nouveau_channel *chan)
  49 {
  50         struct nouveau_cli *cli = chan->cli;
  51         struct nouveau_fence *fence = NULL;
  52         int ret;
  53
  54         ret = nouveau_fence_new(chan, &fence);
  55         if (!ret) {
  56                 ret = nouveau_fence_wait(fence, false, false);
  57                 nouveau_fence_unref(&fence);
  58         }
  59
  60         if (ret)
  61                 NV_ERROR(cli, "failed to idle channel 0x%08x\n", chan->handle);
  62         return ret;
  63 }
  64
  65 void
  66 nouveau_channel_del(struct nouveau_channel **pchan)
  67 {
  68         struct nouveau_channel *chan = *pchan;
  69         if (chan) {
  70                 struct nouveau_object *client = nv_object(chan->cli);
  71                 if (chan->fence) {
  72                         nouveau_channel_idle(chan);
  73                         nouveau_fence(chan->drm)->context_del(chan);
  74                 }
  75                 nouveau_object_del(client, NVDRM_DEVICE, chan->handle);
  76                 nouveau_object_del(client, NVDRM_DEVICE, chan->push.handle);
  77                 nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma);
  78                 nouveau_bo_unmap(chan->push.buffer);
  79                 if (chan->push.buffer && chan->push.buffer->pin_refcnt)
  80                         nouveau_bo_unpin(chan->push.buffer);
  81                 nouveau_bo_ref(NULL, &chan->push.buffer);
  82                 kfree(chan);
  83         }
  84         *pchan = NULL;
  85 }
  86
  87 static int
  88 nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
  89                      u32 parent, u32 handle, u32 size,
  90                      struct nouveau_channel **pchan)
  91 {
  92         struct nouveau_device *device = nv_device(drm->device);
  93         struct nouveau_instmem *imem = nouveau_instmem(device);
  94         struct nouveau_vmmgr *vmm = nouveau_vmmgr(device);
  95         struct nouveau_fb *pfb = nouveau_fb(device);
  96         struct nouveau_client *client = &cli->base;
  97         struct nv_dma_class args = {};
  98         struct nouveau_channel *chan;
  99         struct nouveau_object *push;
 100         u32 target;
 101         int ret;
 102
 103         chan = *pchan = kzalloc(sizeof(*chan), GFP_KERNEL);
 104         if (!chan)
 105                 return -ENOMEM;
 106
 107         chan->cli = cli;
 108         chan->drm = drm;
 109         chan->handle = handle;
 110
 111         /* allocate memory for dma push buffer */
 112         target = TTM_PL_FLAG_TT;
 113         if (nouveau_vram_pushbuf)
 114                 target = TTM_PL_FLAG_VRAM;
 115
 116         ret = nouveau_bo_new(drm->dev, size, 0, target, 0, 0, NULL,
 117                             &chan->push.buffer);
 118         if (ret == 0) {
 119                 ret = nouveau_bo_pin(chan->push.buffer, target);
 120                 if (ret == 0)
 121                         ret = nouveau_bo_map(chan->push.buffer);
 122         }
 123
 124         if (ret) {
 125                 nouveau_channel_del(pchan);
 126                 return ret;
 127         }
 128
 129         /* create dma object covering the *entire* memory space that the
 130          * pushbuf lives in, this is because the GEM code requires that
 131          * we be able to call out to other (indirect) push buffers
 132          */
 133         chan->push.vma.offset = chan->push.buffer->bo.offset;
 134         chan->push.handle = NVDRM_PUSH | (handle & 0xffff);
 135
 136         if (device->card_type >= NV_50) {
 137                 ret = nouveau_bo_vma_add(chan->push.buffer, client->vm,
 138                                         &chan->push.vma);
 139                 if (ret) {
 140                         nouveau_channel_del(pchan);
 141                         return ret;
 142                 }
 143
 144                 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
 145                 args.start = 0;
 146                 args.limit = client->vm->vmm->limit - 1;
 147         } else
 148         if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) {
 149                 u64 limit = pfb->ram.size - imem->reserved - 1;
 150                 if (device->card_type == NV_04) {
 151                         /* nv04 vram pushbuf hack, retarget to its location in
 152                          * the framebuffer bar rather than direct vram access..
 153                          * nfi why this exists, it came from the -nv ddx.
 154                          */
 155                         args.flags = NV_DMA_TARGET_PCI | NV_DMA_ACCESS_RDWR;
 156                         args.start = pci_resource_start(device->pdev, 1);
 157                         args.limit = args.start + limit;
 158                 } else {
 159                         args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
 160                         args.start = 0;
 161                         args.limit = limit;
 162                 }
 163         } else {
 164                 if (chan->drm->agp.stat == ENABLED) {
 165                         args.flags = NV_DMA_TARGET_AGP | NV_DMA_ACCESS_RDWR;
 166                         args.start = chan->drm->agp.base;
 167                         args.limit = chan->drm->agp.base +
 168                                      chan->drm->agp.size - 1;
 169                 } else {
 170                         args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_RDWR;
 171                         args.start = 0;
 172                         args.limit = vmm->limit - 1;
 173                 }
 174         }
 175
 176         ret = nouveau_object_new(nv_object(chan->cli), parent,
 177                                  chan->push.handle, 0x0002,
 178                                  &args, sizeof(args), &push);
 179         if (ret) {
 180                 nouveau_channel_del(pchan);
 181                 return ret;
 182         }
 183
 184         return 0;
 185 }
 186
 187 static int
 188 nouveau_channel_ind(struct nouveau_drm *drm, struct nouveau_cli *cli,
 189                     u32 parent, u32 handle, u32 engine,
 190                     struct nouveau_channel **pchan)
 191 {
 192         static const u16 oclasses[] = { NVE0_CHANNEL_IND_CLASS,
 193                                         NVC0_CHANNEL_IND_CLASS,
 194                                         NV84_CHANNEL_IND_CLASS,
 195                                         NV50_CHANNEL_IND_CLASS,
 196                                         0 };
 197         const u16 *oclass = oclasses;
 198         struct nve0_channel_ind_class args;
 199         struct nouveau_channel *chan;
 200         int ret;
 201
 202         /* allocate dma push buffer */
 203         ret = nouveau_channel_prep(drm, cli, parent, handle, 0x12000, &chan);
 204         *pchan = chan;
 205         if (ret)
 206                 return ret;
 207
 208         /* create channel object */
 209         args.pushbuf = chan->push.handle;
 210         args.ioffset = 0x10000 + chan->push.vma.offset;
 211         args.ilength = 0x02000;
 212         args.engine  = engine;
 213
 214         do {
 215                 ret = nouveau_object_new(nv_object(cli), parent, handle,
 216                                          *oclass++, &args, sizeof(args),
 217                                          &chan->object);
 218                 if (ret == 0)
 219                         return ret;
 220         } while (*oclass);
 221
 222         nouveau_channel_del(pchan);
 223         return ret;
 224 }
 225
 226 static int
 227 nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli,
 228                     u32 parent, u32 handle, struct nouveau_channel **pchan)
 229 {
 230         static const u16 oclasses[] = { NV40_CHANNEL_DMA_CLASS,
 231                                         NV17_CHANNEL_DMA_CLASS,
 232                                         NV10_CHANNEL_DMA_CLASS,
 233                                         NV03_CHANNEL_DMA_CLASS,
 234                                         0 };
 235         const u16 *oclass = oclasses;
 236         struct nv03_channel_dma_class args;
 237         struct nouveau_channel *chan;
 238         int ret;
 239
 240         /* allocate dma push buffer */
 241         ret = nouveau_channel_prep(drm, cli, parent, handle, 0x10000, &chan);
 242         *pchan = chan;
 243         if (ret)
 244                 return ret;
 245
 246         /* create channel object */
 247         args.pushbuf = chan->push.handle;
 248         args.offset = chan->push.vma.offset;
 249
 250         do {
 251                 ret = nouveau_object_new(nv_object(cli), parent, handle,
 252                                          *oclass++, &args, sizeof(args),
 253                                          &chan->object);
 254                 if (ret == 0)
 255                         return ret;
 256         } while (ret && *oclass);
 257
 258         nouveau_channel_del(pchan);
 259         return ret;
 260 }
 261
 262 static int
 263 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
 264 {
 265         struct nouveau_client *client = nv_client(chan->cli);
 266         struct nouveau_device *device = nv_device(chan->drm->device);
 267         struct nouveau_instmem *imem = nouveau_instmem(device);
 268         struct nouveau_vmmgr *vmm = nouveau_vmmgr(device);
 269         struct nouveau_fb *pfb = nouveau_fb(device);
 270         struct nouveau_software_chan *swch;
 271         struct nouveau_object *object;
 272         struct nv_dma_class args = {};
 273         int ret, i;
 274
 275         /* allocate dma objects to cover all allowed vram, and gart */
 276         if (device->card_type < NV_C0) {
 277                 if (device->card_type >= NV_50) {
 278                         args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
 279                         args.start = 0;
 280                         args.limit = client->vm->vmm->limit - 1;
 281                 } else {
 282                         args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
 283                         args.start = 0;
 284                         args.limit = pfb->ram.size - imem->reserved - 1;
 285                 }
 286
 287                 ret = nouveau_object_new(nv_object(client), chan->handle, vram,
 288                                          0x003d, &args, sizeof(args), &object);
 289                 if (ret)
 290                         return ret;
 291
 292                 if (device->card_type >= NV_50) {
 293                         args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
 294                         args.start = 0;
 295                         args.limit = client->vm->vmm->limit - 1;
 296                 } else
 297                 if (chan->drm->agp.stat == ENABLED) {
 298                         args.flags = NV_DMA_TARGET_AGP | NV_DMA_ACCESS_RDWR;
 299                         args.start = chan->drm->agp.base;
 300                         args.limit = chan->drm->agp.base +
 301                                      chan->drm->agp.size - 1;
 302                 } else {
 303                         args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_RDWR;
 304                         args.start = 0;
 305                         args.limit = vmm->limit - 1;
 306                 }
 307
 308                 ret = nouveau_object_new(nv_object(client), chan->handle, gart,
 309                                          0x003d, &args, sizeof(args), &object);
 310                 if (ret)
 311                         return ret;
 312
 313                 chan->vram = vram;
 314                 chan->gart = gart;
 315         }
 316
 317         /* initialise dma tracking parameters */
 318         switch (nv_hclass(chan->object) & 0x00ff) {
 319         case 0x006b:
 320         case 0x006e:
 321                 chan->user_put = 0x40;
 322                 chan->user_get = 0x44;
 323                 chan->dma.max = (0x10000 / 4) - 2;
 324                 break;
 325         default:
 326                 chan->user_put = 0x40;
 327                 chan->user_get = 0x44;
 328                 chan->user_get_hi = 0x60;
 329                 chan->dma.ib_base =  0x10000 / 4;
 330                 chan->dma.ib_max  = (0x02000 / 8) - 1;
 331                 chan->dma.ib_put  = 0;
 332                 chan->dma.ib_free = chan->dma.ib_max - chan->dma.ib_put;
 333                 chan->dma.max = chan->dma.ib_base;
 334                 break;
 335         }
 336
 337         chan->dma.put = 0;
 338         chan->dma.cur = chan->dma.put;
 339         chan->dma.free = chan->dma.max - chan->dma.cur;
 340
 341         ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
 342         if (ret)
 343                 return ret;
 344
 345         for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
 346                 OUT_RING(chan, 0x00000000);
 347
 348         /* allocate software object class (used for fences on <= nv05, and
 349          * to signal flip completion), bind it to a subchannel.
 350          */
 351         if ((device->card_type < NV_E0) || gart /* nve0: want_nvsw */) {
 352                 ret = nouveau_object_new(nv_object(client), chan->handle,
 353                                          NvSw, nouveau_abi16_swclass(chan->drm),
 354                                          NULL, 0, &object);
 355                 if (ret)
 356                         return ret;
 357
 358                 swch = (void *)object->parent;
 359                 swch->flip = nouveau_flip_complete;
 360                 swch->flip_data = chan;
 361         }
 362
 363         if (device->card_type < NV_C0) {
 364                 ret = RING_SPACE(chan, 2);
 365                 if (ret)
 366                         return ret;
 367
 368                 BEGIN_NV04(chan, NvSubSw, 0x0000, 1);
 369                 OUT_RING  (chan, NvSw);
 370                 FIRE_RING (chan);
 371         }
 372
 373         /* initialise synchronisation */
 374         return nouveau_fence(chan->drm)->context_new(chan);
 375 }
 376
 377 int
 378 nouveau_channel_new(struct nouveau_drm *drm, struct nouveau_cli *cli,
 379                     u32 parent, u32 handle, u32 arg0, u32 arg1,
 380                     struct nouveau_channel **pchan)
 381 {
 382         int ret;
 383
 384         ret = nouveau_channel_ind(drm, cli, parent, handle, arg0, pchan);
 385         if (ret) {
 386                 NV_DEBUG(cli, "ib channel create, %d\n", ret);
 387                 ret = nouveau_channel_dma(drm, cli, parent, handle, pchan);
 388                 if (ret) {
 389                         NV_DEBUG(cli, "dma channel create, %d\n", ret);
 390                         return ret;
 391                 }
 392         }
 393
 394         ret = nouveau_channel_init(*pchan, arg0, arg1);
 395         if (ret) {
 396                 NV_ERROR(cli, "channel failed to initialise, %d\n", ret);
 397                 nouveau_channel_del(pchan);
 398                 return ret;
 399         }
 400
 401         return 0;
 402 }