drivers/gpu/drm/nouveau/include/nvkm/core/device.h

   1 #ifndef __NVKM_DEVICE_H__
   2 #define __NVKM_DEVICE_H__
   3 #include <core/engine.h>
   4 #include <core/event.h>
   5
   6 enum nvkm_devidx {
   7         NVDEV_ENGINE_DEVICE,
   8         NVDEV_SUBDEV_VBIOS,
   9
  10         /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
  11          * *any* of them are initialised.  This subdev category is used
  12          * for any subdevs that the VBIOS init table parsing may call out
  13          * to during POST.
  14          */
  15         NVDEV_SUBDEV_DEVINIT,
  16         NVDEV_SUBDEV_IBUS,
  17         NVDEV_SUBDEV_GPIO,
  18         NVDEV_SUBDEV_I2C,
  19         NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
  20
  21         /* This grouping of subdevs are initialised right after they've
  22          * been created, and are allowed to assume any subdevs in the
  23          * list above them exist and have been initialised.
  24          */
  25         NVDEV_SUBDEV_FUSE,
  26         NVDEV_SUBDEV_MXM,
  27         NVDEV_SUBDEV_MC,
  28         NVDEV_SUBDEV_BUS,
  29         NVDEV_SUBDEV_TIMER,
  30         NVDEV_SUBDEV_FB,
  31         NVDEV_SUBDEV_LTC,
  32         NVDEV_SUBDEV_INSTMEM,
  33         NVDEV_SUBDEV_MMU,
  34         NVDEV_SUBDEV_BAR,
  35         NVDEV_SUBDEV_PMU,
  36         NVDEV_SUBDEV_VOLT,
  37         NVDEV_SUBDEV_THERM,
  38         NVDEV_SUBDEV_CLK,
  39
  40         NVDEV_ENGINE_FIRST,
  41         NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
  42         NVDEV_ENGINE_IFB,
  43         NVDEV_ENGINE_FIFO,
  44         NVDEV_ENGINE_SW,
  45         NVDEV_ENGINE_GR,
  46         NVDEV_ENGINE_MPEG,
  47         NVDEV_ENGINE_ME,
  48         NVDEV_ENGINE_VP,
  49         NVDEV_ENGINE_CIPHER,
  50         NVDEV_ENGINE_BSP,
  51         NVDEV_ENGINE_MSPPP,
  52         NVDEV_ENGINE_CE0,
  53         NVDEV_ENGINE_CE1,
  54         NVDEV_ENGINE_CE2,
  55         NVDEV_ENGINE_VIC,
  56         NVDEV_ENGINE_MSENC,
  57         NVDEV_ENGINE_DISP,
  58         NVDEV_ENGINE_PM,
  59         NVDEV_ENGINE_MSVLD,
  60         NVDEV_ENGINE_SEC,
  61         NVDEV_ENGINE_MSPDEC,
  62
  63         NVDEV_SUBDEV_NR,
  64 };
  65
  66 struct nvkm_device {
  67         struct nvkm_engine engine;
  68         struct list_head head;
  69
  70         struct pci_dev *pdev;
  71         struct platform_device *platformdev;
  72         struct device *dev;
  73         u64 handle;
  74
  75         void __iomem *pri;
  76
  77         struct nvkm_event event;
  78
  79         const char *cfgopt;
  80         const char *dbgopt;
  81         const char *name;
  82         const char *cname;
  83         u64 disable_mask;
  84
  85         enum {
  86                 NV_04    = 0x04,
  87                 NV_10    = 0x10,
  88                 NV_11    = 0x11,
  89                 NV_20    = 0x20,
  90                 NV_30    = 0x30,
  91                 NV_40    = 0x40,
  92                 NV_50    = 0x50,
  93                 NV_C0    = 0xc0,
  94                 NV_E0    = 0xe0,
  95                 GM100    = 0x110,
  96         } card_type;
  97         u32 chipset;
  98         u8  chiprev;
  99         u32 crystal;
 100
 101         struct nvkm_oclass *oclass[NVDEV_SUBDEV_NR];
 102         struct nvkm_object *subdev[NVDEV_SUBDEV_NR];
 103
 104         struct {
 105                 struct notifier_block nb;
 106         } acpi;
 107
 108         struct nvkm_bar *bar;
 109         struct nvkm_bios *bios;
 110         struct nvkm_bus *bus;
 111         struct nvkm_clk *clk;
 112         struct nvkm_devinit *devinit;
 113         struct nvkm_fb *fb;
 114         struct nvkm_fuse *fuse;
 115         struct nvkm_gpio *gpio;
 116         struct nvkm_i2c *i2c;
 117         struct nvkm_subdev *ibus;
 118         struct nvkm_instmem *imem;
 119         struct nvkm_ltc *ltc;
 120         struct nvkm_mc *mc;
 121         struct nvkm_mmu *mmu;
 122         struct nvkm_subdev *mxm;
 123         struct nvkm_pmu *pmu;
 124         struct nvkm_therm *therm;
 125         struct nvkm_timer *timer;
 126         struct nvkm_volt *volt;
 127
 128         struct nvkm_engine *bsp;
 129         struct nvkm_engine *ce[3];
 130         struct nvkm_engine *cipher;
 131         struct nvkm_disp *disp;
 132         struct nvkm_dmaeng *dma;
 133         struct nvkm_fifo *fifo;
 134         struct nvkm_gr *gr;
 135         struct nvkm_engine *ifb;
 136         struct nvkm_engine *me;
 137         struct nvkm_engine *mpeg;
 138         struct nvkm_engine *msenc;
 139         struct nvkm_engine *mspdec;
 140         struct nvkm_engine *msppp;
 141         struct nvkm_engine *msvld;
 142         struct nvkm_pm *pm;
 143         struct nvkm_engine *sec;
 144         struct nvkm_sw *sw;
 145         struct nvkm_engine *vic;
 146         struct nvkm_engine *vp;
 147 };
 148
 149 struct nvkm_device *nvkm_device_find(u64 name);
 150 int nvkm_device_list(u64 *name, int size);
 151
 152 /* privileged register interface accessor macros */
 153 #define nvkm_rd08(d,a) ioread8((d)->pri + (a))
 154 #define nvkm_rd16(d,a) ioread16_native((d)->pri + (a))
 155 #define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
 156 #define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a))
 157 #define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a))
 158 #define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a))
 159 #define nvkm_mask(d,a,m,v) ({                                                  \
 160         struct nvkm_device *_device = (d);                                     \
 161         u32 _addr = (a), _temp = nvkm_rd32(_device, _addr);                    \
 162         nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v));                       \
 163         _temp;                                                                 \
 164 })
 165
 166 struct nvkm_device *nv_device(void *obj);
 167
 168 static inline bool
 169 nv_device_match(struct nvkm_device *device, u16 dev, u16 ven, u16 sub)
 170 {
 171         return device->pdev->device == dev &&
 172                device->pdev->subsystem_vendor == ven &&
 173                device->pdev->subsystem_device == sub;
 174 }
 175
 176 static inline bool
 177 nv_device_is_pci(struct nvkm_device *device)
 178 {
 179         return device->pdev != NULL;
 180 }
 181
 182 static inline bool
 183 nv_device_is_cpu_coherent(struct nvkm_device *device)
 184 {
 185         return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device));
 186 }
 187
 188 static inline struct device *
 189 nv_device_base(struct nvkm_device *device)
 190 {
 191         return nv_device_is_pci(device) ? &device->pdev->dev :
 192                                           &device->platformdev->dev;
 193 }
 194
 195 resource_size_t
 196 nv_device_resource_start(struct nvkm_device *device, unsigned int bar);
 197
 198 resource_size_t
 199 nv_device_resource_len(struct nvkm_device *device, unsigned int bar);
 200
 201 int
 202 nv_device_get_irq(struct nvkm_device *device, bool stall);
 203
 204 struct platform_device;
 205
 206 enum nv_bus_type {
 207         NVKM_BUS_PCI,
 208         NVKM_BUS_PLATFORM,
 209 };
 210
 211 #define nvkm_device_create(p,t,n,s,c,d,u)                                   \
 212         nvkm_device_create_((void *)(p), (t), (n), (s), (c), (d),           \
 213                                sizeof(**u), (void **)u)
 214 int  nvkm_device_create_(void *, enum nv_bus_type type, u64 name,
 215                             const char *sname, const char *cfg, const char *dbg,
 216                             int, void **);
 217
 218 /* device logging */
 219 #define nvdev_printk_(d,l,p,f,a...) do {                                       \
 220         struct nvkm_device *_device = (d);                                     \
 221         if (_device->engine.subdev.debug >= (l))                               \
 222                 dev_##p(_device->dev, f, ##a);                                 \
 223 } while(0)
 224 #define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a)
 225 #define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL,   crit, f, ##a)
 226 #define nvdev_error(d,f,a...) nvdev_printk((d), ERROR,    err, f, ##a)
 227 #define nvdev_warn(d,f,a...)  nvdev_printk((d),  WARN, notice, f, ##a)
 228 #define nvdev_info(d,f,a...)  nvdev_printk((d),  INFO,   info, f, ##a)
 229 #define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG,   info, f, ##a)
 230 #define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE,   info, f, ##a)
 231 #define nvdev_spam(d,f,a...)  nvdev_printk((d),  SPAM,    dbg, f, ##a)
 232 #endif