2 * Copyright 2012 Red Hat Inc.
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26 #include <core/option.h>
29 nouveau_mc_unk260(struct nouveau_mc *pmc, u32 data)
31 const struct nouveau_mc_oclass *impl = (void *)nv_oclass(pmc);
33 impl->unk260(pmc, data);
37 nouveau_mc_intr_mask(struct nouveau_mc *pmc)
39 u32 intr = nv_rd32(pmc, 0x000100);
40 if (intr == 0xffffffff) /* likely fallen off the bus */
46 nouveau_mc_intr(int irq, void *arg)
48 struct nouveau_mc *pmc = arg;
49 const struct nouveau_mc_oclass *oclass = (void *)nv_object(pmc)->oclass;
50 const struct nouveau_mc_intr *map = oclass->intr;
51 struct nouveau_subdev *unit;
54 nv_wr32(pmc, 0x000140, 0x00000000);
55 nv_rd32(pmc, 0x000140);
56 intr = nouveau_mc_intr_mask(pmc);
58 oclass->msi_rearm(pmc);
61 u32 stat = intr = nouveau_mc_intr_mask(pmc);
63 if (intr & map->stat) {
64 unit = nouveau_subdev(pmc, map->unit);
65 if (unit && unit->intr)
73 nv_error(pmc, "unknown intr 0x%08x\n", stat);
76 nv_wr32(pmc, 0x000140, 0x00000001);
77 return intr ? IRQ_HANDLED : IRQ_NONE;
81 _nouveau_mc_fini(struct nouveau_object *object, bool suspend)
83 struct nouveau_mc *pmc = (void *)object;
84 nv_wr32(pmc, 0x000140, 0x00000000);
85 return nouveau_subdev_fini(&pmc->base, suspend);
89 _nouveau_mc_init(struct nouveau_object *object)
91 struct nouveau_mc *pmc = (void *)object;
92 int ret = nouveau_subdev_init(&pmc->base);
95 nv_wr32(pmc, 0x000140, 0x00000001);
100 _nouveau_mc_dtor(struct nouveau_object *object)
102 struct nouveau_device *device = nv_device(object);
103 struct nouveau_mc *pmc = (void *)object;
104 free_irq(pmc->irq, pmc);
106 pci_disable_msi(device->pdev);
107 nouveau_subdev_destroy(&pmc->base);
111 nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
112 struct nouveau_oclass *bclass, int length, void **pobject)
114 const struct nouveau_mc_oclass *oclass = (void *)bclass;
115 struct nouveau_device *device = nv_device(parent);
116 struct nouveau_mc *pmc;
119 ret = nouveau_subdev_create_(parent, engine, bclass, 0, "PMC",
120 "master", length, pobject);
125 pmc->unk260 = nouveau_mc_unk260;
127 if (nv_device_is_pci(device))
128 switch (device->pdev->device & 0x0ff0) {
131 /* BR02? NFI how these would be handled yet exactly */
134 switch (device->chipset) {
136 /* reported broken, nv also disable it */
143 pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI",
146 if (pmc->use_msi && oclass->msi_rearm) {
147 pmc->use_msi = pci_enable_msi(device->pdev) == 0;
149 nv_info(pmc, "MSI interrupts enabled\n");
150 oclass->msi_rearm(pmc);
153 pmc->use_msi = false;
157 ret = nv_device_get_irq(device, true);
162 ret = request_irq(pmc->irq, nouveau_mc_intr, IRQF_SHARED, "nouveau",