Merge branch 'for-3.5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj...
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47                         SDVO_TV_MASK)
48
49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
63         "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69         struct intel_encoder base;
70
71         struct i2c_adapter *i2c;
72         u8 slave_addr;
73
74         struct i2c_adapter ddc;
75
76         /* Register for the SDVO device: SDVOB or SDVOC */
77         uint32_t sdvo_reg;
78
79         /* Active outputs controlled by this SDVO output */
80         uint16_t controlled_output;
81
82         /*
83          * Capabilities of the SDVO device returned by
84          * i830_sdvo_get_capabilities()
85          */
86         struct intel_sdvo_caps caps;
87
88         /* Pixel clock limitations reported by the SDVO device, in kHz */
89         int pixel_clock_min, pixel_clock_max;
90
91         /*
92         * For multiple function SDVO device,
93         * this is for current attached outputs.
94         */
95         uint16_t attached_output;
96
97         /*
98          * Hotplug activation bits for this device
99          */
100         uint8_t hotplug_active[2];
101
102         /**
103          * This is used to select the color range of RBG outputs in HDMI mode.
104          * It is only valid when using TMDS encoding and 8 bit per color mode.
105          */
106         uint32_t color_range;
107
108         /**
109          * This is set if we're going to treat the device as TV-out.
110          *
111          * While we have these nice friendly flags for output types that ought
112          * to decide this for us, the S-Video output on our HDMI+S-Video card
113          * shows up as RGB1 (VGA).
114          */
115         bool is_tv;
116
117         /* On different gens SDVOB is at different places. */
118         bool is_sdvob;
119
120         /* This is for current tv format name */
121         int tv_format_index;
122
123         /**
124          * This is set if we treat the device as HDMI, instead of DVI.
125          */
126         bool is_hdmi;
127         bool has_hdmi_monitor;
128         bool has_hdmi_audio;
129
130         /**
131          * This is set if we detect output of sdvo device as LVDS and
132          * have a valid fixed mode to use with the panel.
133          */
134         bool is_lvds;
135
136         /**
137          * This is sdvo fixed pannel mode pointer
138          */
139         struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141         /* DDC bus used by this SDVO encoder */
142         uint8_t ddc_bus;
143
144         /* Input timings for adjusted_mode */
145         struct intel_sdvo_dtd input_dtd;
146 };
147
148 struct intel_sdvo_connector {
149         struct intel_connector base;
150
151         /* Mark the type of connector */
152         uint16_t output_flag;
153
154         enum hdmi_force_audio force_audio;
155
156         /* This contains all current supported TV format */
157         u8 tv_format_supported[TV_FORMAT_NUM];
158         int   format_supported_num;
159         struct drm_property *tv_format;
160
161         /* add the property for the SDVO-TV */
162         struct drm_property *left;
163         struct drm_property *right;
164         struct drm_property *top;
165         struct drm_property *bottom;
166         struct drm_property *hpos;
167         struct drm_property *vpos;
168         struct drm_property *contrast;
169         struct drm_property *saturation;
170         struct drm_property *hue;
171         struct drm_property *sharpness;
172         struct drm_property *flicker_filter;
173         struct drm_property *flicker_filter_adaptive;
174         struct drm_property *flicker_filter_2d;
175         struct drm_property *tv_chroma_filter;
176         struct drm_property *tv_luma_filter;
177         struct drm_property *dot_crawl;
178
179         /* add the property for the SDVO-TV/LVDS */
180         struct drm_property *brightness;
181
182         /* Add variable to record current setting for the above property */
183         u32     left_margin, right_margin, top_margin, bottom_margin;
184
185         /* this is to get the range of margin.*/
186         u32     max_hscan,  max_vscan;
187         u32     max_hpos, cur_hpos;
188         u32     max_vpos, cur_vpos;
189         u32     cur_brightness, max_brightness;
190         u32     cur_contrast,   max_contrast;
191         u32     cur_saturation, max_saturation;
192         u32     cur_hue,        max_hue;
193         u32     cur_sharpness,  max_sharpness;
194         u32     cur_flicker_filter,             max_flicker_filter;
195         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
196         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
197         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
198         u32     cur_tv_luma_filter,     max_tv_luma_filter;
199         u32     cur_dot_crawl,  max_dot_crawl;
200 };
201
202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
203 {
204         return container_of(encoder, struct intel_sdvo, base.base);
205 }
206
207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208 {
209         return container_of(intel_attached_encoder(connector),
210                             struct intel_sdvo, base);
211 }
212
213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214 {
215         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216 }
217
218 static bool
219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
220 static bool
221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222                               struct intel_sdvo_connector *intel_sdvo_connector,
223                               int type);
224 static bool
225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226                                    struct intel_sdvo_connector *intel_sdvo_connector);
227
228 /**
229  * Writes the SDVOB or SDVOC with the given value, but always writes both
230  * SDVOB and SDVOC to work around apparent hardware issues (according to
231  * comments in the BIOS).
232  */
233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
234 {
235         struct drm_device *dev = intel_sdvo->base.base.dev;
236         struct drm_i915_private *dev_priv = dev->dev_private;
237         u32 bval = val, cval = val;
238         int i;
239
240         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241                 I915_WRITE(intel_sdvo->sdvo_reg, val);
242                 I915_READ(intel_sdvo->sdvo_reg);
243                 return;
244         }
245
246         if (intel_sdvo->sdvo_reg == SDVOB) {
247                 cval = I915_READ(SDVOC);
248         } else {
249                 bval = I915_READ(SDVOB);
250         }
251         /*
252          * Write the registers twice for luck. Sometimes,
253          * writing them only once doesn't appear to 'stick'.
254          * The BIOS does this too. Yay, magic
255          */
256         for (i = 0; i < 2; i++)
257         {
258                 I915_WRITE(SDVOB, bval);
259                 I915_READ(SDVOB);
260                 I915_WRITE(SDVOC, cval);
261                 I915_READ(SDVOC);
262         }
263 }
264
265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
266 {
267         struct i2c_msg msgs[] = {
268                 {
269                         .addr = intel_sdvo->slave_addr,
270                         .flags = 0,
271                         .len = 1,
272                         .buf = &addr,
273                 },
274                 {
275                         .addr = intel_sdvo->slave_addr,
276                         .flags = I2C_M_RD,
277                         .len = 1,
278                         .buf = ch,
279                 }
280         };
281         int ret;
282
283         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
284                 return true;
285
286         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
287         return false;
288 }
289
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
293         u8 cmd;
294         const char *name;
295 } sdvo_cmd_names[] = {
296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
339
340         /* Add the op code for SDVO enhancements */
341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
385
386         /* HDMI op code */
387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
407 };
408
409 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
410
411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
412                                    const void *args, int args_len)
413 {
414         int i;
415
416         DRM_DEBUG_KMS("%s: W: %02X ",
417                                 SDVO_NAME(intel_sdvo), cmd);
418         for (i = 0; i < args_len; i++)
419                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
420         for (; i < 8; i++)
421                 DRM_LOG_KMS("   ");
422         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
423                 if (cmd == sdvo_cmd_names[i].cmd) {
424                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
425                         break;
426                 }
427         }
428         if (i == ARRAY_SIZE(sdvo_cmd_names))
429                 DRM_LOG_KMS("(%02X)", cmd);
430         DRM_LOG_KMS("\n");
431 }
432
433 static const char *cmd_status_names[] = {
434         "Power on",
435         "Success",
436         "Not supported",
437         "Invalid arg",
438         "Pending",
439         "Target not specified",
440         "Scaling not supported"
441 };
442
443 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444                                  const void *args, int args_len)
445 {
446         u8 *buf, status;
447         struct i2c_msg *msgs;
448         int i, ret = true;
449
450         buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
451         if (!buf)
452                 return false;
453
454         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
455         if (!msgs)
456                 return false;
457
458         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460         for (i = 0; i < args_len; i++) {
461                 msgs[i].addr = intel_sdvo->slave_addr;
462                 msgs[i].flags = 0;
463                 msgs[i].len = 2;
464                 msgs[i].buf = buf + 2 *i;
465                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466                 buf[2*i + 1] = ((u8*)args)[i];
467         }
468         msgs[i].addr = intel_sdvo->slave_addr;
469         msgs[i].flags = 0;
470         msgs[i].len = 2;
471         msgs[i].buf = buf + 2*i;
472         buf[2*i + 0] = SDVO_I2C_OPCODE;
473         buf[2*i + 1] = cmd;
474
475         /* the following two are to read the response */
476         status = SDVO_I2C_CMD_STATUS;
477         msgs[i+1].addr = intel_sdvo->slave_addr;
478         msgs[i+1].flags = 0;
479         msgs[i+1].len = 1;
480         msgs[i+1].buf = &status;
481
482         msgs[i+2].addr = intel_sdvo->slave_addr;
483         msgs[i+2].flags = I2C_M_RD;
484         msgs[i+2].len = 1;
485         msgs[i+2].buf = &status;
486
487         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488         if (ret < 0) {
489                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
490                 ret = false;
491                 goto out;
492         }
493         if (ret != i+3) {
494                 /* failure in I2C transfer */
495                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
496                 ret = false;
497         }
498
499 out:
500         kfree(msgs);
501         kfree(buf);
502         return ret;
503 }
504
505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506                                      void *response, int response_len)
507 {
508         u8 retry = 5;
509         u8 status;
510         int i;
511
512         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
514         /*
515          * The documentation states that all commands will be
516          * processed within 15µs, and that we need only poll
517          * the status byte a maximum of 3 times in order for the
518          * command to be complete.
519          *
520          * Check 5 times in case the hardware failed to read the docs.
521          */
522         if (!intel_sdvo_read_byte(intel_sdvo,
523                                   SDVO_I2C_CMD_STATUS,
524                                   &status))
525                 goto log_fail;
526
527         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528                 udelay(15);
529                 if (!intel_sdvo_read_byte(intel_sdvo,
530                                           SDVO_I2C_CMD_STATUS,
531                                           &status))
532                         goto log_fail;
533         }
534
535         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
536                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
537         else
538                 DRM_LOG_KMS("(??? %d)", status);
539
540         if (status != SDVO_CMD_STATUS_SUCCESS)
541                 goto log_fail;
542
543         /* Read the command response */
544         for (i = 0; i < response_len; i++) {
545                 if (!intel_sdvo_read_byte(intel_sdvo,
546                                           SDVO_I2C_RETURN_0 + i,
547                                           &((u8 *)response)[i]))
548                         goto log_fail;
549                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
550         }
551         DRM_LOG_KMS("\n");
552         return true;
553
554 log_fail:
555         DRM_LOG_KMS("... failed\n");
556         return false;
557 }
558
559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
560 {
561         if (mode->clock >= 100000)
562                 return 1;
563         else if (mode->clock >= 50000)
564                 return 2;
565         else
566                 return 4;
567 }
568
569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570                                               u8 ddc_bus)
571 {
572         /* This must be the immediately preceding write before the i2c xfer */
573         return intel_sdvo_write_cmd(intel_sdvo,
574                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575                                     &ddc_bus, 1);
576 }
577
578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579 {
580         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581                 return false;
582
583         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
584 }
585
586 static bool
587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588 {
589         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590                 return false;
591
592         return intel_sdvo_read_response(intel_sdvo, value, len);
593 }
594
595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
596 {
597         struct intel_sdvo_set_target_input_args targets = {0};
598         return intel_sdvo_set_value(intel_sdvo,
599                                     SDVO_CMD_SET_TARGET_INPUT,
600                                     &targets, sizeof(targets));
601 }
602
603 /**
604  * Return whether each input is trained.
605  *
606  * This function is making an assumption about the layout of the response,
607  * which should be checked against the docs.
608  */
609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
610 {
611         struct intel_sdvo_get_trained_inputs_response response;
612
613         BUILD_BUG_ON(sizeof(response) != 1);
614         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615                                   &response, sizeof(response)))
616                 return false;
617
618         *input_1 = response.input0_trained;
619         *input_2 = response.input1_trained;
620         return true;
621 }
622
623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
624                                           u16 outputs)
625 {
626         return intel_sdvo_set_value(intel_sdvo,
627                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
628                                     &outputs, sizeof(outputs));
629 }
630
631 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
632                                                int mode)
633 {
634         u8 state = SDVO_ENCODER_STATE_ON;
635
636         switch (mode) {
637         case DRM_MODE_DPMS_ON:
638                 state = SDVO_ENCODER_STATE_ON;
639                 break;
640         case DRM_MODE_DPMS_STANDBY:
641                 state = SDVO_ENCODER_STATE_STANDBY;
642                 break;
643         case DRM_MODE_DPMS_SUSPEND:
644                 state = SDVO_ENCODER_STATE_SUSPEND;
645                 break;
646         case DRM_MODE_DPMS_OFF:
647                 state = SDVO_ENCODER_STATE_OFF;
648                 break;
649         }
650
651         return intel_sdvo_set_value(intel_sdvo,
652                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
653 }
654
655 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
656                                                    int *clock_min,
657                                                    int *clock_max)
658 {
659         struct intel_sdvo_pixel_clock_range clocks;
660
661         BUILD_BUG_ON(sizeof(clocks) != 4);
662         if (!intel_sdvo_get_value(intel_sdvo,
663                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664                                   &clocks, sizeof(clocks)))
665                 return false;
666
667         /* Convert the values from units of 10 kHz to kHz. */
668         *clock_min = clocks.min * 10;
669         *clock_max = clocks.max * 10;
670         return true;
671 }
672
673 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
674                                          u16 outputs)
675 {
676         return intel_sdvo_set_value(intel_sdvo,
677                                     SDVO_CMD_SET_TARGET_OUTPUT,
678                                     &outputs, sizeof(outputs));
679 }
680
681 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
682                                   struct intel_sdvo_dtd *dtd)
683 {
684         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
686 }
687
688 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
689                                          struct intel_sdvo_dtd *dtd)
690 {
691         return intel_sdvo_set_timing(intel_sdvo,
692                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693 }
694
695 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
696                                          struct intel_sdvo_dtd *dtd)
697 {
698         return intel_sdvo_set_timing(intel_sdvo,
699                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700 }
701
702 static bool
703 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
704                                          uint16_t clock,
705                                          uint16_t width,
706                                          uint16_t height)
707 {
708         struct intel_sdvo_preferred_input_timing_args args;
709
710         memset(&args, 0, sizeof(args));
711         args.clock = clock;
712         args.width = width;
713         args.height = height;
714         args.interlace = 0;
715
716         if (intel_sdvo->is_lvds &&
717            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
719                 args.scaled = 1;
720
721         return intel_sdvo_set_value(intel_sdvo,
722                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723                                     &args, sizeof(args));
724 }
725
726 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
727                                                   struct intel_sdvo_dtd *dtd)
728 {
729         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
731         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732                                     &dtd->part1, sizeof(dtd->part1)) &&
733                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734                                      &dtd->part2, sizeof(dtd->part2));
735 }
736
737 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
738 {
739         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
740 }
741
742 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
743                                          const struct drm_display_mode *mode)
744 {
745         uint16_t width, height;
746         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747         uint16_t h_sync_offset, v_sync_offset;
748         int mode_clock;
749
750         width = mode->hdisplay;
751         height = mode->vdisplay;
752
753         /* do some mode translations */
754         h_blank_len = mode->htotal - mode->hdisplay;
755         h_sync_len = mode->hsync_end - mode->hsync_start;
756
757         v_blank_len = mode->vtotal - mode->vdisplay;
758         v_sync_len = mode->vsync_end - mode->vsync_start;
759
760         h_sync_offset = mode->hsync_start - mode->hdisplay;
761         v_sync_offset = mode->vsync_start - mode->vdisplay;
762
763         mode_clock = mode->clock;
764         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765         mode_clock /= 10;
766         dtd->part1.clock = mode_clock;
767
768         dtd->part1.h_active = width & 0xff;
769         dtd->part1.h_blank = h_blank_len & 0xff;
770         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
771                 ((h_blank_len >> 8) & 0xf);
772         dtd->part1.v_active = height & 0xff;
773         dtd->part1.v_blank = v_blank_len & 0xff;
774         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
775                 ((v_blank_len >> 8) & 0xf);
776
777         dtd->part2.h_sync_off = h_sync_offset & 0xff;
778         dtd->part2.h_sync_width = h_sync_len & 0xff;
779         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
780                 (v_sync_len & 0xf);
781         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
782                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783                 ((v_sync_len & 0x30) >> 4);
784
785         dtd->part2.dtd_flags = 0x18;
786         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
787                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
788         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
789                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
790         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
791                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
792
793         dtd->part2.sdvo_flags = 0;
794         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
795         dtd->part2.reserved = 0;
796 }
797
798 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
799                                          const struct intel_sdvo_dtd *dtd)
800 {
801         mode->hdisplay = dtd->part1.h_active;
802         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
803         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
804         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
805         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
806         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
807         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
808         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
809
810         mode->vdisplay = dtd->part1.v_active;
811         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
812         mode->vsync_start = mode->vdisplay;
813         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
814         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
815         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
816         mode->vsync_end = mode->vsync_start +
817                 (dtd->part2.v_sync_off_width & 0xf);
818         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
819         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
820         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
821
822         mode->clock = dtd->part1.clock * 10;
823
824         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
825         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
826                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
827         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
828                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
829         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
830                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
831 }
832
833 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
834 {
835         struct intel_sdvo_encode encode;
836
837         BUILD_BUG_ON(sizeof(encode) != 2);
838         return intel_sdvo_get_value(intel_sdvo,
839                                   SDVO_CMD_GET_SUPP_ENCODE,
840                                   &encode, sizeof(encode));
841 }
842
843 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
844                                   uint8_t mode)
845 {
846         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
847 }
848
849 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
850                                        uint8_t mode)
851 {
852         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
853 }
854
855 #if 0
856 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
857 {
858         int i, j;
859         uint8_t set_buf_index[2];
860         uint8_t av_split;
861         uint8_t buf_size;
862         uint8_t buf[48];
863         uint8_t *pos;
864
865         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
866
867         for (i = 0; i <= av_split; i++) {
868                 set_buf_index[0] = i; set_buf_index[1] = 0;
869                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
870                                      set_buf_index, 2);
871                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
872                 intel_sdvo_read_response(encoder, &buf_size, 1);
873
874                 pos = buf;
875                 for (j = 0; j <= buf_size; j += 8) {
876                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
877                                              NULL, 0);
878                         intel_sdvo_read_response(encoder, pos, 8);
879                         pos += 8;
880                 }
881         }
882 }
883 #endif
884
885 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
886 {
887         struct dip_infoframe avi_if = {
888                 .type = DIP_TYPE_AVI,
889                 .ver = DIP_VERSION_AVI,
890                 .len = DIP_LEN_AVI,
891         };
892         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
893         uint8_t set_buf_index[2] = { 1, 0 };
894         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
895         uint64_t *data = (uint64_t *)sdvo_data;
896         unsigned i;
897
898         intel_dip_infoframe_csum(&avi_if);
899
900         /* sdvo spec says that the ecc is handled by the hw, and it looks like
901          * we must not send the ecc field, either. */
902         memcpy(sdvo_data, &avi_if, 3);
903         sdvo_data[3] = avi_if.checksum;
904         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
905
906         if (!intel_sdvo_set_value(intel_sdvo,
907                                   SDVO_CMD_SET_HBUF_INDEX,
908                                   set_buf_index, 2))
909                 return false;
910
911         for (i = 0; i < sizeof(sdvo_data); i += 8) {
912                 if (!intel_sdvo_set_value(intel_sdvo,
913                                           SDVO_CMD_SET_HBUF_DATA,
914                                           data, 8))
915                         return false;
916                 data++;
917         }
918
919         return intel_sdvo_set_value(intel_sdvo,
920                                     SDVO_CMD_SET_HBUF_TXRATE,
921                                     &tx_rate, 1);
922 }
923
924 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
925 {
926         struct intel_sdvo_tv_format format;
927         uint32_t format_map;
928
929         format_map = 1 << intel_sdvo->tv_format_index;
930         memset(&format, 0, sizeof(format));
931         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
932
933         BUILD_BUG_ON(sizeof(format) != 6);
934         return intel_sdvo_set_value(intel_sdvo,
935                                     SDVO_CMD_SET_TV_FORMAT,
936                                     &format, sizeof(format));
937 }
938
939 static bool
940 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
941                                         struct drm_display_mode *mode)
942 {
943         struct intel_sdvo_dtd output_dtd;
944
945         if (!intel_sdvo_set_target_output(intel_sdvo,
946                                           intel_sdvo->attached_output))
947                 return false;
948
949         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
950         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
951                 return false;
952
953         return true;
954 }
955
956 static bool
957 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
958                                         struct drm_display_mode *mode,
959                                         struct drm_display_mode *adjusted_mode)
960 {
961         /* Reset the input timing to the screen. Assume always input 0. */
962         if (!intel_sdvo_set_target_input(intel_sdvo))
963                 return false;
964
965         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
966                                                       mode->clock / 10,
967                                                       mode->hdisplay,
968                                                       mode->vdisplay))
969                 return false;
970
971         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
972                                                    &intel_sdvo->input_dtd))
973                 return false;
974
975         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
976
977         return true;
978 }
979
980 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
981                                   struct drm_display_mode *mode,
982                                   struct drm_display_mode *adjusted_mode)
983 {
984         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
985         int multiplier;
986
987         /* We need to construct preferred input timings based on our
988          * output timings.  To do that, we have to set the output
989          * timings, even though this isn't really the right place in
990          * the sequence to do it. Oh well.
991          */
992         if (intel_sdvo->is_tv) {
993                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
994                         return false;
995
996                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
997                                                              mode,
998                                                              adjusted_mode);
999         } else if (intel_sdvo->is_lvds) {
1000                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1001                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1002                         return false;
1003
1004                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1005                                                              mode,
1006                                                              adjusted_mode);
1007         }
1008
1009         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1010          * SDVO device will factor out the multiplier during mode_set.
1011          */
1012         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1013         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1014
1015         return true;
1016 }
1017
1018 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1019                                 struct drm_display_mode *mode,
1020                                 struct drm_display_mode *adjusted_mode)
1021 {
1022         struct drm_device *dev = encoder->dev;
1023         struct drm_i915_private *dev_priv = dev->dev_private;
1024         struct drm_crtc *crtc = encoder->crtc;
1025         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1026         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1027         u32 sdvox;
1028         struct intel_sdvo_in_out_map in_out;
1029         struct intel_sdvo_dtd input_dtd, output_dtd;
1030         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1031         int rate;
1032
1033         if (!mode)
1034                 return;
1035
1036         /* First, set the input mapping for the first input to our controlled
1037          * output. This is only correct if we're a single-input device, in
1038          * which case the first input is the output from the appropriate SDVO
1039          * channel on the motherboard.  In a two-input device, the first input
1040          * will be SDVOB and the second SDVOC.
1041          */
1042         in_out.in0 = intel_sdvo->attached_output;
1043         in_out.in1 = 0;
1044
1045         intel_sdvo_set_value(intel_sdvo,
1046                              SDVO_CMD_SET_IN_OUT_MAP,
1047                              &in_out, sizeof(in_out));
1048
1049         /* Set the output timings to the screen */
1050         if (!intel_sdvo_set_target_output(intel_sdvo,
1051                                           intel_sdvo->attached_output))
1052                 return;
1053
1054         /* lvds has a special fixed output timing. */
1055         if (intel_sdvo->is_lvds)
1056                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1057                                              intel_sdvo->sdvo_lvds_fixed_mode);
1058         else
1059                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1060         (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1061
1062         /* Set the input timing to the screen. Assume always input 0. */
1063         if (!intel_sdvo_set_target_input(intel_sdvo))
1064                 return;
1065
1066         if (intel_sdvo->has_hdmi_monitor) {
1067                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1068                 intel_sdvo_set_colorimetry(intel_sdvo,
1069                                            SDVO_COLORIMETRY_RGB256);
1070                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1071         } else
1072                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1073
1074         if (intel_sdvo->is_tv &&
1075             !intel_sdvo_set_tv_format(intel_sdvo))
1076                 return;
1077
1078         /* We have tried to get input timing in mode_fixup, and filled into
1079          * adjusted_mode.
1080          */
1081         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1082         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1083
1084         switch (pixel_multiplier) {
1085         default:
1086         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1087         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1088         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1089         }
1090         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1091                 return;
1092
1093         /* Set the SDVO control regs. */
1094         if (INTEL_INFO(dev)->gen >= 4) {
1095                 /* The real mode polarity is set by the SDVO commands, using
1096                  * struct intel_sdvo_dtd. */
1097                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1098                 if (intel_sdvo->is_hdmi)
1099                         sdvox |= intel_sdvo->color_range;
1100                 if (INTEL_INFO(dev)->gen < 5)
1101                         sdvox |= SDVO_BORDER_ENABLE;
1102         } else {
1103                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1104                 switch (intel_sdvo->sdvo_reg) {
1105                 case SDVOB:
1106                         sdvox &= SDVOB_PRESERVE_MASK;
1107                         break;
1108                 case SDVOC:
1109                         sdvox &= SDVOC_PRESERVE_MASK;
1110                         break;
1111                 }
1112                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1113         }
1114
1115         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1116                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1117         else
1118                 sdvox |= TRANSCODER(intel_crtc->pipe);
1119
1120         if (intel_sdvo->has_hdmi_audio)
1121                 sdvox |= SDVO_AUDIO_ENABLE;
1122
1123         if (INTEL_INFO(dev)->gen >= 4) {
1124                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1125         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1126                 /* done in crtc_mode_set as it lives inside the dpll register */
1127         } else {
1128                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1129         }
1130
1131         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1132             INTEL_INFO(dev)->gen < 5)
1133                 sdvox |= SDVO_STALL_SELECT;
1134         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1135 }
1136
1137 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1138 {
1139         struct drm_device *dev = encoder->dev;
1140         struct drm_i915_private *dev_priv = dev->dev_private;
1141         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1142         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1143         u32 temp;
1144
1145         if (mode != DRM_MODE_DPMS_ON) {
1146                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1147                 if (0)
1148                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1149
1150                 if (mode == DRM_MODE_DPMS_OFF) {
1151                         temp = I915_READ(intel_sdvo->sdvo_reg);
1152                         if ((temp & SDVO_ENABLE) != 0) {
1153                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1154                         }
1155                 }
1156         } else {
1157                 bool input1, input2;
1158                 int i;
1159                 u8 status;
1160
1161                 temp = I915_READ(intel_sdvo->sdvo_reg);
1162                 if ((temp & SDVO_ENABLE) == 0)
1163                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1164                 for (i = 0; i < 2; i++)
1165                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1166
1167                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1168                 /* Warn if the device reported failure to sync.
1169                  * A lot of SDVO devices fail to notify of sync, but it's
1170                  * a given it the status is a success, we succeeded.
1171                  */
1172                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1173                         DRM_DEBUG_KMS("First %s output reported failure to "
1174                                         "sync\n", SDVO_NAME(intel_sdvo));
1175                 }
1176
1177                 if (0)
1178                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1179                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1180         }
1181         return;
1182 }
1183
1184 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1185                                  struct drm_display_mode *mode)
1186 {
1187         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1188
1189         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1190                 return MODE_NO_DBLESCAN;
1191
1192         if (intel_sdvo->pixel_clock_min > mode->clock)
1193                 return MODE_CLOCK_LOW;
1194
1195         if (intel_sdvo->pixel_clock_max < mode->clock)
1196                 return MODE_CLOCK_HIGH;
1197
1198         if (intel_sdvo->is_lvds) {
1199                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1200                         return MODE_PANEL;
1201
1202                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1203                         return MODE_PANEL;
1204         }
1205
1206         return MODE_OK;
1207 }
1208
1209 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1210 {
1211         BUILD_BUG_ON(sizeof(*caps) != 8);
1212         if (!intel_sdvo_get_value(intel_sdvo,
1213                                   SDVO_CMD_GET_DEVICE_CAPS,
1214                                   caps, sizeof(*caps)))
1215                 return false;
1216
1217         DRM_DEBUG_KMS("SDVO capabilities:\n"
1218                       "  vendor_id: %d\n"
1219                       "  device_id: %d\n"
1220                       "  device_rev_id: %d\n"
1221                       "  sdvo_version_major: %d\n"
1222                       "  sdvo_version_minor: %d\n"
1223                       "  sdvo_inputs_mask: %d\n"
1224                       "  smooth_scaling: %d\n"
1225                       "  sharp_scaling: %d\n"
1226                       "  up_scaling: %d\n"
1227                       "  down_scaling: %d\n"
1228                       "  stall_support: %d\n"
1229                       "  output_flags: %d\n",
1230                       caps->vendor_id,
1231                       caps->device_id,
1232                       caps->device_rev_id,
1233                       caps->sdvo_version_major,
1234                       caps->sdvo_version_minor,
1235                       caps->sdvo_inputs_mask,
1236                       caps->smooth_scaling,
1237                       caps->sharp_scaling,
1238                       caps->up_scaling,
1239                       caps->down_scaling,
1240                       caps->stall_support,
1241                       caps->output_flags);
1242
1243         return true;
1244 }
1245
1246 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1247 {
1248         struct drm_device *dev = intel_sdvo->base.base.dev;
1249         u8 response[2];
1250
1251         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1252          * on the line. */
1253         if (IS_I945G(dev) || IS_I945GM(dev))
1254                 return false;
1255
1256         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1257                                     &response, 2) && response[0];
1258 }
1259
1260 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1261 {
1262         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1263
1264         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1265 }
1266
1267 static bool
1268 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1269 {
1270         /* Is there more than one type of output? */
1271         return hweight16(intel_sdvo->caps.output_flags) > 1;
1272 }
1273
1274 static struct edid *
1275 intel_sdvo_get_edid(struct drm_connector *connector)
1276 {
1277         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1278         return drm_get_edid(connector, &sdvo->ddc);
1279 }
1280
1281 /* Mac mini hack -- use the same DDC as the analog connector */
1282 static struct edid *
1283 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1284 {
1285         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1286
1287         return drm_get_edid(connector,
1288                             intel_gmbus_get_adapter(dev_priv,
1289                                                     dev_priv->crt_ddc_pin));
1290 }
1291
1292 static enum drm_connector_status
1293 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1294 {
1295         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1296         enum drm_connector_status status;
1297         struct edid *edid;
1298
1299         edid = intel_sdvo_get_edid(connector);
1300
1301         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1302                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1303
1304                 /*
1305                  * Don't use the 1 as the argument of DDC bus switch to get
1306                  * the EDID. It is used for SDVO SPD ROM.
1307                  */
1308                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1309                         intel_sdvo->ddc_bus = ddc;
1310                         edid = intel_sdvo_get_edid(connector);
1311                         if (edid)
1312                                 break;
1313                 }
1314                 /*
1315                  * If we found the EDID on the other bus,
1316                  * assume that is the correct DDC bus.
1317                  */
1318                 if (edid == NULL)
1319                         intel_sdvo->ddc_bus = saved_ddc;
1320         }
1321
1322         /*
1323          * When there is no edid and no monitor is connected with VGA
1324          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1325          */
1326         if (edid == NULL)
1327                 edid = intel_sdvo_get_analog_edid(connector);
1328
1329         status = connector_status_unknown;
1330         if (edid != NULL) {
1331                 /* DDC bus is shared, match EDID to connector type */
1332                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1333                         status = connector_status_connected;
1334                         if (intel_sdvo->is_hdmi) {
1335                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1336                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1337                         }
1338                 } else
1339                         status = connector_status_disconnected;
1340                 connector->display_info.raw_edid = NULL;
1341                 kfree(edid);
1342         }
1343
1344         if (status == connector_status_connected) {
1345                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1346                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1347                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1348         }
1349
1350         return status;
1351 }
1352
1353 static bool
1354 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1355                                   struct edid *edid)
1356 {
1357         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1358         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1359
1360         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1361                       connector_is_digital, monitor_is_digital);
1362         return connector_is_digital == monitor_is_digital;
1363 }
1364
1365 static enum drm_connector_status
1366 intel_sdvo_detect(struct drm_connector *connector, bool force)
1367 {
1368         uint16_t response;
1369         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1370         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1371         enum drm_connector_status ret;
1372
1373         if (!intel_sdvo_write_cmd(intel_sdvo,
1374                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1375                 return connector_status_unknown;
1376
1377         /* add 30ms delay when the output type might be TV */
1378         if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1379                 mdelay(30);
1380
1381         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1382                 return connector_status_unknown;
1383
1384         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1385                       response & 0xff, response >> 8,
1386                       intel_sdvo_connector->output_flag);
1387
1388         if (response == 0)
1389                 return connector_status_disconnected;
1390
1391         intel_sdvo->attached_output = response;
1392
1393         intel_sdvo->has_hdmi_monitor = false;
1394         intel_sdvo->has_hdmi_audio = false;
1395
1396         if ((intel_sdvo_connector->output_flag & response) == 0)
1397                 ret = connector_status_disconnected;
1398         else if (IS_TMDS(intel_sdvo_connector))
1399                 ret = intel_sdvo_tmds_sink_detect(connector);
1400         else {
1401                 struct edid *edid;
1402
1403                 /* if we have an edid check it matches the connection */
1404                 edid = intel_sdvo_get_edid(connector);
1405                 if (edid == NULL)
1406                         edid = intel_sdvo_get_analog_edid(connector);
1407                 if (edid != NULL) {
1408                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1409                                                               edid))
1410                                 ret = connector_status_connected;
1411                         else
1412                                 ret = connector_status_disconnected;
1413
1414                         connector->display_info.raw_edid = NULL;
1415                         kfree(edid);
1416                 } else
1417                         ret = connector_status_connected;
1418         }
1419
1420         /* May update encoder flag for like clock for SDVO TV, etc.*/
1421         if (ret == connector_status_connected) {
1422                 intel_sdvo->is_tv = false;
1423                 intel_sdvo->is_lvds = false;
1424                 intel_sdvo->base.needs_tv_clock = false;
1425
1426                 if (response & SDVO_TV_MASK) {
1427                         intel_sdvo->is_tv = true;
1428                         intel_sdvo->base.needs_tv_clock = true;
1429                 }
1430                 if (response & SDVO_LVDS_MASK)
1431                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1432         }
1433
1434         return ret;
1435 }
1436
1437 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1438 {
1439         struct edid *edid;
1440
1441         /* set the bus switch and get the modes */
1442         edid = intel_sdvo_get_edid(connector);
1443
1444         /*
1445          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1446          * link between analog and digital outputs. So, if the regular SDVO
1447          * DDC fails, check to see if the analog output is disconnected, in
1448          * which case we'll look there for the digital DDC data.
1449          */
1450         if (edid == NULL)
1451                 edid = intel_sdvo_get_analog_edid(connector);
1452
1453         if (edid != NULL) {
1454                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1455                                                       edid)) {
1456                         drm_mode_connector_update_edid_property(connector, edid);
1457                         drm_add_edid_modes(connector, edid);
1458                 }
1459
1460                 connector->display_info.raw_edid = NULL;
1461                 kfree(edid);
1462         }
1463 }
1464
1465 /*
1466  * Set of SDVO TV modes.
1467  * Note!  This is in reply order (see loop in get_tv_modes).
1468  * XXX: all 60Hz refresh?
1469  */
1470 static const struct drm_display_mode sdvo_tv_modes[] = {
1471         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1472                    416, 0, 200, 201, 232, 233, 0,
1473                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1474         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1475                    416, 0, 240, 241, 272, 273, 0,
1476                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1478                    496, 0, 300, 301, 332, 333, 0,
1479                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1481                    736, 0, 350, 351, 382, 383, 0,
1482                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1484                    736, 0, 400, 401, 432, 433, 0,
1485                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1487                    736, 0, 480, 481, 512, 513, 0,
1488                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1490                    800, 0, 480, 481, 512, 513, 0,
1491                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1493                    800, 0, 576, 577, 608, 609, 0,
1494                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1496                    816, 0, 350, 351, 382, 383, 0,
1497                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1499                    816, 0, 400, 401, 432, 433, 0,
1500                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1502                    816, 0, 480, 481, 512, 513, 0,
1503                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1505                    816, 0, 540, 541, 572, 573, 0,
1506                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1508                    816, 0, 576, 577, 608, 609, 0,
1509                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1511                    864, 0, 576, 577, 608, 609, 0,
1512                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1514                    896, 0, 600, 601, 632, 633, 0,
1515                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1517                    928, 0, 624, 625, 656, 657, 0,
1518                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1520                    1016, 0, 766, 767, 798, 799, 0,
1521                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1523                    1120, 0, 768, 769, 800, 801, 0,
1524                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1526                    1376, 0, 1024, 1025, 1056, 1057, 0,
1527                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 };
1529
1530 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1531 {
1532         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1533         struct intel_sdvo_sdtv_resolution_request tv_res;
1534         uint32_t reply = 0, format_map = 0;
1535         int i;
1536
1537         /* Read the list of supported input resolutions for the selected TV
1538          * format.
1539          */
1540         format_map = 1 << intel_sdvo->tv_format_index;
1541         memcpy(&tv_res, &format_map,
1542                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1543
1544         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1545                 return;
1546
1547         BUILD_BUG_ON(sizeof(tv_res) != 3);
1548         if (!intel_sdvo_write_cmd(intel_sdvo,
1549                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1550                                   &tv_res, sizeof(tv_res)))
1551                 return;
1552         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1553                 return;
1554
1555         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1556                 if (reply & (1 << i)) {
1557                         struct drm_display_mode *nmode;
1558                         nmode = drm_mode_duplicate(connector->dev,
1559                                                    &sdvo_tv_modes[i]);
1560                         if (nmode)
1561                                 drm_mode_probed_add(connector, nmode);
1562                 }
1563 }
1564
1565 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1566 {
1567         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1568         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1569         struct drm_display_mode *newmode;
1570
1571         /*
1572          * Attempt to get the mode list from DDC.
1573          * Assume that the preferred modes are
1574          * arranged in priority order.
1575          */
1576         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1577         if (list_empty(&connector->probed_modes) == false)
1578                 goto end;
1579
1580         /* Fetch modes from VBT */
1581         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1582                 newmode = drm_mode_duplicate(connector->dev,
1583                                              dev_priv->sdvo_lvds_vbt_mode);
1584                 if (newmode != NULL) {
1585                         /* Guarantee the mode is preferred */
1586                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1587                                          DRM_MODE_TYPE_DRIVER);
1588                         drm_mode_probed_add(connector, newmode);
1589                 }
1590         }
1591
1592 end:
1593         list_for_each_entry(newmode, &connector->probed_modes, head) {
1594                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1595                         intel_sdvo->sdvo_lvds_fixed_mode =
1596                                 drm_mode_duplicate(connector->dev, newmode);
1597
1598                         intel_sdvo->is_lvds = true;
1599                         break;
1600                 }
1601         }
1602
1603 }
1604
1605 static int intel_sdvo_get_modes(struct drm_connector *connector)
1606 {
1607         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1608
1609         if (IS_TV(intel_sdvo_connector))
1610                 intel_sdvo_get_tv_modes(connector);
1611         else if (IS_LVDS(intel_sdvo_connector))
1612                 intel_sdvo_get_lvds_modes(connector);
1613         else
1614                 intel_sdvo_get_ddc_modes(connector);
1615
1616         return !list_empty(&connector->probed_modes);
1617 }
1618
1619 static void
1620 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1621 {
1622         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1623         struct drm_device *dev = connector->dev;
1624
1625         if (intel_sdvo_connector->left)
1626                 drm_property_destroy(dev, intel_sdvo_connector->left);
1627         if (intel_sdvo_connector->right)
1628                 drm_property_destroy(dev, intel_sdvo_connector->right);
1629         if (intel_sdvo_connector->top)
1630                 drm_property_destroy(dev, intel_sdvo_connector->top);
1631         if (intel_sdvo_connector->bottom)
1632                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1633         if (intel_sdvo_connector->hpos)
1634                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1635         if (intel_sdvo_connector->vpos)
1636                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1637         if (intel_sdvo_connector->saturation)
1638                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1639         if (intel_sdvo_connector->contrast)
1640                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1641         if (intel_sdvo_connector->hue)
1642                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1643         if (intel_sdvo_connector->sharpness)
1644                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1645         if (intel_sdvo_connector->flicker_filter)
1646                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1647         if (intel_sdvo_connector->flicker_filter_2d)
1648                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1649         if (intel_sdvo_connector->flicker_filter_adaptive)
1650                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1651         if (intel_sdvo_connector->tv_luma_filter)
1652                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1653         if (intel_sdvo_connector->tv_chroma_filter)
1654                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1655         if (intel_sdvo_connector->dot_crawl)
1656                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1657         if (intel_sdvo_connector->brightness)
1658                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1659 }
1660
1661 static void intel_sdvo_destroy(struct drm_connector *connector)
1662 {
1663         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1664
1665         if (intel_sdvo_connector->tv_format)
1666                 drm_property_destroy(connector->dev,
1667                                      intel_sdvo_connector->tv_format);
1668
1669         intel_sdvo_destroy_enhance_property(connector);
1670         drm_sysfs_connector_remove(connector);
1671         drm_connector_cleanup(connector);
1672         kfree(connector);
1673 }
1674
1675 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1676 {
1677         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1678         struct edid *edid;
1679         bool has_audio = false;
1680
1681         if (!intel_sdvo->is_hdmi)
1682                 return false;
1683
1684         edid = intel_sdvo_get_edid(connector);
1685         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1686                 has_audio = drm_detect_monitor_audio(edid);
1687
1688         return has_audio;
1689 }
1690
1691 static int
1692 intel_sdvo_set_property(struct drm_connector *connector,
1693                         struct drm_property *property,
1694                         uint64_t val)
1695 {
1696         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1697         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1698         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1699         uint16_t temp_value;
1700         uint8_t cmd;
1701         int ret;
1702
1703         ret = drm_connector_property_set_value(connector, property, val);
1704         if (ret)
1705                 return ret;
1706
1707         if (property == dev_priv->force_audio_property) {
1708                 int i = val;
1709                 bool has_audio;
1710
1711                 if (i == intel_sdvo_connector->force_audio)
1712                         return 0;
1713
1714                 intel_sdvo_connector->force_audio = i;
1715
1716                 if (i == HDMI_AUDIO_AUTO)
1717                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1718                 else
1719                         has_audio = (i == HDMI_AUDIO_ON);
1720
1721                 if (has_audio == intel_sdvo->has_hdmi_audio)
1722                         return 0;
1723
1724                 intel_sdvo->has_hdmi_audio = has_audio;
1725                 goto done;
1726         }
1727
1728         if (property == dev_priv->broadcast_rgb_property) {
1729                 if (val == !!intel_sdvo->color_range)
1730                         return 0;
1731
1732                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1733                 goto done;
1734         }
1735
1736 #define CHECK_PROPERTY(name, NAME) \
1737         if (intel_sdvo_connector->name == property) { \
1738                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1739                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1740                 cmd = SDVO_CMD_SET_##NAME; \
1741                 intel_sdvo_connector->cur_##name = temp_value; \
1742                 goto set_value; \
1743         }
1744
1745         if (property == intel_sdvo_connector->tv_format) {
1746                 if (val >= TV_FORMAT_NUM)
1747                         return -EINVAL;
1748
1749                 if (intel_sdvo->tv_format_index ==
1750                     intel_sdvo_connector->tv_format_supported[val])
1751                         return 0;
1752
1753                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1754                 goto done;
1755         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1756                 temp_value = val;
1757                 if (intel_sdvo_connector->left == property) {
1758                         drm_connector_property_set_value(connector,
1759                                                          intel_sdvo_connector->right, val);
1760                         if (intel_sdvo_connector->left_margin == temp_value)
1761                                 return 0;
1762
1763                         intel_sdvo_connector->left_margin = temp_value;
1764                         intel_sdvo_connector->right_margin = temp_value;
1765                         temp_value = intel_sdvo_connector->max_hscan -
1766                                 intel_sdvo_connector->left_margin;
1767                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1768                         goto set_value;
1769                 } else if (intel_sdvo_connector->right == property) {
1770                         drm_connector_property_set_value(connector,
1771                                                          intel_sdvo_connector->left, val);
1772                         if (intel_sdvo_connector->right_margin == temp_value)
1773                                 return 0;
1774
1775                         intel_sdvo_connector->left_margin = temp_value;
1776                         intel_sdvo_connector->right_margin = temp_value;
1777                         temp_value = intel_sdvo_connector->max_hscan -
1778                                 intel_sdvo_connector->left_margin;
1779                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1780                         goto set_value;
1781                 } else if (intel_sdvo_connector->top == property) {
1782                         drm_connector_property_set_value(connector,
1783                                                          intel_sdvo_connector->bottom, val);
1784                         if (intel_sdvo_connector->top_margin == temp_value)
1785                                 return 0;
1786
1787                         intel_sdvo_connector->top_margin = temp_value;
1788                         intel_sdvo_connector->bottom_margin = temp_value;
1789                         temp_value = intel_sdvo_connector->max_vscan -
1790                                 intel_sdvo_connector->top_margin;
1791                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1792                         goto set_value;
1793                 } else if (intel_sdvo_connector->bottom == property) {
1794                         drm_connector_property_set_value(connector,
1795                                                          intel_sdvo_connector->top, val);
1796                         if (intel_sdvo_connector->bottom_margin == temp_value)
1797                                 return 0;
1798
1799                         intel_sdvo_connector->top_margin = temp_value;
1800                         intel_sdvo_connector->bottom_margin = temp_value;
1801                         temp_value = intel_sdvo_connector->max_vscan -
1802                                 intel_sdvo_connector->top_margin;
1803                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1804                         goto set_value;
1805                 }
1806                 CHECK_PROPERTY(hpos, HPOS)
1807                 CHECK_PROPERTY(vpos, VPOS)
1808                 CHECK_PROPERTY(saturation, SATURATION)
1809                 CHECK_PROPERTY(contrast, CONTRAST)
1810                 CHECK_PROPERTY(hue, HUE)
1811                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1812                 CHECK_PROPERTY(sharpness, SHARPNESS)
1813                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1814                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1815                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1816                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1817                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1818                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1819         }
1820
1821         return -EINVAL; /* unknown property */
1822
1823 set_value:
1824         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1825                 return -EIO;
1826
1827
1828 done:
1829         if (intel_sdvo->base.base.crtc) {
1830                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1831                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1832                                          crtc->y, crtc->fb);
1833         }
1834
1835         return 0;
1836 #undef CHECK_PROPERTY
1837 }
1838
1839 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1840         .dpms = intel_sdvo_dpms,
1841         .mode_fixup = intel_sdvo_mode_fixup,
1842         .prepare = intel_encoder_prepare,
1843         .mode_set = intel_sdvo_mode_set,
1844         .commit = intel_encoder_commit,
1845 };
1846
1847 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1848         .dpms = drm_helper_connector_dpms,
1849         .detect = intel_sdvo_detect,
1850         .fill_modes = drm_helper_probe_single_connector_modes,
1851         .set_property = intel_sdvo_set_property,
1852         .destroy = intel_sdvo_destroy,
1853 };
1854
1855 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1856         .get_modes = intel_sdvo_get_modes,
1857         .mode_valid = intel_sdvo_mode_valid,
1858         .best_encoder = intel_best_encoder,
1859 };
1860
1861 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1862 {
1863         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1864
1865         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1866                 drm_mode_destroy(encoder->dev,
1867                                  intel_sdvo->sdvo_lvds_fixed_mode);
1868
1869         i2c_del_adapter(&intel_sdvo->ddc);
1870         intel_encoder_destroy(encoder);
1871 }
1872
1873 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1874         .destroy = intel_sdvo_enc_destroy,
1875 };
1876
1877 static void
1878 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1879 {
1880         uint16_t mask = 0;
1881         unsigned int num_bits;
1882
1883         /* Make a mask of outputs less than or equal to our own priority in the
1884          * list.
1885          */
1886         switch (sdvo->controlled_output) {
1887         case SDVO_OUTPUT_LVDS1:
1888                 mask |= SDVO_OUTPUT_LVDS1;
1889         case SDVO_OUTPUT_LVDS0:
1890                 mask |= SDVO_OUTPUT_LVDS0;
1891         case SDVO_OUTPUT_TMDS1:
1892                 mask |= SDVO_OUTPUT_TMDS1;
1893         case SDVO_OUTPUT_TMDS0:
1894                 mask |= SDVO_OUTPUT_TMDS0;
1895         case SDVO_OUTPUT_RGB1:
1896                 mask |= SDVO_OUTPUT_RGB1;
1897         case SDVO_OUTPUT_RGB0:
1898                 mask |= SDVO_OUTPUT_RGB0;
1899                 break;
1900         }
1901
1902         /* Count bits to find what number we are in the priority list. */
1903         mask &= sdvo->caps.output_flags;
1904         num_bits = hweight16(mask);
1905         /* If more than 3 outputs, default to DDC bus 3 for now. */
1906         if (num_bits > 3)
1907                 num_bits = 3;
1908
1909         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1910         sdvo->ddc_bus = 1 << num_bits;
1911 }
1912
1913 /**
1914  * Choose the appropriate DDC bus for control bus switch command for this
1915  * SDVO output based on the controlled output.
1916  *
1917  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1918  * outputs, then LVDS outputs.
1919  */
1920 static void
1921 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1922                           struct intel_sdvo *sdvo, u32 reg)
1923 {
1924         struct sdvo_device_mapping *mapping;
1925
1926         if (sdvo->is_sdvob)
1927                 mapping = &(dev_priv->sdvo_mappings[0]);
1928         else
1929                 mapping = &(dev_priv->sdvo_mappings[1]);
1930
1931         if (mapping->initialized)
1932                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1933         else
1934                 intel_sdvo_guess_ddc_bus(sdvo);
1935 }
1936
1937 static void
1938 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1939                           struct intel_sdvo *sdvo, u32 reg)
1940 {
1941         struct sdvo_device_mapping *mapping;
1942         u8 pin;
1943
1944         if (sdvo->is_sdvob)
1945                 mapping = &dev_priv->sdvo_mappings[0];
1946         else
1947                 mapping = &dev_priv->sdvo_mappings[1];
1948
1949         pin = GMBUS_PORT_DPB;
1950         if (mapping->initialized)
1951                 pin = mapping->i2c_pin;
1952
1953         if (intel_gmbus_is_port_valid(pin)) {
1954                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1955                 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1956                 intel_gmbus_force_bit(sdvo->i2c, true);
1957         } else {
1958                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1959         }
1960 }
1961
1962 static bool
1963 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1964 {
1965         return intel_sdvo_check_supp_encode(intel_sdvo);
1966 }
1967
1968 static u8
1969 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1970 {
1971         struct drm_i915_private *dev_priv = dev->dev_private;
1972         struct sdvo_device_mapping *my_mapping, *other_mapping;
1973
1974         if (sdvo->is_sdvob) {
1975                 my_mapping = &dev_priv->sdvo_mappings[0];
1976                 other_mapping = &dev_priv->sdvo_mappings[1];
1977         } else {
1978                 my_mapping = &dev_priv->sdvo_mappings[1];
1979                 other_mapping = &dev_priv->sdvo_mappings[0];
1980         }
1981
1982         /* If the BIOS described our SDVO device, take advantage of it. */
1983         if (my_mapping->slave_addr)
1984                 return my_mapping->slave_addr;
1985
1986         /* If the BIOS only described a different SDVO device, use the
1987          * address that it isn't using.
1988          */
1989         if (other_mapping->slave_addr) {
1990                 if (other_mapping->slave_addr == 0x70)
1991                         return 0x72;
1992                 else
1993                         return 0x70;
1994         }
1995
1996         /* No SDVO device info is found for another DVO port,
1997          * so use mapping assumption we had before BIOS parsing.
1998          */
1999         if (sdvo->is_sdvob)
2000                 return 0x70;
2001         else
2002                 return 0x72;
2003 }
2004
2005 static void
2006 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2007                           struct intel_sdvo *encoder)
2008 {
2009         drm_connector_init(encoder->base.base.dev,
2010                            &connector->base.base,
2011                            &intel_sdvo_connector_funcs,
2012                            connector->base.base.connector_type);
2013
2014         drm_connector_helper_add(&connector->base.base,
2015                                  &intel_sdvo_connector_helper_funcs);
2016
2017         connector->base.base.interlace_allowed = 1;
2018         connector->base.base.doublescan_allowed = 0;
2019         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2020
2021         intel_connector_attach_encoder(&connector->base, &encoder->base);
2022         drm_sysfs_connector_add(&connector->base.base);
2023 }
2024
2025 static void
2026 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2027 {
2028         struct drm_device *dev = connector->base.base.dev;
2029
2030         intel_attach_force_audio_property(&connector->base.base);
2031         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2032                 intel_attach_broadcast_rgb_property(&connector->base.base);
2033 }
2034
2035 static bool
2036 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2037 {
2038         struct drm_encoder *encoder = &intel_sdvo->base.base;
2039         struct drm_connector *connector;
2040         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2041         struct intel_connector *intel_connector;
2042         struct intel_sdvo_connector *intel_sdvo_connector;
2043
2044         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2045         if (!intel_sdvo_connector)
2046                 return false;
2047
2048         if (device == 0) {
2049                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2050                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2051         } else if (device == 1) {
2052                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2053                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2054         }
2055
2056         intel_connector = &intel_sdvo_connector->base;
2057         connector = &intel_connector->base;
2058         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2059                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2060                 intel_sdvo->hotplug_active[0] |= 1 << device;
2061                 /* Some SDVO devices have one-shot hotplug interrupts.
2062                  * Ensure that they get re-enabled when an interrupt happens.
2063                  */
2064                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2065                 intel_sdvo_enable_hotplug(intel_encoder);
2066         }
2067         else
2068                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2069         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2070         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2071
2072         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2073                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2074                 intel_sdvo->is_hdmi = true;
2075         }
2076         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2077                                        (1 << INTEL_ANALOG_CLONE_BIT));
2078
2079         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2080         if (intel_sdvo->is_hdmi)
2081                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2082
2083         return true;
2084 }
2085
2086 static bool
2087 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2088 {
2089         struct drm_encoder *encoder = &intel_sdvo->base.base;
2090         struct drm_connector *connector;
2091         struct intel_connector *intel_connector;
2092         struct intel_sdvo_connector *intel_sdvo_connector;
2093
2094         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2095         if (!intel_sdvo_connector)
2096                 return false;
2097
2098         intel_connector = &intel_sdvo_connector->base;
2099         connector = &intel_connector->base;
2100         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2101         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2102
2103         intel_sdvo->controlled_output |= type;
2104         intel_sdvo_connector->output_flag = type;
2105
2106         intel_sdvo->is_tv = true;
2107         intel_sdvo->base.needs_tv_clock = true;
2108         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2109
2110         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2111
2112         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2113                 goto err;
2114
2115         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2116                 goto err;
2117
2118         return true;
2119
2120 err:
2121         intel_sdvo_destroy(connector);
2122         return false;
2123 }
2124
2125 static bool
2126 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2127 {
2128         struct drm_encoder *encoder = &intel_sdvo->base.base;
2129         struct drm_connector *connector;
2130         struct intel_connector *intel_connector;
2131         struct intel_sdvo_connector *intel_sdvo_connector;
2132
2133         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2134         if (!intel_sdvo_connector)
2135                 return false;
2136
2137         intel_connector = &intel_sdvo_connector->base;
2138         connector = &intel_connector->base;
2139         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2140         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2141         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2142
2143         if (device == 0) {
2144                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2145                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2146         } else if (device == 1) {
2147                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2148                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2149         }
2150
2151         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2152                                        (1 << INTEL_ANALOG_CLONE_BIT));
2153
2154         intel_sdvo_connector_init(intel_sdvo_connector,
2155                                   intel_sdvo);
2156         return true;
2157 }
2158
2159 static bool
2160 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2161 {
2162         struct drm_encoder *encoder = &intel_sdvo->base.base;
2163         struct drm_connector *connector;
2164         struct intel_connector *intel_connector;
2165         struct intel_sdvo_connector *intel_sdvo_connector;
2166
2167         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2168         if (!intel_sdvo_connector)
2169                 return false;
2170
2171         intel_connector = &intel_sdvo_connector->base;
2172         connector = &intel_connector->base;
2173         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2174         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2175
2176         if (device == 0) {
2177                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2178                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2179         } else if (device == 1) {
2180                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2181                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2182         }
2183
2184         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2185                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2186
2187         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2188         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2189                 goto err;
2190
2191         return true;
2192
2193 err:
2194         intel_sdvo_destroy(connector);
2195         return false;
2196 }
2197
2198 static bool
2199 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2200 {
2201         intel_sdvo->is_tv = false;
2202         intel_sdvo->base.needs_tv_clock = false;
2203         intel_sdvo->is_lvds = false;
2204
2205         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2206
2207         if (flags & SDVO_OUTPUT_TMDS0)
2208                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2209                         return false;
2210
2211         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2212                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2213                         return false;
2214
2215         /* TV has no XXX1 function block */
2216         if (flags & SDVO_OUTPUT_SVID0)
2217                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2218                         return false;
2219
2220         if (flags & SDVO_OUTPUT_CVBS0)
2221                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2222                         return false;
2223
2224         if (flags & SDVO_OUTPUT_YPRPB0)
2225                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2226                         return false;
2227
2228         if (flags & SDVO_OUTPUT_RGB0)
2229                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2230                         return false;
2231
2232         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2233                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2234                         return false;
2235
2236         if (flags & SDVO_OUTPUT_LVDS0)
2237                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2238                         return false;
2239
2240         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2241                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2242                         return false;
2243
2244         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2245                 unsigned char bytes[2];
2246
2247                 intel_sdvo->controlled_output = 0;
2248                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2249                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2250                               SDVO_NAME(intel_sdvo),
2251                               bytes[0], bytes[1]);
2252                 return false;
2253         }
2254         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2255
2256         return true;
2257 }
2258
2259 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2260                                           struct intel_sdvo_connector *intel_sdvo_connector,
2261                                           int type)
2262 {
2263         struct drm_device *dev = intel_sdvo->base.base.dev;
2264         struct intel_sdvo_tv_format format;
2265         uint32_t format_map, i;
2266
2267         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2268                 return false;
2269
2270         BUILD_BUG_ON(sizeof(format) != 6);
2271         if (!intel_sdvo_get_value(intel_sdvo,
2272                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2273                                   &format, sizeof(format)))
2274                 return false;
2275
2276         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2277
2278         if (format_map == 0)
2279                 return false;
2280
2281         intel_sdvo_connector->format_supported_num = 0;
2282         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2283                 if (format_map & (1 << i))
2284                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2285
2286
2287         intel_sdvo_connector->tv_format =
2288                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2289                                             "mode", intel_sdvo_connector->format_supported_num);
2290         if (!intel_sdvo_connector->tv_format)
2291                 return false;
2292
2293         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2294                 drm_property_add_enum(
2295                                 intel_sdvo_connector->tv_format, i,
2296                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2297
2298         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2299         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2300                                       intel_sdvo_connector->tv_format, 0);
2301         return true;
2302
2303 }
2304
2305 #define ENHANCEMENT(name, NAME) do { \
2306         if (enhancements.name) { \
2307                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2308                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2309                         return false; \
2310                 intel_sdvo_connector->max_##name = data_value[0]; \
2311                 intel_sdvo_connector->cur_##name = response; \
2312                 intel_sdvo_connector->name = \
2313                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2314                 if (!intel_sdvo_connector->name) return false; \
2315                 drm_connector_attach_property(connector, \
2316                                               intel_sdvo_connector->name, \
2317                                               intel_sdvo_connector->cur_##name); \
2318                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2319                               data_value[0], data_value[1], response); \
2320         } \
2321 } while (0)
2322
2323 static bool
2324 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2325                                       struct intel_sdvo_connector *intel_sdvo_connector,
2326                                       struct intel_sdvo_enhancements_reply enhancements)
2327 {
2328         struct drm_device *dev = intel_sdvo->base.base.dev;
2329         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2330         uint16_t response, data_value[2];
2331
2332         /* when horizontal overscan is supported, Add the left/right  property */
2333         if (enhancements.overscan_h) {
2334                 if (!intel_sdvo_get_value(intel_sdvo,
2335                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2336                                           &data_value, 4))
2337                         return false;
2338
2339                 if (!intel_sdvo_get_value(intel_sdvo,
2340                                           SDVO_CMD_GET_OVERSCAN_H,
2341                                           &response, 2))
2342                         return false;
2343
2344                 intel_sdvo_connector->max_hscan = data_value[0];
2345                 intel_sdvo_connector->left_margin = data_value[0] - response;
2346                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2347                 intel_sdvo_connector->left =
2348                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2349                 if (!intel_sdvo_connector->left)
2350                         return false;
2351
2352                 drm_connector_attach_property(connector,
2353                                               intel_sdvo_connector->left,
2354                                               intel_sdvo_connector->left_margin);
2355
2356                 intel_sdvo_connector->right =
2357                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2358                 if (!intel_sdvo_connector->right)
2359                         return false;
2360
2361                 drm_connector_attach_property(connector,
2362                                               intel_sdvo_connector->right,
2363                                               intel_sdvo_connector->right_margin);
2364                 DRM_DEBUG_KMS("h_overscan: max %d, "
2365                               "default %d, current %d\n",
2366                               data_value[0], data_value[1], response);
2367         }
2368
2369         if (enhancements.overscan_v) {
2370                 if (!intel_sdvo_get_value(intel_sdvo,
2371                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2372                                           &data_value, 4))
2373                         return false;
2374
2375                 if (!intel_sdvo_get_value(intel_sdvo,
2376                                           SDVO_CMD_GET_OVERSCAN_V,
2377                                           &response, 2))
2378                         return false;
2379
2380                 intel_sdvo_connector->max_vscan = data_value[0];
2381                 intel_sdvo_connector->top_margin = data_value[0] - response;
2382                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2383                 intel_sdvo_connector->top =
2384                         drm_property_create_range(dev, 0,
2385                                             "top_margin", 0, data_value[0]);
2386                 if (!intel_sdvo_connector->top)
2387                         return false;
2388
2389                 drm_connector_attach_property(connector,
2390                                               intel_sdvo_connector->top,
2391                                               intel_sdvo_connector->top_margin);
2392
2393                 intel_sdvo_connector->bottom =
2394                         drm_property_create_range(dev, 0,
2395                                             "bottom_margin", 0, data_value[0]);
2396                 if (!intel_sdvo_connector->bottom)
2397                         return false;
2398
2399                 drm_connector_attach_property(connector,
2400                                               intel_sdvo_connector->bottom,
2401                                               intel_sdvo_connector->bottom_margin);
2402                 DRM_DEBUG_KMS("v_overscan: max %d, "
2403                               "default %d, current %d\n",
2404                               data_value[0], data_value[1], response);
2405         }
2406
2407         ENHANCEMENT(hpos, HPOS);
2408         ENHANCEMENT(vpos, VPOS);
2409         ENHANCEMENT(saturation, SATURATION);
2410         ENHANCEMENT(contrast, CONTRAST);
2411         ENHANCEMENT(hue, HUE);
2412         ENHANCEMENT(sharpness, SHARPNESS);
2413         ENHANCEMENT(brightness, BRIGHTNESS);
2414         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2415         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2416         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2417         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2418         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2419
2420         if (enhancements.dot_crawl) {
2421                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2422                         return false;
2423
2424                 intel_sdvo_connector->max_dot_crawl = 1;
2425                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2426                 intel_sdvo_connector->dot_crawl =
2427                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2428                 if (!intel_sdvo_connector->dot_crawl)
2429                         return false;
2430
2431                 drm_connector_attach_property(connector,
2432                                               intel_sdvo_connector->dot_crawl,
2433                                               intel_sdvo_connector->cur_dot_crawl);
2434                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2435         }
2436
2437         return true;
2438 }
2439
2440 static bool
2441 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2442                                         struct intel_sdvo_connector *intel_sdvo_connector,
2443                                         struct intel_sdvo_enhancements_reply enhancements)
2444 {
2445         struct drm_device *dev = intel_sdvo->base.base.dev;
2446         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2447         uint16_t response, data_value[2];
2448
2449         ENHANCEMENT(brightness, BRIGHTNESS);
2450
2451         return true;
2452 }
2453 #undef ENHANCEMENT
2454
2455 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2456                                                struct intel_sdvo_connector *intel_sdvo_connector)
2457 {
2458         union {
2459                 struct intel_sdvo_enhancements_reply reply;
2460                 uint16_t response;
2461         } enhancements;
2462
2463         BUILD_BUG_ON(sizeof(enhancements) != 2);
2464
2465         enhancements.response = 0;
2466         intel_sdvo_get_value(intel_sdvo,
2467                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2468                              &enhancements, sizeof(enhancements));
2469         if (enhancements.response == 0) {
2470                 DRM_DEBUG_KMS("No enhancement is supported\n");
2471                 return true;
2472         }
2473
2474         if (IS_TV(intel_sdvo_connector))
2475                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2476         else if (IS_LVDS(intel_sdvo_connector))
2477                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2478         else
2479                 return true;
2480 }
2481
2482 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2483                                      struct i2c_msg *msgs,
2484                                      int num)
2485 {
2486         struct intel_sdvo *sdvo = adapter->algo_data;
2487
2488         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2489                 return -EIO;
2490
2491         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2492 }
2493
2494 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2495 {
2496         struct intel_sdvo *sdvo = adapter->algo_data;
2497         return sdvo->i2c->algo->functionality(sdvo->i2c);
2498 }
2499
2500 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2501         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2502         .functionality  = intel_sdvo_ddc_proxy_func
2503 };
2504
2505 static bool
2506 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2507                           struct drm_device *dev)
2508 {
2509         sdvo->ddc.owner = THIS_MODULE;
2510         sdvo->ddc.class = I2C_CLASS_DDC;
2511         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2512         sdvo->ddc.dev.parent = &dev->pdev->dev;
2513         sdvo->ddc.algo_data = sdvo;
2514         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2515
2516         return i2c_add_adapter(&sdvo->ddc) == 0;
2517 }
2518
2519 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2520 {
2521         struct drm_i915_private *dev_priv = dev->dev_private;
2522         struct intel_encoder *intel_encoder;
2523         struct intel_sdvo *intel_sdvo;
2524         int i;
2525
2526         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2527         if (!intel_sdvo)
2528                 return false;
2529
2530         intel_sdvo->sdvo_reg = sdvo_reg;
2531         intel_sdvo->is_sdvob = is_sdvob;
2532         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2533         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2534         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2535                 kfree(intel_sdvo);
2536                 return false;
2537         }
2538
2539         /* encoder type will be decided later */
2540         intel_encoder = &intel_sdvo->base;
2541         intel_encoder->type = INTEL_OUTPUT_SDVO;
2542         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2543
2544         /* Read the regs to test if we can talk to the device */
2545         for (i = 0; i < 0x40; i++) {
2546                 u8 byte;
2547
2548                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2549                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2550                                       SDVO_NAME(intel_sdvo));
2551                         goto err;
2552                 }
2553         }
2554
2555         if (intel_sdvo->is_sdvob)
2556                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2557         else
2558                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2559
2560         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2561
2562         /* In default case sdvo lvds is false */
2563         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2564                 goto err;
2565
2566         /* Set up hotplug command - note paranoia about contents of reply.
2567          * We assume that the hardware is in a sane state, and only touch
2568          * the bits we think we understand.
2569          */
2570         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2571                              &intel_sdvo->hotplug_active, 2);
2572         intel_sdvo->hotplug_active[0] &= ~0x3;
2573
2574         if (intel_sdvo_output_setup(intel_sdvo,
2575                                     intel_sdvo->caps.output_flags) != true) {
2576                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2577                               SDVO_NAME(intel_sdvo));
2578                 goto err;
2579         }
2580
2581         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2582
2583         /* Set the input timing to the screen. Assume always input 0. */
2584         if (!intel_sdvo_set_target_input(intel_sdvo))
2585                 goto err;
2586
2587         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2588                                                     &intel_sdvo->pixel_clock_min,
2589                                                     &intel_sdvo->pixel_clock_max))
2590                 goto err;
2591
2592         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2593                         "clock range %dMHz - %dMHz, "
2594                         "input 1: %c, input 2: %c, "
2595                         "output 1: %c, output 2: %c\n",
2596                         SDVO_NAME(intel_sdvo),
2597                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2598                         intel_sdvo->caps.device_rev_id,
2599                         intel_sdvo->pixel_clock_min / 1000,
2600                         intel_sdvo->pixel_clock_max / 1000,
2601                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2602                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2603                         /* check currently supported outputs */
2604                         intel_sdvo->caps.output_flags &
2605                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2606                         intel_sdvo->caps.output_flags &
2607                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2608         return true;
2609
2610 err:
2611         drm_encoder_cleanup(&intel_encoder->base);
2612         i2c_del_adapter(&intel_sdvo->ddc);
2613         kfree(intel_sdvo);
2614
2615         return false;
2616 }