drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * i830_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint8_t hotplug_active[2];
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129
 130         /**
 131          * This is set if we detect output of sdvo device as LVDS and
 132          * have a valid fixed mode to use with the panel.
 133          */
 134         bool is_lvds;
 135
 136         /**
 137          * This is sdvo fixed pannel mode pointer
 138          */
 139         struct drm_display_mode *sdvo_lvds_fixed_mode;
 140
 141         /* DDC bus used by this SDVO encoder */
 142         uint8_t ddc_bus;
 143
 144         /* Input timings for adjusted_mode */
 145         struct intel_sdvo_dtd input_dtd;
 146 };
 147
 148 struct intel_sdvo_connector {
 149         struct intel_connector base;
 150
 151         /* Mark the type of connector */
 152         uint16_t output_flag;
 153
 154         enum hdmi_force_audio force_audio;
 155
 156         /* This contains all current supported TV format */
 157         u8 tv_format_supported[TV_FORMAT_NUM];
 158         int   format_supported_num;
 159         struct drm_property *tv_format;
 160
 161         /* add the property for the SDVO-TV */
 162         struct drm_property *left;
 163         struct drm_property *right;
 164         struct drm_property *top;
 165         struct drm_property *bottom;
 166         struct drm_property *hpos;
 167         struct drm_property *vpos;
 168         struct drm_property *contrast;
 169         struct drm_property *saturation;
 170         struct drm_property *hue;
 171         struct drm_property *sharpness;
 172         struct drm_property *flicker_filter;
 173         struct drm_property *flicker_filter_adaptive;
 174         struct drm_property *flicker_filter_2d;
 175         struct drm_property *tv_chroma_filter;
 176         struct drm_property *tv_luma_filter;
 177         struct drm_property *dot_crawl;
 178
 179         /* add the property for the SDVO-TV/LVDS */
 180         struct drm_property *brightness;
 181
 182         /* Add variable to record current setting for the above property */
 183         u32     left_margin, right_margin, top_margin, bottom_margin;
 184
 185         /* this is to get the range of margin.*/
 186         u32     max_hscan,  max_vscan;
 187         u32     max_hpos, cur_hpos;
 188         u32     max_vpos, cur_vpos;
 189         u32     cur_brightness, max_brightness;
 190         u32     cur_contrast,   max_contrast;
 191         u32     cur_saturation, max_saturation;
 192         u32     cur_hue,        max_hue;
 193         u32     cur_sharpness,  max_sharpness;
 194         u32     cur_flicker_filter,             max_flicker_filter;
 195         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 196         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 197         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 198         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 199         u32     cur_dot_crawl,  max_dot_crawl;
 200 };
 201
 202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 203 {
 204         return container_of(encoder, struct intel_sdvo, base.base);
 205 }
 206
 207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 208 {
 209         return container_of(intel_attached_encoder(connector),
 210                             struct intel_sdvo, base);
 211 }
 212
 213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 214 {
 215         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 216 }
 217
 218 static bool
 219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 220 static bool
 221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 222                               struct intel_sdvo_connector *intel_sdvo_connector,
 223                               int type);
 224 static bool
 225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 226                                    struct intel_sdvo_connector *intel_sdvo_connector);
 227
 228 /**
 229  * Writes the SDVOB or SDVOC with the given value, but always writes both
 230  * SDVOB and SDVOC to work around apparent hardware issues (according to
 231  * comments in the BIOS).
 232  */
 233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 234 {
 235         struct drm_device *dev = intel_sdvo->base.base.dev;
 236         struct drm_i915_private *dev_priv = dev->dev_private;
 237         u32 bval = val, cval = val;
 238         int i;
 239
 240         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 241                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 242                 I915_READ(intel_sdvo->sdvo_reg);
 243                 return;
 244         }
 245
 246         if (intel_sdvo->sdvo_reg == SDVOB) {
 247                 cval = I915_READ(SDVOC);
 248         } else {
 249                 bval = I915_READ(SDVOB);
 250         }
 251         /*
 252          * Write the registers twice for luck. Sometimes,
 253          * writing them only once doesn't appear to 'stick'.
 254          * The BIOS does this too. Yay, magic
 255          */
 256         for (i = 0; i < 2; i++)
 257         {
 258                 I915_WRITE(SDVOB, bval);
 259                 I915_READ(SDVOB);
 260                 I915_WRITE(SDVOC, cval);
 261                 I915_READ(SDVOC);
 262         }
 263 }
 264
 265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 266 {
 267         struct i2c_msg msgs[] = {
 268                 {
 269                         .addr = intel_sdvo->slave_addr,
 270                         .flags = 0,
 271                         .len = 1,
 272                         .buf = &addr,
 273                 },
 274                 {
 275                         .addr = intel_sdvo->slave_addr,
 276                         .flags = I2C_M_RD,
 277                         .len = 1,
 278                         .buf = ch,
 279                 }
 280         };
 281         int ret;
 282
 283         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 284                 return true;
 285
 286         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 287         return false;
 288 }
 289
 290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 291 /** Mapping of command numbers to names, for debug output */
 292 static const struct _sdvo_cmd_name {
 293         u8 cmd;
 294         const char *name;
 295 } sdvo_cmd_names[] = {
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 339
 340         /* Add the op code for SDVO enhancements */
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 385
 386         /* HDMI op code */
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 407 };
 408
 409 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 410
 411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 412                                    const void *args, int args_len)
 413 {
 414         int i;
 415
 416         DRM_DEBUG_KMS("%s: W: %02X ",
 417                                 SDVO_NAME(intel_sdvo), cmd);
 418         for (i = 0; i < args_len; i++)
 419                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 420         for (; i < 8; i++)
 421                 DRM_LOG_KMS("   ");
 422         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 423                 if (cmd == sdvo_cmd_names[i].cmd) {
 424                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 425                         break;
 426                 }
 427         }
 428         if (i == ARRAY_SIZE(sdvo_cmd_names))
 429                 DRM_LOG_KMS("(%02X)", cmd);
 430         DRM_LOG_KMS("\n");
 431 }
 432
 433 static const char *cmd_status_names[] = {
 434         "Power on",
 435         "Success",
 436         "Not supported",
 437         "Invalid arg",
 438         "Pending",
 439         "Target not specified",
 440         "Scaling not supported"
 441 };
 442
 443 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 444                                  const void *args, int args_len)
 445 {
 446         u8 *buf, status;
 447         struct i2c_msg *msgs;
 448         int i, ret = true;
 449
 450         buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
 451         if (!buf)
 452                 return false;
 453
 454         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 455         if (!msgs)
 456                 return false;
 457
 458         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 459
 460         for (i = 0; i < args_len; i++) {
 461                 msgs[i].addr = intel_sdvo->slave_addr;
 462                 msgs[i].flags = 0;
 463                 msgs[i].len = 2;
 464                 msgs[i].buf = buf + 2 *i;
 465                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 466                 buf[2*i + 1] = ((u8*)args)[i];
 467         }
 468         msgs[i].addr = intel_sdvo->slave_addr;
 469         msgs[i].flags = 0;
 470         msgs[i].len = 2;
 471         msgs[i].buf = buf + 2*i;
 472         buf[2*i + 0] = SDVO_I2C_OPCODE;
 473         buf[2*i + 1] = cmd;
 474
 475         /* the following two are to read the response */
 476         status = SDVO_I2C_CMD_STATUS;
 477         msgs[i+1].addr = intel_sdvo->slave_addr;
 478         msgs[i+1].flags = 0;
 479         msgs[i+1].len = 1;
 480         msgs[i+1].buf = &status;
 481
 482         msgs[i+2].addr = intel_sdvo->slave_addr;
 483         msgs[i+2].flags = I2C_M_RD;
 484         msgs[i+2].len = 1;
 485         msgs[i+2].buf = &status;
 486
 487         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 488         if (ret < 0) {
 489                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 490                 ret = false;
 491                 goto out;
 492         }
 493         if (ret != i+3) {
 494                 /* failure in I2C transfer */
 495                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 496                 ret = false;
 497         }
 498
 499 out:
 500         kfree(msgs);
 501         kfree(buf);
 502         return ret;
 503 }
 504
 505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 506                                      void *response, int response_len)
 507 {
 508         u8 retry = 5;
 509         u8 status;
 510         int i;
 511
 512         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 513
 514         /*
 515          * The documentation states that all commands will be
 516          * processed within 15µs, and that we need only poll
 517          * the status byte a maximum of 3 times in order for the
 518          * command to be complete.
 519          *
 520          * Check 5 times in case the hardware failed to read the docs.
 521          */
 522         if (!intel_sdvo_read_byte(intel_sdvo,
 523                                   SDVO_I2C_CMD_STATUS,
 524                                   &status))
 525                 goto log_fail;
 526
 527         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
 528                 udelay(15);
 529                 if (!intel_sdvo_read_byte(intel_sdvo,
 530                                           SDVO_I2C_CMD_STATUS,
 531                                           &status))
 532                         goto log_fail;
 533         }
 534
 535         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 536                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 537         else
 538                 DRM_LOG_KMS("(??? %d)", status);
 539
 540         if (status != SDVO_CMD_STATUS_SUCCESS)
 541                 goto log_fail;
 542
 543         /* Read the command response */
 544         for (i = 0; i < response_len; i++) {
 545                 if (!intel_sdvo_read_byte(intel_sdvo,
 546                                           SDVO_I2C_RETURN_0 + i,
 547                                           &((u8 *)response)[i]))
 548                         goto log_fail;
 549                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 550         }
 551         DRM_LOG_KMS("\n");
 552         return true;
 553
 554 log_fail:
 555         DRM_LOG_KMS("... failed\n");
 556         return false;
 557 }
 558
 559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 560 {
 561         if (mode->clock >= 100000)
 562                 return 1;
 563         else if (mode->clock >= 50000)
 564                 return 2;
 565         else
 566                 return 4;
 567 }
 568
 569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 570                                               u8 ddc_bus)
 571 {
 572         /* This must be the immediately preceding write before the i2c xfer */
 573         return intel_sdvo_write_cmd(intel_sdvo,
 574                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 575                                     &ddc_bus, 1);
 576 }
 577
 578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 579 {
 580         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 581                 return false;
 582
 583         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 584 }
 585
 586 static bool
 587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 588 {
 589         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 590                 return false;
 591
 592         return intel_sdvo_read_response(intel_sdvo, value, len);
 593 }
 594
 595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 596 {
 597         struct intel_sdvo_set_target_input_args targets = {0};
 598         return intel_sdvo_set_value(intel_sdvo,
 599                                     SDVO_CMD_SET_TARGET_INPUT,
 600                                     &targets, sizeof(targets));
 601 }
 602
 603 /**
 604  * Return whether each input is trained.
 605  *
 606  * This function is making an assumption about the layout of the response,
 607  * which should be checked against the docs.
 608  */
 609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 610 {
 611         struct intel_sdvo_get_trained_inputs_response response;
 612
 613         BUILD_BUG_ON(sizeof(response) != 1);
 614         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 615                                   &response, sizeof(response)))
 616                 return false;
 617
 618         *input_1 = response.input0_trained;
 619         *input_2 = response.input1_trained;
 620         return true;
 621 }
 622
 623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 624                                           u16 outputs)
 625 {
 626         return intel_sdvo_set_value(intel_sdvo,
 627                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 628                                     &outputs, sizeof(outputs));
 629 }
 630
 631 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 632                                                int mode)
 633 {
 634         u8 state = SDVO_ENCODER_STATE_ON;
 635
 636         switch (mode) {
 637         case DRM_MODE_DPMS_ON:
 638                 state = SDVO_ENCODER_STATE_ON;
 639                 break;
 640         case DRM_MODE_DPMS_STANDBY:
 641                 state = SDVO_ENCODER_STATE_STANDBY;
 642                 break;
 643         case DRM_MODE_DPMS_SUSPEND:
 644                 state = SDVO_ENCODER_STATE_SUSPEND;
 645                 break;
 646         case DRM_MODE_DPMS_OFF:
 647                 state = SDVO_ENCODER_STATE_OFF;
 648                 break;
 649         }
 650
 651         return intel_sdvo_set_value(intel_sdvo,
 652                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 653 }
 654
 655 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 656                                                    int *clock_min,
 657                                                    int *clock_max)
 658 {
 659         struct intel_sdvo_pixel_clock_range clocks;
 660
 661         BUILD_BUG_ON(sizeof(clocks) != 4);
 662         if (!intel_sdvo_get_value(intel_sdvo,
 663                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 664                                   &clocks, sizeof(clocks)))
 665                 return false;
 666
 667         /* Convert the values from units of 10 kHz to kHz. */
 668         *clock_min = clocks.min * 10;
 669         *clock_max = clocks.max * 10;
 670         return true;
 671 }
 672
 673 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 674                                          u16 outputs)
 675 {
 676         return intel_sdvo_set_value(intel_sdvo,
 677                                     SDVO_CMD_SET_TARGET_OUTPUT,
 678                                     &outputs, sizeof(outputs));
 679 }
 680
 681 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 682                                   struct intel_sdvo_dtd *dtd)
 683 {
 684         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 685                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 686 }
 687
 688 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 689                                          struct intel_sdvo_dtd *dtd)
 690 {
 691         return intel_sdvo_set_timing(intel_sdvo,
 692                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 693 }
 694
 695 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 696                                          struct intel_sdvo_dtd *dtd)
 697 {
 698         return intel_sdvo_set_timing(intel_sdvo,
 699                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 700 }
 701
 702 static bool
 703 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 704                                          uint16_t clock,
 705                                          uint16_t width,
 706                                          uint16_t height)
 707 {
 708         struct intel_sdvo_preferred_input_timing_args args;
 709
 710         memset(&args, 0, sizeof(args));
 711         args.clock = clock;
 712         args.width = width;
 713         args.height = height;
 714         args.interlace = 0;
 715
 716         if (intel_sdvo->is_lvds &&
 717            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 718             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 719                 args.scaled = 1;
 720
 721         return intel_sdvo_set_value(intel_sdvo,
 722                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 723                                     &args, sizeof(args));
 724 }
 725
 726 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 727                                                   struct intel_sdvo_dtd *dtd)
 728 {
 729         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 730         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 731         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 732                                     &dtd->part1, sizeof(dtd->part1)) &&
 733                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 734                                      &dtd->part2, sizeof(dtd->part2));
 735 }
 736
 737 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 738 {
 739         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 740 }
 741
 742 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 743                                          const struct drm_display_mode *mode)
 744 {
 745         uint16_t width, height;
 746         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 747         uint16_t h_sync_offset, v_sync_offset;
 748         int mode_clock;
 749
 750         width = mode->hdisplay;
 751         height = mode->vdisplay;
 752
 753         /* do some mode translations */
 754         h_blank_len = mode->htotal - mode->hdisplay;
 755         h_sync_len = mode->hsync_end - mode->hsync_start;
 756
 757         v_blank_len = mode->vtotal - mode->vdisplay;
 758         v_sync_len = mode->vsync_end - mode->vsync_start;
 759
 760         h_sync_offset = mode->hsync_start - mode->hdisplay;
 761         v_sync_offset = mode->vsync_start - mode->vdisplay;
 762
 763         mode_clock = mode->clock;
 764         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
 765         mode_clock /= 10;
 766         dtd->part1.clock = mode_clock;
 767
 768         dtd->part1.h_active = width & 0xff;
 769         dtd->part1.h_blank = h_blank_len & 0xff;
 770         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 771                 ((h_blank_len >> 8) & 0xf);
 772         dtd->part1.v_active = height & 0xff;
 773         dtd->part1.v_blank = v_blank_len & 0xff;
 774         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 775                 ((v_blank_len >> 8) & 0xf);
 776
 777         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 778         dtd->part2.h_sync_width = h_sync_len & 0xff;
 779         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 780                 (v_sync_len & 0xf);
 781         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 782                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 783                 ((v_sync_len & 0x30) >> 4);
 784
 785         dtd->part2.dtd_flags = 0x18;
 786         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 787                 dtd->part2.dtd_flags |= 0x2;
 788         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 789                 dtd->part2.dtd_flags |= 0x4;
 790
 791         dtd->part2.sdvo_flags = 0;
 792         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 793         dtd->part2.reserved = 0;
 794 }
 795
 796 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 797                                          const struct intel_sdvo_dtd *dtd)
 798 {
 799         mode->hdisplay = dtd->part1.h_active;
 800         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 801         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 802         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 803         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 804         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 805         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 806         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 807
 808         mode->vdisplay = dtd->part1.v_active;
 809         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 810         mode->vsync_start = mode->vdisplay;
 811         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 812         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 813         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 814         mode->vsync_end = mode->vsync_start +
 815                 (dtd->part2.v_sync_off_width & 0xf);
 816         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 817         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 818         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 819
 820         mode->clock = dtd->part1.clock * 10;
 821
 822         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 823         if (dtd->part2.dtd_flags & 0x2)
 824                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 825         if (dtd->part2.dtd_flags & 0x4)
 826                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 827 }
 828
 829 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 830 {
 831         struct intel_sdvo_encode encode;
 832
 833         BUILD_BUG_ON(sizeof(encode) != 2);
 834         return intel_sdvo_get_value(intel_sdvo,
 835                                   SDVO_CMD_GET_SUPP_ENCODE,
 836                                   &encode, sizeof(encode));
 837 }
 838
 839 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 840                                   uint8_t mode)
 841 {
 842         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 843 }
 844
 845 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 846                                        uint8_t mode)
 847 {
 848         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 849 }
 850
 851 #if 0
 852 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 853 {
 854         int i, j;
 855         uint8_t set_buf_index[2];
 856         uint8_t av_split;
 857         uint8_t buf_size;
 858         uint8_t buf[48];
 859         uint8_t *pos;
 860
 861         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 862
 863         for (i = 0; i <= av_split; i++) {
 864                 set_buf_index[0] = i; set_buf_index[1] = 0;
 865                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 866                                      set_buf_index, 2);
 867                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 868                 intel_sdvo_read_response(encoder, &buf_size, 1);
 869
 870                 pos = buf;
 871                 for (j = 0; j <= buf_size; j += 8) {
 872                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 873                                              NULL, 0);
 874                         intel_sdvo_read_response(encoder, pos, 8);
 875                         pos += 8;
 876                 }
 877         }
 878 }
 879 #endif
 880
 881 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 882 {
 883         struct dip_infoframe avi_if = {
 884                 .type = DIP_TYPE_AVI,
 885                 .ver = DIP_VERSION_AVI,
 886                 .len = DIP_LEN_AVI,
 887         };
 888         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 889         uint8_t set_buf_index[2] = { 1, 0 };
 890         uint64_t *data = (uint64_t *)&avi_if;
 891         unsigned i;
 892
 893         intel_dip_infoframe_csum(&avi_if);
 894
 895         if (!intel_sdvo_set_value(intel_sdvo,
 896                                   SDVO_CMD_SET_HBUF_INDEX,
 897                                   set_buf_index, 2))
 898                 return false;
 899
 900         for (i = 0; i < sizeof(avi_if); i += 8) {
 901                 if (!intel_sdvo_set_value(intel_sdvo,
 902                                           SDVO_CMD_SET_HBUF_DATA,
 903                                           data, 8))
 904                         return false;
 905                 data++;
 906         }
 907
 908         return intel_sdvo_set_value(intel_sdvo,
 909                                     SDVO_CMD_SET_HBUF_TXRATE,
 910                                     &tx_rate, 1);
 911 }
 912
 913 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 914 {
 915         struct intel_sdvo_tv_format format;
 916         uint32_t format_map;
 917
 918         format_map = 1 << intel_sdvo->tv_format_index;
 919         memset(&format, 0, sizeof(format));
 920         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 921
 922         BUILD_BUG_ON(sizeof(format) != 6);
 923         return intel_sdvo_set_value(intel_sdvo,
 924                                     SDVO_CMD_SET_TV_FORMAT,
 925                                     &format, sizeof(format));
 926 }
 927
 928 static bool
 929 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 930                                         struct drm_display_mode *mode)
 931 {
 932         struct intel_sdvo_dtd output_dtd;
 933
 934         if (!intel_sdvo_set_target_output(intel_sdvo,
 935                                           intel_sdvo->attached_output))
 936                 return false;
 937
 938         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 939         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 940                 return false;
 941
 942         return true;
 943 }
 944
 945 static bool
 946 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
 947                                         struct drm_display_mode *mode,
 948                                         struct drm_display_mode *adjusted_mode)
 949 {
 950         /* Reset the input timing to the screen. Assume always input 0. */
 951         if (!intel_sdvo_set_target_input(intel_sdvo))
 952                 return false;
 953
 954         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
 955                                                       mode->clock / 10,
 956                                                       mode->hdisplay,
 957                                                       mode->vdisplay))
 958                 return false;
 959
 960         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
 961                                                    &intel_sdvo->input_dtd))
 962                 return false;
 963
 964         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
 965
 966         return true;
 967 }
 968
 969 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 970                                   struct drm_display_mode *mode,
 971                                   struct drm_display_mode *adjusted_mode)
 972 {
 973         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 974         int multiplier;
 975
 976         /* We need to construct preferred input timings based on our
 977          * output timings.  To do that, we have to set the output
 978          * timings, even though this isn't really the right place in
 979          * the sequence to do it. Oh well.
 980          */
 981         if (intel_sdvo->is_tv) {
 982                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
 983                         return false;
 984
 985                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 986                                                              mode,
 987                                                              adjusted_mode);
 988         } else if (intel_sdvo->is_lvds) {
 989                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
 990                                                              intel_sdvo->sdvo_lvds_fixed_mode))
 991                         return false;
 992
 993                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 994                                                              mode,
 995                                                              adjusted_mode);
 996         }
 997
 998         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 999          * SDVO device will factor out the multiplier during mode_set.
1000          */
1001         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1002         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1003
1004         return true;
1005 }
1006
1007 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1008                                 struct drm_display_mode *mode,
1009                                 struct drm_display_mode *adjusted_mode)
1010 {
1011         struct drm_device *dev = encoder->dev;
1012         struct drm_i915_private *dev_priv = dev->dev_private;
1013         struct drm_crtc *crtc = encoder->crtc;
1014         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1015         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1016         u32 sdvox;
1017         struct intel_sdvo_in_out_map in_out;
1018         struct intel_sdvo_dtd input_dtd, output_dtd;
1019         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1020         int rate;
1021
1022         if (!mode)
1023                 return;
1024
1025         /* First, set the input mapping for the first input to our controlled
1026          * output. This is only correct if we're a single-input device, in
1027          * which case the first input is the output from the appropriate SDVO
1028          * channel on the motherboard.  In a two-input device, the first input
1029          * will be SDVOB and the second SDVOC.
1030          */
1031         in_out.in0 = intel_sdvo->attached_output;
1032         in_out.in1 = 0;
1033
1034         intel_sdvo_set_value(intel_sdvo,
1035                              SDVO_CMD_SET_IN_OUT_MAP,
1036                              &in_out, sizeof(in_out));
1037
1038         /* Set the output timings to the screen */
1039         if (!intel_sdvo_set_target_output(intel_sdvo,
1040                                           intel_sdvo->attached_output))
1041                 return;
1042
1043         /* lvds has a special fixed output timing. */
1044         if (intel_sdvo->is_lvds)
1045                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1046                                              intel_sdvo->sdvo_lvds_fixed_mode);
1047         else
1048                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1049         (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1050
1051         /* Set the input timing to the screen. Assume always input 0. */
1052         if (!intel_sdvo_set_target_input(intel_sdvo))
1053                 return;
1054
1055         if (intel_sdvo->has_hdmi_monitor) {
1056                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1057                 intel_sdvo_set_colorimetry(intel_sdvo,
1058                                            SDVO_COLORIMETRY_RGB256);
1059                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1060         } else
1061                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1062
1063         if (intel_sdvo->is_tv &&
1064             !intel_sdvo_set_tv_format(intel_sdvo))
1065                 return;
1066
1067         /* We have tried to get input timing in mode_fixup, and filled into
1068          * adjusted_mode.
1069          */
1070         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1071         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1072
1073         switch (pixel_multiplier) {
1074         default:
1075         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1076         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1077         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1078         }
1079         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1080                 return;
1081
1082         /* Set the SDVO control regs. */
1083         if (INTEL_INFO(dev)->gen >= 4) {
1084                 /* The real mode polarity is set by the SDVO commands, using
1085                  * struct intel_sdvo_dtd. */
1086                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1087                 if (intel_sdvo->is_hdmi)
1088                         sdvox |= intel_sdvo->color_range;
1089                 if (INTEL_INFO(dev)->gen < 5)
1090                         sdvox |= SDVO_BORDER_ENABLE;
1091         } else {
1092                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1093                 switch (intel_sdvo->sdvo_reg) {
1094                 case SDVOB:
1095                         sdvox &= SDVOB_PRESERVE_MASK;
1096                         break;
1097                 case SDVOC:
1098                         sdvox &= SDVOC_PRESERVE_MASK;
1099                         break;
1100                 }
1101                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1102         }
1103
1104         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1105                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1106         else
1107                 sdvox |= TRANSCODER(intel_crtc->pipe);
1108
1109         if (intel_sdvo->has_hdmi_audio)
1110                 sdvox |= SDVO_AUDIO_ENABLE;
1111
1112         if (INTEL_INFO(dev)->gen >= 4) {
1113                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1114         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1115                 /* done in crtc_mode_set as it lives inside the dpll register */
1116         } else {
1117                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1118         }
1119
1120         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1121             INTEL_INFO(dev)->gen < 5)
1122                 sdvox |= SDVO_STALL_SELECT;
1123         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1124 }
1125
1126 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1127 {
1128         struct drm_device *dev = encoder->dev;
1129         struct drm_i915_private *dev_priv = dev->dev_private;
1130         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1131         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1132         u32 temp;
1133
1134         if (mode != DRM_MODE_DPMS_ON) {
1135                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1136                 if (0)
1137                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1138
1139                 if (mode == DRM_MODE_DPMS_OFF) {
1140                         temp = I915_READ(intel_sdvo->sdvo_reg);
1141                         if ((temp & SDVO_ENABLE) != 0) {
1142                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1143                         }
1144                 }
1145         } else {
1146                 bool input1, input2;
1147                 int i;
1148                 u8 status;
1149
1150                 temp = I915_READ(intel_sdvo->sdvo_reg);
1151                 if ((temp & SDVO_ENABLE) == 0)
1152                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1153                 for (i = 0; i < 2; i++)
1154                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1155
1156                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1157                 /* Warn if the device reported failure to sync.
1158                  * A lot of SDVO devices fail to notify of sync, but it's
1159                  * a given it the status is a success, we succeeded.
1160                  */
1161                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1162                         DRM_DEBUG_KMS("First %s output reported failure to "
1163                                         "sync\n", SDVO_NAME(intel_sdvo));
1164                 }
1165
1166                 if (0)
1167                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1168                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1169         }
1170         return;
1171 }
1172
1173 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1174                                  struct drm_display_mode *mode)
1175 {
1176         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1177
1178         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1179                 return MODE_NO_DBLESCAN;
1180
1181         if (intel_sdvo->pixel_clock_min > mode->clock)
1182                 return MODE_CLOCK_LOW;
1183
1184         if (intel_sdvo->pixel_clock_max < mode->clock)
1185                 return MODE_CLOCK_HIGH;
1186
1187         if (intel_sdvo->is_lvds) {
1188                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1189                         return MODE_PANEL;
1190
1191                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1192                         return MODE_PANEL;
1193         }
1194
1195         return MODE_OK;
1196 }
1197
1198 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1199 {
1200         BUILD_BUG_ON(sizeof(*caps) != 8);
1201         if (!intel_sdvo_get_value(intel_sdvo,
1202                                   SDVO_CMD_GET_DEVICE_CAPS,
1203                                   caps, sizeof(*caps)))
1204                 return false;
1205
1206         DRM_DEBUG_KMS("SDVO capabilities:\n"
1207                       "  vendor_id: %d\n"
1208                       "  device_id: %d\n"
1209                       "  device_rev_id: %d\n"
1210                       "  sdvo_version_major: %d\n"
1211                       "  sdvo_version_minor: %d\n"
1212                       "  sdvo_inputs_mask: %d\n"
1213                       "  smooth_scaling: %d\n"
1214                       "  sharp_scaling: %d\n"
1215                       "  up_scaling: %d\n"
1216                       "  down_scaling: %d\n"
1217                       "  stall_support: %d\n"
1218                       "  output_flags: %d\n",
1219                       caps->vendor_id,
1220                       caps->device_id,
1221                       caps->device_rev_id,
1222                       caps->sdvo_version_major,
1223                       caps->sdvo_version_minor,
1224                       caps->sdvo_inputs_mask,
1225                       caps->smooth_scaling,
1226                       caps->sharp_scaling,
1227                       caps->up_scaling,
1228                       caps->down_scaling,
1229                       caps->stall_support,
1230                       caps->output_flags);
1231
1232         return true;
1233 }
1234
1235 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1236 {
1237         u8 response[2];
1238
1239         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1240                                     &response, 2) && response[0];
1241 }
1242
1243 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1244 {
1245         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1246
1247         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1248 }
1249
1250 static bool
1251 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1252 {
1253         /* Is there more than one type of output? */
1254         return hweight16(intel_sdvo->caps.output_flags) > 1;
1255 }
1256
1257 static struct edid *
1258 intel_sdvo_get_edid(struct drm_connector *connector)
1259 {
1260         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1261         return drm_get_edid(connector, &sdvo->ddc);
1262 }
1263
1264 /* Mac mini hack -- use the same DDC as the analog connector */
1265 static struct edid *
1266 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1267 {
1268         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1269
1270         return drm_get_edid(connector,
1271                             intel_gmbus_get_adapter(dev_priv,
1272                                                     dev_priv->crt_ddc_pin));
1273 }
1274
1275 static enum drm_connector_status
1276 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1277 {
1278         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1279         enum drm_connector_status status;
1280         struct edid *edid;
1281
1282         edid = intel_sdvo_get_edid(connector);
1283
1284         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1285                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1286
1287                 /*
1288                  * Don't use the 1 as the argument of DDC bus switch to get
1289                  * the EDID. It is used for SDVO SPD ROM.
1290                  */
1291                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1292                         intel_sdvo->ddc_bus = ddc;
1293                         edid = intel_sdvo_get_edid(connector);
1294                         if (edid)
1295                                 break;
1296                 }
1297                 /*
1298                  * If we found the EDID on the other bus,
1299                  * assume that is the correct DDC bus.
1300                  */
1301                 if (edid == NULL)
1302                         intel_sdvo->ddc_bus = saved_ddc;
1303         }
1304
1305         /*
1306          * When there is no edid and no monitor is connected with VGA
1307          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1308          */
1309         if (edid == NULL)
1310                 edid = intel_sdvo_get_analog_edid(connector);
1311
1312         status = connector_status_unknown;
1313         if (edid != NULL) {
1314                 /* DDC bus is shared, match EDID to connector type */
1315                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1316                         status = connector_status_connected;
1317                         if (intel_sdvo->is_hdmi) {
1318                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1319                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1320                         }
1321                 } else
1322                         status = connector_status_disconnected;
1323                 connector->display_info.raw_edid = NULL;
1324                 kfree(edid);
1325         }
1326
1327         if (status == connector_status_connected) {
1328                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1329                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1330                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1331         }
1332
1333         return status;
1334 }
1335
1336 static bool
1337 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1338                                   struct edid *edid)
1339 {
1340         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1341         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1342
1343         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1344                       connector_is_digital, monitor_is_digital);
1345         return connector_is_digital == monitor_is_digital;
1346 }
1347
1348 static enum drm_connector_status
1349 intel_sdvo_detect(struct drm_connector *connector, bool force)
1350 {
1351         uint16_t response;
1352         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1353         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1354         enum drm_connector_status ret;
1355
1356         if (!intel_sdvo_write_cmd(intel_sdvo,
1357                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1358                 return connector_status_unknown;
1359
1360         /* add 30ms delay when the output type might be TV */
1361         if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1362                 mdelay(30);
1363
1364         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1365                 return connector_status_unknown;
1366
1367         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1368                       response & 0xff, response >> 8,
1369                       intel_sdvo_connector->output_flag);
1370
1371         if (response == 0)
1372                 return connector_status_disconnected;
1373
1374         intel_sdvo->attached_output = response;
1375
1376         intel_sdvo->has_hdmi_monitor = false;
1377         intel_sdvo->has_hdmi_audio = false;
1378
1379         if ((intel_sdvo_connector->output_flag & response) == 0)
1380                 ret = connector_status_disconnected;
1381         else if (IS_TMDS(intel_sdvo_connector))
1382                 ret = intel_sdvo_tmds_sink_detect(connector);
1383         else {
1384                 struct edid *edid;
1385
1386                 /* if we have an edid check it matches the connection */
1387                 edid = intel_sdvo_get_edid(connector);
1388                 if (edid == NULL)
1389                         edid = intel_sdvo_get_analog_edid(connector);
1390                 if (edid != NULL) {
1391                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1392                                                               edid))
1393                                 ret = connector_status_connected;
1394                         else
1395                                 ret = connector_status_disconnected;
1396
1397                         connector->display_info.raw_edid = NULL;
1398                         kfree(edid);
1399                 } else
1400                         ret = connector_status_connected;
1401         }
1402
1403         /* May update encoder flag for like clock for SDVO TV, etc.*/
1404         if (ret == connector_status_connected) {
1405                 intel_sdvo->is_tv = false;
1406                 intel_sdvo->is_lvds = false;
1407                 intel_sdvo->base.needs_tv_clock = false;
1408
1409                 if (response & SDVO_TV_MASK) {
1410                         intel_sdvo->is_tv = true;
1411                         intel_sdvo->base.needs_tv_clock = true;
1412                 }
1413                 if (response & SDVO_LVDS_MASK)
1414                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1415         }
1416
1417         return ret;
1418 }
1419
1420 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1421 {
1422         struct edid *edid;
1423
1424         /* set the bus switch and get the modes */
1425         edid = intel_sdvo_get_edid(connector);
1426
1427         /*
1428          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1429          * link between analog and digital outputs. So, if the regular SDVO
1430          * DDC fails, check to see if the analog output is disconnected, in
1431          * which case we'll look there for the digital DDC data.
1432          */
1433         if (edid == NULL)
1434                 edid = intel_sdvo_get_analog_edid(connector);
1435
1436         if (edid != NULL) {
1437                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1438                                                       edid)) {
1439                         drm_mode_connector_update_edid_property(connector, edid);
1440                         drm_add_edid_modes(connector, edid);
1441                 }
1442
1443                 connector->display_info.raw_edid = NULL;
1444                 kfree(edid);
1445         }
1446 }
1447
1448 /*
1449  * Set of SDVO TV modes.
1450  * Note!  This is in reply order (see loop in get_tv_modes).
1451  * XXX: all 60Hz refresh?
1452  */
1453 static const struct drm_display_mode sdvo_tv_modes[] = {
1454         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1455                    416, 0, 200, 201, 232, 233, 0,
1456                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1457         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1458                    416, 0, 240, 241, 272, 273, 0,
1459                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1460         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1461                    496, 0, 300, 301, 332, 333, 0,
1462                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1463         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1464                    736, 0, 350, 351, 382, 383, 0,
1465                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1467                    736, 0, 400, 401, 432, 433, 0,
1468                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1470                    736, 0, 480, 481, 512, 513, 0,
1471                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1473                    800, 0, 480, 481, 512, 513, 0,
1474                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1476                    800, 0, 576, 577, 608, 609, 0,
1477                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1479                    816, 0, 350, 351, 382, 383, 0,
1480                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1482                    816, 0, 400, 401, 432, 433, 0,
1483                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1485                    816, 0, 480, 481, 512, 513, 0,
1486                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1488                    816, 0, 540, 541, 572, 573, 0,
1489                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1491                    816, 0, 576, 577, 608, 609, 0,
1492                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1494                    864, 0, 576, 577, 608, 609, 0,
1495                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1497                    896, 0, 600, 601, 632, 633, 0,
1498                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1500                    928, 0, 624, 625, 656, 657, 0,
1501                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1503                    1016, 0, 766, 767, 798, 799, 0,
1504                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1506                    1120, 0, 768, 769, 800, 801, 0,
1507                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1509                    1376, 0, 1024, 1025, 1056, 1057, 0,
1510                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511 };
1512
1513 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1514 {
1515         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1516         struct intel_sdvo_sdtv_resolution_request tv_res;
1517         uint32_t reply = 0, format_map = 0;
1518         int i;
1519
1520         /* Read the list of supported input resolutions for the selected TV
1521          * format.
1522          */
1523         format_map = 1 << intel_sdvo->tv_format_index;
1524         memcpy(&tv_res, &format_map,
1525                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1526
1527         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1528                 return;
1529
1530         BUILD_BUG_ON(sizeof(tv_res) != 3);
1531         if (!intel_sdvo_write_cmd(intel_sdvo,
1532                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1533                                   &tv_res, sizeof(tv_res)))
1534                 return;
1535         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1536                 return;
1537
1538         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1539                 if (reply & (1 << i)) {
1540                         struct drm_display_mode *nmode;
1541                         nmode = drm_mode_duplicate(connector->dev,
1542                                                    &sdvo_tv_modes[i]);
1543                         if (nmode)
1544                                 drm_mode_probed_add(connector, nmode);
1545                 }
1546 }
1547
1548 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1549 {
1550         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1551         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1552         struct drm_display_mode *newmode;
1553
1554         /*
1555          * Attempt to get the mode list from DDC.
1556          * Assume that the preferred modes are
1557          * arranged in priority order.
1558          */
1559         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1560         if (list_empty(&connector->probed_modes) == false)
1561                 goto end;
1562
1563         /* Fetch modes from VBT */
1564         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1565                 newmode = drm_mode_duplicate(connector->dev,
1566                                              dev_priv->sdvo_lvds_vbt_mode);
1567                 if (newmode != NULL) {
1568                         /* Guarantee the mode is preferred */
1569                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1570                                          DRM_MODE_TYPE_DRIVER);
1571                         drm_mode_probed_add(connector, newmode);
1572                 }
1573         }
1574
1575 end:
1576         list_for_each_entry(newmode, &connector->probed_modes, head) {
1577                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1578                         intel_sdvo->sdvo_lvds_fixed_mode =
1579                                 drm_mode_duplicate(connector->dev, newmode);
1580
1581                         intel_sdvo->is_lvds = true;
1582                         break;
1583                 }
1584         }
1585
1586 }
1587
1588 static int intel_sdvo_get_modes(struct drm_connector *connector)
1589 {
1590         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1591
1592         if (IS_TV(intel_sdvo_connector))
1593                 intel_sdvo_get_tv_modes(connector);
1594         else if (IS_LVDS(intel_sdvo_connector))
1595                 intel_sdvo_get_lvds_modes(connector);
1596         else
1597                 intel_sdvo_get_ddc_modes(connector);
1598
1599         return !list_empty(&connector->probed_modes);
1600 }
1601
1602 static void
1603 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1604 {
1605         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1606         struct drm_device *dev = connector->dev;
1607
1608         if (intel_sdvo_connector->left)
1609                 drm_property_destroy(dev, intel_sdvo_connector->left);
1610         if (intel_sdvo_connector->right)
1611                 drm_property_destroy(dev, intel_sdvo_connector->right);
1612         if (intel_sdvo_connector->top)
1613                 drm_property_destroy(dev, intel_sdvo_connector->top);
1614         if (intel_sdvo_connector->bottom)
1615                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1616         if (intel_sdvo_connector->hpos)
1617                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1618         if (intel_sdvo_connector->vpos)
1619                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1620         if (intel_sdvo_connector->saturation)
1621                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1622         if (intel_sdvo_connector->contrast)
1623                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1624         if (intel_sdvo_connector->hue)
1625                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1626         if (intel_sdvo_connector->sharpness)
1627                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1628         if (intel_sdvo_connector->flicker_filter)
1629                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1630         if (intel_sdvo_connector->flicker_filter_2d)
1631                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1632         if (intel_sdvo_connector->flicker_filter_adaptive)
1633                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1634         if (intel_sdvo_connector->tv_luma_filter)
1635                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1636         if (intel_sdvo_connector->tv_chroma_filter)
1637                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1638         if (intel_sdvo_connector->dot_crawl)
1639                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1640         if (intel_sdvo_connector->brightness)
1641                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1642 }
1643
1644 static void intel_sdvo_destroy(struct drm_connector *connector)
1645 {
1646         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1647
1648         if (intel_sdvo_connector->tv_format)
1649                 drm_property_destroy(connector->dev,
1650                                      intel_sdvo_connector->tv_format);
1651
1652         intel_sdvo_destroy_enhance_property(connector);
1653         drm_sysfs_connector_remove(connector);
1654         drm_connector_cleanup(connector);
1655         kfree(connector);
1656 }
1657
1658 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1659 {
1660         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1661         struct edid *edid;
1662         bool has_audio = false;
1663
1664         if (!intel_sdvo->is_hdmi)
1665                 return false;
1666
1667         edid = intel_sdvo_get_edid(connector);
1668         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1669                 has_audio = drm_detect_monitor_audio(edid);
1670
1671         return has_audio;
1672 }
1673
1674 static int
1675 intel_sdvo_set_property(struct drm_connector *connector,
1676                         struct drm_property *property,
1677                         uint64_t val)
1678 {
1679         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1680         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1681         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1682         uint16_t temp_value;
1683         uint8_t cmd;
1684         int ret;
1685
1686         ret = drm_connector_property_set_value(connector, property, val);
1687         if (ret)
1688                 return ret;
1689
1690         if (property == dev_priv->force_audio_property) {
1691                 int i = val;
1692                 bool has_audio;
1693
1694                 if (i == intel_sdvo_connector->force_audio)
1695                         return 0;
1696
1697                 intel_sdvo_connector->force_audio = i;
1698
1699                 if (i == HDMI_AUDIO_AUTO)
1700                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1701                 else
1702                         has_audio = (i == HDMI_AUDIO_ON);
1703
1704                 if (has_audio == intel_sdvo->has_hdmi_audio)
1705                         return 0;
1706
1707                 intel_sdvo->has_hdmi_audio = has_audio;
1708                 goto done;
1709         }
1710
1711         if (property == dev_priv->broadcast_rgb_property) {
1712                 if (val == !!intel_sdvo->color_range)
1713                         return 0;
1714
1715                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1716                 goto done;
1717         }
1718
1719 #define CHECK_PROPERTY(name, NAME) \
1720         if (intel_sdvo_connector->name == property) { \
1721                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1722                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1723                 cmd = SDVO_CMD_SET_##NAME; \
1724                 intel_sdvo_connector->cur_##name = temp_value; \
1725                 goto set_value; \
1726         }
1727
1728         if (property == intel_sdvo_connector->tv_format) {
1729                 if (val >= TV_FORMAT_NUM)
1730                         return -EINVAL;
1731
1732                 if (intel_sdvo->tv_format_index ==
1733                     intel_sdvo_connector->tv_format_supported[val])
1734                         return 0;
1735
1736                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1737                 goto done;
1738         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1739                 temp_value = val;
1740                 if (intel_sdvo_connector->left == property) {
1741                         drm_connector_property_set_value(connector,
1742                                                          intel_sdvo_connector->right, val);
1743                         if (intel_sdvo_connector->left_margin == temp_value)
1744                                 return 0;
1745
1746                         intel_sdvo_connector->left_margin = temp_value;
1747                         intel_sdvo_connector->right_margin = temp_value;
1748                         temp_value = intel_sdvo_connector->max_hscan -
1749                                 intel_sdvo_connector->left_margin;
1750                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1751                         goto set_value;
1752                 } else if (intel_sdvo_connector->right == property) {
1753                         drm_connector_property_set_value(connector,
1754                                                          intel_sdvo_connector->left, val);
1755                         if (intel_sdvo_connector->right_margin == temp_value)
1756                                 return 0;
1757
1758                         intel_sdvo_connector->left_margin = temp_value;
1759                         intel_sdvo_connector->right_margin = temp_value;
1760                         temp_value = intel_sdvo_connector->max_hscan -
1761                                 intel_sdvo_connector->left_margin;
1762                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1763                         goto set_value;
1764                 } else if (intel_sdvo_connector->top == property) {
1765                         drm_connector_property_set_value(connector,
1766                                                          intel_sdvo_connector->bottom, val);
1767                         if (intel_sdvo_connector->top_margin == temp_value)
1768                                 return 0;
1769
1770                         intel_sdvo_connector->top_margin = temp_value;
1771                         intel_sdvo_connector->bottom_margin = temp_value;
1772                         temp_value = intel_sdvo_connector->max_vscan -
1773                                 intel_sdvo_connector->top_margin;
1774                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1775                         goto set_value;
1776                 } else if (intel_sdvo_connector->bottom == property) {
1777                         drm_connector_property_set_value(connector,
1778                                                          intel_sdvo_connector->top, val);
1779                         if (intel_sdvo_connector->bottom_margin == temp_value)
1780                                 return 0;
1781
1782                         intel_sdvo_connector->top_margin = temp_value;
1783                         intel_sdvo_connector->bottom_margin = temp_value;
1784                         temp_value = intel_sdvo_connector->max_vscan -
1785                                 intel_sdvo_connector->top_margin;
1786                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1787                         goto set_value;
1788                 }
1789                 CHECK_PROPERTY(hpos, HPOS)
1790                 CHECK_PROPERTY(vpos, VPOS)
1791                 CHECK_PROPERTY(saturation, SATURATION)
1792                 CHECK_PROPERTY(contrast, CONTRAST)
1793                 CHECK_PROPERTY(hue, HUE)
1794                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1795                 CHECK_PROPERTY(sharpness, SHARPNESS)
1796                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1797                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1798                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1799                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1800                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1801                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1802         }
1803
1804         return -EINVAL; /* unknown property */
1805
1806 set_value:
1807         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1808                 return -EIO;
1809
1810
1811 done:
1812         if (intel_sdvo->base.base.crtc) {
1813                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1814                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1815                                          crtc->y, crtc->fb);
1816         }
1817
1818         return 0;
1819 #undef CHECK_PROPERTY
1820 }
1821
1822 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1823         .dpms = intel_sdvo_dpms,
1824         .mode_fixup = intel_sdvo_mode_fixup,
1825         .prepare = intel_encoder_prepare,
1826         .mode_set = intel_sdvo_mode_set,
1827         .commit = intel_encoder_commit,
1828 };
1829
1830 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1831         .dpms = drm_helper_connector_dpms,
1832         .detect = intel_sdvo_detect,
1833         .fill_modes = drm_helper_probe_single_connector_modes,
1834         .set_property = intel_sdvo_set_property,
1835         .destroy = intel_sdvo_destroy,
1836 };
1837
1838 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1839         .get_modes = intel_sdvo_get_modes,
1840         .mode_valid = intel_sdvo_mode_valid,
1841         .best_encoder = intel_best_encoder,
1842 };
1843
1844 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1845 {
1846         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1847
1848         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1849                 drm_mode_destroy(encoder->dev,
1850                                  intel_sdvo->sdvo_lvds_fixed_mode);
1851
1852         i2c_del_adapter(&intel_sdvo->ddc);
1853         intel_encoder_destroy(encoder);
1854 }
1855
1856 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1857         .destroy = intel_sdvo_enc_destroy,
1858 };
1859
1860 static void
1861 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1862 {
1863         uint16_t mask = 0;
1864         unsigned int num_bits;
1865
1866         /* Make a mask of outputs less than or equal to our own priority in the
1867          * list.
1868          */
1869         switch (sdvo->controlled_output) {
1870         case SDVO_OUTPUT_LVDS1:
1871                 mask |= SDVO_OUTPUT_LVDS1;
1872         case SDVO_OUTPUT_LVDS0:
1873                 mask |= SDVO_OUTPUT_LVDS0;
1874         case SDVO_OUTPUT_TMDS1:
1875                 mask |= SDVO_OUTPUT_TMDS1;
1876         case SDVO_OUTPUT_TMDS0:
1877                 mask |= SDVO_OUTPUT_TMDS0;
1878         case SDVO_OUTPUT_RGB1:
1879                 mask |= SDVO_OUTPUT_RGB1;
1880         case SDVO_OUTPUT_RGB0:
1881                 mask |= SDVO_OUTPUT_RGB0;
1882                 break;
1883         }
1884
1885         /* Count bits to find what number we are in the priority list. */
1886         mask &= sdvo->caps.output_flags;
1887         num_bits = hweight16(mask);
1888         /* If more than 3 outputs, default to DDC bus 3 for now. */
1889         if (num_bits > 3)
1890                 num_bits = 3;
1891
1892         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1893         sdvo->ddc_bus = 1 << num_bits;
1894 }
1895
1896 /**
1897  * Choose the appropriate DDC bus for control bus switch command for this
1898  * SDVO output based on the controlled output.
1899  *
1900  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1901  * outputs, then LVDS outputs.
1902  */
1903 static void
1904 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1905                           struct intel_sdvo *sdvo, u32 reg)
1906 {
1907         struct sdvo_device_mapping *mapping;
1908
1909         if (sdvo->is_sdvob)
1910                 mapping = &(dev_priv->sdvo_mappings[0]);
1911         else
1912                 mapping = &(dev_priv->sdvo_mappings[1]);
1913
1914         if (mapping->initialized)
1915                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1916         else
1917                 intel_sdvo_guess_ddc_bus(sdvo);
1918 }
1919
1920 static void
1921 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1922                           struct intel_sdvo *sdvo, u32 reg)
1923 {
1924         struct sdvo_device_mapping *mapping;
1925         u8 pin;
1926
1927         if (sdvo->is_sdvob)
1928                 mapping = &dev_priv->sdvo_mappings[0];
1929         else
1930                 mapping = &dev_priv->sdvo_mappings[1];
1931
1932         pin = GMBUS_PORT_DPB;
1933         if (mapping->initialized)
1934                 pin = mapping->i2c_pin;
1935
1936         if (intel_gmbus_is_port_valid(pin)) {
1937                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1938                 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1939                 intel_gmbus_force_bit(sdvo->i2c, true);
1940         } else {
1941                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1942         }
1943 }
1944
1945 static bool
1946 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1947 {
1948         return intel_sdvo_check_supp_encode(intel_sdvo);
1949 }
1950
1951 static u8
1952 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1953 {
1954         struct drm_i915_private *dev_priv = dev->dev_private;
1955         struct sdvo_device_mapping *my_mapping, *other_mapping;
1956
1957         if (sdvo->is_sdvob) {
1958                 my_mapping = &dev_priv->sdvo_mappings[0];
1959                 other_mapping = &dev_priv->sdvo_mappings[1];
1960         } else {
1961                 my_mapping = &dev_priv->sdvo_mappings[1];
1962                 other_mapping = &dev_priv->sdvo_mappings[0];
1963         }
1964
1965         /* If the BIOS described our SDVO device, take advantage of it. */
1966         if (my_mapping->slave_addr)
1967                 return my_mapping->slave_addr;
1968
1969         /* If the BIOS only described a different SDVO device, use the
1970          * address that it isn't using.
1971          */
1972         if (other_mapping->slave_addr) {
1973                 if (other_mapping->slave_addr == 0x70)
1974                         return 0x72;
1975                 else
1976                         return 0x70;
1977         }
1978
1979         /* No SDVO device info is found for another DVO port,
1980          * so use mapping assumption we had before BIOS parsing.
1981          */
1982         if (sdvo->is_sdvob)
1983                 return 0x70;
1984         else
1985                 return 0x72;
1986 }
1987
1988 static void
1989 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1990                           struct intel_sdvo *encoder)
1991 {
1992         drm_connector_init(encoder->base.base.dev,
1993                            &connector->base.base,
1994                            &intel_sdvo_connector_funcs,
1995                            connector->base.base.connector_type);
1996
1997         drm_connector_helper_add(&connector->base.base,
1998                                  &intel_sdvo_connector_helper_funcs);
1999
2000         connector->base.base.interlace_allowed = 1;
2001         connector->base.base.doublescan_allowed = 0;
2002         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2003
2004         intel_connector_attach_encoder(&connector->base, &encoder->base);
2005         drm_sysfs_connector_add(&connector->base.base);
2006 }
2007
2008 static void
2009 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2010 {
2011         struct drm_device *dev = connector->base.base.dev;
2012
2013         intel_attach_force_audio_property(&connector->base.base);
2014         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2015                 intel_attach_broadcast_rgb_property(&connector->base.base);
2016 }
2017
2018 static bool
2019 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2020 {
2021         struct drm_encoder *encoder = &intel_sdvo->base.base;
2022         struct drm_connector *connector;
2023         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2024         struct intel_connector *intel_connector;
2025         struct intel_sdvo_connector *intel_sdvo_connector;
2026
2027         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2028         if (!intel_sdvo_connector)
2029                 return false;
2030
2031         if (device == 0) {
2032                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2033                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2034         } else if (device == 1) {
2035                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2036                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2037         }
2038
2039         intel_connector = &intel_sdvo_connector->base;
2040         connector = &intel_connector->base;
2041         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2042                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2043                 intel_sdvo->hotplug_active[0] |= 1 << device;
2044                 /* Some SDVO devices have one-shot hotplug interrupts.
2045                  * Ensure that they get re-enabled when an interrupt happens.
2046                  */
2047                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2048                 intel_sdvo_enable_hotplug(intel_encoder);
2049         }
2050         else
2051                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2052         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2053         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2054
2055         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2056                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2057                 intel_sdvo->is_hdmi = true;
2058         }
2059         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2060                                        (1 << INTEL_ANALOG_CLONE_BIT));
2061
2062         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2063         if (intel_sdvo->is_hdmi)
2064                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2065
2066         return true;
2067 }
2068
2069 static bool
2070 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2071 {
2072         struct drm_encoder *encoder = &intel_sdvo->base.base;
2073         struct drm_connector *connector;
2074         struct intel_connector *intel_connector;
2075         struct intel_sdvo_connector *intel_sdvo_connector;
2076
2077         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2078         if (!intel_sdvo_connector)
2079                 return false;
2080
2081         intel_connector = &intel_sdvo_connector->base;
2082         connector = &intel_connector->base;
2083         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2084         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2085
2086         intel_sdvo->controlled_output |= type;
2087         intel_sdvo_connector->output_flag = type;
2088
2089         intel_sdvo->is_tv = true;
2090         intel_sdvo->base.needs_tv_clock = true;
2091         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2092
2093         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2094
2095         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2096                 goto err;
2097
2098         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2099                 goto err;
2100
2101         return true;
2102
2103 err:
2104         intel_sdvo_destroy(connector);
2105         return false;
2106 }
2107
2108 static bool
2109 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2110 {
2111         struct drm_encoder *encoder = &intel_sdvo->base.base;
2112         struct drm_connector *connector;
2113         struct intel_connector *intel_connector;
2114         struct intel_sdvo_connector *intel_sdvo_connector;
2115
2116         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2117         if (!intel_sdvo_connector)
2118                 return false;
2119
2120         intel_connector = &intel_sdvo_connector->base;
2121         connector = &intel_connector->base;
2122         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2123         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2124         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2125
2126         if (device == 0) {
2127                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2128                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2129         } else if (device == 1) {
2130                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2131                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2132         }
2133
2134         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2135                                        (1 << INTEL_ANALOG_CLONE_BIT));
2136
2137         intel_sdvo_connector_init(intel_sdvo_connector,
2138                                   intel_sdvo);
2139         return true;
2140 }
2141
2142 static bool
2143 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2144 {
2145         struct drm_encoder *encoder = &intel_sdvo->base.base;
2146         struct drm_connector *connector;
2147         struct intel_connector *intel_connector;
2148         struct intel_sdvo_connector *intel_sdvo_connector;
2149
2150         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2151         if (!intel_sdvo_connector)
2152                 return false;
2153
2154         intel_connector = &intel_sdvo_connector->base;
2155         connector = &intel_connector->base;
2156         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2157         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2158
2159         if (device == 0) {
2160                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2161                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2162         } else if (device == 1) {
2163                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2164                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2165         }
2166
2167         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2168                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2169
2170         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2171         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2172                 goto err;
2173
2174         return true;
2175
2176 err:
2177         intel_sdvo_destroy(connector);
2178         return false;
2179 }
2180
2181 static bool
2182 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2183 {
2184         intel_sdvo->is_tv = false;
2185         intel_sdvo->base.needs_tv_clock = false;
2186         intel_sdvo->is_lvds = false;
2187
2188         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2189
2190         if (flags & SDVO_OUTPUT_TMDS0)
2191                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2192                         return false;
2193
2194         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2195                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2196                         return false;
2197
2198         /* TV has no XXX1 function block */
2199         if (flags & SDVO_OUTPUT_SVID0)
2200                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2201                         return false;
2202
2203         if (flags & SDVO_OUTPUT_CVBS0)
2204                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2205                         return false;
2206
2207         if (flags & SDVO_OUTPUT_YPRPB0)
2208                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2209                         return false;
2210
2211         if (flags & SDVO_OUTPUT_RGB0)
2212                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2213                         return false;
2214
2215         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2216                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2217                         return false;
2218
2219         if (flags & SDVO_OUTPUT_LVDS0)
2220                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2221                         return false;
2222
2223         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2224                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2225                         return false;
2226
2227         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2228                 unsigned char bytes[2];
2229
2230                 intel_sdvo->controlled_output = 0;
2231                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2232                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2233                               SDVO_NAME(intel_sdvo),
2234                               bytes[0], bytes[1]);
2235                 return false;
2236         }
2237         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2238
2239         return true;
2240 }
2241
2242 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2243                                           struct intel_sdvo_connector *intel_sdvo_connector,
2244                                           int type)
2245 {
2246         struct drm_device *dev = intel_sdvo->base.base.dev;
2247         struct intel_sdvo_tv_format format;
2248         uint32_t format_map, i;
2249
2250         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2251                 return false;
2252
2253         BUILD_BUG_ON(sizeof(format) != 6);
2254         if (!intel_sdvo_get_value(intel_sdvo,
2255                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2256                                   &format, sizeof(format)))
2257                 return false;
2258
2259         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2260
2261         if (format_map == 0)
2262                 return false;
2263
2264         intel_sdvo_connector->format_supported_num = 0;
2265         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2266                 if (format_map & (1 << i))
2267                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2268
2269
2270         intel_sdvo_connector->tv_format =
2271                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2272                                             "mode", intel_sdvo_connector->format_supported_num);
2273         if (!intel_sdvo_connector->tv_format)
2274                 return false;
2275
2276         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2277                 drm_property_add_enum(
2278                                 intel_sdvo_connector->tv_format, i,
2279                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2280
2281         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2282         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2283                                       intel_sdvo_connector->tv_format, 0);
2284         return true;
2285
2286 }
2287
2288 #define ENHANCEMENT(name, NAME) do { \
2289         if (enhancements.name) { \
2290                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2291                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2292                         return false; \
2293                 intel_sdvo_connector->max_##name = data_value[0]; \
2294                 intel_sdvo_connector->cur_##name = response; \
2295                 intel_sdvo_connector->name = \
2296                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2297                 if (!intel_sdvo_connector->name) return false; \
2298                 drm_connector_attach_property(connector, \
2299                                               intel_sdvo_connector->name, \
2300                                               intel_sdvo_connector->cur_##name); \
2301                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2302                               data_value[0], data_value[1], response); \
2303         } \
2304 } while (0)
2305
2306 static bool
2307 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2308                                       struct intel_sdvo_connector *intel_sdvo_connector,
2309                                       struct intel_sdvo_enhancements_reply enhancements)
2310 {
2311         struct drm_device *dev = intel_sdvo->base.base.dev;
2312         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2313         uint16_t response, data_value[2];
2314
2315         /* when horizontal overscan is supported, Add the left/right  property */
2316         if (enhancements.overscan_h) {
2317                 if (!intel_sdvo_get_value(intel_sdvo,
2318                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2319                                           &data_value, 4))
2320                         return false;
2321
2322                 if (!intel_sdvo_get_value(intel_sdvo,
2323                                           SDVO_CMD_GET_OVERSCAN_H,
2324                                           &response, 2))
2325                         return false;
2326
2327                 intel_sdvo_connector->max_hscan = data_value[0];
2328                 intel_sdvo_connector->left_margin = data_value[0] - response;
2329                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2330                 intel_sdvo_connector->left =
2331                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2332                 if (!intel_sdvo_connector->left)
2333                         return false;
2334
2335                 drm_connector_attach_property(connector,
2336                                               intel_sdvo_connector->left,
2337                                               intel_sdvo_connector->left_margin);
2338
2339                 intel_sdvo_connector->right =
2340                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2341                 if (!intel_sdvo_connector->right)
2342                         return false;
2343
2344                 drm_connector_attach_property(connector,
2345                                               intel_sdvo_connector->right,
2346                                               intel_sdvo_connector->right_margin);
2347                 DRM_DEBUG_KMS("h_overscan: max %d, "
2348                               "default %d, current %d\n",
2349                               data_value[0], data_value[1], response);
2350         }
2351
2352         if (enhancements.overscan_v) {
2353                 if (!intel_sdvo_get_value(intel_sdvo,
2354                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2355                                           &data_value, 4))
2356                         return false;
2357
2358                 if (!intel_sdvo_get_value(intel_sdvo,
2359                                           SDVO_CMD_GET_OVERSCAN_V,
2360                                           &response, 2))
2361                         return false;
2362
2363                 intel_sdvo_connector->max_vscan = data_value[0];
2364                 intel_sdvo_connector->top_margin = data_value[0] - response;
2365                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2366                 intel_sdvo_connector->top =
2367                         drm_property_create_range(dev, 0,
2368                                             "top_margin", 0, data_value[0]);
2369                 if (!intel_sdvo_connector->top)
2370                         return false;
2371
2372                 drm_connector_attach_property(connector,
2373                                               intel_sdvo_connector->top,
2374                                               intel_sdvo_connector->top_margin);
2375
2376                 intel_sdvo_connector->bottom =
2377                         drm_property_create_range(dev, 0,
2378                                             "bottom_margin", 0, data_value[0]);
2379                 if (!intel_sdvo_connector->bottom)
2380                         return false;
2381
2382                 drm_connector_attach_property(connector,
2383                                               intel_sdvo_connector->bottom,
2384                                               intel_sdvo_connector->bottom_margin);
2385                 DRM_DEBUG_KMS("v_overscan: max %d, "
2386                               "default %d, current %d\n",
2387                               data_value[0], data_value[1], response);
2388         }
2389
2390         ENHANCEMENT(hpos, HPOS);
2391         ENHANCEMENT(vpos, VPOS);
2392         ENHANCEMENT(saturation, SATURATION);
2393         ENHANCEMENT(contrast, CONTRAST);
2394         ENHANCEMENT(hue, HUE);
2395         ENHANCEMENT(sharpness, SHARPNESS);
2396         ENHANCEMENT(brightness, BRIGHTNESS);
2397         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2398         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2399         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2400         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2401         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2402
2403         if (enhancements.dot_crawl) {
2404                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2405                         return false;
2406
2407                 intel_sdvo_connector->max_dot_crawl = 1;
2408                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2409                 intel_sdvo_connector->dot_crawl =
2410                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2411                 if (!intel_sdvo_connector->dot_crawl)
2412                         return false;
2413
2414                 drm_connector_attach_property(connector,
2415                                               intel_sdvo_connector->dot_crawl,
2416                                               intel_sdvo_connector->cur_dot_crawl);
2417                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2418         }
2419
2420         return true;
2421 }
2422
2423 static bool
2424 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2425                                         struct intel_sdvo_connector *intel_sdvo_connector,
2426                                         struct intel_sdvo_enhancements_reply enhancements)
2427 {
2428         struct drm_device *dev = intel_sdvo->base.base.dev;
2429         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2430         uint16_t response, data_value[2];
2431
2432         ENHANCEMENT(brightness, BRIGHTNESS);
2433
2434         return true;
2435 }
2436 #undef ENHANCEMENT
2437
2438 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2439                                                struct intel_sdvo_connector *intel_sdvo_connector)
2440 {
2441         union {
2442                 struct intel_sdvo_enhancements_reply reply;
2443                 uint16_t response;
2444         } enhancements;
2445
2446         BUILD_BUG_ON(sizeof(enhancements) != 2);
2447
2448         enhancements.response = 0;
2449         intel_sdvo_get_value(intel_sdvo,
2450                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2451                              &enhancements, sizeof(enhancements));
2452         if (enhancements.response == 0) {
2453                 DRM_DEBUG_KMS("No enhancement is supported\n");
2454                 return true;
2455         }
2456
2457         if (IS_TV(intel_sdvo_connector))
2458                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2459         else if (IS_LVDS(intel_sdvo_connector))
2460                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2461         else
2462                 return true;
2463 }
2464
2465 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2466                                      struct i2c_msg *msgs,
2467                                      int num)
2468 {
2469         struct intel_sdvo *sdvo = adapter->algo_data;
2470
2471         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2472                 return -EIO;
2473
2474         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2475 }
2476
2477 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2478 {
2479         struct intel_sdvo *sdvo = adapter->algo_data;
2480         return sdvo->i2c->algo->functionality(sdvo->i2c);
2481 }
2482
2483 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2484         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2485         .functionality  = intel_sdvo_ddc_proxy_func
2486 };
2487
2488 static bool
2489 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2490                           struct drm_device *dev)
2491 {
2492         sdvo->ddc.owner = THIS_MODULE;
2493         sdvo->ddc.class = I2C_CLASS_DDC;
2494         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2495         sdvo->ddc.dev.parent = &dev->pdev->dev;
2496         sdvo->ddc.algo_data = sdvo;
2497         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2498
2499         return i2c_add_adapter(&sdvo->ddc) == 0;
2500 }
2501
2502 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2503 {
2504         struct drm_i915_private *dev_priv = dev->dev_private;
2505         struct intel_encoder *intel_encoder;
2506         struct intel_sdvo *intel_sdvo;
2507         int i;
2508
2509         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2510         if (!intel_sdvo)
2511                 return false;
2512
2513         intel_sdvo->sdvo_reg = sdvo_reg;
2514         intel_sdvo->is_sdvob = is_sdvob;
2515         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2516         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2517         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2518                 kfree(intel_sdvo);
2519                 return false;
2520         }
2521
2522         /* encoder type will be decided later */
2523         intel_encoder = &intel_sdvo->base;
2524         intel_encoder->type = INTEL_OUTPUT_SDVO;
2525         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2526
2527         /* Read the regs to test if we can talk to the device */
2528         for (i = 0; i < 0x40; i++) {
2529                 u8 byte;
2530
2531                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2532                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2533                                       SDVO_NAME(intel_sdvo));
2534                         goto err;
2535                 }
2536         }
2537
2538         if (intel_sdvo->is_sdvob)
2539                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2540         else
2541                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2542
2543         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2544
2545         /* In default case sdvo lvds is false */
2546         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2547                 goto err;
2548
2549         /* Set up hotplug command - note paranoia about contents of reply.
2550          * We assume that the hardware is in a sane state, and only touch
2551          * the bits we think we understand.
2552          */
2553         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2554                              &intel_sdvo->hotplug_active, 2);
2555         intel_sdvo->hotplug_active[0] &= ~0x3;
2556
2557         if (intel_sdvo_output_setup(intel_sdvo,
2558                                     intel_sdvo->caps.output_flags) != true) {
2559                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2560                               SDVO_NAME(intel_sdvo));
2561                 goto err;
2562         }
2563
2564         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2565
2566         /* Set the input timing to the screen. Assume always input 0. */
2567         if (!intel_sdvo_set_target_input(intel_sdvo))
2568                 goto err;
2569
2570         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2571                                                     &intel_sdvo->pixel_clock_min,
2572                                                     &intel_sdvo->pixel_clock_max))
2573                 goto err;
2574
2575         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2576                         "clock range %dMHz - %dMHz, "
2577                         "input 1: %c, input 2: %c, "
2578                         "output 1: %c, output 2: %c\n",
2579                         SDVO_NAME(intel_sdvo),
2580                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2581                         intel_sdvo->caps.device_rev_id,
2582                         intel_sdvo->pixel_clock_min / 1000,
2583                         intel_sdvo->pixel_clock_max / 1000,
2584                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2585                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2586                         /* check currently supported outputs */
2587                         intel_sdvo->caps.output_flags &
2588                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2589                         intel_sdvo->caps.output_flags &
2590                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2591         return true;
2592
2593 err:
2594         drm_encoder_cleanup(&intel_encoder->base);
2595         i2c_del_adapter(&intel_sdvo->ddc);
2596         kfree(intel_sdvo);
2597
2598         return false;
2599 }