drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         u32 pfit_control;
  53         u32 pfit_pgm_ratios;
  54         bool pfit_dirty;
  55         bool is_dual_link;
  56         u32 reg;
  57
  58         struct intel_lvds_connector *attached_connector;
  59 };
  60
  61 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_lvds_encoder, base.base);
  64 }
  65
  66 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  67 {
  68         return container_of(connector, struct intel_lvds_connector, base.base);
  69 }
  70
  71 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  72                                     enum pipe *pipe)
  73 {
  74         struct drm_device *dev = encoder->base.dev;
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  77         u32 tmp;
  78
  79         tmp = I915_READ(lvds_encoder->reg);
  80
  81         if (!(tmp & LVDS_PORT_EN))
  82                 return false;
  83
  84         if (HAS_PCH_CPT(dev))
  85                 *pipe = PORT_TO_PIPE_CPT(tmp);
  86         else
  87                 *pipe = PORT_TO_PIPE(tmp);
  88
  89         return true;
  90 }
  91
  92 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  93  * This is an exception to the general rule that mode_set doesn't turn
  94  * things on.
  95  */
  96 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  97 {
  98         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  99         struct drm_device *dev = encoder->base.dev;
 100         struct drm_i915_private *dev_priv = dev->dev_private;
 101         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 102         struct drm_display_mode *fixed_mode =
 103                 lvds_encoder->attached_connector->base.panel.fixed_mode;
 104         int pipe = intel_crtc->pipe;
 105         u32 temp;
 106
 107         temp = I915_READ(lvds_encoder->reg);
 108         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 109
 110         if (HAS_PCH_CPT(dev)) {
 111                 temp &= ~PORT_TRANS_SEL_MASK;
 112                 temp |= PORT_TRANS_SEL_CPT(pipe);
 113         } else {
 114                 if (pipe == 1) {
 115                         temp |= LVDS_PIPEB_SELECT;
 116                 } else {
 117                         temp &= ~LVDS_PIPEB_SELECT;
 118                 }
 119         }
 120
 121         /* set the corresponsding LVDS_BORDER bit */
 122         temp |= dev_priv->lvds_border_bits;
 123         /* Set the B0-B3 data pairs corresponding to whether we're going to
 124          * set the DPLLs for dual-channel mode or not.
 125          */
 126         if (lvds_encoder->is_dual_link)
 127                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 128         else
 129                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 130
 131         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 132          * appropriately here, but we need to look more thoroughly into how
 133          * panels behave in the two modes.
 134          */
 135
 136         /* Set the dithering flag on LVDS as needed, note that there is no
 137          * special lvds dither control bit on pch-split platforms, dithering is
 138          * only controlled through the PIPECONF reg. */
 139         if (INTEL_INFO(dev)->gen == 4) {
 140                 if (dev_priv->lvds_dither)
 141                         temp |= LVDS_ENABLE_DITHER;
 142                 else
 143                         temp &= ~LVDS_ENABLE_DITHER;
 144         }
 145         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 146         if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
 147                 temp |= LVDS_HSYNC_POLARITY;
 148         if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
 149                 temp |= LVDS_VSYNC_POLARITY;
 150
 151         I915_WRITE(lvds_encoder->reg, temp);
 152 }
 153
 154 /**
 155  * Sets the power state for the panel.
 156  */
 157 static void intel_enable_lvds(struct intel_encoder *encoder)
 158 {
 159         struct drm_device *dev = encoder->base.dev;
 160         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 161         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 162         struct drm_i915_private *dev_priv = dev->dev_private;
 163         u32 ctl_reg, stat_reg;
 164
 165         if (HAS_PCH_SPLIT(dev)) {
 166                 ctl_reg = PCH_PP_CONTROL;
 167                 stat_reg = PCH_PP_STATUS;
 168         } else {
 169                 ctl_reg = PP_CONTROL;
 170                 stat_reg = PP_STATUS;
 171         }
 172
 173         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 174
 175         if (lvds_encoder->pfit_dirty) {
 176                 /*
 177                  * Enable automatic panel scaling so that non-native modes
 178                  * fill the screen.  The panel fitter should only be
 179                  * adjusted whilst the pipe is disabled, according to
 180                  * register description and PRM.
 181                  */
 182                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
 183                               lvds_encoder->pfit_control,
 184                               lvds_encoder->pfit_pgm_ratios);
 185
 186                 I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
 187                 I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
 188                 lvds_encoder->pfit_dirty = false;
 189         }
 190
 191         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 192         POSTING_READ(lvds_encoder->reg);
 193         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 194                 DRM_ERROR("timed out waiting for panel to power on\n");
 195
 196         intel_panel_enable_backlight(dev, intel_crtc->pipe);
 197 }
 198
 199 static void intel_disable_lvds(struct intel_encoder *encoder)
 200 {
 201         struct drm_device *dev = encoder->base.dev;
 202         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 203         struct drm_i915_private *dev_priv = dev->dev_private;
 204         u32 ctl_reg, stat_reg;
 205
 206         if (HAS_PCH_SPLIT(dev)) {
 207                 ctl_reg = PCH_PP_CONTROL;
 208                 stat_reg = PCH_PP_STATUS;
 209         } else {
 210                 ctl_reg = PP_CONTROL;
 211                 stat_reg = PP_STATUS;
 212         }
 213
 214         intel_panel_disable_backlight(dev);
 215
 216         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 217         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 218                 DRM_ERROR("timed out waiting for panel to power off\n");
 219
 220         if (lvds_encoder->pfit_control) {
 221                 I915_WRITE(PFIT_CONTROL, 0);
 222                 lvds_encoder->pfit_dirty = true;
 223         }
 224
 225         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 226         POSTING_READ(lvds_encoder->reg);
 227 }
 228
 229 static int intel_lvds_mode_valid(struct drm_connector *connector,
 230                                  struct drm_display_mode *mode)
 231 {
 232         struct intel_connector *intel_connector = to_intel_connector(connector);
 233         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 234
 235         if (mode->hdisplay > fixed_mode->hdisplay)
 236                 return MODE_PANEL;
 237         if (mode->vdisplay > fixed_mode->vdisplay)
 238                 return MODE_PANEL;
 239
 240         return MODE_OK;
 241 }
 242
 243 static void
 244 centre_horizontally(struct drm_display_mode *mode,
 245                     int width)
 246 {
 247         u32 border, sync_pos, blank_width, sync_width;
 248
 249         /* keep the hsync and hblank widths constant */
 250         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 251         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 252         sync_pos = (blank_width - sync_width + 1) / 2;
 253
 254         border = (mode->hdisplay - width + 1) / 2;
 255         border += border & 1; /* make the border even */
 256
 257         mode->crtc_hdisplay = width;
 258         mode->crtc_hblank_start = width + border;
 259         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 260
 261         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 262         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 263
 264         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 265 }
 266
 267 static void
 268 centre_vertically(struct drm_display_mode *mode,
 269                   int height)
 270 {
 271         u32 border, sync_pos, blank_width, sync_width;
 272
 273         /* keep the vsync and vblank widths constant */
 274         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 275         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 276         sync_pos = (blank_width - sync_width + 1) / 2;
 277
 278         border = (mode->vdisplay - height + 1) / 2;
 279
 280         mode->crtc_vdisplay = height;
 281         mode->crtc_vblank_start = height + border;
 282         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 283
 284         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 285         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 286
 287         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 288 }
 289
 290 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 291 {
 292         /*
 293          * Floating point operation is not supported. So the FACTOR
 294          * is defined, which can avoid the floating point computation
 295          * when calculating the panel ratio.
 296          */
 297 #define ACCURACY 12
 298 #define FACTOR (1 << ACCURACY)
 299         u32 ratio = source * FACTOR / target;
 300         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 301 }
 302
 303 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 304                                   const struct drm_display_mode *mode,
 305                                   struct drm_display_mode *adjusted_mode)
 306 {
 307         struct drm_device *dev = encoder->dev;
 308         struct drm_i915_private *dev_priv = dev->dev_private;
 309         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
 310         struct intel_connector *intel_connector =
 311                 &lvds_encoder->attached_connector->base;
 312         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 313         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 314         int pipe;
 315
 316         /* Should never happen!! */
 317         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 318                 DRM_ERROR("Can't support LVDS on pipe A\n");
 319                 return false;
 320         }
 321
 322         if (intel_encoder_check_is_cloned(&lvds_encoder->base))
 323                 return false;
 324
 325         /*
 326          * We have timings from the BIOS for the panel, put them in
 327          * to the adjusted mode.  The CRTC will be set up for this mode,
 328          * with the panel scaling set up to source from the H/VDisplay
 329          * of the original mode.
 330          */
 331         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 332                                adjusted_mode);
 333
 334         if (HAS_PCH_SPLIT(dev)) {
 335                 intel_pch_panel_fitting(dev,
 336                                         intel_connector->panel.fitting_mode,
 337                                         mode, adjusted_mode);
 338                 return true;
 339         }
 340
 341         /* Native modes don't need fitting */
 342         if (adjusted_mode->hdisplay == mode->hdisplay &&
 343             adjusted_mode->vdisplay == mode->vdisplay)
 344                 goto out;
 345
 346         /* 965+ wants fuzzy fitting */
 347         if (INTEL_INFO(dev)->gen >= 4)
 348                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 349                                  PFIT_FILTER_FUZZY);
 350
 351         /*
 352          * Enable automatic panel scaling for non-native modes so that they fill
 353          * the screen.  Should be enabled before the pipe is enabled, according
 354          * to register description and PRM.
 355          * Change the value here to see the borders for debugging
 356          */
 357         for_each_pipe(pipe)
 358                 I915_WRITE(BCLRPAT(pipe), 0);
 359
 360         drm_mode_set_crtcinfo(adjusted_mode, 0);
 361
 362         switch (intel_connector->panel.fitting_mode) {
 363         case DRM_MODE_SCALE_CENTER:
 364                 /*
 365                  * For centered modes, we have to calculate border widths &
 366                  * heights and modify the values programmed into the CRTC.
 367                  */
 368                 centre_horizontally(adjusted_mode, mode->hdisplay);
 369                 centre_vertically(adjusted_mode, mode->vdisplay);
 370                 border = LVDS_BORDER_ENABLE;
 371                 break;
 372
 373         case DRM_MODE_SCALE_ASPECT:
 374                 /* Scale but preserve the aspect ratio */
 375                 if (INTEL_INFO(dev)->gen >= 4) {
 376                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 377                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 378
 379                         /* 965+ is easy, it does everything in hw */
 380                         if (scaled_width > scaled_height)
 381                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 382                         else if (scaled_width < scaled_height)
 383                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 384                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 385                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 386                 } else {
 387                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 388                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 389                         /*
 390                          * For earlier chips we have to calculate the scaling
 391                          * ratio by hand and program it into the
 392                          * PFIT_PGM_RATIO register
 393                          */
 394                         if (scaled_width > scaled_height) { /* pillar */
 395                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 396
 397                                 border = LVDS_BORDER_ENABLE;
 398                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 399                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 400                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 401                                                             bits << PFIT_VERT_SCALE_SHIFT);
 402                                         pfit_control |= (PFIT_ENABLE |
 403                                                          VERT_INTERP_BILINEAR |
 404                                                          HORIZ_INTERP_BILINEAR);
 405                                 }
 406                         } else if (scaled_width < scaled_height) { /* letter */
 407                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 408
 409                                 border = LVDS_BORDER_ENABLE;
 410                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 411                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 412                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 413                                                             bits << PFIT_VERT_SCALE_SHIFT);
 414                                         pfit_control |= (PFIT_ENABLE |
 415                                                          VERT_INTERP_BILINEAR |
 416                                                          HORIZ_INTERP_BILINEAR);
 417                                 }
 418                         } else
 419                                 /* Aspects match, Let hw scale both directions */
 420                                 pfit_control |= (PFIT_ENABLE |
 421                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 422                                                  VERT_INTERP_BILINEAR |
 423                                                  HORIZ_INTERP_BILINEAR);
 424                 }
 425                 break;
 426
 427         case DRM_MODE_SCALE_FULLSCREEN:
 428                 /*
 429                  * Full scaling, even if it changes the aspect ratio.
 430                  * Fortunately this is all done for us in hw.
 431                  */
 432                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 433                     mode->hdisplay != adjusted_mode->hdisplay) {
 434                         pfit_control |= PFIT_ENABLE;
 435                         if (INTEL_INFO(dev)->gen >= 4)
 436                                 pfit_control |= PFIT_SCALING_AUTO;
 437                         else
 438                                 pfit_control |= (VERT_AUTO_SCALE |
 439                                                  VERT_INTERP_BILINEAR |
 440                                                  HORIZ_AUTO_SCALE |
 441                                                  HORIZ_INTERP_BILINEAR);
 442                 }
 443                 break;
 444
 445         default:
 446                 break;
 447         }
 448
 449 out:
 450         /* If not enabling scaling, be consistent and always use 0. */
 451         if ((pfit_control & PFIT_ENABLE) == 0) {
 452                 pfit_control = 0;
 453                 pfit_pgm_ratios = 0;
 454         }
 455
 456         /* Make sure pre-965 set dither correctly */
 457         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 458                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 459
 460         if (pfit_control != lvds_encoder->pfit_control ||
 461             pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
 462                 lvds_encoder->pfit_control = pfit_control;
 463                 lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
 464                 lvds_encoder->pfit_dirty = true;
 465         }
 466         dev_priv->lvds_border_bits = border;
 467
 468         /*
 469          * XXX: It would be nice to support lower refresh rates on the
 470          * panels to reduce power consumption, and perhaps match the
 471          * user's requested refresh rate.
 472          */
 473
 474         return true;
 475 }
 476
 477 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 478                                 struct drm_display_mode *mode,
 479                                 struct drm_display_mode *adjusted_mode)
 480 {
 481         /*
 482          * The LVDS pin pair will already have been turned on in the
 483          * intel_crtc_mode_set since it has a large impact on the DPLL
 484          * settings.
 485          */
 486 }
 487
 488 /**
 489  * Detect the LVDS connection.
 490  *
 491  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 492  * connected and closed means disconnected.  We also send hotplug events as
 493  * needed, using lid status notification from the input layer.
 494  */
 495 static enum drm_connector_status
 496 intel_lvds_detect(struct drm_connector *connector, bool force)
 497 {
 498         struct drm_device *dev = connector->dev;
 499         enum drm_connector_status status;
 500
 501         status = intel_panel_detect(dev);
 502         if (status != connector_status_unknown)
 503                 return status;
 504
 505         return connector_status_connected;
 506 }
 507
 508 /**
 509  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 510  */
 511 static int intel_lvds_get_modes(struct drm_connector *connector)
 512 {
 513         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 514         struct drm_device *dev = connector->dev;
 515         struct drm_display_mode *mode;
 516
 517         /* use cached edid if we have one */
 518         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 519                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 520
 521         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 522         if (mode == NULL)
 523                 return 0;
 524
 525         drm_mode_probed_add(connector, mode);
 526         return 1;
 527 }
 528
 529 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 530 {
 531         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 532         return 1;
 533 }
 534
 535 /* The GPU hangs up on these systems if modeset is performed on LID open */
 536 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 537         {
 538                 .callback = intel_no_modeset_on_lid_dmi_callback,
 539                 .ident = "Toshiba Tecra A11",
 540                 .matches = {
 541                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 542                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 543                 },
 544         },
 545
 546         { }     /* terminating entry */
 547 };
 548
 549 /*
 550  * Lid events. Note the use of 'modeset_on_lid':
 551  *  - we set it on lid close, and reset it on open
 552  *  - we use it as a "only once" bit (ie we ignore
 553  *    duplicate events where it was already properly
 554  *    set/reset)
 555  *  - the suspend/resume paths will also set it to
 556  *    zero, since they restore the mode ("lid open").
 557  */
 558 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 559                             void *unused)
 560 {
 561         struct intel_lvds_connector *lvds_connector =
 562                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 563         struct drm_connector *connector = &lvds_connector->base.base;
 564         struct drm_device *dev = connector->dev;
 565         struct drm_i915_private *dev_priv = dev->dev_private;
 566
 567         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 568                 return NOTIFY_OK;
 569
 570         /*
 571          * check and update the status of LVDS connector after receiving
 572          * the LID nofication event.
 573          */
 574         connector->status = connector->funcs->detect(connector, false);
 575
 576         /* Don't force modeset on machines where it causes a GPU lockup */
 577         if (dmi_check_system(intel_no_modeset_on_lid))
 578                 return NOTIFY_OK;
 579         if (!acpi_lid_open()) {
 580                 dev_priv->modeset_on_lid = 1;
 581                 return NOTIFY_OK;
 582         }
 583
 584         if (!dev_priv->modeset_on_lid)
 585                 return NOTIFY_OK;
 586
 587         dev_priv->modeset_on_lid = 0;
 588
 589         mutex_lock(&dev->mode_config.mutex);
 590         intel_modeset_setup_hw_state(dev, true);
 591         mutex_unlock(&dev->mode_config.mutex);
 592
 593         return NOTIFY_OK;
 594 }
 595
 596 /**
 597  * intel_lvds_destroy - unregister and free LVDS structures
 598  * @connector: connector to free
 599  *
 600  * Unregister the DDC bus for this connector then free the driver private
 601  * structure.
 602  */
 603 static void intel_lvds_destroy(struct drm_connector *connector)
 604 {
 605         struct intel_lvds_connector *lvds_connector =
 606                 to_lvds_connector(connector);
 607
 608         if (lvds_connector->lid_notifier.notifier_call)
 609                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 610
 611         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 612                 kfree(lvds_connector->base.edid);
 613
 614         intel_panel_destroy_backlight(connector->dev);
 615         intel_panel_fini(&lvds_connector->base.panel);
 616
 617         drm_sysfs_connector_remove(connector);
 618         drm_connector_cleanup(connector);
 619         kfree(connector);
 620 }
 621
 622 static int intel_lvds_set_property(struct drm_connector *connector,
 623                                    struct drm_property *property,
 624                                    uint64_t value)
 625 {
 626         struct intel_connector *intel_connector = to_intel_connector(connector);
 627         struct drm_device *dev = connector->dev;
 628
 629         if (property == dev->mode_config.scaling_mode_property) {
 630                 struct drm_crtc *crtc;
 631
 632                 if (value == DRM_MODE_SCALE_NONE) {
 633                         DRM_DEBUG_KMS("no scaling not supported\n");
 634                         return -EINVAL;
 635                 }
 636
 637                 if (intel_connector->panel.fitting_mode == value) {
 638                         /* the LVDS scaling property is not changed */
 639                         return 0;
 640                 }
 641                 intel_connector->panel.fitting_mode = value;
 642
 643                 crtc = intel_attached_encoder(connector)->base.crtc;
 644                 if (crtc && crtc->enabled) {
 645                         /*
 646                          * If the CRTC is enabled, the display will be changed
 647                          * according to the new panel fitting mode.
 648                          */
 649                         intel_crtc_restore_mode(crtc);
 650                 }
 651         }
 652
 653         return 0;
 654 }
 655
 656 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 657         .mode_fixup = intel_lvds_mode_fixup,
 658         .mode_set = intel_lvds_mode_set,
 659         .disable = intel_encoder_noop,
 660 };
 661
 662 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 663         .get_modes = intel_lvds_get_modes,
 664         .mode_valid = intel_lvds_mode_valid,
 665         .best_encoder = intel_best_encoder,
 666 };
 667
 668 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 669         .dpms = intel_connector_dpms,
 670         .detect = intel_lvds_detect,
 671         .fill_modes = drm_helper_probe_single_connector_modes,
 672         .set_property = intel_lvds_set_property,
 673         .destroy = intel_lvds_destroy,
 674 };
 675
 676 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 677         .destroy = intel_encoder_destroy,
 678 };
 679
 680 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 681 {
 682         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 683         return 1;
 684 }
 685
 686 /* These systems claim to have LVDS, but really don't */
 687 static const struct dmi_system_id intel_no_lvds[] = {
 688         {
 689                 .callback = intel_no_lvds_dmi_callback,
 690                 .ident = "Apple Mac Mini (Core series)",
 691                 .matches = {
 692                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 693                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 694                 },
 695         },
 696         {
 697                 .callback = intel_no_lvds_dmi_callback,
 698                 .ident = "Apple Mac Mini (Core 2 series)",
 699                 .matches = {
 700                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 701                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 702                 },
 703         },
 704         {
 705                 .callback = intel_no_lvds_dmi_callback,
 706                 .ident = "MSI IM-945GSE-A",
 707                 .matches = {
 708                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 709                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 710                 },
 711         },
 712         {
 713                 .callback = intel_no_lvds_dmi_callback,
 714                 .ident = "Dell Studio Hybrid",
 715                 .matches = {
 716                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 717                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 718                 },
 719         },
 720         {
 721                 .callback = intel_no_lvds_dmi_callback,
 722                 .ident = "Dell OptiPlex FX170",
 723                 .matches = {
 724                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 725                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 726                 },
 727         },
 728         {
 729                 .callback = intel_no_lvds_dmi_callback,
 730                 .ident = "AOpen Mini PC",
 731                 .matches = {
 732                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 733                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 734                 },
 735         },
 736         {
 737                 .callback = intel_no_lvds_dmi_callback,
 738                 .ident = "AOpen Mini PC MP915",
 739                 .matches = {
 740                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 741                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 742                 },
 743         },
 744         {
 745                 .callback = intel_no_lvds_dmi_callback,
 746                 .ident = "AOpen i915GMm-HFS",
 747                 .matches = {
 748                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 749                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 750                 },
 751         },
 752         {
 753                 .callback = intel_no_lvds_dmi_callback,
 754                 .ident = "AOpen i45GMx-I",
 755                 .matches = {
 756                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 757                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 758                 },
 759         },
 760         {
 761                 .callback = intel_no_lvds_dmi_callback,
 762                 .ident = "Aopen i945GTt-VFA",
 763                 .matches = {
 764                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 765                 },
 766         },
 767         {
 768                 .callback = intel_no_lvds_dmi_callback,
 769                 .ident = "Clientron U800",
 770                 .matches = {
 771                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 772                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 773                 },
 774         },
 775         {
 776                 .callback = intel_no_lvds_dmi_callback,
 777                 .ident = "Clientron E830",
 778                 .matches = {
 779                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 780                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 781                 },
 782         },
 783         {
 784                 .callback = intel_no_lvds_dmi_callback,
 785                 .ident = "Asus EeeBox PC EB1007",
 786                 .matches = {
 787                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 788                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 789                 },
 790         },
 791         {
 792                 .callback = intel_no_lvds_dmi_callback,
 793                 .ident = "Asus AT5NM10T-I",
 794                 .matches = {
 795                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 796                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 797                 },
 798         },
 799         {
 800                 .callback = intel_no_lvds_dmi_callback,
 801                 .ident = "Hewlett-Packard HP t5740e Thin Client",
 802                 .matches = {
 803                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 804                         DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
 805                 },
 806         },
 807         {
 808                 .callback = intel_no_lvds_dmi_callback,
 809                 .ident = "Hewlett-Packard t5745",
 810                 .matches = {
 811                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 812                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 813                 },
 814         },
 815         {
 816                 .callback = intel_no_lvds_dmi_callback,
 817                 .ident = "Hewlett-Packard st5747",
 818                 .matches = {
 819                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 820                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 821                 },
 822         },
 823         {
 824                 .callback = intel_no_lvds_dmi_callback,
 825                 .ident = "MSI Wind Box DC500",
 826                 .matches = {
 827                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 828                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 829                 },
 830         },
 831         {
 832                 .callback = intel_no_lvds_dmi_callback,
 833                 .ident = "ZOTAC ZBOXSD-ID12/ID13",
 834                 .matches = {
 835                         DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
 836                         DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
 837                 },
 838         },
 839         {
 840                 .callback = intel_no_lvds_dmi_callback,
 841                 .ident = "Gigabyte GA-D525TUD",
 842                 .matches = {
 843                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 844                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 845                 },
 846         },
 847         {
 848                 .callback = intel_no_lvds_dmi_callback,
 849                 .ident = "Supermicro X7SPA-H",
 850                 .matches = {
 851                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 852                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 853                 },
 854         },
 855
 856         { }     /* terminating entry */
 857 };
 858
 859 /**
 860  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 861  * @dev: drm device
 862  * @connector: LVDS connector
 863  *
 864  * Find the reduced downclock for LVDS in EDID.
 865  */
 866 static void intel_find_lvds_downclock(struct drm_device *dev,
 867                                       struct drm_display_mode *fixed_mode,
 868                                       struct drm_connector *connector)
 869 {
 870         struct drm_i915_private *dev_priv = dev->dev_private;
 871         struct drm_display_mode *scan;
 872         int temp_downclock;
 873
 874         temp_downclock = fixed_mode->clock;
 875         list_for_each_entry(scan, &connector->probed_modes, head) {
 876                 /*
 877                  * If one mode has the same resolution with the fixed_panel
 878                  * mode while they have the different refresh rate, it means
 879                  * that the reduced downclock is found for the LVDS. In such
 880                  * case we can set the different FPx0/1 to dynamically select
 881                  * between low and high frequency.
 882                  */
 883                 if (scan->hdisplay == fixed_mode->hdisplay &&
 884                     scan->hsync_start == fixed_mode->hsync_start &&
 885                     scan->hsync_end == fixed_mode->hsync_end &&
 886                     scan->htotal == fixed_mode->htotal &&
 887                     scan->vdisplay == fixed_mode->vdisplay &&
 888                     scan->vsync_start == fixed_mode->vsync_start &&
 889                     scan->vsync_end == fixed_mode->vsync_end &&
 890                     scan->vtotal == fixed_mode->vtotal) {
 891                         if (scan->clock < temp_downclock) {
 892                                 /*
 893                                  * The downclock is already found. But we
 894                                  * expect to find the lower downclock.
 895                                  */
 896                                 temp_downclock = scan->clock;
 897                         }
 898                 }
 899         }
 900         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 901                 /* We found the downclock for LVDS. */
 902                 dev_priv->lvds_downclock_avail = 1;
 903                 dev_priv->lvds_downclock = temp_downclock;
 904                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 905                               "Normal clock %dKhz, downclock %dKhz\n",
 906                               fixed_mode->clock, temp_downclock);
 907         }
 908 }
 909
 910 /*
 911  * Enumerate the child dev array parsed from VBT to check whether
 912  * the LVDS is present.
 913  * If it is present, return 1.
 914  * If it is not present, return false.
 915  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 916  */
 917 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 918                                    u8 *i2c_pin)
 919 {
 920         struct drm_i915_private *dev_priv = dev->dev_private;
 921         int i;
 922
 923         if (!dev_priv->child_dev_num)
 924                 return true;
 925
 926         for (i = 0; i < dev_priv->child_dev_num; i++) {
 927                 struct child_device_config *child = dev_priv->child_dev + i;
 928
 929                 /* If the device type is not LFP, continue.
 930                  * We have to check both the new identifiers as well as the
 931                  * old for compatibility with some BIOSes.
 932                  */
 933                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 934                     child->device_type != DEVICE_TYPE_LFP)
 935                         continue;
 936
 937                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 938                         *i2c_pin = child->i2c_pin;
 939
 940                 /* However, we cannot trust the BIOS writers to populate
 941                  * the VBT correctly.  Since LVDS requires additional
 942                  * information from AIM blocks, a non-zero addin offset is
 943                  * a good indicator that the LVDS is actually present.
 944                  */
 945                 if (child->addin_offset)
 946                         return true;
 947
 948                 /* But even then some BIOS writers perform some black magic
 949                  * and instantiate the device without reference to any
 950                  * additional data.  Trust that if the VBT was written into
 951                  * the OpRegion then they have validated the LVDS's existence.
 952                  */
 953                 if (dev_priv->opregion.vbt)
 954                         return true;
 955         }
 956
 957         return false;
 958 }
 959
 960 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 961 {
 962         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 963         return 1;
 964 }
 965
 966 static const struct dmi_system_id intel_dual_link_lvds[] = {
 967         {
 968                 .callback = intel_dual_link_lvds_callback,
 969                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 970                 .matches = {
 971                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 972                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 973                 },
 974         },
 975         { }     /* terminating entry */
 976 };
 977
 978 bool intel_is_dual_link_lvds(struct drm_device *dev)
 979 {
 980         struct intel_encoder *encoder;
 981         struct intel_lvds_encoder *lvds_encoder;
 982
 983         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 984                             base.head) {
 985                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 986                         lvds_encoder = to_lvds_encoder(&encoder->base);
 987
 988                         return lvds_encoder->is_dual_link;
 989                 }
 990         }
 991
 992         return false;
 993 }
 994
 995 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 996 {
 997         struct drm_device *dev = lvds_encoder->base.base.dev;
 998         unsigned int val;
 999         struct drm_i915_private *dev_priv = dev->dev_private;
1000
1001         /* use the module option value if specified */
1002         if (i915_lvds_channel_mode > 0)
1003                 return i915_lvds_channel_mode == 2;
1004
1005         if (dmi_check_system(intel_dual_link_lvds))
1006                 return true;
1007
1008         /* BIOS should set the proper LVDS register value at boot, but
1009          * in reality, it doesn't set the value when the lid is closed;
1010          * we need to check "the value to be set" in VBT when LVDS
1011          * register is uninitialized.
1012          */
1013         val = I915_READ(lvds_encoder->reg);
1014         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
1015                 val = dev_priv->bios_lvds_val;
1016
1017         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
1018 }
1019
1020 static bool intel_lvds_supported(struct drm_device *dev)
1021 {
1022         /* With the introduction of the PCH we gained a dedicated
1023          * LVDS presence pin, use it. */
1024         if (HAS_PCH_SPLIT(dev))
1025                 return true;
1026
1027         /* Otherwise LVDS was only attached to mobile products,
1028          * except for the inglorious 830gm */
1029         return IS_MOBILE(dev) && !IS_I830(dev);
1030 }
1031
1032 /**
1033  * intel_lvds_init - setup LVDS connectors on this device
1034  * @dev: drm device
1035  *
1036  * Create the connector, register the LVDS DDC bus, and try to figure out what
1037  * modes we can display on the LVDS panel (if present).
1038  */
1039 bool intel_lvds_init(struct drm_device *dev)
1040 {
1041         struct drm_i915_private *dev_priv = dev->dev_private;
1042         struct intel_lvds_encoder *lvds_encoder;
1043         struct intel_encoder *intel_encoder;
1044         struct intel_lvds_connector *lvds_connector;
1045         struct intel_connector *intel_connector;
1046         struct drm_connector *connector;
1047         struct drm_encoder *encoder;
1048         struct drm_display_mode *scan; /* *modes, *bios_mode; */
1049         struct drm_display_mode *fixed_mode = NULL;
1050         struct edid *edid;
1051         struct drm_crtc *crtc;
1052         u32 lvds;
1053         int pipe;
1054         u8 pin;
1055
1056         if (!intel_lvds_supported(dev))
1057                 return false;
1058
1059         /* Skip init on machines we know falsely report LVDS */
1060         if (dmi_check_system(intel_no_lvds))
1061                 return false;
1062
1063         pin = GMBUS_PORT_PANEL;
1064         if (!lvds_is_present_in_vbt(dev, &pin)) {
1065                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1066                 return false;
1067         }
1068
1069         if (HAS_PCH_SPLIT(dev)) {
1070                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1071                         return false;
1072                 if (dev_priv->edp.support) {
1073                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1074                         return false;
1075                 }
1076         }
1077
1078         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
1079         if (!lvds_encoder)
1080                 return false;
1081
1082         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
1083         if (!lvds_connector) {
1084                 kfree(lvds_encoder);
1085                 return false;
1086         }
1087
1088         lvds_encoder->attached_connector = lvds_connector;
1089
1090         if (!HAS_PCH_SPLIT(dev)) {
1091                 lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
1092         }
1093
1094         intel_encoder = &lvds_encoder->base;
1095         encoder = &intel_encoder->base;
1096         intel_connector = &lvds_connector->base;
1097         connector = &intel_connector->base;
1098         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1099                            DRM_MODE_CONNECTOR_LVDS);
1100
1101         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1102                          DRM_MODE_ENCODER_LVDS);
1103
1104         intel_encoder->enable = intel_enable_lvds;
1105         intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
1106         intel_encoder->disable = intel_disable_lvds;
1107         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1108         intel_connector->get_hw_state = intel_connector_get_hw_state;
1109
1110         intel_connector_attach_encoder(intel_connector, intel_encoder);
1111         intel_encoder->type = INTEL_OUTPUT_LVDS;
1112
1113         intel_encoder->cloneable = false;
1114         if (HAS_PCH_SPLIT(dev))
1115                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1116         else if (IS_GEN4(dev))
1117                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1118         else
1119                 intel_encoder->crtc_mask = (1 << 1);
1120
1121         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1122         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1123         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1124         connector->interlace_allowed = false;
1125         connector->doublescan_allowed = false;
1126
1127         if (HAS_PCH_SPLIT(dev)) {
1128                 lvds_encoder->reg = PCH_LVDS;
1129         } else {
1130                 lvds_encoder->reg = LVDS;
1131         }
1132
1133         /* create the scaling mode property */
1134         drm_mode_create_scaling_mode_property(dev);
1135         drm_object_attach_property(&connector->base,
1136                                       dev->mode_config.scaling_mode_property,
1137                                       DRM_MODE_SCALE_ASPECT);
1138         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1139         /*
1140          * LVDS discovery:
1141          * 1) check for EDID on DDC
1142          * 2) check for VBT data
1143          * 3) check to see if LVDS is already on
1144          *    if none of the above, no panel
1145          * 4) make sure lid is open
1146          *    if closed, act like it's not there for now
1147          */
1148
1149         /*
1150          * Attempt to get the fixed panel mode from DDC.  Assume that the
1151          * preferred mode is the right one.
1152          */
1153         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1154         if (edid) {
1155                 if (drm_add_edid_modes(connector, edid)) {
1156                         drm_mode_connector_update_edid_property(connector,
1157                                                                 edid);
1158                 } else {
1159                         kfree(edid);
1160                         edid = ERR_PTR(-EINVAL);
1161                 }
1162         } else {
1163                 edid = ERR_PTR(-ENOENT);
1164         }
1165         lvds_connector->base.edid = edid;
1166
1167         if (IS_ERR_OR_NULL(edid)) {
1168                 /* Didn't get an EDID, so
1169                  * Set wide sync ranges so we get all modes
1170                  * handed to valid_mode for checking
1171                  */
1172                 connector->display_info.min_vfreq = 0;
1173                 connector->display_info.max_vfreq = 200;
1174                 connector->display_info.min_hfreq = 0;
1175                 connector->display_info.max_hfreq = 200;
1176         }
1177
1178         list_for_each_entry(scan, &connector->probed_modes, head) {
1179                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1180                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1181                         drm_mode_debug_printmodeline(scan);
1182
1183                         fixed_mode = drm_mode_duplicate(dev, scan);
1184                         if (fixed_mode) {
1185                                 intel_find_lvds_downclock(dev, fixed_mode,
1186                                                           connector);
1187                                 goto out;
1188                         }
1189                 }
1190         }
1191
1192         /* Failed to get EDID, what about VBT? */
1193         if (dev_priv->lfp_lvds_vbt_mode) {
1194                 DRM_DEBUG_KMS("using mode from VBT: ");
1195                 drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
1196
1197                 fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1198                 if (fixed_mode) {
1199                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1200                         goto out;
1201                 }
1202         }
1203
1204         /*
1205          * If we didn't get EDID, try checking if the panel is already turned
1206          * on.  If so, assume that whatever is currently programmed is the
1207          * correct mode.
1208          */
1209
1210         /* Ironlake: FIXME if still fail, not try pipe mode now */
1211         if (HAS_PCH_SPLIT(dev))
1212                 goto failed;
1213
1214         lvds = I915_READ(LVDS);
1215         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1216         crtc = intel_get_crtc_for_pipe(dev, pipe);
1217
1218         if (crtc && (lvds & LVDS_PORT_EN)) {
1219                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1220                 if (fixed_mode) {
1221                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1222                         drm_mode_debug_printmodeline(fixed_mode);
1223                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1224                         goto out;
1225                 }
1226         }
1227
1228         /* If we still don't have a mode after all that, give up. */
1229         if (!fixed_mode)
1230                 goto failed;
1231
1232 out:
1233         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1234         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1235                       lvds_encoder->is_dual_link ? "dual" : "single");
1236
1237         /*
1238          * Unlock registers and just
1239          * leave them unlocked
1240          */
1241         if (HAS_PCH_SPLIT(dev)) {
1242                 I915_WRITE(PCH_PP_CONTROL,
1243                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1244         } else {
1245                 I915_WRITE(PP_CONTROL,
1246                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1247         }
1248         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1249         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1250                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1251                 lvds_connector->lid_notifier.notifier_call = NULL;
1252         }
1253         drm_sysfs_connector_add(connector);
1254
1255         intel_panel_init(&intel_connector->panel, fixed_mode);
1256         intel_panel_setup_backlight(connector);
1257
1258         return true;
1259
1260 failed:
1261         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1262         drm_connector_cleanup(connector);
1263         drm_encoder_cleanup(encoder);
1264         if (fixed_mode)
1265                 drm_mode_destroy(dev, fixed_mode);
1266         kfree(lvds_encoder);
1267         kfree(lvds_connector);
1268         return false;
1269 }