drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         bool is_dual_link;
  53         u32 reg;
  54
  55         struct intel_lvds_connector *attached_connector;
  56 };
  57
  58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_lvds_encoder, base.base);
  61 }
  62
  63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  64 {
  65         return container_of(connector, struct intel_lvds_connector, base.base);
  66 }
  67
  68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  69                                     enum pipe *pipe)
  70 {
  71         struct drm_device *dev = encoder->base.dev;
  72         struct drm_i915_private *dev_priv = dev->dev_private;
  73         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  74         u32 tmp;
  75
  76         tmp = I915_READ(lvds_encoder->reg);
  77
  78         if (!(tmp & LVDS_PORT_EN))
  79                 return false;
  80
  81         if (HAS_PCH_CPT(dev))
  82                 *pipe = PORT_TO_PIPE_CPT(tmp);
  83         else
  84                 *pipe = PORT_TO_PIPE(tmp);
  85
  86         return true;
  87 }
  88
  89 static void intel_lvds_get_config(struct intel_encoder *encoder,
  90                                   struct intel_crtc_config *pipe_config)
  91 {
  92         struct drm_device *dev = encoder->base.dev;
  93         struct drm_i915_private *dev_priv = dev->dev_private;
  94         u32 lvds_reg, tmp, flags = 0;
  95         int dotclock;
  96
  97         if (HAS_PCH_SPLIT(dev))
  98                 lvds_reg = PCH_LVDS;
  99         else
 100                 lvds_reg = LVDS;
 101
 102         tmp = I915_READ(lvds_reg);
 103         if (tmp & LVDS_HSYNC_POLARITY)
 104                 flags |= DRM_MODE_FLAG_NHSYNC;
 105         else
 106                 flags |= DRM_MODE_FLAG_PHSYNC;
 107         if (tmp & LVDS_VSYNC_POLARITY)
 108                 flags |= DRM_MODE_FLAG_NVSYNC;
 109         else
 110                 flags |= DRM_MODE_FLAG_PVSYNC;
 111
 112         pipe_config->adjusted_mode.flags |= flags;
 113
 114         /* gen2/3 store dither state in pfit control, needs to match */
 115         if (INTEL_INFO(dev)->gen < 4) {
 116                 tmp = I915_READ(PFIT_CONTROL);
 117
 118                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 119         }
 120
 121         dotclock = pipe_config->port_clock;
 122
 123         if (HAS_PCH_SPLIT(dev_priv->dev))
 124                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 125
 126         pipe_config->adjusted_mode.crtc_clock = dotclock;
 127 }
 128
 129 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 130 {
 131         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 132         struct drm_device *dev = encoder->base.dev;
 133         struct drm_i915_private *dev_priv = dev->dev_private;
 134         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 135         const struct drm_display_mode *adjusted_mode =
 136                 &crtc->config.adjusted_mode;
 137         int pipe = crtc->pipe;
 138         u32 temp;
 139
 140         if (HAS_PCH_SPLIT(dev)) {
 141                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 142                 assert_shared_dpll_disabled(dev_priv,
 143                                             intel_crtc_to_shared_dpll(crtc));
 144         } else {
 145                 assert_pll_disabled(dev_priv, pipe);
 146         }
 147
 148         temp = I915_READ(lvds_encoder->reg);
 149         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 150
 151         if (HAS_PCH_CPT(dev)) {
 152                 temp &= ~PORT_TRANS_SEL_MASK;
 153                 temp |= PORT_TRANS_SEL_CPT(pipe);
 154         } else {
 155                 if (pipe == 1) {
 156                         temp |= LVDS_PIPEB_SELECT;
 157                 } else {
 158                         temp &= ~LVDS_PIPEB_SELECT;
 159                 }
 160         }
 161
 162         /* set the corresponsding LVDS_BORDER bit */
 163         temp &= ~LVDS_BORDER_ENABLE;
 164         temp |= crtc->config.gmch_pfit.lvds_border_bits;
 165         /* Set the B0-B3 data pairs corresponding to whether we're going to
 166          * set the DPLLs for dual-channel mode or not.
 167          */
 168         if (lvds_encoder->is_dual_link)
 169                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 170         else
 171                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 172
 173         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 174          * appropriately here, but we need to look more thoroughly into how
 175          * panels behave in the two modes.
 176          */
 177
 178         /* Set the dithering flag on LVDS as needed, note that there is no
 179          * special lvds dither control bit on pch-split platforms, dithering is
 180          * only controlled through the PIPECONF reg. */
 181         if (INTEL_INFO(dev)->gen == 4) {
 182                 /* Bspec wording suggests that LVDS port dithering only exists
 183                  * for 18bpp panels. */
 184                 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
 185                         temp |= LVDS_ENABLE_DITHER;
 186                 else
 187                         temp &= ~LVDS_ENABLE_DITHER;
 188         }
 189         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 190         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 191                 temp |= LVDS_HSYNC_POLARITY;
 192         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 193                 temp |= LVDS_VSYNC_POLARITY;
 194
 195         I915_WRITE(lvds_encoder->reg, temp);
 196 }
 197
 198 /**
 199  * Sets the power state for the panel.
 200  */
 201 static void intel_enable_lvds(struct intel_encoder *encoder)
 202 {
 203         struct drm_device *dev = encoder->base.dev;
 204         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 205         struct intel_connector *intel_connector =
 206                 &lvds_encoder->attached_connector->base;
 207         struct drm_i915_private *dev_priv = dev->dev_private;
 208         u32 ctl_reg, stat_reg;
 209
 210         if (HAS_PCH_SPLIT(dev)) {
 211                 ctl_reg = PCH_PP_CONTROL;
 212                 stat_reg = PCH_PP_STATUS;
 213         } else {
 214                 ctl_reg = PP_CONTROL;
 215                 stat_reg = PP_STATUS;
 216         }
 217
 218         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 219
 220         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 221         POSTING_READ(lvds_encoder->reg);
 222         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 223                 DRM_ERROR("timed out waiting for panel to power on\n");
 224
 225         intel_panel_enable_backlight(intel_connector);
 226 }
 227
 228 static void intel_disable_lvds(struct intel_encoder *encoder)
 229 {
 230         struct drm_device *dev = encoder->base.dev;
 231         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 232         struct intel_connector *intel_connector =
 233                 &lvds_encoder->attached_connector->base;
 234         struct drm_i915_private *dev_priv = dev->dev_private;
 235         u32 ctl_reg, stat_reg;
 236
 237         if (HAS_PCH_SPLIT(dev)) {
 238                 ctl_reg = PCH_PP_CONTROL;
 239                 stat_reg = PCH_PP_STATUS;
 240         } else {
 241                 ctl_reg = PP_CONTROL;
 242                 stat_reg = PP_STATUS;
 243         }
 244
 245         intel_panel_disable_backlight(intel_connector);
 246
 247         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 248         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 249                 DRM_ERROR("timed out waiting for panel to power off\n");
 250
 251         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 252         POSTING_READ(lvds_encoder->reg);
 253 }
 254
 255 static enum drm_mode_status
 256 intel_lvds_mode_valid(struct drm_connector *connector,
 257                       struct drm_display_mode *mode)
 258 {
 259         struct intel_connector *intel_connector = to_intel_connector(connector);
 260         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 261
 262         if (mode->hdisplay > fixed_mode->hdisplay)
 263                 return MODE_PANEL;
 264         if (mode->vdisplay > fixed_mode->vdisplay)
 265                 return MODE_PANEL;
 266
 267         return MODE_OK;
 268 }
 269
 270 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 271                                       struct intel_crtc_config *pipe_config)
 272 {
 273         struct drm_device *dev = intel_encoder->base.dev;
 274         struct drm_i915_private *dev_priv = dev->dev_private;
 275         struct intel_lvds_encoder *lvds_encoder =
 276                 to_lvds_encoder(&intel_encoder->base);
 277         struct intel_connector *intel_connector =
 278                 &lvds_encoder->attached_connector->base;
 279         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 280         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 281         unsigned int lvds_bpp;
 282
 283         /* Should never happen!! */
 284         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 285                 DRM_ERROR("Can't support LVDS on pipe A\n");
 286                 return false;
 287         }
 288
 289         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
 290             LVDS_A3_POWER_UP)
 291                 lvds_bpp = 8*3;
 292         else
 293                 lvds_bpp = 6*3;
 294
 295         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 296                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 297                               pipe_config->pipe_bpp, lvds_bpp);
 298                 pipe_config->pipe_bpp = lvds_bpp;
 299         }
 300
 301         /*
 302          * We have timings from the BIOS for the panel, put them in
 303          * to the adjusted mode.  The CRTC will be set up for this mode,
 304          * with the panel scaling set up to source from the H/VDisplay
 305          * of the original mode.
 306          */
 307         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 308                                adjusted_mode);
 309
 310         if (HAS_PCH_SPLIT(dev)) {
 311                 pipe_config->has_pch_encoder = true;
 312
 313                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 314                                         intel_connector->panel.fitting_mode);
 315         } else {
 316                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 317                                          intel_connector->panel.fitting_mode);
 318
 319         }
 320
 321         /*
 322          * XXX: It would be nice to support lower refresh rates on the
 323          * panels to reduce power consumption, and perhaps match the
 324          * user's requested refresh rate.
 325          */
 326
 327         return true;
 328 }
 329
 330 /**
 331  * Detect the LVDS connection.
 332  *
 333  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 334  * connected and closed means disconnected.  We also send hotplug events as
 335  * needed, using lid status notification from the input layer.
 336  */
 337 static enum drm_connector_status
 338 intel_lvds_detect(struct drm_connector *connector, bool force)
 339 {
 340         struct drm_device *dev = connector->dev;
 341         enum drm_connector_status status;
 342
 343         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 344                       connector->base.id, connector->name);
 345
 346         status = intel_panel_detect(dev);
 347         if (status != connector_status_unknown)
 348                 return status;
 349
 350         return connector_status_connected;
 351 }
 352
 353 /**
 354  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 355  */
 356 static int intel_lvds_get_modes(struct drm_connector *connector)
 357 {
 358         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 359         struct drm_device *dev = connector->dev;
 360         struct drm_display_mode *mode;
 361
 362         /* use cached edid if we have one */
 363         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 364                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 365
 366         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 367         if (mode == NULL)
 368                 return 0;
 369
 370         drm_mode_probed_add(connector, mode);
 371         return 1;
 372 }
 373
 374 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 375 {
 376         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 377         return 1;
 378 }
 379
 380 /* The GPU hangs up on these systems if modeset is performed on LID open */
 381 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 382         {
 383                 .callback = intel_no_modeset_on_lid_dmi_callback,
 384                 .ident = "Toshiba Tecra A11",
 385                 .matches = {
 386                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 387                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 388                 },
 389         },
 390
 391         { }     /* terminating entry */
 392 };
 393
 394 /*
 395  * Lid events. Note the use of 'modeset':
 396  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 397  *    and set it to MODESET_DONE on open
 398  *  - we use it as a "only once" bit (ie we ignore
 399  *    duplicate events where it was already properly set)
 400  *  - the suspend/resume paths will set it to
 401  *    MODESET_SUSPENDED and ignore the lid open event,
 402  *    because they restore the mode ("lid open").
 403  */
 404 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 405                             void *unused)
 406 {
 407         struct intel_lvds_connector *lvds_connector =
 408                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 409         struct drm_connector *connector = &lvds_connector->base.base;
 410         struct drm_device *dev = connector->dev;
 411         struct drm_i915_private *dev_priv = dev->dev_private;
 412
 413         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 414                 return NOTIFY_OK;
 415
 416         mutex_lock(&dev_priv->modeset_restore_lock);
 417         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 418                 goto exit;
 419         /*
 420          * check and update the status of LVDS connector after receiving
 421          * the LID nofication event.
 422          */
 423         connector->status = connector->funcs->detect(connector, false);
 424
 425         /* Don't force modeset on machines where it causes a GPU lockup */
 426         if (dmi_check_system(intel_no_modeset_on_lid))
 427                 goto exit;
 428         if (!acpi_lid_open()) {
 429                 /* do modeset on next lid open event */
 430                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 431                 goto exit;
 432         }
 433
 434         if (dev_priv->modeset_restore == MODESET_DONE)
 435                 goto exit;
 436
 437         /*
 438          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 439          * We try to detect this here and undo any damage. The split for PCH
 440          * platforms is rather conservative and a bit arbitrary expect that on
 441          * those platforms VGA disabling requires actual legacy VGA I/O access,
 442          * and as part of the cleanup in the hw state restore we also redisable
 443          * the vga plane.
 444          */
 445         if (!HAS_PCH_SPLIT(dev)) {
 446                 drm_modeset_lock_all(dev);
 447                 intel_modeset_setup_hw_state(dev, true);
 448                 drm_modeset_unlock_all(dev);
 449         }
 450
 451         dev_priv->modeset_restore = MODESET_DONE;
 452
 453 exit:
 454         mutex_unlock(&dev_priv->modeset_restore_lock);
 455         return NOTIFY_OK;
 456 }
 457
 458 /**
 459  * intel_lvds_destroy - unregister and free LVDS structures
 460  * @connector: connector to free
 461  *
 462  * Unregister the DDC bus for this connector then free the driver private
 463  * structure.
 464  */
 465 static void intel_lvds_destroy(struct drm_connector *connector)
 466 {
 467         struct intel_lvds_connector *lvds_connector =
 468                 to_lvds_connector(connector);
 469
 470         if (lvds_connector->lid_notifier.notifier_call)
 471                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 472
 473         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 474                 kfree(lvds_connector->base.edid);
 475
 476         intel_panel_fini(&lvds_connector->base.panel);
 477
 478         drm_connector_cleanup(connector);
 479         kfree(connector);
 480 }
 481
 482 static int intel_lvds_set_property(struct drm_connector *connector,
 483                                    struct drm_property *property,
 484                                    uint64_t value)
 485 {
 486         struct intel_connector *intel_connector = to_intel_connector(connector);
 487         struct drm_device *dev = connector->dev;
 488
 489         if (property == dev->mode_config.scaling_mode_property) {
 490                 struct drm_crtc *crtc;
 491
 492                 if (value == DRM_MODE_SCALE_NONE) {
 493                         DRM_DEBUG_KMS("no scaling not supported\n");
 494                         return -EINVAL;
 495                 }
 496
 497                 if (intel_connector->panel.fitting_mode == value) {
 498                         /* the LVDS scaling property is not changed */
 499                         return 0;
 500                 }
 501                 intel_connector->panel.fitting_mode = value;
 502
 503                 crtc = intel_attached_encoder(connector)->base.crtc;
 504                 if (crtc && crtc->enabled) {
 505                         /*
 506                          * If the CRTC is enabled, the display will be changed
 507                          * according to the new panel fitting mode.
 508                          */
 509                         intel_crtc_restore_mode(crtc);
 510                 }
 511         }
 512
 513         return 0;
 514 }
 515
 516 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 517         .get_modes = intel_lvds_get_modes,
 518         .mode_valid = intel_lvds_mode_valid,
 519         .best_encoder = intel_best_encoder,
 520 };
 521
 522 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 523         .dpms = intel_connector_dpms,
 524         .detect = intel_lvds_detect,
 525         .fill_modes = drm_helper_probe_single_connector_modes,
 526         .set_property = intel_lvds_set_property,
 527         .destroy = intel_lvds_destroy,
 528 };
 529
 530 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 531         .destroy = intel_encoder_destroy,
 532 };
 533
 534 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 535 {
 536         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 537         return 1;
 538 }
 539
 540 /* These systems claim to have LVDS, but really don't */
 541 static const struct dmi_system_id intel_no_lvds[] = {
 542         {
 543                 .callback = intel_no_lvds_dmi_callback,
 544                 .ident = "Apple Mac Mini (Core series)",
 545                 .matches = {
 546                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 547                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 548                 },
 549         },
 550         {
 551                 .callback = intel_no_lvds_dmi_callback,
 552                 .ident = "Apple Mac Mini (Core 2 series)",
 553                 .matches = {
 554                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 555                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 556                 },
 557         },
 558         {
 559                 .callback = intel_no_lvds_dmi_callback,
 560                 .ident = "MSI IM-945GSE-A",
 561                 .matches = {
 562                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 563                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 564                 },
 565         },
 566         {
 567                 .callback = intel_no_lvds_dmi_callback,
 568                 .ident = "Dell Studio Hybrid",
 569                 .matches = {
 570                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 571                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 572                 },
 573         },
 574         {
 575                 .callback = intel_no_lvds_dmi_callback,
 576                 .ident = "Dell OptiPlex FX170",
 577                 .matches = {
 578                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 579                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 580                 },
 581         },
 582         {
 583                 .callback = intel_no_lvds_dmi_callback,
 584                 .ident = "AOpen Mini PC",
 585                 .matches = {
 586                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 587                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 588                 },
 589         },
 590         {
 591                 .callback = intel_no_lvds_dmi_callback,
 592                 .ident = "AOpen Mini PC MP915",
 593                 .matches = {
 594                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 595                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 596                 },
 597         },
 598         {
 599                 .callback = intel_no_lvds_dmi_callback,
 600                 .ident = "AOpen i915GMm-HFS",
 601                 .matches = {
 602                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 603                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 604                 },
 605         },
 606         {
 607                 .callback = intel_no_lvds_dmi_callback,
 608                 .ident = "AOpen i45GMx-I",
 609                 .matches = {
 610                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 611                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 612                 },
 613         },
 614         {
 615                 .callback = intel_no_lvds_dmi_callback,
 616                 .ident = "Aopen i945GTt-VFA",
 617                 .matches = {
 618                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 619                 },
 620         },
 621         {
 622                 .callback = intel_no_lvds_dmi_callback,
 623                 .ident = "Clientron U800",
 624                 .matches = {
 625                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 626                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 627                 },
 628         },
 629         {
 630                 .callback = intel_no_lvds_dmi_callback,
 631                 .ident = "Clientron E830",
 632                 .matches = {
 633                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 634                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 635                 },
 636         },
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "Asus EeeBox PC EB1007",
 640                 .matches = {
 641                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 642                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "Asus AT5NM10T-I",
 648                 .matches = {
 649                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 650                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "Hewlett-Packard HP t5740",
 656                 .matches = {
 657                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 658                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 659                 },
 660         },
 661         {
 662                 .callback = intel_no_lvds_dmi_callback,
 663                 .ident = "Hewlett-Packard t5745",
 664                 .matches = {
 665                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 666                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 667                 },
 668         },
 669         {
 670                 .callback = intel_no_lvds_dmi_callback,
 671                 .ident = "Hewlett-Packard st5747",
 672                 .matches = {
 673                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 674                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 675                 },
 676         },
 677         {
 678                 .callback = intel_no_lvds_dmi_callback,
 679                 .ident = "MSI Wind Box DC500",
 680                 .matches = {
 681                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 682                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 683                 },
 684         },
 685         {
 686                 .callback = intel_no_lvds_dmi_callback,
 687                 .ident = "Gigabyte GA-D525TUD",
 688                 .matches = {
 689                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 690                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 691                 },
 692         },
 693         {
 694                 .callback = intel_no_lvds_dmi_callback,
 695                 .ident = "Supermicro X7SPA-H",
 696                 .matches = {
 697                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 698                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 699                 },
 700         },
 701         {
 702                 .callback = intel_no_lvds_dmi_callback,
 703                 .ident = "Fujitsu Esprimo Q900",
 704                 .matches = {
 705                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 706                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 707                 },
 708         },
 709         {
 710                 .callback = intel_no_lvds_dmi_callback,
 711                 .ident = "Intel D410PT",
 712                 .matches = {
 713                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 714                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 715                 },
 716         },
 717         {
 718                 .callback = intel_no_lvds_dmi_callback,
 719                 .ident = "Intel D425KT",
 720                 .matches = {
 721                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 722                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 723                 },
 724         },
 725         {
 726                 .callback = intel_no_lvds_dmi_callback,
 727                 .ident = "Intel D510MO",
 728                 .matches = {
 729                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 730                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 731                 },
 732         },
 733         {
 734                 .callback = intel_no_lvds_dmi_callback,
 735                 .ident = "Intel D525MW",
 736                 .matches = {
 737                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 738                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 739                 },
 740         },
 741
 742         { }     /* terminating entry */
 743 };
 744
 745 /*
 746  * Enumerate the child dev array parsed from VBT to check whether
 747  * the LVDS is present.
 748  * If it is present, return 1.
 749  * If it is not present, return false.
 750  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 751  */
 752 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 753                                    u8 *i2c_pin)
 754 {
 755         struct drm_i915_private *dev_priv = dev->dev_private;
 756         int i;
 757
 758         if (!dev_priv->vbt.child_dev_num)
 759                 return true;
 760
 761         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 762                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
 763                 struct old_child_dev_config *child = &uchild->old;
 764
 765                 /* If the device type is not LFP, continue.
 766                  * We have to check both the new identifiers as well as the
 767                  * old for compatibility with some BIOSes.
 768                  */
 769                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 770                     child->device_type != DEVICE_TYPE_LFP)
 771                         continue;
 772
 773                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 774                         *i2c_pin = child->i2c_pin;
 775
 776                 /* However, we cannot trust the BIOS writers to populate
 777                  * the VBT correctly.  Since LVDS requires additional
 778                  * information from AIM blocks, a non-zero addin offset is
 779                  * a good indicator that the LVDS is actually present.
 780                  */
 781                 if (child->addin_offset)
 782                         return true;
 783
 784                 /* But even then some BIOS writers perform some black magic
 785                  * and instantiate the device without reference to any
 786                  * additional data.  Trust that if the VBT was written into
 787                  * the OpRegion then they have validated the LVDS's existence.
 788                  */
 789                 if (dev_priv->opregion.vbt)
 790                         return true;
 791         }
 792
 793         return false;
 794 }
 795
 796 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 797 {
 798         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 799         return 1;
 800 }
 801
 802 static const struct dmi_system_id intel_dual_link_lvds[] = {
 803         {
 804                 .callback = intel_dual_link_lvds_callback,
 805                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 806                 .matches = {
 807                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 808                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 809                 },
 810         },
 811         { }     /* terminating entry */
 812 };
 813
 814 bool intel_is_dual_link_lvds(struct drm_device *dev)
 815 {
 816         struct intel_encoder *encoder;
 817         struct intel_lvds_encoder *lvds_encoder;
 818
 819         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 820                             base.head) {
 821                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 822                         lvds_encoder = to_lvds_encoder(&encoder->base);
 823
 824                         return lvds_encoder->is_dual_link;
 825                 }
 826         }
 827
 828         return false;
 829 }
 830
 831 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 832 {
 833         struct drm_device *dev = lvds_encoder->base.base.dev;
 834         unsigned int val;
 835         struct drm_i915_private *dev_priv = dev->dev_private;
 836
 837         /* use the module option value if specified */
 838         if (i915.lvds_channel_mode > 0)
 839                 return i915.lvds_channel_mode == 2;
 840
 841         if (dmi_check_system(intel_dual_link_lvds))
 842                 return true;
 843
 844         /* BIOS should set the proper LVDS register value at boot, but
 845          * in reality, it doesn't set the value when the lid is closed;
 846          * we need to check "the value to be set" in VBT when LVDS
 847          * register is uninitialized.
 848          */
 849         val = I915_READ(lvds_encoder->reg);
 850         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 851                 val = dev_priv->vbt.bios_lvds_val;
 852
 853         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 854 }
 855
 856 static bool intel_lvds_supported(struct drm_device *dev)
 857 {
 858         /* With the introduction of the PCH we gained a dedicated
 859          * LVDS presence pin, use it. */
 860         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 861                 return true;
 862
 863         /* Otherwise LVDS was only attached to mobile products,
 864          * except for the inglorious 830gm */
 865         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 866                 return true;
 867
 868         return false;
 869 }
 870
 871 /**
 872  * intel_lvds_init - setup LVDS connectors on this device
 873  * @dev: drm device
 874  *
 875  * Create the connector, register the LVDS DDC bus, and try to figure out what
 876  * modes we can display on the LVDS panel (if present).
 877  */
 878 void intel_lvds_init(struct drm_device *dev)
 879 {
 880         struct drm_i915_private *dev_priv = dev->dev_private;
 881         struct intel_lvds_encoder *lvds_encoder;
 882         struct intel_encoder *intel_encoder;
 883         struct intel_lvds_connector *lvds_connector;
 884         struct intel_connector *intel_connector;
 885         struct drm_connector *connector;
 886         struct drm_encoder *encoder;
 887         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 888         struct drm_display_mode *fixed_mode = NULL;
 889         struct drm_display_mode *downclock_mode = NULL;
 890         struct edid *edid;
 891         struct drm_crtc *crtc;
 892         u32 lvds;
 893         int pipe;
 894         u8 pin;
 895
 896         if (!intel_lvds_supported(dev))
 897                 return;
 898
 899         /* Skip init on machines we know falsely report LVDS */
 900         if (dmi_check_system(intel_no_lvds))
 901                 return;
 902
 903         pin = GMBUS_PORT_PANEL;
 904         if (!lvds_is_present_in_vbt(dev, &pin)) {
 905                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 906                 return;
 907         }
 908
 909         if (HAS_PCH_SPLIT(dev)) {
 910                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 911                         return;
 912                 if (dev_priv->vbt.edp_support) {
 913                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 914                         return;
 915                 }
 916         }
 917
 918         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 919         if (!lvds_encoder)
 920                 return;
 921
 922         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 923         if (!lvds_connector) {
 924                 kfree(lvds_encoder);
 925                 return;
 926         }
 927
 928         lvds_encoder->attached_connector = lvds_connector;
 929
 930         intel_encoder = &lvds_encoder->base;
 931         encoder = &intel_encoder->base;
 932         intel_connector = &lvds_connector->base;
 933         connector = &intel_connector->base;
 934         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 935                            DRM_MODE_CONNECTOR_LVDS);
 936
 937         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 938                          DRM_MODE_ENCODER_LVDS);
 939
 940         intel_encoder->enable = intel_enable_lvds;
 941         intel_encoder->pre_enable = intel_pre_enable_lvds;
 942         intel_encoder->compute_config = intel_lvds_compute_config;
 943         intel_encoder->disable = intel_disable_lvds;
 944         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 945         intel_encoder->get_config = intel_lvds_get_config;
 946         intel_connector->get_hw_state = intel_connector_get_hw_state;
 947         intel_connector->unregister = intel_connector_unregister;
 948
 949         intel_connector_attach_encoder(intel_connector, intel_encoder);
 950         intel_encoder->type = INTEL_OUTPUT_LVDS;
 951
 952         intel_encoder->cloneable = 0;
 953         if (HAS_PCH_SPLIT(dev))
 954                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 955         else if (IS_GEN4(dev))
 956                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 957         else
 958                 intel_encoder->crtc_mask = (1 << 1);
 959
 960         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 961         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 962         connector->interlace_allowed = false;
 963         connector->doublescan_allowed = false;
 964
 965         if (HAS_PCH_SPLIT(dev)) {
 966                 lvds_encoder->reg = PCH_LVDS;
 967         } else {
 968                 lvds_encoder->reg = LVDS;
 969         }
 970
 971         /* create the scaling mode property */
 972         drm_mode_create_scaling_mode_property(dev);
 973         drm_object_attach_property(&connector->base,
 974                                       dev->mode_config.scaling_mode_property,
 975                                       DRM_MODE_SCALE_ASPECT);
 976         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
 977         /*
 978          * LVDS discovery:
 979          * 1) check for EDID on DDC
 980          * 2) check for VBT data
 981          * 3) check to see if LVDS is already on
 982          *    if none of the above, no panel
 983          * 4) make sure lid is open
 984          *    if closed, act like it's not there for now
 985          */
 986
 987         /*
 988          * Attempt to get the fixed panel mode from DDC.  Assume that the
 989          * preferred mode is the right one.
 990          */
 991         mutex_lock(&dev->mode_config.mutex);
 992         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
 993         if (edid) {
 994                 if (drm_add_edid_modes(connector, edid)) {
 995                         drm_mode_connector_update_edid_property(connector,
 996                                                                 edid);
 997                 } else {
 998                         kfree(edid);
 999                         edid = ERR_PTR(-EINVAL);
1000                 }
1001         } else {
1002                 edid = ERR_PTR(-ENOENT);
1003         }
1004         lvds_connector->base.edid = edid;
1005
1006         if (IS_ERR_OR_NULL(edid)) {
1007                 /* Didn't get an EDID, so
1008                  * Set wide sync ranges so we get all modes
1009                  * handed to valid_mode for checking
1010                  */
1011                 connector->display_info.min_vfreq = 0;
1012                 connector->display_info.max_vfreq = 200;
1013                 connector->display_info.min_hfreq = 0;
1014                 connector->display_info.max_hfreq = 200;
1015         }
1016
1017         list_for_each_entry(scan, &connector->probed_modes, head) {
1018                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1019                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1020                         drm_mode_debug_printmodeline(scan);
1021
1022                         fixed_mode = drm_mode_duplicate(dev, scan);
1023                         if (fixed_mode) {
1024                                 downclock_mode =
1025                                         intel_find_panel_downclock(dev,
1026                                         fixed_mode, connector);
1027                                 if (downclock_mode != NULL &&
1028                                         i915.lvds_downclock) {
1029                                         /* We found the downclock for LVDS. */
1030                                         dev_priv->lvds_downclock_avail = true;
1031                                         dev_priv->lvds_downclock =
1032                                                 downclock_mode->clock;
1033                                         DRM_DEBUG_KMS("LVDS downclock is found"
1034                                         " in EDID. Normal clock %dKhz, "
1035                                         "downclock %dKhz\n",
1036                                         fixed_mode->clock,
1037                                         dev_priv->lvds_downclock);
1038                                 }
1039                                 goto out;
1040                         }
1041                 }
1042         }
1043
1044         /* Failed to get EDID, what about VBT? */
1045         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1046                 DRM_DEBUG_KMS("using mode from VBT: ");
1047                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1048
1049                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1050                 if (fixed_mode) {
1051                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1052                         goto out;
1053                 }
1054         }
1055
1056         /*
1057          * If we didn't get EDID, try checking if the panel is already turned
1058          * on.  If so, assume that whatever is currently programmed is the
1059          * correct mode.
1060          */
1061
1062         /* Ironlake: FIXME if still fail, not try pipe mode now */
1063         if (HAS_PCH_SPLIT(dev))
1064                 goto failed;
1065
1066         lvds = I915_READ(LVDS);
1067         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1068         crtc = intel_get_crtc_for_pipe(dev, pipe);
1069
1070         if (crtc && (lvds & LVDS_PORT_EN)) {
1071                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1072                 if (fixed_mode) {
1073                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1074                         drm_mode_debug_printmodeline(fixed_mode);
1075                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1076                         goto out;
1077                 }
1078         }
1079
1080         /* If we still don't have a mode after all that, give up. */
1081         if (!fixed_mode)
1082                 goto failed;
1083
1084 out:
1085         mutex_unlock(&dev->mode_config.mutex);
1086
1087         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1088         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1089                       lvds_encoder->is_dual_link ? "dual" : "single");
1090
1091         /*
1092          * Unlock registers and just
1093          * leave them unlocked
1094          */
1095         if (HAS_PCH_SPLIT(dev)) {
1096                 I915_WRITE(PCH_PP_CONTROL,
1097                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1098         } else {
1099                 I915_WRITE(PP_CONTROL,
1100                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1101         }
1102         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1103         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1104                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1105                 lvds_connector->lid_notifier.notifier_call = NULL;
1106         }
1107         drm_sysfs_connector_add(connector);
1108
1109         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1110         intel_panel_setup_backlight(connector);
1111
1112         return;
1113
1114 failed:
1115         mutex_unlock(&dev->mode_config.mutex);
1116
1117         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1118         drm_connector_cleanup(connector);
1119         drm_encoder_cleanup(encoder);
1120         kfree(lvds_encoder);
1121         kfree(lvds_connector);
1122         return;
1123 }