2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Ben Widawsky <ben@bwidawsk.net>
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/stat.h>
31 #include <linux/sysfs.h>
32 #include "intel_drv.h"
36 static u32 calc_residency(struct drm_device *dev, const u32 reg)
38 struct drm_i915_private *dev_priv = dev->dev_private;
39 u64 raw_time; /* 32b value may overflow during fixed point math */
41 if (!intel_enable_rc6(dev))
44 raw_time = I915_READ(reg) * 128ULL;
45 return DIV_ROUND_UP_ULL(raw_time, 100000);
49 show_rc6_mask(struct device *dev, struct device_attribute *attr, char *buf)
51 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
52 return snprintf(buf, PAGE_SIZE, "%x", intel_enable_rc6(dminor->dev));
56 show_rc6_ms(struct device *dev, struct device_attribute *attr, char *buf)
58 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
59 u32 rc6_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6);
60 return snprintf(buf, PAGE_SIZE, "%u", rc6_residency);
64 show_rc6p_ms(struct device *dev, struct device_attribute *attr, char *buf)
66 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
67 u32 rc6p_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6p);
68 return snprintf(buf, PAGE_SIZE, "%u", rc6p_residency);
72 show_rc6pp_ms(struct device *dev, struct device_attribute *attr, char *buf)
74 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
75 u32 rc6pp_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6pp);
76 return snprintf(buf, PAGE_SIZE, "%u", rc6pp_residency);
79 static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
80 static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
81 static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
82 static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
84 static struct attribute *rc6_attrs[] = {
85 &dev_attr_rc6_enable.attr,
86 &dev_attr_rc6_residency_ms.attr,
87 &dev_attr_rc6p_residency_ms.attr,
88 &dev_attr_rc6pp_residency_ms.attr,
92 static struct attribute_group rc6_attr_group = {
93 .name = power_group_name,
97 static int l3_access_valid(struct drm_device *dev, loff_t offset)
99 if (!IS_IVYBRIDGE(dev))
105 if (offset >= GEN7_L3LOG_SIZE)
112 i915_l3_read(struct file *filp, struct kobject *kobj,
113 struct bin_attribute *attr, char *buf,
114 loff_t offset, size_t count)
116 struct device *dev = container_of(kobj, struct device, kobj);
117 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
118 struct drm_device *drm_dev = dminor->dev;
119 struct drm_i915_private *dev_priv = drm_dev->dev_private;
123 ret = l3_access_valid(drm_dev, offset);
127 ret = i915_mutex_lock_interruptible(drm_dev);
131 misccpctl = I915_READ(GEN7_MISCCPCTL);
132 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
134 for (i = offset; count >= 4 && i < GEN7_L3LOG_SIZE; i += 4, count -= 4)
135 *((uint32_t *)(&buf[i])) = I915_READ(GEN7_L3LOG_BASE + i);
137 I915_WRITE(GEN7_MISCCPCTL, misccpctl);
139 mutex_unlock(&drm_dev->struct_mutex);
145 i915_l3_write(struct file *filp, struct kobject *kobj,
146 struct bin_attribute *attr, char *buf,
147 loff_t offset, size_t count)
149 struct device *dev = container_of(kobj, struct device, kobj);
150 struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
151 struct drm_device *drm_dev = dminor->dev;
152 struct drm_i915_private *dev_priv = drm_dev->dev_private;
153 u32 *temp = NULL; /* Just here to make handling failures easy */
156 ret = l3_access_valid(drm_dev, offset);
160 ret = i915_mutex_lock_interruptible(drm_dev);
164 if (!dev_priv->mm.l3_remap_info) {
165 temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
167 mutex_unlock(&drm_dev->struct_mutex);
172 ret = i915_gpu_idle(drm_dev);
175 mutex_unlock(&drm_dev->struct_mutex);
179 /* TODO: Ideally we really want a GPU reset here to make sure errors
180 * aren't propagated. Since I cannot find a stable way to reset the GPU
181 * at this point it is left as a TODO.
184 dev_priv->mm.l3_remap_info = temp;
186 memcpy(dev_priv->mm.l3_remap_info + (offset/4),
190 i915_gem_l3_remap(drm_dev);
192 mutex_unlock(&drm_dev->struct_mutex);
197 static struct bin_attribute dpf_attrs = {
198 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
199 .size = GEN7_L3LOG_SIZE,
200 .read = i915_l3_read,
201 .write = i915_l3_write,
205 void i915_setup_sysfs(struct drm_device *dev)
209 if (INTEL_INFO(dev)->gen >= 6) {
210 ret = sysfs_merge_group(&dev->primary->kdev.kobj,
213 DRM_ERROR("RC6 residency sysfs setup failed\n");
216 if (HAS_L3_GPU_CACHE(dev)) {
217 ret = device_create_bin_file(&dev->primary->kdev, &dpf_attrs);
219 DRM_ERROR("l3 parity sysfs setup failed\n");
223 void i915_teardown_sysfs(struct drm_device *dev)
225 device_remove_bin_file(&dev->primary->kdev, &dpf_attrs);
226 sysfs_unmerge_group(&dev->primary->kdev.kobj, &rc6_attr_group);
229 void i915_setup_sysfs(struct drm_device *dev)
234 void i915_teardown_sysfs(struct drm_device *dev)
238 #endif /* CONFIG_PM */