2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_displayid.h>
39 #define version_greater(edid, maj, min) \
40 (((edid)->version > (maj)) || \
41 ((edid)->version == (maj) && (edid)->revision > (min)))
43 #define EDID_EST_TIMINGS 16
44 #define EDID_STD_TIMINGS 8
45 #define EDID_DETAILED_TIMINGS 4
48 * EDID blocks out in the wild have a variety of bugs, try to collect
49 * them here (note that userspace may work around broken monitors first,
50 * but fixes should make their way here so that the kernel "just works"
51 * on as many displays as possible).
54 /* First detailed mode wrong, use largest 60Hz mode */
55 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
56 /* Reported 135MHz pixel clock is too high, needs adjustment */
57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
58 /* Prefer the largest mode at 75 Hz */
59 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
60 /* Detail timing is in cm not mm */
61 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
62 /* Detailed timing descriptors have bogus size values, so just take the
63 * maximum size and use that.
65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
66 /* Monitor forgot to set the first detailed is preferred bit. */
67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
68 /* use +hsync +vsync for detailed mode */
69 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
70 /* Force reduced-blanking timings for detailed modes */
71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
73 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
75 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
77 #define EDID_QUIRK_FORCE_6BPC (1 << 10)
79 struct detailed_mode_closure {
80 struct drm_connector *connector;
92 static struct edid_quirk {
96 } edid_quirk_list[] = {
98 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
100 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
102 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
105 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
107 /* Belinea 10 15 55 */
108 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
109 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
111 /* Envision Peripherals, Inc. EN-7100e */
112 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
113 /* Envision EN2028 */
114 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
116 /* Funai Electronics PM36B */
117 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
118 EDID_QUIRK_DETAILED_IN_CM },
120 /* LG Philips LCD LP154W01-A5 */
121 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
122 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
124 /* Philips 107p5 CRT */
125 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
128 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
130 /* Samsung SyncMaster 205BW. Note: irony */
131 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
132 /* Samsung SyncMaster 22[5-6]BW */
133 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
134 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
136 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
137 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
139 /* ViewSonic VA2026w */
140 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
142 /* Medion MD 30217 PG */
143 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
145 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
146 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
148 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
149 { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
153 * Autogenerated from the DMT spec.
154 * This table is copied from xfree86/modes/xf86EdidModes.c.
156 static const struct drm_display_mode drm_dmt_modes[] = {
157 /* 0x01 - 640x350@85Hz */
158 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
159 736, 832, 0, 350, 382, 385, 445, 0,
160 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
161 /* 0x02 - 640x400@85Hz */
162 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
163 736, 832, 0, 400, 401, 404, 445, 0,
164 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
165 /* 0x03 - 720x400@85Hz */
166 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
167 828, 936, 0, 400, 401, 404, 446, 0,
168 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
169 /* 0x04 - 640x480@60Hz */
170 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
171 752, 800, 0, 480, 490, 492, 525, 0,
172 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
173 /* 0x05 - 640x480@72Hz */
174 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
175 704, 832, 0, 480, 489, 492, 520, 0,
176 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
177 /* 0x06 - 640x480@75Hz */
178 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
179 720, 840, 0, 480, 481, 484, 500, 0,
180 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
181 /* 0x07 - 640x480@85Hz */
182 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
183 752, 832, 0, 480, 481, 484, 509, 0,
184 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
185 /* 0x08 - 800x600@56Hz */
186 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
187 896, 1024, 0, 600, 601, 603, 625, 0,
188 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
189 /* 0x09 - 800x600@60Hz */
190 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
191 968, 1056, 0, 600, 601, 605, 628, 0,
192 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
193 /* 0x0a - 800x600@72Hz */
194 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
195 976, 1040, 0, 600, 637, 643, 666, 0,
196 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
197 /* 0x0b - 800x600@75Hz */
198 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
199 896, 1056, 0, 600, 601, 604, 625, 0,
200 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
201 /* 0x0c - 800x600@85Hz */
202 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
203 896, 1048, 0, 600, 601, 604, 631, 0,
204 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
205 /* 0x0d - 800x600@120Hz RB */
206 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
207 880, 960, 0, 600, 603, 607, 636, 0,
208 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
209 /* 0x0e - 848x480@60Hz */
210 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
211 976, 1088, 0, 480, 486, 494, 517, 0,
212 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
213 /* 0x0f - 1024x768@43Hz, interlace */
214 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
215 1208, 1264, 0, 768, 768, 772, 817, 0,
216 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
217 DRM_MODE_FLAG_INTERLACE) },
218 /* 0x10 - 1024x768@60Hz */
219 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
220 1184, 1344, 0, 768, 771, 777, 806, 0,
221 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
222 /* 0x11 - 1024x768@70Hz */
223 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
224 1184, 1328, 0, 768, 771, 777, 806, 0,
225 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
226 /* 0x12 - 1024x768@75Hz */
227 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
228 1136, 1312, 0, 768, 769, 772, 800, 0,
229 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
230 /* 0x13 - 1024x768@85Hz */
231 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
232 1168, 1376, 0, 768, 769, 772, 808, 0,
233 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
234 /* 0x14 - 1024x768@120Hz RB */
235 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
236 1104, 1184, 0, 768, 771, 775, 813, 0,
237 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
238 /* 0x15 - 1152x864@75Hz */
239 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
240 1344, 1600, 0, 864, 865, 868, 900, 0,
241 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
242 /* 0x55 - 1280x720@60Hz */
243 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
244 1430, 1650, 0, 720, 725, 730, 750, 0,
245 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
246 /* 0x16 - 1280x768@60Hz RB */
247 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
248 1360, 1440, 0, 768, 771, 778, 790, 0,
249 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
250 /* 0x17 - 1280x768@60Hz */
251 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
252 1472, 1664, 0, 768, 771, 778, 798, 0,
253 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
254 /* 0x18 - 1280x768@75Hz */
255 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
256 1488, 1696, 0, 768, 771, 778, 805, 0,
257 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
258 /* 0x19 - 1280x768@85Hz */
259 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
260 1496, 1712, 0, 768, 771, 778, 809, 0,
261 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
262 /* 0x1a - 1280x768@120Hz RB */
263 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
264 1360, 1440, 0, 768, 771, 778, 813, 0,
265 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
266 /* 0x1b - 1280x800@60Hz RB */
267 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
268 1360, 1440, 0, 800, 803, 809, 823, 0,
269 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
270 /* 0x1c - 1280x800@60Hz */
271 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
272 1480, 1680, 0, 800, 803, 809, 831, 0,
273 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
274 /* 0x1d - 1280x800@75Hz */
275 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
276 1488, 1696, 0, 800, 803, 809, 838, 0,
277 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
278 /* 0x1e - 1280x800@85Hz */
279 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
280 1496, 1712, 0, 800, 803, 809, 843, 0,
281 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
282 /* 0x1f - 1280x800@120Hz RB */
283 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
284 1360, 1440, 0, 800, 803, 809, 847, 0,
285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
286 /* 0x20 - 1280x960@60Hz */
287 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
288 1488, 1800, 0, 960, 961, 964, 1000, 0,
289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
290 /* 0x21 - 1280x960@85Hz */
291 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
292 1504, 1728, 0, 960, 961, 964, 1011, 0,
293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
294 /* 0x22 - 1280x960@120Hz RB */
295 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
296 1360, 1440, 0, 960, 963, 967, 1017, 0,
297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
298 /* 0x23 - 1280x1024@60Hz */
299 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
300 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
302 /* 0x24 - 1280x1024@75Hz */
303 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
304 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
306 /* 0x25 - 1280x1024@85Hz */
307 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
308 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
310 /* 0x26 - 1280x1024@120Hz RB */
311 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
312 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
313 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
314 /* 0x27 - 1360x768@60Hz */
315 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
316 1536, 1792, 0, 768, 771, 777, 795, 0,
317 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
318 /* 0x28 - 1360x768@120Hz RB */
319 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
320 1440, 1520, 0, 768, 771, 776, 813, 0,
321 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
322 /* 0x51 - 1366x768@60Hz */
323 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
324 1579, 1792, 0, 768, 771, 774, 798, 0,
325 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
326 /* 0x56 - 1366x768@60Hz */
327 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
328 1436, 1500, 0, 768, 769, 772, 800, 0,
329 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
330 /* 0x29 - 1400x1050@60Hz RB */
331 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
332 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
333 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
334 /* 0x2a - 1400x1050@60Hz */
335 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
336 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
337 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
338 /* 0x2b - 1400x1050@75Hz */
339 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
340 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
341 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
342 /* 0x2c - 1400x1050@85Hz */
343 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
344 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
345 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
346 /* 0x2d - 1400x1050@120Hz RB */
347 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
348 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
349 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
350 /* 0x2e - 1440x900@60Hz RB */
351 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
352 1520, 1600, 0, 900, 903, 909, 926, 0,
353 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
354 /* 0x2f - 1440x900@60Hz */
355 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
356 1672, 1904, 0, 900, 903, 909, 934, 0,
357 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
358 /* 0x30 - 1440x900@75Hz */
359 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
360 1688, 1936, 0, 900, 903, 909, 942, 0,
361 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
362 /* 0x31 - 1440x900@85Hz */
363 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
364 1696, 1952, 0, 900, 903, 909, 948, 0,
365 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
366 /* 0x32 - 1440x900@120Hz RB */
367 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
368 1520, 1600, 0, 900, 903, 909, 953, 0,
369 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
370 /* 0x53 - 1600x900@60Hz */
371 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
372 1704, 1800, 0, 900, 901, 904, 1000, 0,
373 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
374 /* 0x33 - 1600x1200@60Hz */
375 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
376 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
377 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
378 /* 0x34 - 1600x1200@65Hz */
379 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
380 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
381 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
382 /* 0x35 - 1600x1200@70Hz */
383 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
384 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
385 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
386 /* 0x36 - 1600x1200@75Hz */
387 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
388 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
389 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
390 /* 0x37 - 1600x1200@85Hz */
391 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
392 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
393 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
394 /* 0x38 - 1600x1200@120Hz RB */
395 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
396 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
397 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
398 /* 0x39 - 1680x1050@60Hz RB */
399 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
400 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
401 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
402 /* 0x3a - 1680x1050@60Hz */
403 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
404 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
405 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
406 /* 0x3b - 1680x1050@75Hz */
407 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
408 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
409 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
410 /* 0x3c - 1680x1050@85Hz */
411 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
412 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
413 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
414 /* 0x3d - 1680x1050@120Hz RB */
415 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
416 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
417 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
418 /* 0x3e - 1792x1344@60Hz */
419 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
420 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
421 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
422 /* 0x3f - 1792x1344@75Hz */
423 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
424 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
425 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
426 /* 0x40 - 1792x1344@120Hz RB */
427 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
428 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
429 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
430 /* 0x41 - 1856x1392@60Hz */
431 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
432 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
433 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
434 /* 0x42 - 1856x1392@75Hz */
435 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
436 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
437 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
438 /* 0x43 - 1856x1392@120Hz RB */
439 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
440 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
441 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
442 /* 0x52 - 1920x1080@60Hz */
443 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
444 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
445 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
446 /* 0x44 - 1920x1200@60Hz RB */
447 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
448 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
450 /* 0x45 - 1920x1200@60Hz */
451 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
452 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
453 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
454 /* 0x46 - 1920x1200@75Hz */
455 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
456 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
457 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
458 /* 0x47 - 1920x1200@85Hz */
459 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
460 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
461 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
462 /* 0x48 - 1920x1200@120Hz RB */
463 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
464 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
466 /* 0x49 - 1920x1440@60Hz */
467 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
468 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
469 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
470 /* 0x4a - 1920x1440@75Hz */
471 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
472 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
474 /* 0x4b - 1920x1440@120Hz RB */
475 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
476 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
478 /* 0x54 - 2048x1152@60Hz */
479 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
480 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
482 /* 0x4c - 2560x1600@60Hz RB */
483 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
484 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
486 /* 0x4d - 2560x1600@60Hz */
487 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
488 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
489 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
490 /* 0x4e - 2560x1600@75Hz */
491 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
492 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
494 /* 0x4f - 2560x1600@85Hz */
495 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
496 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
498 /* 0x50 - 2560x1600@120Hz RB */
499 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
500 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
502 /* 0x57 - 4096x2160@60Hz RB */
503 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
504 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
506 /* 0x58 - 4096x2160@59.94Hz RB */
507 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
508 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
513 * These more or less come from the DMT spec. The 720x400 modes are
514 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
515 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
516 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
519 * The DMT modes have been fact-checked; the rest are mild guesses.
521 static const struct drm_display_mode edid_est_modes[] = {
522 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
523 968, 1056, 0, 600, 601, 605, 628, 0,
524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
525 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
526 896, 1024, 0, 600, 601, 603, 625, 0,
527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
528 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
529 720, 840, 0, 480, 481, 484, 500, 0,
530 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
531 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
532 704, 832, 0, 480, 489, 491, 520, 0,
533 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
534 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
535 768, 864, 0, 480, 483, 486, 525, 0,
536 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
537 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
538 752, 800, 0, 480, 490, 492, 525, 0,
539 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
540 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
541 846, 900, 0, 400, 421, 423, 449, 0,
542 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
543 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
544 846, 900, 0, 400, 412, 414, 449, 0,
545 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
546 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
547 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
549 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
550 1136, 1312, 0, 768, 769, 772, 800, 0,
551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
552 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
553 1184, 1328, 0, 768, 771, 777, 806, 0,
554 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
555 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
556 1184, 1344, 0, 768, 771, 777, 806, 0,
557 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
558 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
559 1208, 1264, 0, 768, 768, 776, 817, 0,
560 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
561 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
562 928, 1152, 0, 624, 625, 628, 667, 0,
563 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
564 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
565 896, 1056, 0, 600, 601, 604, 625, 0,
566 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
567 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
568 976, 1040, 0, 600, 637, 643, 666, 0,
569 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
570 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
571 1344, 1600, 0, 864, 865, 868, 900, 0,
572 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
582 static const struct minimode est3_modes[] = {
590 { 1024, 768, 85, 0 },
591 { 1152, 864, 75, 0 },
593 { 1280, 768, 60, 1 },
594 { 1280, 768, 60, 0 },
595 { 1280, 768, 75, 0 },
596 { 1280, 768, 85, 0 },
597 { 1280, 960, 60, 0 },
598 { 1280, 960, 85, 0 },
599 { 1280, 1024, 60, 0 },
600 { 1280, 1024, 85, 0 },
602 { 1360, 768, 60, 0 },
603 { 1440, 900, 60, 1 },
604 { 1440, 900, 60, 0 },
605 { 1440, 900, 75, 0 },
606 { 1440, 900, 85, 0 },
607 { 1400, 1050, 60, 1 },
608 { 1400, 1050, 60, 0 },
609 { 1400, 1050, 75, 0 },
611 { 1400, 1050, 85, 0 },
612 { 1680, 1050, 60, 1 },
613 { 1680, 1050, 60, 0 },
614 { 1680, 1050, 75, 0 },
615 { 1680, 1050, 85, 0 },
616 { 1600, 1200, 60, 0 },
617 { 1600, 1200, 65, 0 },
618 { 1600, 1200, 70, 0 },
620 { 1600, 1200, 75, 0 },
621 { 1600, 1200, 85, 0 },
622 { 1792, 1344, 60, 0 },
623 { 1792, 1344, 75, 0 },
624 { 1856, 1392, 60, 0 },
625 { 1856, 1392, 75, 0 },
626 { 1920, 1200, 60, 1 },
627 { 1920, 1200, 60, 0 },
629 { 1920, 1200, 75, 0 },
630 { 1920, 1200, 85, 0 },
631 { 1920, 1440, 60, 0 },
632 { 1920, 1440, 75, 0 },
635 static const struct minimode extra_modes[] = {
636 { 1024, 576, 60, 0 },
637 { 1366, 768, 60, 0 },
638 { 1600, 900, 60, 0 },
639 { 1680, 945, 60, 0 },
640 { 1920, 1080, 60, 0 },
641 { 2048, 1152, 60, 0 },
642 { 2048, 1536, 60, 0 },
646 * Probably taken from CEA-861 spec.
647 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
649 static const struct drm_display_mode edid_cea_modes[] = {
650 /* 1 - 640x480@60Hz */
651 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
652 752, 800, 0, 480, 490, 492, 525, 0,
653 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
654 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
655 /* 2 - 720x480@60Hz */
656 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
657 798, 858, 0, 480, 489, 495, 525, 0,
658 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
659 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
660 /* 3 - 720x480@60Hz */
661 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
662 798, 858, 0, 480, 489, 495, 525, 0,
663 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
664 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
665 /* 4 - 1280x720@60Hz */
666 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
667 1430, 1650, 0, 720, 725, 730, 750, 0,
668 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
669 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
670 /* 5 - 1920x1080i@60Hz */
671 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
672 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
673 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
674 DRM_MODE_FLAG_INTERLACE),
675 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
676 /* 6 - 720(1440)x480i@60Hz */
677 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
678 801, 858, 0, 480, 488, 494, 525, 0,
679 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
680 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
681 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
682 /* 7 - 720(1440)x480i@60Hz */
683 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
684 801, 858, 0, 480, 488, 494, 525, 0,
685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
686 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
687 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
688 /* 8 - 720(1440)x240@60Hz */
689 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
690 801, 858, 0, 240, 244, 247, 262, 0,
691 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
692 DRM_MODE_FLAG_DBLCLK),
693 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
694 /* 9 - 720(1440)x240@60Hz */
695 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
696 801, 858, 0, 240, 244, 247, 262, 0,
697 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
698 DRM_MODE_FLAG_DBLCLK),
699 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
700 /* 10 - 2880x480i@60Hz */
701 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
702 3204, 3432, 0, 480, 488, 494, 525, 0,
703 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
704 DRM_MODE_FLAG_INTERLACE),
705 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
706 /* 11 - 2880x480i@60Hz */
707 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
708 3204, 3432, 0, 480, 488, 494, 525, 0,
709 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
710 DRM_MODE_FLAG_INTERLACE),
711 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
712 /* 12 - 2880x240@60Hz */
713 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
714 3204, 3432, 0, 240, 244, 247, 262, 0,
715 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
716 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
717 /* 13 - 2880x240@60Hz */
718 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
719 3204, 3432, 0, 240, 244, 247, 262, 0,
720 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
721 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
722 /* 14 - 1440x480@60Hz */
723 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
724 1596, 1716, 0, 480, 489, 495, 525, 0,
725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
726 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
727 /* 15 - 1440x480@60Hz */
728 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
729 1596, 1716, 0, 480, 489, 495, 525, 0,
730 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
731 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
732 /* 16 - 1920x1080@60Hz */
733 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
734 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
735 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
736 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
737 /* 17 - 720x576@50Hz */
738 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
739 796, 864, 0, 576, 581, 586, 625, 0,
740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
741 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
742 /* 18 - 720x576@50Hz */
743 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
744 796, 864, 0, 576, 581, 586, 625, 0,
745 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
746 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
747 /* 19 - 1280x720@50Hz */
748 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
749 1760, 1980, 0, 720, 725, 730, 750, 0,
750 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
751 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
752 /* 20 - 1920x1080i@50Hz */
753 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
754 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
755 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
756 DRM_MODE_FLAG_INTERLACE),
757 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
758 /* 21 - 720(1440)x576i@50Hz */
759 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
760 795, 864, 0, 576, 580, 586, 625, 0,
761 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
762 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
763 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
764 /* 22 - 720(1440)x576i@50Hz */
765 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
766 795, 864, 0, 576, 580, 586, 625, 0,
767 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
768 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
769 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
770 /* 23 - 720(1440)x288@50Hz */
771 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
772 795, 864, 0, 288, 290, 293, 312, 0,
773 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
774 DRM_MODE_FLAG_DBLCLK),
775 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
776 /* 24 - 720(1440)x288@50Hz */
777 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
778 795, 864, 0, 288, 290, 293, 312, 0,
779 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
780 DRM_MODE_FLAG_DBLCLK),
781 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
782 /* 25 - 2880x576i@50Hz */
783 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
784 3180, 3456, 0, 576, 580, 586, 625, 0,
785 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
786 DRM_MODE_FLAG_INTERLACE),
787 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
788 /* 26 - 2880x576i@50Hz */
789 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
790 3180, 3456, 0, 576, 580, 586, 625, 0,
791 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
792 DRM_MODE_FLAG_INTERLACE),
793 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
794 /* 27 - 2880x288@50Hz */
795 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
796 3180, 3456, 0, 288, 290, 293, 312, 0,
797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
798 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
799 /* 28 - 2880x288@50Hz */
800 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
801 3180, 3456, 0, 288, 290, 293, 312, 0,
802 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
803 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
804 /* 29 - 1440x576@50Hz */
805 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
806 1592, 1728, 0, 576, 581, 586, 625, 0,
807 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
808 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
809 /* 30 - 1440x576@50Hz */
810 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
811 1592, 1728, 0, 576, 581, 586, 625, 0,
812 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
813 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
814 /* 31 - 1920x1080@50Hz */
815 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
816 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
817 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
818 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
819 /* 32 - 1920x1080@24Hz */
820 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
821 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
822 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
823 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
824 /* 33 - 1920x1080@25Hz */
825 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
826 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
827 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
828 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
829 /* 34 - 1920x1080@30Hz */
830 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
831 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
832 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
833 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
834 /* 35 - 2880x480@60Hz */
835 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
836 3192, 3432, 0, 480, 489, 495, 525, 0,
837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
839 /* 36 - 2880x480@60Hz */
840 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
841 3192, 3432, 0, 480, 489, 495, 525, 0,
842 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
843 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844 /* 37 - 2880x576@50Hz */
845 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
846 3184, 3456, 0, 576, 581, 586, 625, 0,
847 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
848 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
849 /* 38 - 2880x576@50Hz */
850 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
851 3184, 3456, 0, 576, 581, 586, 625, 0,
852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
853 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
854 /* 39 - 1920x1080i@50Hz */
855 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
856 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
857 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
858 DRM_MODE_FLAG_INTERLACE),
859 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
860 /* 40 - 1920x1080i@100Hz */
861 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
862 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
863 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
864 DRM_MODE_FLAG_INTERLACE),
865 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
866 /* 41 - 1280x720@100Hz */
867 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
868 1760, 1980, 0, 720, 725, 730, 750, 0,
869 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
870 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
871 /* 42 - 720x576@100Hz */
872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
873 796, 864, 0, 576, 581, 586, 625, 0,
874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
875 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
876 /* 43 - 720x576@100Hz */
877 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
878 796, 864, 0, 576, 581, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
880 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
881 /* 44 - 720(1440)x576i@100Hz */
882 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
883 795, 864, 0, 576, 580, 586, 625, 0,
884 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
885 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
886 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
887 /* 45 - 720(1440)x576i@100Hz */
888 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
889 795, 864, 0, 576, 580, 586, 625, 0,
890 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
891 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
892 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
893 /* 46 - 1920x1080i@120Hz */
894 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
895 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
896 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
897 DRM_MODE_FLAG_INTERLACE),
898 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
899 /* 47 - 1280x720@120Hz */
900 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
901 1430, 1650, 0, 720, 725, 730, 750, 0,
902 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
903 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
904 /* 48 - 720x480@120Hz */
905 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
906 798, 858, 0, 480, 489, 495, 525, 0,
907 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
908 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
909 /* 49 - 720x480@120Hz */
910 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
911 798, 858, 0, 480, 489, 495, 525, 0,
912 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
913 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
914 /* 50 - 720(1440)x480i@120Hz */
915 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
916 801, 858, 0, 480, 488, 494, 525, 0,
917 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
918 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
919 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
920 /* 51 - 720(1440)x480i@120Hz */
921 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
922 801, 858, 0, 480, 488, 494, 525, 0,
923 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
924 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
925 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
926 /* 52 - 720x576@200Hz */
927 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
928 796, 864, 0, 576, 581, 586, 625, 0,
929 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
930 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
931 /* 53 - 720x576@200Hz */
932 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
933 796, 864, 0, 576, 581, 586, 625, 0,
934 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
935 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
936 /* 54 - 720(1440)x576i@200Hz */
937 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
938 795, 864, 0, 576, 580, 586, 625, 0,
939 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
940 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
941 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
942 /* 55 - 720(1440)x576i@200Hz */
943 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
944 795, 864, 0, 576, 580, 586, 625, 0,
945 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
946 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
947 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
948 /* 56 - 720x480@240Hz */
949 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
950 798, 858, 0, 480, 489, 495, 525, 0,
951 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
952 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
953 /* 57 - 720x480@240Hz */
954 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
955 798, 858, 0, 480, 489, 495, 525, 0,
956 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
957 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
958 /* 58 - 720(1440)x480i@240 */
959 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
960 801, 858, 0, 480, 488, 494, 525, 0,
961 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
962 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
963 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
964 /* 59 - 720(1440)x480i@240 */
965 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
966 801, 858, 0, 480, 488, 494, 525, 0,
967 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
968 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
969 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
970 /* 60 - 1280x720@24Hz */
971 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
972 3080, 3300, 0, 720, 725, 730, 750, 0,
973 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
974 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
975 /* 61 - 1280x720@25Hz */
976 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
977 3740, 3960, 0, 720, 725, 730, 750, 0,
978 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
979 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
980 /* 62 - 1280x720@30Hz */
981 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
982 3080, 3300, 0, 720, 725, 730, 750, 0,
983 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
984 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
985 /* 63 - 1920x1080@120Hz */
986 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
987 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
988 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
989 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
990 /* 64 - 1920x1080@100Hz */
991 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
992 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
993 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
994 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1000 static const struct drm_display_mode edid_4k_modes[] = {
1001 /* 1 - 3840x2160@30Hz */
1002 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1003 3840, 4016, 4104, 4400, 0,
1004 2160, 2168, 2178, 2250, 0,
1005 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1007 /* 2 - 3840x2160@25Hz */
1008 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1009 3840, 4896, 4984, 5280, 0,
1010 2160, 2168, 2178, 2250, 0,
1011 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1013 /* 3 - 3840x2160@24Hz */
1014 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1015 3840, 5116, 5204, 5500, 0,
1016 2160, 2168, 2178, 2250, 0,
1017 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1019 /* 4 - 4096x2160@24Hz (SMPTE) */
1020 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1021 4096, 5116, 5204, 5500, 0,
1022 2160, 2168, 2178, 2250, 0,
1023 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1027 /*** DDC fetch and block validation ***/
1029 static const u8 edid_header[] = {
1030 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1034 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1035 * @raw_edid: pointer to raw base EDID block
1037 * Sanity check the header of the base EDID block.
1039 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1041 int drm_edid_header_is_valid(const u8 *raw_edid)
1045 for (i = 0; i < sizeof(edid_header); i++)
1046 if (raw_edid[i] == edid_header[i])
1051 EXPORT_SYMBOL(drm_edid_header_is_valid);
1053 static int edid_fixup __read_mostly = 6;
1054 module_param_named(edid_fixup, edid_fixup, int, 0400);
1055 MODULE_PARM_DESC(edid_fixup,
1056 "Minimum number of valid EDID header bytes (0-8, default 6)");
1058 static void drm_get_displayid(struct drm_connector *connector,
1061 static int drm_edid_block_checksum(const u8 *raw_edid)
1065 for (i = 0; i < EDID_LENGTH; i++)
1066 csum += raw_edid[i];
1071 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1073 if (memchr_inv(in_edid, 0, length))
1080 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1081 * @raw_edid: pointer to raw EDID block
1082 * @block: type of block to validate (0 for base, extension otherwise)
1083 * @print_bad_edid: if true, dump bad EDID blocks to the console
1084 * @edid_corrupt: if true, the header or checksum is invalid
1086 * Validate a base or extension EDID block and optionally dump bad blocks to
1089 * Return: True if the block is valid, false otherwise.
1091 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1095 struct edid *edid = (struct edid *)raw_edid;
1097 if (WARN_ON(!raw_edid))
1100 if (edid_fixup > 8 || edid_fixup < 0)
1104 int score = drm_edid_header_is_valid(raw_edid);
1107 *edid_corrupt = false;
1108 } else if (score >= edid_fixup) {
1109 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1110 * The corrupt flag needs to be set here otherwise, the
1111 * fix-up code here will correct the problem, the
1112 * checksum is correct and the test fails
1115 *edid_corrupt = true;
1116 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1117 memcpy(raw_edid, edid_header, sizeof(edid_header));
1120 *edid_corrupt = true;
1125 csum = drm_edid_block_checksum(raw_edid);
1127 if (print_bad_edid) {
1128 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1132 *edid_corrupt = true;
1134 /* allow CEA to slide through, switches mangle this */
1135 if (raw_edid[0] != 0x02)
1139 /* per-block-type checks */
1140 switch (raw_edid[0]) {
1142 if (edid->version != 1) {
1143 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1147 if (edid->revision > 4)
1148 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1158 if (print_bad_edid) {
1159 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1160 printk(KERN_ERR "EDID block is all zeroes\n");
1162 printk(KERN_ERR "Raw EDID:\n");
1163 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1164 raw_edid, EDID_LENGTH, false);
1169 EXPORT_SYMBOL(drm_edid_block_valid);
1172 * drm_edid_is_valid - sanity check EDID data
1175 * Sanity-check an entire EDID record (including extensions)
1177 * Return: True if the EDID data is valid, false otherwise.
1179 bool drm_edid_is_valid(struct edid *edid)
1182 u8 *raw = (u8 *)edid;
1187 for (i = 0; i <= edid->extensions; i++)
1188 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1193 EXPORT_SYMBOL(drm_edid_is_valid);
1195 #define DDC_SEGMENT_ADDR 0x30
1197 * drm_do_probe_ddc_edid() - get EDID information via I2C
1198 * @data: I2C device adapter
1199 * @buf: EDID data buffer to be filled
1200 * @block: 128 byte EDID block to start fetching from
1201 * @len: EDID data buffer length to fetch
1203 * Try to fetch EDID information by calling I2C driver functions.
1205 * Return: 0 on success or -1 on failure.
1208 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1210 struct i2c_adapter *adapter = data;
1211 unsigned char start = block * EDID_LENGTH;
1212 unsigned char segment = block >> 1;
1213 unsigned char xfers = segment ? 3 : 2;
1214 int ret, retries = 5;
1217 * The core I2C driver will automatically retry the transfer if the
1218 * adapter reports EAGAIN. However, we find that bit-banging transfers
1219 * are susceptible to errors under a heavily loaded machine and
1220 * generate spurious NAKs and timeouts. Retrying the transfer
1221 * of the individual block a few times seems to overcome this.
1224 struct i2c_msg msgs[] = {
1226 .addr = DDC_SEGMENT_ADDR,
1244 * Avoid sending the segment addr to not upset non-compliant
1247 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1249 if (ret == -ENXIO) {
1250 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1254 } while (ret != xfers && --retries);
1256 return ret == xfers ? 0 : -1;
1260 * drm_do_get_edid - get EDID data using a custom EDID block read function
1261 * @connector: connector we're probing
1262 * @get_edid_block: EDID block read function
1263 * @data: private data passed to the block read function
1265 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1266 * exposes a different interface to read EDID blocks this function can be used
1267 * to get EDID data using a custom block read function.
1269 * As in the general case the DDC bus is accessible by the kernel at the I2C
1270 * level, drivers must make all reasonable efforts to expose it as an I2C
1271 * adapter and use drm_get_edid() instead of abusing this function.
1273 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1275 struct edid *drm_do_get_edid(struct drm_connector *connector,
1276 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1280 int i, j = 0, valid_extensions = 0;
1282 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1284 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1287 /* base block fetch */
1288 for (i = 0; i < 4; i++) {
1289 if (get_edid_block(data, block, 0, EDID_LENGTH))
1291 if (drm_edid_block_valid(block, 0, print_bad_edid,
1292 &connector->edid_corrupt))
1294 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1295 connector->null_edid_counter++;
1302 /* if there's no extensions, we're done */
1303 if (block[0x7e] == 0)
1304 return (struct edid *)block;
1306 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1311 for (j = 1; j <= block[0x7e]; j++) {
1312 for (i = 0; i < 4; i++) {
1313 if (get_edid_block(data,
1314 block + (valid_extensions + 1) * EDID_LENGTH,
1317 if (drm_edid_block_valid(block + (valid_extensions + 1)
1326 if (i == 4 && print_bad_edid) {
1327 dev_warn(connector->dev->dev,
1328 "%s: Ignoring invalid EDID block %d.\n",
1329 connector->name, j);
1331 connector->bad_edid_counter++;
1335 if (valid_extensions != block[0x7e]) {
1336 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1337 block[0x7e] = valid_extensions;
1338 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1344 return (struct edid *)block;
1347 if (print_bad_edid) {
1348 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1349 connector->name, j);
1351 connector->bad_edid_counter++;
1357 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1360 * drm_probe_ddc() - probe DDC presence
1361 * @adapter: I2C adapter to probe
1363 * Return: True on success, false on failure.
1366 drm_probe_ddc(struct i2c_adapter *adapter)
1370 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1372 EXPORT_SYMBOL(drm_probe_ddc);
1375 * drm_get_edid - get EDID data, if available
1376 * @connector: connector we're probing
1377 * @adapter: I2C adapter to use for DDC
1379 * Poke the given I2C channel to grab EDID data if possible. If found,
1380 * attach it to the connector.
1382 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1384 struct edid *drm_get_edid(struct drm_connector *connector,
1385 struct i2c_adapter *adapter)
1389 if (!drm_probe_ddc(adapter))
1392 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1394 drm_get_displayid(connector, edid);
1397 EXPORT_SYMBOL(drm_get_edid);
1400 * drm_edid_duplicate - duplicate an EDID and the extensions
1401 * @edid: EDID to duplicate
1403 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1405 struct edid *drm_edid_duplicate(const struct edid *edid)
1407 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1409 EXPORT_SYMBOL(drm_edid_duplicate);
1411 /*** EDID parsing ***/
1414 * edid_vendor - match a string against EDID's obfuscated vendor field
1415 * @edid: EDID to match
1416 * @vendor: vendor string
1418 * Returns true if @vendor is in @edid, false otherwise
1420 static bool edid_vendor(struct edid *edid, char *vendor)
1422 char edid_vendor[3];
1424 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1425 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1426 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1427 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1429 return !strncmp(edid_vendor, vendor, 3);
1433 * edid_get_quirks - return quirk flags for a given EDID
1434 * @edid: EDID to process
1436 * This tells subsequent routines what fixes they need to apply.
1438 static u32 edid_get_quirks(struct edid *edid)
1440 struct edid_quirk *quirk;
1443 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1444 quirk = &edid_quirk_list[i];
1446 if (edid_vendor(edid, quirk->vendor) &&
1447 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1448 return quirk->quirks;
1454 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1455 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1458 * edid_fixup_preferred - set preferred modes based on quirk list
1459 * @connector: has mode list to fix up
1460 * @quirks: quirks list
1462 * Walk the mode list for @connector, clearing the preferred status
1463 * on existing modes and setting it anew for the right mode ala @quirks.
1465 static void edid_fixup_preferred(struct drm_connector *connector,
1468 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1469 int target_refresh = 0;
1470 int cur_vrefresh, preferred_vrefresh;
1472 if (list_empty(&connector->probed_modes))
1475 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1476 target_refresh = 60;
1477 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1478 target_refresh = 75;
1480 preferred_mode = list_first_entry(&connector->probed_modes,
1481 struct drm_display_mode, head);
1483 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1484 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1486 if (cur_mode == preferred_mode)
1489 /* Largest mode is preferred */
1490 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1491 preferred_mode = cur_mode;
1493 cur_vrefresh = cur_mode->vrefresh ?
1494 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1495 preferred_vrefresh = preferred_mode->vrefresh ?
1496 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1497 /* At a given size, try to get closest to target refresh */
1498 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1499 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1500 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1501 preferred_mode = cur_mode;
1505 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1509 mode_is_rb(const struct drm_display_mode *mode)
1511 return (mode->htotal - mode->hdisplay == 160) &&
1512 (mode->hsync_end - mode->hdisplay == 80) &&
1513 (mode->hsync_end - mode->hsync_start == 32) &&
1514 (mode->vsync_start - mode->vdisplay == 3);
1518 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1519 * @dev: Device to duplicate against
1520 * @hsize: Mode width
1521 * @vsize: Mode height
1522 * @fresh: Mode refresh rate
1523 * @rb: Mode reduced-blanking-ness
1525 * Walk the DMT mode list looking for a match for the given parameters.
1527 * Return: A newly allocated copy of the mode, or NULL if not found.
1529 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1530 int hsize, int vsize, int fresh,
1535 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1536 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1537 if (hsize != ptr->hdisplay)
1539 if (vsize != ptr->vdisplay)
1541 if (fresh != drm_mode_vrefresh(ptr))
1543 if (rb != mode_is_rb(ptr))
1546 return drm_mode_duplicate(dev, ptr);
1551 EXPORT_SYMBOL(drm_mode_find_dmt);
1553 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1556 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1560 u8 *det_base = ext + d;
1563 for (i = 0; i < n; i++)
1564 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1568 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1570 unsigned int i, n = min((int)ext[0x02], 6);
1571 u8 *det_base = ext + 5;
1574 return; /* unknown version */
1576 for (i = 0; i < n; i++)
1577 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1581 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1584 struct edid *edid = (struct edid *)raw_edid;
1589 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1590 cb(&(edid->detailed_timings[i]), closure);
1592 for (i = 1; i <= raw_edid[0x7e]; i++) {
1593 u8 *ext = raw_edid + (i * EDID_LENGTH);
1596 cea_for_each_detailed_block(ext, cb, closure);
1599 vtb_for_each_detailed_block(ext, cb, closure);
1608 is_rb(struct detailed_timing *t, void *data)
1611 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1613 *(bool *)data = true;
1616 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1618 drm_monitor_supports_rb(struct edid *edid)
1620 if (edid->revision >= 4) {
1622 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1626 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1630 find_gtf2(struct detailed_timing *t, void *data)
1633 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1637 /* Secondary GTF curve kicks in above some break frequency */
1639 drm_gtf2_hbreak(struct edid *edid)
1642 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1643 return r ? (r[12] * 2) : 0;
1647 drm_gtf2_2c(struct edid *edid)
1650 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1651 return r ? r[13] : 0;
1655 drm_gtf2_m(struct edid *edid)
1658 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1659 return r ? (r[15] << 8) + r[14] : 0;
1663 drm_gtf2_k(struct edid *edid)
1666 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1667 return r ? r[16] : 0;
1671 drm_gtf2_2j(struct edid *edid)
1674 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1675 return r ? r[17] : 0;
1679 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1680 * @edid: EDID block to scan
1682 static int standard_timing_level(struct edid *edid)
1684 if (edid->revision >= 2) {
1685 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1687 if (drm_gtf2_hbreak(edid))
1695 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1696 * monitors fill with ascii space (0x20) instead.
1699 bad_std_timing(u8 a, u8 b)
1701 return (a == 0x00 && b == 0x00) ||
1702 (a == 0x01 && b == 0x01) ||
1703 (a == 0x20 && b == 0x20);
1707 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1708 * @connector: connector of for the EDID block
1709 * @edid: EDID block to scan
1710 * @t: standard timing params
1712 * Take the standard timing params (in this case width, aspect, and refresh)
1713 * and convert them into a real mode using CVT/GTF/DMT.
1715 static struct drm_display_mode *
1716 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1717 struct std_timing *t)
1719 struct drm_device *dev = connector->dev;
1720 struct drm_display_mode *m, *mode = NULL;
1723 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1724 >> EDID_TIMING_ASPECT_SHIFT;
1725 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1726 >> EDID_TIMING_VFREQ_SHIFT;
1727 int timing_level = standard_timing_level(edid);
1729 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1732 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1733 hsize = t->hsize * 8 + 248;
1734 /* vrefresh_rate = vfreq + 60 */
1735 vrefresh_rate = vfreq + 60;
1736 /* the vdisplay is calculated based on the aspect ratio */
1737 if (aspect_ratio == 0) {
1738 if (edid->revision < 3)
1741 vsize = (hsize * 10) / 16;
1742 } else if (aspect_ratio == 1)
1743 vsize = (hsize * 3) / 4;
1744 else if (aspect_ratio == 2)
1745 vsize = (hsize * 4) / 5;
1747 vsize = (hsize * 9) / 16;
1749 /* HDTV hack, part 1 */
1750 if (vrefresh_rate == 60 &&
1751 ((hsize == 1360 && vsize == 765) ||
1752 (hsize == 1368 && vsize == 769))) {
1758 * If this connector already has a mode for this size and refresh
1759 * rate (because it came from detailed or CVT info), use that
1760 * instead. This way we don't have to guess at interlace or
1763 list_for_each_entry(m, &connector->probed_modes, head)
1764 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1765 drm_mode_vrefresh(m) == vrefresh_rate)
1768 /* HDTV hack, part 2 */
1769 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1770 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1772 mode->hdisplay = 1366;
1773 mode->hsync_start = mode->hsync_start - 1;
1774 mode->hsync_end = mode->hsync_end - 1;
1778 /* check whether it can be found in default mode table */
1779 if (drm_monitor_supports_rb(edid)) {
1780 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1785 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1789 /* okay, generate it */
1790 switch (timing_level) {
1794 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1798 * This is potentially wrong if there's ever a monitor with
1799 * more than one ranges section, each claiming a different
1800 * secondary GTF curve. Please don't do that.
1802 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1805 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1806 drm_mode_destroy(dev, mode);
1807 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1808 vrefresh_rate, 0, 0,
1816 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1824 * EDID is delightfully ambiguous about how interlaced modes are to be
1825 * encoded. Our internal representation is of frame height, but some
1826 * HDTV detailed timings are encoded as field height.
1828 * The format list here is from CEA, in frame size. Technically we
1829 * should be checking refresh rate too. Whatever.
1832 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1833 struct detailed_pixel_timing *pt)
1836 static const struct {
1838 } cea_interlaced[] = {
1848 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1851 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1852 if ((mode->hdisplay == cea_interlaced[i].w) &&
1853 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1854 mode->vdisplay *= 2;
1855 mode->vsync_start *= 2;
1856 mode->vsync_end *= 2;
1862 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1866 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1867 * @dev: DRM device (needed to create new mode)
1869 * @timing: EDID detailed timing info
1870 * @quirks: quirks to apply
1872 * An EDID detailed timing block contains enough info for us to create and
1873 * return a new struct drm_display_mode.
1875 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1877 struct detailed_timing *timing,
1880 struct drm_display_mode *mode;
1881 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1882 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1883 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1884 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1885 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1886 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1887 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1888 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1889 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1891 /* ignore tiny modes */
1892 if (hactive < 64 || vactive < 64)
1895 if (pt->misc & DRM_EDID_PT_STEREO) {
1896 DRM_DEBUG_KMS("stereo mode not supported\n");
1899 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1900 DRM_DEBUG_KMS("composite sync not supported\n");
1903 /* it is incorrect if hsync/vsync width is zero */
1904 if (!hsync_pulse_width || !vsync_pulse_width) {
1905 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1906 "Wrong Hsync/Vsync pulse width\n");
1910 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1911 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1918 mode = drm_mode_create(dev);
1922 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1923 timing->pixel_clock = cpu_to_le16(1088);
1925 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1927 mode->hdisplay = hactive;
1928 mode->hsync_start = mode->hdisplay + hsync_offset;
1929 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1930 mode->htotal = mode->hdisplay + hblank;
1932 mode->vdisplay = vactive;
1933 mode->vsync_start = mode->vdisplay + vsync_offset;
1934 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1935 mode->vtotal = mode->vdisplay + vblank;
1937 /* Some EDIDs have bogus h/vtotal values */
1938 if (mode->hsync_end > mode->htotal)
1939 mode->htotal = mode->hsync_end + 1;
1940 if (mode->vsync_end > mode->vtotal)
1941 mode->vtotal = mode->vsync_end + 1;
1943 drm_mode_do_interlace_quirk(mode, pt);
1945 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1946 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1949 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1950 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1951 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1952 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1955 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1956 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1958 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1959 mode->width_mm *= 10;
1960 mode->height_mm *= 10;
1963 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1964 mode->width_mm = edid->width_cm * 10;
1965 mode->height_mm = edid->height_cm * 10;
1968 mode->type = DRM_MODE_TYPE_DRIVER;
1969 mode->vrefresh = drm_mode_vrefresh(mode);
1970 drm_mode_set_name(mode);
1976 mode_in_hsync_range(const struct drm_display_mode *mode,
1977 struct edid *edid, u8 *t)
1979 int hsync, hmin, hmax;
1982 if (edid->revision >= 4)
1983 hmin += ((t[4] & 0x04) ? 255 : 0);
1985 if (edid->revision >= 4)
1986 hmax += ((t[4] & 0x08) ? 255 : 0);
1987 hsync = drm_mode_hsync(mode);
1989 return (hsync <= hmax && hsync >= hmin);
1993 mode_in_vsync_range(const struct drm_display_mode *mode,
1994 struct edid *edid, u8 *t)
1996 int vsync, vmin, vmax;
1999 if (edid->revision >= 4)
2000 vmin += ((t[4] & 0x01) ? 255 : 0);
2002 if (edid->revision >= 4)
2003 vmax += ((t[4] & 0x02) ? 255 : 0);
2004 vsync = drm_mode_vrefresh(mode);
2006 return (vsync <= vmax && vsync >= vmin);
2010 range_pixel_clock(struct edid *edid, u8 *t)
2013 if (t[9] == 0 || t[9] == 255)
2016 /* 1.4 with CVT support gives us real precision, yay */
2017 if (edid->revision >= 4 && t[10] == 0x04)
2018 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2020 /* 1.3 is pathetic, so fuzz up a bit */
2021 return t[9] * 10000 + 5001;
2025 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2026 struct detailed_timing *timing)
2029 u8 *t = (u8 *)timing;
2031 if (!mode_in_hsync_range(mode, edid, t))
2034 if (!mode_in_vsync_range(mode, edid, t))
2037 if ((max_clock = range_pixel_clock(edid, t)))
2038 if (mode->clock > max_clock)
2041 /* 1.4 max horizontal check */
2042 if (edid->revision >= 4 && t[10] == 0x04)
2043 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2046 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2052 static bool valid_inferred_mode(const struct drm_connector *connector,
2053 const struct drm_display_mode *mode)
2055 const struct drm_display_mode *m;
2058 list_for_each_entry(m, &connector->probed_modes, head) {
2059 if (mode->hdisplay == m->hdisplay &&
2060 mode->vdisplay == m->vdisplay &&
2061 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2062 return false; /* duplicated */
2063 if (mode->hdisplay <= m->hdisplay &&
2064 mode->vdisplay <= m->vdisplay)
2071 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2072 struct detailed_timing *timing)
2075 struct drm_display_mode *newmode;
2076 struct drm_device *dev = connector->dev;
2078 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2079 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2080 valid_inferred_mode(connector, drm_dmt_modes + i)) {
2081 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2083 drm_mode_probed_add(connector, newmode);
2092 /* fix up 1366x768 mode from 1368x768;
2093 * GFT/CVT can't express 1366 width which isn't dividable by 8
2095 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2097 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2098 mode->hdisplay = 1366;
2099 mode->hsync_start--;
2101 drm_mode_set_name(mode);
2106 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2107 struct detailed_timing *timing)
2110 struct drm_display_mode *newmode;
2111 struct drm_device *dev = connector->dev;
2113 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2114 const struct minimode *m = &extra_modes[i];
2115 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2119 fixup_mode_1366x768(newmode);
2120 if (!mode_in_range(newmode, edid, timing) ||
2121 !valid_inferred_mode(connector, newmode)) {
2122 drm_mode_destroy(dev, newmode);
2126 drm_mode_probed_add(connector, newmode);
2134 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2135 struct detailed_timing *timing)
2138 struct drm_display_mode *newmode;
2139 struct drm_device *dev = connector->dev;
2140 bool rb = drm_monitor_supports_rb(edid);
2142 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2143 const struct minimode *m = &extra_modes[i];
2144 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2148 fixup_mode_1366x768(newmode);
2149 if (!mode_in_range(newmode, edid, timing) ||
2150 !valid_inferred_mode(connector, newmode)) {
2151 drm_mode_destroy(dev, newmode);
2155 drm_mode_probed_add(connector, newmode);
2163 do_inferred_modes(struct detailed_timing *timing, void *c)
2165 struct detailed_mode_closure *closure = c;
2166 struct detailed_non_pixel *data = &timing->data.other_data;
2167 struct detailed_data_monitor_range *range = &data->data.range;
2169 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2172 closure->modes += drm_dmt_modes_for_range(closure->connector,
2176 if (!version_greater(closure->edid, 1, 1))
2177 return; /* GTF not defined yet */
2179 switch (range->flags) {
2180 case 0x02: /* secondary gtf, XXX could do more */
2181 case 0x00: /* default gtf */
2182 closure->modes += drm_gtf_modes_for_range(closure->connector,
2186 case 0x04: /* cvt, only in 1.4+ */
2187 if (!version_greater(closure->edid, 1, 3))
2190 closure->modes += drm_cvt_modes_for_range(closure->connector,
2194 case 0x01: /* just the ranges, no formula */
2201 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2203 struct detailed_mode_closure closure = {
2204 .connector = connector,
2208 if (version_greater(edid, 1, 0))
2209 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2212 return closure.modes;
2216 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2218 int i, j, m, modes = 0;
2219 struct drm_display_mode *mode;
2220 u8 *est = ((u8 *)timing) + 5;
2222 for (i = 0; i < 6; i++) {
2223 for (j = 7; j >= 0; j--) {
2224 m = (i * 8) + (7 - j);
2225 if (m >= ARRAY_SIZE(est3_modes))
2227 if (est[i] & (1 << j)) {
2228 mode = drm_mode_find_dmt(connector->dev,
2234 drm_mode_probed_add(connector, mode);
2245 do_established_modes(struct detailed_timing *timing, void *c)
2247 struct detailed_mode_closure *closure = c;
2248 struct detailed_non_pixel *data = &timing->data.other_data;
2250 if (data->type == EDID_DETAIL_EST_TIMINGS)
2251 closure->modes += drm_est3_modes(closure->connector, timing);
2255 * add_established_modes - get est. modes from EDID and add them
2256 * @connector: connector to add mode(s) to
2257 * @edid: EDID block to scan
2259 * Each EDID block contains a bitmap of the supported "established modes" list
2260 * (defined above). Tease them out and add them to the global modes list.
2263 add_established_modes(struct drm_connector *connector, struct edid *edid)
2265 struct drm_device *dev = connector->dev;
2266 unsigned long est_bits = edid->established_timings.t1 |
2267 (edid->established_timings.t2 << 8) |
2268 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2270 struct detailed_mode_closure closure = {
2271 .connector = connector,
2275 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2276 if (est_bits & (1<<i)) {
2277 struct drm_display_mode *newmode;
2278 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2280 drm_mode_probed_add(connector, newmode);
2286 if (version_greater(edid, 1, 0))
2287 drm_for_each_detailed_block((u8 *)edid,
2288 do_established_modes, &closure);
2290 return modes + closure.modes;
2294 do_standard_modes(struct detailed_timing *timing, void *c)
2296 struct detailed_mode_closure *closure = c;
2297 struct detailed_non_pixel *data = &timing->data.other_data;
2298 struct drm_connector *connector = closure->connector;
2299 struct edid *edid = closure->edid;
2301 if (data->type == EDID_DETAIL_STD_MODES) {
2303 for (i = 0; i < 6; i++) {
2304 struct std_timing *std;
2305 struct drm_display_mode *newmode;
2307 std = &data->data.timings[i];
2308 newmode = drm_mode_std(connector, edid, std);
2310 drm_mode_probed_add(connector, newmode);
2318 * add_standard_modes - get std. modes from EDID and add them
2319 * @connector: connector to add mode(s) to
2320 * @edid: EDID block to scan
2322 * Standard modes can be calculated using the appropriate standard (DMT,
2323 * GTF or CVT. Grab them from @edid and add them to the list.
2326 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2329 struct detailed_mode_closure closure = {
2330 .connector = connector,
2334 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2335 struct drm_display_mode *newmode;
2337 newmode = drm_mode_std(connector, edid,
2338 &edid->standard_timings[i]);
2340 drm_mode_probed_add(connector, newmode);
2345 if (version_greater(edid, 1, 0))
2346 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2349 /* XXX should also look for standard codes in VTB blocks */
2351 return modes + closure.modes;
2354 static int drm_cvt_modes(struct drm_connector *connector,
2355 struct detailed_timing *timing)
2357 int i, j, modes = 0;
2358 struct drm_display_mode *newmode;
2359 struct drm_device *dev = connector->dev;
2360 struct cvt_timing *cvt;
2361 const int rates[] = { 60, 85, 75, 60, 50 };
2362 const u8 empty[3] = { 0, 0, 0 };
2364 for (i = 0; i < 4; i++) {
2365 int uninitialized_var(width), height;
2366 cvt = &(timing->data.other_data.data.cvt[i]);
2368 if (!memcmp(cvt->code, empty, 3))
2371 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2372 switch (cvt->code[1] & 0x0c) {
2374 width = height * 4 / 3;
2377 width = height * 16 / 9;
2380 width = height * 16 / 10;
2383 width = height * 15 / 9;
2387 for (j = 1; j < 5; j++) {
2388 if (cvt->code[2] & (1 << j)) {
2389 newmode = drm_cvt_mode(dev, width, height,
2393 drm_mode_probed_add(connector, newmode);
2404 do_cvt_mode(struct detailed_timing *timing, void *c)
2406 struct detailed_mode_closure *closure = c;
2407 struct detailed_non_pixel *data = &timing->data.other_data;
2409 if (data->type == EDID_DETAIL_CVT_3BYTE)
2410 closure->modes += drm_cvt_modes(closure->connector, timing);
2414 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2416 struct detailed_mode_closure closure = {
2417 .connector = connector,
2421 if (version_greater(edid, 1, 2))
2422 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2424 /* XXX should also look for CVT codes in VTB blocks */
2426 return closure.modes;
2429 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2432 do_detailed_mode(struct detailed_timing *timing, void *c)
2434 struct detailed_mode_closure *closure = c;
2435 struct drm_display_mode *newmode;
2437 if (timing->pixel_clock) {
2438 newmode = drm_mode_detailed(closure->connector->dev,
2439 closure->edid, timing,
2444 if (closure->preferred)
2445 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2448 * Detailed modes are limited to 10kHz pixel clock resolution,
2449 * so fix up anything that looks like CEA/HDMI mode, but the clock
2450 * is just slightly off.
2452 fixup_detailed_cea_mode_clock(newmode);
2454 drm_mode_probed_add(closure->connector, newmode);
2456 closure->preferred = 0;
2461 * add_detailed_modes - Add modes from detailed timings
2462 * @connector: attached connector
2463 * @edid: EDID block to scan
2464 * @quirks: quirks to apply
2467 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2470 struct detailed_mode_closure closure = {
2471 .connector = connector,
2477 if (closure.preferred && !version_greater(edid, 1, 3))
2479 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2481 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2483 return closure.modes;
2486 #define AUDIO_BLOCK 0x01
2487 #define VIDEO_BLOCK 0x02
2488 #define VENDOR_BLOCK 0x03
2489 #define SPEAKER_BLOCK 0x04
2490 #define VIDEO_CAPABILITY_BLOCK 0x07
2491 #define EDID_BASIC_AUDIO (1 << 6)
2492 #define EDID_CEA_YCRCB444 (1 << 5)
2493 #define EDID_CEA_YCRCB422 (1 << 4)
2494 #define EDID_CEA_VCDB_QS (1 << 6)
2497 * Search EDID for CEA extension block.
2499 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2501 u8 *edid_ext = NULL;
2504 /* No EDID or EDID extensions */
2505 if (edid == NULL || edid->extensions == 0)
2508 /* Find CEA extension */
2509 for (i = 0; i < edid->extensions; i++) {
2510 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2511 if (edid_ext[0] == ext_id)
2515 if (i == edid->extensions)
2521 static u8 *drm_find_cea_extension(struct edid *edid)
2523 return drm_find_edid_extension(edid, CEA_EXT);
2526 static u8 *drm_find_displayid_extension(struct edid *edid)
2528 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2532 * Calculate the alternate clock for the CEA mode
2533 * (60Hz vs. 59.94Hz etc.)
2536 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2538 unsigned int clock = cea_mode->clock;
2540 if (cea_mode->vrefresh % 6 != 0)
2544 * edid_cea_modes contains the 59.94Hz
2545 * variant for 240 and 480 line modes,
2546 * and the 60Hz variant otherwise.
2548 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2549 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2551 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2557 * drm_match_cea_mode - look for a CEA mode matching given mode
2558 * @to_match: display mode
2560 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2563 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2567 if (!to_match->clock)
2570 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2571 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2572 unsigned int clock1, clock2;
2574 /* Check both 60Hz and 59.94Hz */
2575 clock1 = cea_mode->clock;
2576 clock2 = cea_mode_alternate_clock(cea_mode);
2578 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2579 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2580 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2585 EXPORT_SYMBOL(drm_match_cea_mode);
2588 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2589 * the input VIC from the CEA mode list
2590 * @video_code: ID given to each of the CEA modes
2592 * Returns picture aspect ratio
2594 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2596 /* return picture aspect ratio for video_code - 1 to access the
2597 * right array element
2599 return edid_cea_modes[video_code-1].picture_aspect_ratio;
2601 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2604 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2607 * It's almost like cea_mode_alternate_clock(), we just need to add an
2608 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2612 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2614 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2615 return hdmi_mode->clock;
2617 return cea_mode_alternate_clock(hdmi_mode);
2621 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2622 * @to_match: display mode
2624 * An HDMI mode is one defined in the HDMI vendor specific block.
2626 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2628 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2632 if (!to_match->clock)
2635 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2636 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2637 unsigned int clock1, clock2;
2639 /* Make sure to also match alternate clocks */
2640 clock1 = hdmi_mode->clock;
2641 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2643 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2644 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2645 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2652 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2654 struct drm_device *dev = connector->dev;
2655 struct drm_display_mode *mode, *tmp;
2659 /* Don't add CEA modes if the CEA extension block is missing */
2660 if (!drm_find_cea_extension(edid))
2664 * Go through all probed modes and create a new mode
2665 * with the alternate clock for certain CEA modes.
2667 list_for_each_entry(mode, &connector->probed_modes, head) {
2668 const struct drm_display_mode *cea_mode = NULL;
2669 struct drm_display_mode *newmode;
2670 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2671 unsigned int clock1, clock2;
2673 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2674 cea_mode = &edid_cea_modes[mode_idx];
2675 clock2 = cea_mode_alternate_clock(cea_mode);
2677 mode_idx = drm_match_hdmi_mode(mode) - 1;
2678 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2679 cea_mode = &edid_4k_modes[mode_idx];
2680 clock2 = hdmi_mode_alternate_clock(cea_mode);
2687 clock1 = cea_mode->clock;
2689 if (clock1 == clock2)
2692 if (mode->clock != clock1 && mode->clock != clock2)
2695 newmode = drm_mode_duplicate(dev, cea_mode);
2699 /* Carry over the stereo flags */
2700 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2703 * The current mode could be either variant. Make
2704 * sure to pick the "other" clock for the new mode.
2706 if (mode->clock != clock1)
2707 newmode->clock = clock1;
2709 newmode->clock = clock2;
2711 list_add_tail(&newmode->head, &list);
2714 list_for_each_entry_safe(mode, tmp, &list, head) {
2715 list_del(&mode->head);
2716 drm_mode_probed_add(connector, mode);
2723 static struct drm_display_mode *
2724 drm_display_mode_from_vic_index(struct drm_connector *connector,
2725 const u8 *video_db, u8 video_len,
2728 struct drm_device *dev = connector->dev;
2729 struct drm_display_mode *newmode;
2732 if (video_db == NULL || video_index >= video_len)
2735 /* CEA modes are numbered 1..127 */
2736 cea_mode = (video_db[video_index] & 127) - 1;
2737 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2740 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2744 newmode->vrefresh = 0;
2750 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2754 for (i = 0; i < len; i++) {
2755 struct drm_display_mode *mode;
2756 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2758 drm_mode_probed_add(connector, mode);
2766 struct stereo_mandatory_mode {
2767 int width, height, vrefresh;
2771 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2772 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2773 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2775 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2777 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2778 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2779 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2780 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2781 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2785 stereo_match_mandatory(const struct drm_display_mode *mode,
2786 const struct stereo_mandatory_mode *stereo_mode)
2788 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2790 return mode->hdisplay == stereo_mode->width &&
2791 mode->vdisplay == stereo_mode->height &&
2792 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2793 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2796 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2798 struct drm_device *dev = connector->dev;
2799 const struct drm_display_mode *mode;
2800 struct list_head stereo_modes;
2803 INIT_LIST_HEAD(&stereo_modes);
2805 list_for_each_entry(mode, &connector->probed_modes, head) {
2806 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2807 const struct stereo_mandatory_mode *mandatory;
2808 struct drm_display_mode *new_mode;
2810 if (!stereo_match_mandatory(mode,
2811 &stereo_mandatory_modes[i]))
2814 mandatory = &stereo_mandatory_modes[i];
2815 new_mode = drm_mode_duplicate(dev, mode);
2819 new_mode->flags |= mandatory->flags;
2820 list_add_tail(&new_mode->head, &stereo_modes);
2825 list_splice_tail(&stereo_modes, &connector->probed_modes);
2830 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2832 struct drm_device *dev = connector->dev;
2833 struct drm_display_mode *newmode;
2835 vic--; /* VICs start at 1 */
2836 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2837 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2841 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2845 drm_mode_probed_add(connector, newmode);
2850 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2851 const u8 *video_db, u8 video_len, u8 video_index)
2853 struct drm_display_mode *newmode;
2856 if (structure & (1 << 0)) {
2857 newmode = drm_display_mode_from_vic_index(connector, video_db,
2861 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2862 drm_mode_probed_add(connector, newmode);
2866 if (structure & (1 << 6)) {
2867 newmode = drm_display_mode_from_vic_index(connector, video_db,
2871 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2872 drm_mode_probed_add(connector, newmode);
2876 if (structure & (1 << 8)) {
2877 newmode = drm_display_mode_from_vic_index(connector, video_db,
2881 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2882 drm_mode_probed_add(connector, newmode);
2891 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2892 * @connector: connector corresponding to the HDMI sink
2893 * @db: start of the CEA vendor specific block
2894 * @len: length of the CEA block payload, ie. one can access up to db[len]
2896 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2897 * also adds the stereo 3d modes when applicable.
2900 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2901 const u8 *video_db, u8 video_len)
2903 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2904 u8 vic_len, hdmi_3d_len = 0;
2911 /* no HDMI_Video_Present */
2912 if (!(db[8] & (1 << 5)))
2915 /* Latency_Fields_Present */
2916 if (db[8] & (1 << 7))
2919 /* I_Latency_Fields_Present */
2920 if (db[8] & (1 << 6))
2923 /* the declared length is not long enough for the 2 first bytes
2924 * of additional video format capabilities */
2925 if (len < (8 + offset + 2))
2930 if (db[8 + offset] & (1 << 7)) {
2931 modes += add_hdmi_mandatory_stereo_modes(connector);
2933 /* 3D_Multi_present */
2934 multi_present = (db[8 + offset] & 0x60) >> 5;
2938 vic_len = db[8 + offset] >> 5;
2939 hdmi_3d_len = db[8 + offset] & 0x1f;
2941 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2944 vic = db[9 + offset + i];
2945 modes += add_hdmi_mode(connector, vic);
2947 offset += 1 + vic_len;
2949 if (multi_present == 1)
2951 else if (multi_present == 2)
2956 if (len < (8 + offset + hdmi_3d_len - 1))
2959 if (hdmi_3d_len < multi_len)
2962 if (multi_present == 1 || multi_present == 2) {
2963 /* 3D_Structure_ALL */
2964 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2966 /* check if 3D_MASK is present */
2967 if (multi_present == 2)
2968 mask = (db[10 + offset] << 8) | db[11 + offset];
2972 for (i = 0; i < 16; i++) {
2973 if (mask & (1 << i))
2974 modes += add_3d_struct_modes(connector,
2981 offset += multi_len;
2983 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2985 struct drm_display_mode *newmode = NULL;
2986 unsigned int newflag = 0;
2987 bool detail_present;
2989 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2991 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2994 /* 2D_VIC_order_X */
2995 vic_index = db[8 + offset + i] >> 4;
2997 /* 3D_Structure_X */
2998 switch (db[8 + offset + i] & 0x0f) {
3000 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3003 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3007 if ((db[9 + offset + i] >> 4) == 1)
3008 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3013 newmode = drm_display_mode_from_vic_index(connector,
3019 newmode->flags |= newflag;
3020 drm_mode_probed_add(connector, newmode);
3034 cea_db_payload_len(const u8 *db)
3036 return db[0] & 0x1f;
3040 cea_db_tag(const u8 *db)
3046 cea_revision(const u8 *cea)
3052 cea_db_offsets(const u8 *cea, int *start, int *end)
3054 /* Data block offset in CEA extension block */
3059 if (*end < 4 || *end > 127)
3064 static bool cea_db_is_hdmi_vsdb(const u8 *db)
3068 if (cea_db_tag(db) != VENDOR_BLOCK)
3071 if (cea_db_payload_len(db) < 5)
3074 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3076 return hdmi_id == HDMI_IEEE_OUI;
3079 #define for_each_cea_db(cea, i, start, end) \
3080 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3083 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3085 const u8 *cea = drm_find_cea_extension(edid);
3086 const u8 *db, *hdmi = NULL, *video = NULL;
3087 u8 dbl, hdmi_len, video_len = 0;
3090 if (cea && cea_revision(cea) >= 3) {
3093 if (cea_db_offsets(cea, &start, &end))
3096 for_each_cea_db(cea, i, start, end) {
3098 dbl = cea_db_payload_len(db);
3100 if (cea_db_tag(db) == VIDEO_BLOCK) {
3103 modes += do_cea_modes(connector, video, dbl);
3105 else if (cea_db_is_hdmi_vsdb(db)) {
3113 * We parse the HDMI VSDB after having added the cea modes as we will
3114 * be patching their flags when the sink supports stereo 3D.
3117 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3123 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3125 const struct drm_display_mode *cea_mode;
3126 int clock1, clock2, clock;
3130 mode_idx = drm_match_cea_mode(mode) - 1;
3131 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
3133 cea_mode = &edid_cea_modes[mode_idx];
3134 clock1 = cea_mode->clock;
3135 clock2 = cea_mode_alternate_clock(cea_mode);
3137 mode_idx = drm_match_hdmi_mode(mode) - 1;
3138 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
3140 cea_mode = &edid_4k_modes[mode_idx];
3141 clock1 = cea_mode->clock;
3142 clock2 = hdmi_mode_alternate_clock(cea_mode);
3148 /* pick whichever is closest */
3149 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3154 if (mode->clock == clock)
3157 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3158 type, mode_idx + 1, mode->clock, clock);
3159 mode->clock = clock;
3163 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3165 u8 len = cea_db_payload_len(db);
3168 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3169 connector->dvi_dual = db[6] & 1;
3172 connector->max_tmds_clock = db[7] * 5;
3174 connector->latency_present[0] = db[8] >> 7;
3175 connector->latency_present[1] = (db[8] >> 6) & 1;
3178 connector->video_latency[0] = db[9];
3180 connector->audio_latency[0] = db[10];
3182 connector->video_latency[1] = db[11];
3184 connector->audio_latency[1] = db[12];
3186 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3187 "max TMDS clock %d, "
3188 "latency present %d %d, "
3189 "video latency %d %d, "
3190 "audio latency %d %d\n",
3191 connector->dvi_dual,
3192 connector->max_tmds_clock,
3193 (int) connector->latency_present[0],
3194 (int) connector->latency_present[1],
3195 connector->video_latency[0],
3196 connector->video_latency[1],
3197 connector->audio_latency[0],
3198 connector->audio_latency[1]);
3202 monitor_name(struct detailed_timing *t, void *data)
3204 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3205 *(u8 **)data = t->data.other_data.data.str.str;
3209 * drm_edid_to_eld - build ELD from EDID
3210 * @connector: connector corresponding to the HDMI/DP sink
3211 * @edid: EDID to parse
3213 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3214 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3217 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3219 uint8_t *eld = connector->eld;
3227 memset(eld, 0, sizeof(connector->eld));
3229 cea = drm_find_cea_extension(edid);
3231 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3236 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3237 for (mnl = 0; name && mnl < 13; mnl++) {
3238 if (name[mnl] == 0x0a)
3240 eld[20 + mnl] = name[mnl];
3242 eld[4] = (cea[1] << 5) | mnl;
3243 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3245 eld[0] = 2 << 3; /* ELD version: 2 */
3247 eld[16] = edid->mfg_id[0];
3248 eld[17] = edid->mfg_id[1];
3249 eld[18] = edid->prod_code[0];
3250 eld[19] = edid->prod_code[1];
3252 if (cea_revision(cea) >= 3) {
3255 if (cea_db_offsets(cea, &start, &end)) {
3260 for_each_cea_db(cea, i, start, end) {
3262 dbl = cea_db_payload_len(db);
3264 switch (cea_db_tag(db)) {
3266 /* Audio Data Block, contains SADs */
3267 sad_count = dbl / 3;
3269 memcpy(eld + 20 + mnl, &db[1], dbl);
3272 /* Speaker Allocation Data Block */
3277 /* HDMI Vendor-Specific Data Block */
3278 if (cea_db_is_hdmi_vsdb(db))
3279 parse_hdmi_vsdb(connector, db);
3286 eld[5] |= sad_count << 4;
3288 eld[DRM_ELD_BASELINE_ELD_LEN] =
3289 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3291 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3292 drm_eld_size(eld), sad_count);
3294 EXPORT_SYMBOL(drm_edid_to_eld);
3297 * drm_edid_to_sad - extracts SADs from EDID
3298 * @edid: EDID to parse
3299 * @sads: pointer that will be set to the extracted SADs
3301 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3303 * Note: The returned pointer needs to be freed using kfree().
3305 * Return: The number of found SADs or negative number on error.
3307 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3310 int i, start, end, dbl;
3313 cea = drm_find_cea_extension(edid);
3315 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3319 if (cea_revision(cea) < 3) {
3320 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3324 if (cea_db_offsets(cea, &start, &end)) {
3325 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3329 for_each_cea_db(cea, i, start, end) {
3332 if (cea_db_tag(db) == AUDIO_BLOCK) {
3334 dbl = cea_db_payload_len(db);
3336 count = dbl / 3; /* SAD is 3B */
3337 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3340 for (j = 0; j < count; j++) {
3341 u8 *sad = &db[1 + j * 3];
3343 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3344 (*sads)[j].channels = sad[0] & 0x7;
3345 (*sads)[j].freq = sad[1] & 0x7F;
3346 (*sads)[j].byte2 = sad[2];
3354 EXPORT_SYMBOL(drm_edid_to_sad);
3357 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3358 * @edid: EDID to parse
3359 * @sadb: pointer to the speaker block
3361 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3363 * Note: The returned pointer needs to be freed using kfree().
3365 * Return: The number of found Speaker Allocation Blocks or negative number on
3368 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3371 int i, start, end, dbl;
3374 cea = drm_find_cea_extension(edid);
3376 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3380 if (cea_revision(cea) < 3) {
3381 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3385 if (cea_db_offsets(cea, &start, &end)) {
3386 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3390 for_each_cea_db(cea, i, start, end) {
3391 const u8 *db = &cea[i];
3393 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3394 dbl = cea_db_payload_len(db);
3396 /* Speaker Allocation Data Block */
3398 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3409 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3412 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3413 * @connector: connector associated with the HDMI/DP sink
3414 * @mode: the display mode
3416 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3417 * the sink doesn't support audio or video.
3419 int drm_av_sync_delay(struct drm_connector *connector,
3420 const struct drm_display_mode *mode)
3422 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3425 if (!connector->latency_present[0])
3427 if (!connector->latency_present[1])
3430 a = connector->audio_latency[i];
3431 v = connector->video_latency[i];
3434 * HDMI/DP sink doesn't support audio or video?
3436 if (a == 255 || v == 255)
3440 * Convert raw EDID values to millisecond.
3441 * Treat unknown latency as 0ms.
3444 a = min(2 * (a - 1), 500);
3446 v = min(2 * (v - 1), 500);
3448 return max(v - a, 0);
3450 EXPORT_SYMBOL(drm_av_sync_delay);
3453 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3454 * @encoder: the encoder just changed display mode
3456 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3457 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3459 * Return: The connector associated with the first HDMI/DP sink that has ELD
3462 struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
3464 struct drm_connector *connector;
3465 struct drm_device *dev = encoder->dev;
3467 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3468 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3470 drm_for_each_connector(connector, dev)
3471 if (connector->encoder == encoder && connector->eld[0])
3476 EXPORT_SYMBOL(drm_select_eld);
3479 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3480 * @edid: monitor EDID information
3482 * Parse the CEA extension according to CEA-861-B.
3484 * Return: True if the monitor is HDMI, false if not or unknown.
3486 bool drm_detect_hdmi_monitor(struct edid *edid)
3490 int start_offset, end_offset;
3492 edid_ext = drm_find_cea_extension(edid);
3496 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3500 * Because HDMI identifier is in Vendor Specific Block,
3501 * search it from all data blocks of CEA extension.
3503 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3504 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3510 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3513 * drm_detect_monitor_audio - check monitor audio capability
3514 * @edid: EDID block to scan
3516 * Monitor should have CEA extension block.
3517 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3518 * audio' only. If there is any audio extension block and supported
3519 * audio format, assume at least 'basic audio' support, even if 'basic
3520 * audio' is not defined in EDID.
3522 * Return: True if the monitor supports audio, false otherwise.
3524 bool drm_detect_monitor_audio(struct edid *edid)
3528 bool has_audio = false;
3529 int start_offset, end_offset;
3531 edid_ext = drm_find_cea_extension(edid);
3535 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3538 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3542 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3545 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3546 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3548 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3549 DRM_DEBUG_KMS("CEA audio format %d\n",
3550 (edid_ext[i + j] >> 3) & 0xf);
3557 EXPORT_SYMBOL(drm_detect_monitor_audio);
3560 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3561 * @edid: EDID block to scan
3563 * Check whether the monitor reports the RGB quantization range selection
3564 * as supported. The AVI infoframe can then be used to inform the monitor
3565 * which quantization range (full or limited) is used.
3567 * Return: True if the RGB quantization range is selectable, false otherwise.
3569 bool drm_rgb_quant_range_selectable(struct edid *edid)
3574 edid_ext = drm_find_cea_extension(edid);
3578 if (cea_db_offsets(edid_ext, &start, &end))
3581 for_each_cea_db(edid_ext, i, start, end) {
3582 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3583 cea_db_payload_len(&edid_ext[i]) == 2) {
3584 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3585 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3591 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3594 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3595 * hdmi deep color modes and update drm_display_info if so.
3596 * @edid: monitor EDID information
3597 * @info: Updated with maximum supported deep color bpc and color format
3598 * if deep color supported.
3599 * @connector: DRM connector, used only for debug output
3601 * Parse the CEA extension according to CEA-861-B.
3602 * Return true if HDMI deep color supported, false if not or unknown.
3604 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3605 struct drm_display_info *info,
3606 struct drm_connector *connector)
3608 u8 *edid_ext, *hdmi;
3610 int start_offset, end_offset;
3611 unsigned int dc_bpc = 0;
3613 edid_ext = drm_find_cea_extension(edid);
3617 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3621 * Because HDMI identifier is in Vendor Specific Block,
3622 * search it from all data blocks of CEA extension.
3624 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3625 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3626 /* HDMI supports at least 8 bpc */
3629 hdmi = &edid_ext[i];
3630 if (cea_db_payload_len(hdmi) < 6)
3633 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3635 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3636 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3640 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3642 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3643 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3647 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3649 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3650 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3655 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3656 connector->name, dc_bpc);
3660 * Deep color support mandates RGB444 support for all video
3661 * modes and forbids YCRCB422 support for all video modes per
3664 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3666 /* YCRCB444 is optional according to spec. */
3667 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3668 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3669 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3674 * Spec says that if any deep color mode is supported at all,
3675 * then deep color 36 bit must be supported.
3677 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3678 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3685 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3695 * drm_add_display_info - pull display info out if present
3697 * @info: display info (attached to connector)
3698 * @connector: connector whose edid is used to build display info
3700 * Grab any available display info and stuff it into the drm_display_info
3701 * structure that's part of the connector. Useful for tracking bpp and
3704 static void drm_add_display_info(struct edid *edid,
3705 struct drm_display_info *info,
3706 struct drm_connector *connector)
3710 info->width_mm = edid->width_cm * 10;
3711 info->height_mm = edid->height_cm * 10;
3713 /* driver figures it out in this case */
3715 info->color_formats = 0;
3717 if (edid->revision < 3)
3720 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3723 /* Get data from CEA blocks if present */
3724 edid_ext = drm_find_cea_extension(edid);
3726 info->cea_rev = edid_ext[1];
3728 /* The existence of a CEA block should imply RGB support */
3729 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3730 if (edid_ext[3] & EDID_CEA_YCRCB444)
3731 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3732 if (edid_ext[3] & EDID_CEA_YCRCB422)
3733 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3736 /* HDMI deep color modes supported? Assign to info, if so */
3737 drm_assign_hdmi_deep_color_info(edid, info, connector);
3739 /* Only defined for 1.4 with digital displays */
3740 if (edid->revision < 4)
3743 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3744 case DRM_EDID_DIGITAL_DEPTH_6:
3747 case DRM_EDID_DIGITAL_DEPTH_8:
3750 case DRM_EDID_DIGITAL_DEPTH_10:
3753 case DRM_EDID_DIGITAL_DEPTH_12:
3756 case DRM_EDID_DIGITAL_DEPTH_14:
3759 case DRM_EDID_DIGITAL_DEPTH_16:
3762 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3768 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3769 connector->name, info->bpc);
3771 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3772 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3773 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3774 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3775 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3779 * drm_add_edid_modes - add modes from EDID data, if available
3780 * @connector: connector we're probing
3783 * Add the specified modes to the connector's mode list.
3785 * Return: The number of modes added or 0 if we couldn't find any.
3787 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3795 if (!drm_edid_is_valid(edid)) {
3796 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3801 quirks = edid_get_quirks(edid);
3804 * EDID spec says modes should be preferred in this order:
3805 * - preferred detailed mode
3806 * - other detailed modes from base block
3807 * - detailed modes from extension blocks
3808 * - CVT 3-byte code modes
3809 * - standard timing codes
3810 * - established timing codes
3811 * - modes inferred from GTF or CVT range information
3813 * We get this pretty much right.
3815 * XXX order for additional mode types in extension blocks?
3817 num_modes += add_detailed_modes(connector, edid, quirks);
3818 num_modes += add_cvt_modes(connector, edid);
3819 num_modes += add_standard_modes(connector, edid);
3820 num_modes += add_established_modes(connector, edid);
3821 num_modes += add_cea_modes(connector, edid);
3822 num_modes += add_alternate_cea_modes(connector, edid);
3823 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3824 num_modes += add_inferred_modes(connector, edid);
3826 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3827 edid_fixup_preferred(connector, quirks);
3829 drm_add_display_info(edid, &connector->display_info, connector);
3831 if (quirks & EDID_QUIRK_FORCE_6BPC)
3832 connector->display_info.bpc = 6;
3834 if (quirks & EDID_QUIRK_FORCE_8BPC)
3835 connector->display_info.bpc = 8;
3837 if (quirks & EDID_QUIRK_FORCE_12BPC)
3838 connector->display_info.bpc = 12;
3842 EXPORT_SYMBOL(drm_add_edid_modes);
3845 * drm_add_modes_noedid - add modes for the connectors without EDID
3846 * @connector: connector we're probing
3847 * @hdisplay: the horizontal display limit
3848 * @vdisplay: the vertical display limit
3850 * Add the specified modes to the connector's mode list. Only when the
3851 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3853 * Return: The number of modes added or 0 if we couldn't find any.
3855 int drm_add_modes_noedid(struct drm_connector *connector,
3856 int hdisplay, int vdisplay)
3858 int i, count, num_modes = 0;
3859 struct drm_display_mode *mode;
3860 struct drm_device *dev = connector->dev;
3862 count = ARRAY_SIZE(drm_dmt_modes);
3868 for (i = 0; i < count; i++) {
3869 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3870 if (hdisplay && vdisplay) {
3872 * Only when two are valid, they will be used to check
3873 * whether the mode should be added to the mode list of
3876 if (ptr->hdisplay > hdisplay ||
3877 ptr->vdisplay > vdisplay)
3880 if (drm_mode_vrefresh(ptr) > 61)
3882 mode = drm_mode_duplicate(dev, ptr);
3884 drm_mode_probed_add(connector, mode);
3890 EXPORT_SYMBOL(drm_add_modes_noedid);
3893 * drm_set_preferred_mode - Sets the preferred mode of a connector
3894 * @connector: connector whose mode list should be processed
3895 * @hpref: horizontal resolution of preferred mode
3896 * @vpref: vertical resolution of preferred mode
3898 * Marks a mode as preferred if it matches the resolution specified by @hpref
3901 void drm_set_preferred_mode(struct drm_connector *connector,
3902 int hpref, int vpref)
3904 struct drm_display_mode *mode;
3906 list_for_each_entry(mode, &connector->probed_modes, head) {
3907 if (mode->hdisplay == hpref &&
3908 mode->vdisplay == vpref)
3909 mode->type |= DRM_MODE_TYPE_PREFERRED;
3912 EXPORT_SYMBOL(drm_set_preferred_mode);
3915 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3916 * data from a DRM display mode
3917 * @frame: HDMI AVI infoframe
3918 * @mode: DRM display mode
3920 * Return: 0 on success or a negative error code on failure.
3923 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3924 const struct drm_display_mode *mode)
3928 if (!frame || !mode)
3931 err = hdmi_avi_infoframe_init(frame);
3935 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3936 frame->pixel_repeat = 1;
3938 frame->video_code = drm_match_cea_mode(mode);
3940 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3943 * Populate picture aspect ratio from either
3944 * user input (if specified) or from the CEA mode list.
3946 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3947 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3948 frame->picture_aspect = mode->picture_aspect_ratio;
3949 else if (frame->video_code > 0)
3950 frame->picture_aspect = drm_get_cea_aspect_ratio(
3953 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3954 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3958 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3960 static enum hdmi_3d_structure
3961 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3963 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3966 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3967 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3968 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3969 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3970 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3971 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3972 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3973 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3974 case DRM_MODE_FLAG_3D_L_DEPTH:
3975 return HDMI_3D_STRUCTURE_L_DEPTH;
3976 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3977 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3978 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3979 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3980 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3981 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3983 return HDMI_3D_STRUCTURE_INVALID;
3988 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3989 * data from a DRM display mode
3990 * @frame: HDMI vendor infoframe
3991 * @mode: DRM display mode
3993 * Note that there's is a need to send HDMI vendor infoframes only when using a
3994 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3995 * function will return -EINVAL, error that can be safely ignored.
3997 * Return: 0 on success or a negative error code on failure.
4000 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4001 const struct drm_display_mode *mode)
4007 if (!frame || !mode)
4010 vic = drm_match_hdmi_mode(mode);
4011 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4013 if (!vic && !s3d_flags)
4016 if (vic && s3d_flags)
4019 err = hdmi_vendor_infoframe_init(frame);
4026 frame->s3d_struct = s3d_structure_from_display_mode(mode);
4030 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4032 static int drm_parse_display_id(struct drm_connector *connector,
4033 u8 *displayid, int length,
4034 bool is_edid_extension)
4036 /* if this is an EDID extension the first byte will be 0x70 */
4038 struct displayid_hdr *base;
4039 struct displayid_block *block;
4043 if (is_edid_extension)
4046 base = (struct displayid_hdr *)&displayid[idx];
4048 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
4049 base->rev, base->bytes, base->prod_id, base->ext_count);
4051 if (base->bytes + 5 > length - idx)
4054 for (i = idx; i <= base->bytes + 5; i++) {
4055 csum += displayid[i];
4058 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
4062 block = (struct displayid_block *)&displayid[idx + 4];
4063 DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
4064 block->tag, block->rev, block->num_bytes);
4066 switch (block->tag) {
4067 case DATA_BLOCK_TILED_DISPLAY: {
4068 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4071 u8 tile_v_loc, tile_h_loc;
4072 u8 num_v_tile, num_h_tile;
4073 struct drm_tile_group *tg;
4075 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4076 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4078 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4079 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4080 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4081 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4083 connector->has_tile = true;
4084 if (tile->tile_cap & 0x80)
4085 connector->tile_is_single_monitor = true;
4087 connector->num_h_tile = num_h_tile + 1;
4088 connector->num_v_tile = num_v_tile + 1;
4089 connector->tile_h_loc = tile_h_loc;
4090 connector->tile_v_loc = tile_v_loc;
4091 connector->tile_h_size = w + 1;
4092 connector->tile_v_size = h + 1;
4094 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4095 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4096 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4097 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4098 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4100 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4102 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4107 if (connector->tile_group != tg) {
4108 /* if we haven't got a pointer,
4109 take the reference, drop ref to old tile group */
4110 if (connector->tile_group) {
4111 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4113 connector->tile_group = tg;
4115 /* if same tile group, then release the ref we just took. */
4116 drm_mode_put_tile_group(connector->dev, tg);
4120 printk("unknown displayid tag %d\n", block->tag);
4126 static void drm_get_displayid(struct drm_connector *connector,
4129 void *displayid = NULL;
4131 connector->has_tile = false;
4132 displayid = drm_find_displayid_extension(edid);
4134 /* drop reference to any tile group we had */
4138 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4141 if (!connector->has_tile)
4145 if (connector->tile_group) {
4146 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4147 connector->tile_group = NULL;
projects / firefly-linux-kernel-4.4.55.git / blob