2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_displayid.h>
39 #define version_greater(edid, maj, min) \
40 (((edid)->version > (maj)) || \
41 ((edid)->version == (maj) && (edid)->revision > (min)))
43 #define EDID_EST_TIMINGS 16
44 #define EDID_STD_TIMINGS 8
45 #define EDID_DETAILED_TIMINGS 4
48 * EDID blocks out in the wild have a variety of bugs, try to collect
49 * them here (note that userspace may work around broken monitors first,
50 * but fixes should make their way here so that the kernel "just works"
51 * on as many displays as possible).
54 /* First detailed mode wrong, use largest 60Hz mode */
55 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
56 /* Reported 135MHz pixel clock is too high, needs adjustment */
57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
58 /* Prefer the largest mode at 75 Hz */
59 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
60 /* Detail timing is in cm not mm */
61 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
62 /* Detailed timing descriptors have bogus size values, so just take the
63 * maximum size and use that.
65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
66 /* Monitor forgot to set the first detailed is preferred bit. */
67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
68 /* use +hsync +vsync for detailed mode */
69 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
70 /* Force reduced-blanking timings for detailed modes */
71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
73 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
75 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
77 struct detailed_mode_closure {
78 struct drm_connector *connector;
90 static struct edid_quirk {
94 } edid_quirk_list[] = {
96 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
98 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
100 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102 /* Belinea 10 15 55 */
103 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
104 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
106 /* Envision Peripherals, Inc. EN-7100e */
107 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
108 /* Envision EN2028 */
109 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
111 /* Funai Electronics PM36B */
112 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
113 EDID_QUIRK_DETAILED_IN_CM },
115 /* LG Philips LCD LP154W01-A5 */
116 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
117 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
119 /* Philips 107p5 CRT */
120 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
123 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
125 /* Samsung SyncMaster 205BW. Note: irony */
126 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
127 /* Samsung SyncMaster 22[5-6]BW */
128 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
129 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
131 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
132 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
134 /* ViewSonic VA2026w */
135 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
137 /* Medion MD 30217 PG */
138 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
140 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
141 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
145 * Autogenerated from the DMT spec.
146 * This table is copied from xfree86/modes/xf86EdidModes.c.
148 static const struct drm_display_mode drm_dmt_modes[] = {
150 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
151 736, 832, 0, 350, 382, 385, 445, 0,
152 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
154 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
155 736, 832, 0, 400, 401, 404, 445, 0,
156 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
158 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
159 828, 936, 0, 400, 401, 404, 446, 0,
160 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
162 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
163 752, 800, 0, 480, 489, 492, 525, 0,
164 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
166 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
167 704, 832, 0, 480, 489, 492, 520, 0,
168 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
170 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
171 720, 840, 0, 480, 481, 484, 500, 0,
172 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
174 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
175 752, 832, 0, 480, 481, 484, 509, 0,
176 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
178 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
179 896, 1024, 0, 600, 601, 603, 625, 0,
180 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
182 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
183 968, 1056, 0, 600, 601, 605, 628, 0,
184 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
186 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
187 976, 1040, 0, 600, 637, 643, 666, 0,
188 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
190 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
191 896, 1056, 0, 600, 601, 604, 625, 0,
192 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
194 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
195 896, 1048, 0, 600, 601, 604, 631, 0,
196 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
197 /* 800x600@120Hz RB */
198 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
199 880, 960, 0, 600, 603, 607, 636, 0,
200 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
202 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
203 976, 1088, 0, 480, 486, 494, 517, 0,
204 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
205 /* 1024x768@43Hz, interlace */
206 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
207 1208, 1264, 0, 768, 768, 772, 817, 0,
208 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
209 DRM_MODE_FLAG_INTERLACE) },
211 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
212 1184, 1344, 0, 768, 771, 777, 806, 0,
213 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
215 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
216 1184, 1328, 0, 768, 771, 777, 806, 0,
217 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
219 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
220 1136, 1312, 0, 768, 769, 772, 800, 0,
221 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
223 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
224 1168, 1376, 0, 768, 769, 772, 808, 0,
225 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
226 /* 1024x768@120Hz RB */
227 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
228 1104, 1184, 0, 768, 771, 775, 813, 0,
229 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
231 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
232 1344, 1600, 0, 864, 865, 868, 900, 0,
233 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
234 /* 1280x768@60Hz RB */
235 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
236 1360, 1440, 0, 768, 771, 778, 790, 0,
237 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
239 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
240 1472, 1664, 0, 768, 771, 778, 798, 0,
241 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
243 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
244 1488, 1696, 0, 768, 771, 778, 805, 0,
245 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
247 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
248 1496, 1712, 0, 768, 771, 778, 809, 0,
249 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
250 /* 1280x768@120Hz RB */
251 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
252 1360, 1440, 0, 768, 771, 778, 813, 0,
253 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
254 /* 1280x800@60Hz RB */
255 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
256 1360, 1440, 0, 800, 803, 809, 823, 0,
257 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
259 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
260 1480, 1680, 0, 800, 803, 809, 831, 0,
261 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
263 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
264 1488, 1696, 0, 800, 803, 809, 838, 0,
265 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
267 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
268 1496, 1712, 0, 800, 803, 809, 843, 0,
269 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
270 /* 1280x800@120Hz RB */
271 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
272 1360, 1440, 0, 800, 803, 809, 847, 0,
273 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
275 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
276 1488, 1800, 0, 960, 961, 964, 1000, 0,
277 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
280 1504, 1728, 0, 960, 961, 964, 1011, 0,
281 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
282 /* 1280x960@120Hz RB */
283 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
284 1360, 1440, 0, 960, 963, 967, 1017, 0,
285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
287 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
288 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
291 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
292 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
295 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
296 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
298 /* 1280x1024@120Hz RB */
299 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
300 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
303 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
304 1536, 1792, 0, 768, 771, 777, 795, 0,
305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
306 /* 1360x768@120Hz RB */
307 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
308 1440, 1520, 0, 768, 771, 776, 813, 0,
309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
310 /* 1400x1050@60Hz RB */
311 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
312 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
313 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
315 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
316 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
317 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
319 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
320 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
321 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
323 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
324 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
325 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
326 /* 1400x1050@120Hz RB */
327 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
328 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
329 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
330 /* 1440x900@60Hz RB */
331 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
332 1520, 1600, 0, 900, 903, 909, 926, 0,
333 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
335 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
336 1672, 1904, 0, 900, 903, 909, 934, 0,
337 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
339 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
340 1688, 1936, 0, 900, 903, 909, 942, 0,
341 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
343 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
344 1696, 1952, 0, 900, 903, 909, 948, 0,
345 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
346 /* 1440x900@120Hz RB */
347 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
348 1520, 1600, 0, 900, 903, 909, 953, 0,
349 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
351 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
352 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
353 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
355 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
356 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
357 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
360 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
361 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
363 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
364 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
365 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
367 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
368 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
369 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
370 /* 1600x1200@120Hz RB */
371 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
372 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
373 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
374 /* 1680x1050@60Hz RB */
375 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
376 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
377 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
379 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
380 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
381 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
383 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
384 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
385 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
387 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
388 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
389 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
390 /* 1680x1050@120Hz RB */
391 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
392 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
393 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
395 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
396 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
397 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
399 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
400 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
401 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
402 /* 1792x1344@120Hz RB */
403 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
404 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
405 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
407 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
408 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
409 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
411 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
412 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
413 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
414 /* 1856x1392@120Hz RB */
415 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
416 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
417 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
418 /* 1920x1200@60Hz RB */
419 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
420 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
421 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
423 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
424 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
425 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
427 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
428 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
429 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
432 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
433 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
434 /* 1920x1200@120Hz RB */
435 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
436 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
440 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
441 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
443 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
444 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
445 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
446 /* 1920x1440@120Hz RB */
447 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
448 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
450 /* 2560x1600@60Hz RB */
451 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
452 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
453 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
455 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
456 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
457 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
459 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
460 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
461 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
463 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
464 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
465 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
466 /* 2560x1600@120Hz RB */
467 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
468 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
473 * These more or less come from the DMT spec. The 720x400 modes are
474 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
475 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
476 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
479 * The DMT modes have been fact-checked; the rest are mild guesses.
481 static const struct drm_display_mode edid_est_modes[] = {
482 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
483 968, 1056, 0, 600, 601, 605, 628, 0,
484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
485 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
486 896, 1024, 0, 600, 601, 603, 625, 0,
487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
488 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
489 720, 840, 0, 480, 481, 484, 500, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
492 704, 832, 0, 480, 489, 491, 520, 0,
493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
494 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
495 768, 864, 0, 480, 483, 486, 525, 0,
496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
497 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
498 752, 800, 0, 480, 490, 492, 525, 0,
499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
500 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
501 846, 900, 0, 400, 421, 423, 449, 0,
502 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
503 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
504 846, 900, 0, 400, 412, 414, 449, 0,
505 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
506 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
507 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
509 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
510 1136, 1312, 0, 768, 769, 772, 800, 0,
511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
512 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
513 1184, 1328, 0, 768, 771, 777, 806, 0,
514 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
515 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
516 1184, 1344, 0, 768, 771, 777, 806, 0,
517 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
518 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
519 1208, 1264, 0, 768, 768, 776, 817, 0,
520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
521 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
522 928, 1152, 0, 624, 625, 628, 667, 0,
523 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
524 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
525 896, 1056, 0, 600, 601, 604, 625, 0,
526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
527 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
528 976, 1040, 0, 600, 637, 643, 666, 0,
529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
530 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
531 1344, 1600, 0, 864, 865, 868, 900, 0,
532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
542 static const struct minimode est3_modes[] = {
550 { 1024, 768, 85, 0 },
551 { 1152, 864, 75, 0 },
553 { 1280, 768, 60, 1 },
554 { 1280, 768, 60, 0 },
555 { 1280, 768, 75, 0 },
556 { 1280, 768, 85, 0 },
557 { 1280, 960, 60, 0 },
558 { 1280, 960, 85, 0 },
559 { 1280, 1024, 60, 0 },
560 { 1280, 1024, 85, 0 },
562 { 1360, 768, 60, 0 },
563 { 1440, 900, 60, 1 },
564 { 1440, 900, 60, 0 },
565 { 1440, 900, 75, 0 },
566 { 1440, 900, 85, 0 },
567 { 1400, 1050, 60, 1 },
568 { 1400, 1050, 60, 0 },
569 { 1400, 1050, 75, 0 },
571 { 1400, 1050, 85, 0 },
572 { 1680, 1050, 60, 1 },
573 { 1680, 1050, 60, 0 },
574 { 1680, 1050, 75, 0 },
575 { 1680, 1050, 85, 0 },
576 { 1600, 1200, 60, 0 },
577 { 1600, 1200, 65, 0 },
578 { 1600, 1200, 70, 0 },
580 { 1600, 1200, 75, 0 },
581 { 1600, 1200, 85, 0 },
582 { 1792, 1344, 60, 0 },
583 { 1792, 1344, 75, 0 },
584 { 1856, 1392, 60, 0 },
585 { 1856, 1392, 75, 0 },
586 { 1920, 1200, 60, 1 },
587 { 1920, 1200, 60, 0 },
589 { 1920, 1200, 75, 0 },
590 { 1920, 1200, 85, 0 },
591 { 1920, 1440, 60, 0 },
592 { 1920, 1440, 75, 0 },
595 static const struct minimode extra_modes[] = {
596 { 1024, 576, 60, 0 },
597 { 1366, 768, 60, 0 },
598 { 1600, 900, 60, 0 },
599 { 1680, 945, 60, 0 },
600 { 1920, 1080, 60, 0 },
601 { 2048, 1152, 60, 0 },
602 { 2048, 1536, 60, 0 },
606 * Probably taken from CEA-861 spec.
607 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
609 static const struct drm_display_mode edid_cea_modes[] = {
610 /* 1 - 640x480@60Hz */
611 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
612 752, 800, 0, 480, 490, 492, 525, 0,
613 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
614 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
615 /* 2 - 720x480@60Hz */
616 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
617 798, 858, 0, 480, 489, 495, 525, 0,
618 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
619 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
620 /* 3 - 720x480@60Hz */
621 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
622 798, 858, 0, 480, 489, 495, 525, 0,
623 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
624 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
625 /* 4 - 1280x720@60Hz */
626 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
627 1430, 1650, 0, 720, 725, 730, 750, 0,
628 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
629 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
630 /* 5 - 1920x1080i@60Hz */
631 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
632 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
633 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
634 DRM_MODE_FLAG_INTERLACE),
635 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
636 /* 6 - 720(1440)x480i@60Hz */
637 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
638 801, 858, 0, 480, 488, 494, 525, 0,
639 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
640 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
641 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
642 /* 7 - 720(1440)x480i@60Hz */
643 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
644 801, 858, 0, 480, 488, 494, 525, 0,
645 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
646 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
647 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
648 /* 8 - 720(1440)x240@60Hz */
649 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
650 801, 858, 0, 240, 244, 247, 262, 0,
651 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
652 DRM_MODE_FLAG_DBLCLK),
653 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
654 /* 9 - 720(1440)x240@60Hz */
655 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
656 801, 858, 0, 240, 244, 247, 262, 0,
657 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
658 DRM_MODE_FLAG_DBLCLK),
659 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
660 /* 10 - 2880x480i@60Hz */
661 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
662 3204, 3432, 0, 480, 488, 494, 525, 0,
663 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
664 DRM_MODE_FLAG_INTERLACE),
665 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
666 /* 11 - 2880x480i@60Hz */
667 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
668 3204, 3432, 0, 480, 488, 494, 525, 0,
669 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
670 DRM_MODE_FLAG_INTERLACE),
671 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
672 /* 12 - 2880x240@60Hz */
673 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
674 3204, 3432, 0, 240, 244, 247, 262, 0,
675 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
676 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
677 /* 13 - 2880x240@60Hz */
678 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
679 3204, 3432, 0, 240, 244, 247, 262, 0,
680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
681 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
682 /* 14 - 1440x480@60Hz */
683 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
684 1596, 1716, 0, 480, 489, 495, 525, 0,
685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
686 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
687 /* 15 - 1440x480@60Hz */
688 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
689 1596, 1716, 0, 480, 489, 495, 525, 0,
690 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
691 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
692 /* 16 - 1920x1080@60Hz */
693 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
694 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
696 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
697 /* 17 - 720x576@50Hz */
698 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
699 796, 864, 0, 576, 581, 586, 625, 0,
700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
701 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
702 /* 18 - 720x576@50Hz */
703 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
704 796, 864, 0, 576, 581, 586, 625, 0,
705 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
706 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
707 /* 19 - 1280x720@50Hz */
708 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
709 1760, 1980, 0, 720, 725, 730, 750, 0,
710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
711 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
712 /* 20 - 1920x1080i@50Hz */
713 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
714 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
715 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
716 DRM_MODE_FLAG_INTERLACE),
717 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
718 /* 21 - 720(1440)x576i@50Hz */
719 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
720 795, 864, 0, 576, 580, 586, 625, 0,
721 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
722 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
723 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
724 /* 22 - 720(1440)x576i@50Hz */
725 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
726 795, 864, 0, 576, 580, 586, 625, 0,
727 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
728 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
729 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
730 /* 23 - 720(1440)x288@50Hz */
731 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
732 795, 864, 0, 288, 290, 293, 312, 0,
733 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
734 DRM_MODE_FLAG_DBLCLK),
735 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
736 /* 24 - 720(1440)x288@50Hz */
737 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
738 795, 864, 0, 288, 290, 293, 312, 0,
739 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
740 DRM_MODE_FLAG_DBLCLK),
741 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
742 /* 25 - 2880x576i@50Hz */
743 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
744 3180, 3456, 0, 576, 580, 586, 625, 0,
745 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
746 DRM_MODE_FLAG_INTERLACE),
747 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
748 /* 26 - 2880x576i@50Hz */
749 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
750 3180, 3456, 0, 576, 580, 586, 625, 0,
751 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
752 DRM_MODE_FLAG_INTERLACE),
753 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
754 /* 27 - 2880x288@50Hz */
755 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
756 3180, 3456, 0, 288, 290, 293, 312, 0,
757 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
758 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
759 /* 28 - 2880x288@50Hz */
760 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
761 3180, 3456, 0, 288, 290, 293, 312, 0,
762 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
763 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
764 /* 29 - 1440x576@50Hz */
765 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
766 1592, 1728, 0, 576, 581, 586, 625, 0,
767 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
768 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
769 /* 30 - 1440x576@50Hz */
770 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
771 1592, 1728, 0, 576, 581, 586, 625, 0,
772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
773 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
774 /* 31 - 1920x1080@50Hz */
775 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
776 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
777 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
778 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
779 /* 32 - 1920x1080@24Hz */
780 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
781 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
782 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
783 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
784 /* 33 - 1920x1080@25Hz */
785 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
786 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
787 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
788 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
789 /* 34 - 1920x1080@30Hz */
790 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
791 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
792 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
793 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
794 /* 35 - 2880x480@60Hz */
795 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
796 3192, 3432, 0, 480, 489, 495, 525, 0,
797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
798 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
799 /* 36 - 2880x480@60Hz */
800 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
801 3192, 3432, 0, 480, 489, 495, 525, 0,
802 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
803 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
804 /* 37 - 2880x576@50Hz */
805 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
806 3184, 3456, 0, 576, 581, 586, 625, 0,
807 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
808 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
809 /* 38 - 2880x576@50Hz */
810 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
811 3184, 3456, 0, 576, 581, 586, 625, 0,
812 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
813 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
814 /* 39 - 1920x1080i@50Hz */
815 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
816 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
817 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
818 DRM_MODE_FLAG_INTERLACE),
819 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
820 /* 40 - 1920x1080i@100Hz */
821 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
822 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
823 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
824 DRM_MODE_FLAG_INTERLACE),
825 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
826 /* 41 - 1280x720@100Hz */
827 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
828 1760, 1980, 0, 720, 725, 730, 750, 0,
829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
830 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
831 /* 42 - 720x576@100Hz */
832 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
833 796, 864, 0, 576, 581, 586, 625, 0,
834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
835 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
836 /* 43 - 720x576@100Hz */
837 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
838 796, 864, 0, 576, 581, 586, 625, 0,
839 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
840 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
841 /* 44 - 720(1440)x576i@100Hz */
842 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
843 795, 864, 0, 576, 580, 586, 625, 0,
844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
845 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
846 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
847 /* 45 - 720(1440)x576i@100Hz */
848 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
849 795, 864, 0, 576, 580, 586, 625, 0,
850 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
851 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
852 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
853 /* 46 - 1920x1080i@120Hz */
854 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
855 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
856 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
857 DRM_MODE_FLAG_INTERLACE),
858 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
859 /* 47 - 1280x720@120Hz */
860 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
861 1430, 1650, 0, 720, 725, 730, 750, 0,
862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
863 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
864 /* 48 - 720x480@120Hz */
865 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
866 798, 858, 0, 480, 489, 495, 525, 0,
867 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
868 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
869 /* 49 - 720x480@120Hz */
870 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
871 798, 858, 0, 480, 489, 495, 525, 0,
872 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
873 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
874 /* 50 - 720(1440)x480i@120Hz */
875 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
876 801, 858, 0, 480, 488, 494, 525, 0,
877 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
878 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
879 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
880 /* 51 - 720(1440)x480i@120Hz */
881 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
882 801, 858, 0, 480, 488, 494, 525, 0,
883 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
884 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
885 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
886 /* 52 - 720x576@200Hz */
887 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
888 796, 864, 0, 576, 581, 586, 625, 0,
889 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
890 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
891 /* 53 - 720x576@200Hz */
892 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
893 796, 864, 0, 576, 581, 586, 625, 0,
894 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
895 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
896 /* 54 - 720(1440)x576i@200Hz */
897 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
898 795, 864, 0, 576, 580, 586, 625, 0,
899 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
900 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
901 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
902 /* 55 - 720(1440)x576i@200Hz */
903 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
904 795, 864, 0, 576, 580, 586, 625, 0,
905 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
906 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
907 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
908 /* 56 - 720x480@240Hz */
909 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
910 798, 858, 0, 480, 489, 495, 525, 0,
911 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
912 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
913 /* 57 - 720x480@240Hz */
914 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
915 798, 858, 0, 480, 489, 495, 525, 0,
916 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
917 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
918 /* 58 - 720(1440)x480i@240 */
919 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
920 801, 858, 0, 480, 488, 494, 525, 0,
921 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
922 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
923 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
924 /* 59 - 720(1440)x480i@240 */
925 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
926 801, 858, 0, 480, 488, 494, 525, 0,
927 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
928 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
929 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
930 /* 60 - 1280x720@24Hz */
931 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
932 3080, 3300, 0, 720, 725, 730, 750, 0,
933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
934 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
935 /* 61 - 1280x720@25Hz */
936 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
937 3740, 3960, 0, 720, 725, 730, 750, 0,
938 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
939 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
940 /* 62 - 1280x720@30Hz */
941 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
942 3080, 3300, 0, 720, 725, 730, 750, 0,
943 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
944 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
945 /* 63 - 1920x1080@120Hz */
946 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
947 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
948 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
949 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
950 /* 64 - 1920x1080@100Hz */
951 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
952 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
953 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
954 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
960 static const struct drm_display_mode edid_4k_modes[] = {
961 /* 1 - 3840x2160@30Hz */
962 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
963 3840, 4016, 4104, 4400, 0,
964 2160, 2168, 2178, 2250, 0,
965 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
967 /* 2 - 3840x2160@25Hz */
968 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
969 3840, 4896, 4984, 5280, 0,
970 2160, 2168, 2178, 2250, 0,
971 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
973 /* 3 - 3840x2160@24Hz */
974 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
975 3840, 5116, 5204, 5500, 0,
976 2160, 2168, 2178, 2250, 0,
977 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
979 /* 4 - 4096x2160@24Hz (SMPTE) */
980 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
981 4096, 5116, 5204, 5500, 0,
982 2160, 2168, 2178, 2250, 0,
983 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
987 /*** DDC fetch and block validation ***/
989 static const u8 edid_header[] = {
990 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
994 * drm_edid_header_is_valid - sanity check the header of the base EDID block
995 * @raw_edid: pointer to raw base EDID block
997 * Sanity check the header of the base EDID block.
999 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1001 int drm_edid_header_is_valid(const u8 *raw_edid)
1005 for (i = 0; i < sizeof(edid_header); i++)
1006 if (raw_edid[i] == edid_header[i])
1011 EXPORT_SYMBOL(drm_edid_header_is_valid);
1013 static int edid_fixup __read_mostly = 6;
1014 module_param_named(edid_fixup, edid_fixup, int, 0400);
1015 MODULE_PARM_DESC(edid_fixup,
1016 "Minimum number of valid EDID header bytes (0-8, default 6)");
1018 static void drm_get_displayid(struct drm_connector *connector,
1021 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1022 * @raw_edid: pointer to raw EDID block
1023 * @block: type of block to validate (0 for base, extension otherwise)
1024 * @print_bad_edid: if true, dump bad EDID blocks to the console
1026 * Validate a base or extension EDID block and optionally dump bad blocks to
1029 * Return: True if the block is valid, false otherwise.
1031 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
1035 struct edid *edid = (struct edid *)raw_edid;
1037 if (WARN_ON(!raw_edid))
1040 if (edid_fixup > 8 || edid_fixup < 0)
1044 int score = drm_edid_header_is_valid(raw_edid);
1046 else if (score >= edid_fixup) {
1047 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1048 memcpy(raw_edid, edid_header, sizeof(edid_header));
1054 for (i = 0; i < EDID_LENGTH; i++)
1055 csum += raw_edid[i];
1057 if (print_bad_edid) {
1058 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1061 /* allow CEA to slide through, switches mangle this */
1062 if (raw_edid[0] != 0x02)
1066 /* per-block-type checks */
1067 switch (raw_edid[0]) {
1069 if (edid->version != 1) {
1070 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1074 if (edid->revision > 4)
1075 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1085 if (print_bad_edid) {
1086 printk(KERN_ERR "Raw EDID:\n");
1087 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1088 raw_edid, EDID_LENGTH, false);
1092 EXPORT_SYMBOL(drm_edid_block_valid);
1095 * drm_edid_is_valid - sanity check EDID data
1098 * Sanity-check an entire EDID record (including extensions)
1100 * Return: True if the EDID data is valid, false otherwise.
1102 bool drm_edid_is_valid(struct edid *edid)
1105 u8 *raw = (u8 *)edid;
1110 for (i = 0; i <= edid->extensions; i++)
1111 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1116 EXPORT_SYMBOL(drm_edid_is_valid);
1118 #define DDC_SEGMENT_ADDR 0x30
1120 * drm_do_probe_ddc_edid() - get EDID information via I2C
1121 * @adapter: I2C device adaptor
1122 * @buf: EDID data buffer to be filled
1123 * @block: 128 byte EDID block to start fetching from
1124 * @len: EDID data buffer length to fetch
1126 * Try to fetch EDID information by calling I2C driver functions.
1128 * Return: 0 on success or -1 on failure.
1131 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1133 struct i2c_adapter *adapter = data;
1134 unsigned char start = block * EDID_LENGTH;
1135 unsigned char segment = block >> 1;
1136 unsigned char xfers = segment ? 3 : 2;
1137 int ret, retries = 5;
1140 * The core I2C driver will automatically retry the transfer if the
1141 * adapter reports EAGAIN. However, we find that bit-banging transfers
1142 * are susceptible to errors under a heavily loaded machine and
1143 * generate spurious NAKs and timeouts. Retrying the transfer
1144 * of the individual block a few times seems to overcome this.
1147 struct i2c_msg msgs[] = {
1149 .addr = DDC_SEGMENT_ADDR,
1167 * Avoid sending the segment addr to not upset non-compliant
1170 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1172 if (ret == -ENXIO) {
1173 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1177 } while (ret != xfers && --retries);
1179 return ret == xfers ? 0 : -1;
1182 static bool drm_edid_is_zero(u8 *in_edid, int length)
1184 if (memchr_inv(in_edid, 0, length))
1191 * drm_do_get_edid - get EDID data using a custom EDID block read function
1192 * @connector: connector we're probing
1193 * @get_edid_block: EDID block read function
1194 * @data: private data passed to the block read function
1196 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1197 * exposes a different interface to read EDID blocks this function can be used
1198 * to get EDID data using a custom block read function.
1200 * As in the general case the DDC bus is accessible by the kernel at the I2C
1201 * level, drivers must make all reasonable efforts to expose it as an I2C
1202 * adapter and use drm_get_edid() instead of abusing this function.
1204 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1206 struct edid *drm_do_get_edid(struct drm_connector *connector,
1207 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1211 int i, j = 0, valid_extensions = 0;
1213 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1215 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1218 /* base block fetch */
1219 for (i = 0; i < 4; i++) {
1220 if (get_edid_block(data, block, 0, EDID_LENGTH))
1222 if (drm_edid_block_valid(block, 0, print_bad_edid))
1224 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1225 connector->null_edid_counter++;
1232 /* if there's no extensions, we're done */
1233 if (block[0x7e] == 0)
1234 return (struct edid *)block;
1236 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1241 for (j = 1; j <= block[0x7e]; j++) {
1242 for (i = 0; i < 4; i++) {
1243 if (get_edid_block(data,
1244 block + (valid_extensions + 1) * EDID_LENGTH,
1247 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1253 if (i == 4 && print_bad_edid) {
1254 dev_warn(connector->dev->dev,
1255 "%s: Ignoring invalid EDID block %d.\n",
1256 connector->name, j);
1258 connector->bad_edid_counter++;
1262 if (valid_extensions != block[0x7e]) {
1263 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1264 block[0x7e] = valid_extensions;
1265 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1271 return (struct edid *)block;
1274 if (print_bad_edid) {
1275 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1276 connector->name, j);
1278 connector->bad_edid_counter++;
1284 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1287 * drm_probe_ddc() - probe DDC presence
1288 * @adapter: I2C adapter to probe
1290 * Return: True on success, false on failure.
1293 drm_probe_ddc(struct i2c_adapter *adapter)
1297 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1299 EXPORT_SYMBOL(drm_probe_ddc);
1302 * drm_get_edid - get EDID data, if available
1303 * @connector: connector we're probing
1304 * @adapter: I2C adapter to use for DDC
1306 * Poke the given I2C channel to grab EDID data if possible. If found,
1307 * attach it to the connector.
1309 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1311 struct edid *drm_get_edid(struct drm_connector *connector,
1312 struct i2c_adapter *adapter)
1316 if (!drm_probe_ddc(adapter))
1319 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1321 drm_get_displayid(connector, edid);
1324 EXPORT_SYMBOL(drm_get_edid);
1327 * drm_edid_duplicate - duplicate an EDID and the extensions
1328 * @edid: EDID to duplicate
1330 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1332 struct edid *drm_edid_duplicate(const struct edid *edid)
1334 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1336 EXPORT_SYMBOL(drm_edid_duplicate);
1338 /*** EDID parsing ***/
1341 * edid_vendor - match a string against EDID's obfuscated vendor field
1342 * @edid: EDID to match
1343 * @vendor: vendor string
1345 * Returns true if @vendor is in @edid, false otherwise
1347 static bool edid_vendor(struct edid *edid, char *vendor)
1349 char edid_vendor[3];
1351 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1352 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1353 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1354 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1356 return !strncmp(edid_vendor, vendor, 3);
1360 * edid_get_quirks - return quirk flags for a given EDID
1361 * @edid: EDID to process
1363 * This tells subsequent routines what fixes they need to apply.
1365 static u32 edid_get_quirks(struct edid *edid)
1367 struct edid_quirk *quirk;
1370 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1371 quirk = &edid_quirk_list[i];
1373 if (edid_vendor(edid, quirk->vendor) &&
1374 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1375 return quirk->quirks;
1381 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1382 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1385 * edid_fixup_preferred - set preferred modes based on quirk list
1386 * @connector: has mode list to fix up
1387 * @quirks: quirks list
1389 * Walk the mode list for @connector, clearing the preferred status
1390 * on existing modes and setting it anew for the right mode ala @quirks.
1392 static void edid_fixup_preferred(struct drm_connector *connector,
1395 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1396 int target_refresh = 0;
1397 int cur_vrefresh, preferred_vrefresh;
1399 if (list_empty(&connector->probed_modes))
1402 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1403 target_refresh = 60;
1404 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1405 target_refresh = 75;
1407 preferred_mode = list_first_entry(&connector->probed_modes,
1408 struct drm_display_mode, head);
1410 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1411 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1413 if (cur_mode == preferred_mode)
1416 /* Largest mode is preferred */
1417 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1418 preferred_mode = cur_mode;
1420 cur_vrefresh = cur_mode->vrefresh ?
1421 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1422 preferred_vrefresh = preferred_mode->vrefresh ?
1423 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1424 /* At a given size, try to get closest to target refresh */
1425 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1426 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1427 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1428 preferred_mode = cur_mode;
1432 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1436 mode_is_rb(const struct drm_display_mode *mode)
1438 return (mode->htotal - mode->hdisplay == 160) &&
1439 (mode->hsync_end - mode->hdisplay == 80) &&
1440 (mode->hsync_end - mode->hsync_start == 32) &&
1441 (mode->vsync_start - mode->vdisplay == 3);
1445 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1446 * @dev: Device to duplicate against
1447 * @hsize: Mode width
1448 * @vsize: Mode height
1449 * @fresh: Mode refresh rate
1450 * @rb: Mode reduced-blanking-ness
1452 * Walk the DMT mode list looking for a match for the given parameters.
1454 * Return: A newly allocated copy of the mode, or NULL if not found.
1456 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1457 int hsize, int vsize, int fresh,
1462 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1463 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1464 if (hsize != ptr->hdisplay)
1466 if (vsize != ptr->vdisplay)
1468 if (fresh != drm_mode_vrefresh(ptr))
1470 if (rb != mode_is_rb(ptr))
1473 return drm_mode_duplicate(dev, ptr);
1478 EXPORT_SYMBOL(drm_mode_find_dmt);
1480 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1483 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1487 u8 *det_base = ext + d;
1490 for (i = 0; i < n; i++)
1491 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1495 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1497 unsigned int i, n = min((int)ext[0x02], 6);
1498 u8 *det_base = ext + 5;
1501 return; /* unknown version */
1503 for (i = 0; i < n; i++)
1504 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1508 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1511 struct edid *edid = (struct edid *)raw_edid;
1516 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1517 cb(&(edid->detailed_timings[i]), closure);
1519 for (i = 1; i <= raw_edid[0x7e]; i++) {
1520 u8 *ext = raw_edid + (i * EDID_LENGTH);
1523 cea_for_each_detailed_block(ext, cb, closure);
1526 vtb_for_each_detailed_block(ext, cb, closure);
1535 is_rb(struct detailed_timing *t, void *data)
1538 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1540 *(bool *)data = true;
1543 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1545 drm_monitor_supports_rb(struct edid *edid)
1547 if (edid->revision >= 4) {
1549 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1553 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1557 find_gtf2(struct detailed_timing *t, void *data)
1560 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1564 /* Secondary GTF curve kicks in above some break frequency */
1566 drm_gtf2_hbreak(struct edid *edid)
1569 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1570 return r ? (r[12] * 2) : 0;
1574 drm_gtf2_2c(struct edid *edid)
1577 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1578 return r ? r[13] : 0;
1582 drm_gtf2_m(struct edid *edid)
1585 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1586 return r ? (r[15] << 8) + r[14] : 0;
1590 drm_gtf2_k(struct edid *edid)
1593 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1594 return r ? r[16] : 0;
1598 drm_gtf2_2j(struct edid *edid)
1601 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1602 return r ? r[17] : 0;
1606 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1607 * @edid: EDID block to scan
1609 static int standard_timing_level(struct edid *edid)
1611 if (edid->revision >= 2) {
1612 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1614 if (drm_gtf2_hbreak(edid))
1622 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1623 * monitors fill with ascii space (0x20) instead.
1626 bad_std_timing(u8 a, u8 b)
1628 return (a == 0x00 && b == 0x00) ||
1629 (a == 0x01 && b == 0x01) ||
1630 (a == 0x20 && b == 0x20);
1634 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1635 * @connector: connector of for the EDID block
1636 * @edid: EDID block to scan
1637 * @t: standard timing params
1639 * Take the standard timing params (in this case width, aspect, and refresh)
1640 * and convert them into a real mode using CVT/GTF/DMT.
1642 static struct drm_display_mode *
1643 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1644 struct std_timing *t)
1646 struct drm_device *dev = connector->dev;
1647 struct drm_display_mode *m, *mode = NULL;
1650 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1651 >> EDID_TIMING_ASPECT_SHIFT;
1652 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1653 >> EDID_TIMING_VFREQ_SHIFT;
1654 int timing_level = standard_timing_level(edid);
1656 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1659 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1660 hsize = t->hsize * 8 + 248;
1661 /* vrefresh_rate = vfreq + 60 */
1662 vrefresh_rate = vfreq + 60;
1663 /* the vdisplay is calculated based on the aspect ratio */
1664 if (aspect_ratio == 0) {
1665 if (edid->revision < 3)
1668 vsize = (hsize * 10) / 16;
1669 } else if (aspect_ratio == 1)
1670 vsize = (hsize * 3) / 4;
1671 else if (aspect_ratio == 2)
1672 vsize = (hsize * 4) / 5;
1674 vsize = (hsize * 9) / 16;
1676 /* HDTV hack, part 1 */
1677 if (vrefresh_rate == 60 &&
1678 ((hsize == 1360 && vsize == 765) ||
1679 (hsize == 1368 && vsize == 769))) {
1685 * If this connector already has a mode for this size and refresh
1686 * rate (because it came from detailed or CVT info), use that
1687 * instead. This way we don't have to guess at interlace or
1690 list_for_each_entry(m, &connector->probed_modes, head)
1691 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1692 drm_mode_vrefresh(m) == vrefresh_rate)
1695 /* HDTV hack, part 2 */
1696 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1697 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1699 mode->hdisplay = 1366;
1700 mode->hsync_start = mode->hsync_start - 1;
1701 mode->hsync_end = mode->hsync_end - 1;
1705 /* check whether it can be found in default mode table */
1706 if (drm_monitor_supports_rb(edid)) {
1707 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1712 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1716 /* okay, generate it */
1717 switch (timing_level) {
1721 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1725 * This is potentially wrong if there's ever a monitor with
1726 * more than one ranges section, each claiming a different
1727 * secondary GTF curve. Please don't do that.
1729 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1732 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1733 drm_mode_destroy(dev, mode);
1734 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1735 vrefresh_rate, 0, 0,
1743 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1751 * EDID is delightfully ambiguous about how interlaced modes are to be
1752 * encoded. Our internal representation is of frame height, but some
1753 * HDTV detailed timings are encoded as field height.
1755 * The format list here is from CEA, in frame size. Technically we
1756 * should be checking refresh rate too. Whatever.
1759 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1760 struct detailed_pixel_timing *pt)
1763 static const struct {
1765 } cea_interlaced[] = {
1775 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1778 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1779 if ((mode->hdisplay == cea_interlaced[i].w) &&
1780 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1781 mode->vdisplay *= 2;
1782 mode->vsync_start *= 2;
1783 mode->vsync_end *= 2;
1789 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1793 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1794 * @dev: DRM device (needed to create new mode)
1796 * @timing: EDID detailed timing info
1797 * @quirks: quirks to apply
1799 * An EDID detailed timing block contains enough info for us to create and
1800 * return a new struct drm_display_mode.
1802 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1804 struct detailed_timing *timing,
1807 struct drm_display_mode *mode;
1808 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1809 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1810 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1811 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1812 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1813 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1814 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1815 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1816 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1818 /* ignore tiny modes */
1819 if (hactive < 64 || vactive < 64)
1822 if (pt->misc & DRM_EDID_PT_STEREO) {
1823 DRM_DEBUG_KMS("stereo mode not supported\n");
1826 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1827 DRM_DEBUG_KMS("composite sync not supported\n");
1830 /* it is incorrect if hsync/vsync width is zero */
1831 if (!hsync_pulse_width || !vsync_pulse_width) {
1832 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1833 "Wrong Hsync/Vsync pulse width\n");
1837 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1838 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1845 mode = drm_mode_create(dev);
1849 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1850 timing->pixel_clock = cpu_to_le16(1088);
1852 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1854 mode->hdisplay = hactive;
1855 mode->hsync_start = mode->hdisplay + hsync_offset;
1856 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1857 mode->htotal = mode->hdisplay + hblank;
1859 mode->vdisplay = vactive;
1860 mode->vsync_start = mode->vdisplay + vsync_offset;
1861 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1862 mode->vtotal = mode->vdisplay + vblank;
1864 /* Some EDIDs have bogus h/vtotal values */
1865 if (mode->hsync_end > mode->htotal)
1866 mode->htotal = mode->hsync_end + 1;
1867 if (mode->vsync_end > mode->vtotal)
1868 mode->vtotal = mode->vsync_end + 1;
1870 drm_mode_do_interlace_quirk(mode, pt);
1872 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1873 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1876 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1877 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1878 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1879 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1882 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1883 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1885 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1886 mode->width_mm *= 10;
1887 mode->height_mm *= 10;
1890 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1891 mode->width_mm = edid->width_cm * 10;
1892 mode->height_mm = edid->height_cm * 10;
1895 mode->type = DRM_MODE_TYPE_DRIVER;
1896 mode->vrefresh = drm_mode_vrefresh(mode);
1897 drm_mode_set_name(mode);
1903 mode_in_hsync_range(const struct drm_display_mode *mode,
1904 struct edid *edid, u8 *t)
1906 int hsync, hmin, hmax;
1909 if (edid->revision >= 4)
1910 hmin += ((t[4] & 0x04) ? 255 : 0);
1912 if (edid->revision >= 4)
1913 hmax += ((t[4] & 0x08) ? 255 : 0);
1914 hsync = drm_mode_hsync(mode);
1916 return (hsync <= hmax && hsync >= hmin);
1920 mode_in_vsync_range(const struct drm_display_mode *mode,
1921 struct edid *edid, u8 *t)
1923 int vsync, vmin, vmax;
1926 if (edid->revision >= 4)
1927 vmin += ((t[4] & 0x01) ? 255 : 0);
1929 if (edid->revision >= 4)
1930 vmax += ((t[4] & 0x02) ? 255 : 0);
1931 vsync = drm_mode_vrefresh(mode);
1933 return (vsync <= vmax && vsync >= vmin);
1937 range_pixel_clock(struct edid *edid, u8 *t)
1940 if (t[9] == 0 || t[9] == 255)
1943 /* 1.4 with CVT support gives us real precision, yay */
1944 if (edid->revision >= 4 && t[10] == 0x04)
1945 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1947 /* 1.3 is pathetic, so fuzz up a bit */
1948 return t[9] * 10000 + 5001;
1952 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1953 struct detailed_timing *timing)
1956 u8 *t = (u8 *)timing;
1958 if (!mode_in_hsync_range(mode, edid, t))
1961 if (!mode_in_vsync_range(mode, edid, t))
1964 if ((max_clock = range_pixel_clock(edid, t)))
1965 if (mode->clock > max_clock)
1968 /* 1.4 max horizontal check */
1969 if (edid->revision >= 4 && t[10] == 0x04)
1970 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1973 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1979 static bool valid_inferred_mode(const struct drm_connector *connector,
1980 const struct drm_display_mode *mode)
1982 struct drm_display_mode *m;
1985 list_for_each_entry(m, &connector->probed_modes, head) {
1986 if (mode->hdisplay == m->hdisplay &&
1987 mode->vdisplay == m->vdisplay &&
1988 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1989 return false; /* duplicated */
1990 if (mode->hdisplay <= m->hdisplay &&
1991 mode->vdisplay <= m->vdisplay)
1998 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1999 struct detailed_timing *timing)
2002 struct drm_display_mode *newmode;
2003 struct drm_device *dev = connector->dev;
2005 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2006 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2007 valid_inferred_mode(connector, drm_dmt_modes + i)) {
2008 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2010 drm_mode_probed_add(connector, newmode);
2019 /* fix up 1366x768 mode from 1368x768;
2020 * GFT/CVT can't express 1366 width which isn't dividable by 8
2022 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2024 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2025 mode->hdisplay = 1366;
2026 mode->hsync_start--;
2028 drm_mode_set_name(mode);
2033 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2034 struct detailed_timing *timing)
2037 struct drm_display_mode *newmode;
2038 struct drm_device *dev = connector->dev;
2040 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2041 const struct minimode *m = &extra_modes[i];
2042 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2046 fixup_mode_1366x768(newmode);
2047 if (!mode_in_range(newmode, edid, timing) ||
2048 !valid_inferred_mode(connector, newmode)) {
2049 drm_mode_destroy(dev, newmode);
2053 drm_mode_probed_add(connector, newmode);
2061 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2062 struct detailed_timing *timing)
2065 struct drm_display_mode *newmode;
2066 struct drm_device *dev = connector->dev;
2067 bool rb = drm_monitor_supports_rb(edid);
2069 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2070 const struct minimode *m = &extra_modes[i];
2071 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2075 fixup_mode_1366x768(newmode);
2076 if (!mode_in_range(newmode, edid, timing) ||
2077 !valid_inferred_mode(connector, newmode)) {
2078 drm_mode_destroy(dev, newmode);
2082 drm_mode_probed_add(connector, newmode);
2090 do_inferred_modes(struct detailed_timing *timing, void *c)
2092 struct detailed_mode_closure *closure = c;
2093 struct detailed_non_pixel *data = &timing->data.other_data;
2094 struct detailed_data_monitor_range *range = &data->data.range;
2096 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2099 closure->modes += drm_dmt_modes_for_range(closure->connector,
2103 if (!version_greater(closure->edid, 1, 1))
2104 return; /* GTF not defined yet */
2106 switch (range->flags) {
2107 case 0x02: /* secondary gtf, XXX could do more */
2108 case 0x00: /* default gtf */
2109 closure->modes += drm_gtf_modes_for_range(closure->connector,
2113 case 0x04: /* cvt, only in 1.4+ */
2114 if (!version_greater(closure->edid, 1, 3))
2117 closure->modes += drm_cvt_modes_for_range(closure->connector,
2121 case 0x01: /* just the ranges, no formula */
2128 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2130 struct detailed_mode_closure closure = {
2131 .connector = connector,
2135 if (version_greater(edid, 1, 0))
2136 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2139 return closure.modes;
2143 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2145 int i, j, m, modes = 0;
2146 struct drm_display_mode *mode;
2147 u8 *est = ((u8 *)timing) + 5;
2149 for (i = 0; i < 6; i++) {
2150 for (j = 7; j >= 0; j--) {
2151 m = (i * 8) + (7 - j);
2152 if (m >= ARRAY_SIZE(est3_modes))
2154 if (est[i] & (1 << j)) {
2155 mode = drm_mode_find_dmt(connector->dev,
2161 drm_mode_probed_add(connector, mode);
2172 do_established_modes(struct detailed_timing *timing, void *c)
2174 struct detailed_mode_closure *closure = c;
2175 struct detailed_non_pixel *data = &timing->data.other_data;
2177 if (data->type == EDID_DETAIL_EST_TIMINGS)
2178 closure->modes += drm_est3_modes(closure->connector, timing);
2182 * add_established_modes - get est. modes from EDID and add them
2183 * @connector: connector to add mode(s) to
2184 * @edid: EDID block to scan
2186 * Each EDID block contains a bitmap of the supported "established modes" list
2187 * (defined above). Tease them out and add them to the global modes list.
2190 add_established_modes(struct drm_connector *connector, struct edid *edid)
2192 struct drm_device *dev = connector->dev;
2193 unsigned long est_bits = edid->established_timings.t1 |
2194 (edid->established_timings.t2 << 8) |
2195 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2197 struct detailed_mode_closure closure = {
2198 .connector = connector,
2202 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2203 if (est_bits & (1<<i)) {
2204 struct drm_display_mode *newmode;
2205 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2207 drm_mode_probed_add(connector, newmode);
2213 if (version_greater(edid, 1, 0))
2214 drm_for_each_detailed_block((u8 *)edid,
2215 do_established_modes, &closure);
2217 return modes + closure.modes;
2221 do_standard_modes(struct detailed_timing *timing, void *c)
2223 struct detailed_mode_closure *closure = c;
2224 struct detailed_non_pixel *data = &timing->data.other_data;
2225 struct drm_connector *connector = closure->connector;
2226 struct edid *edid = closure->edid;
2228 if (data->type == EDID_DETAIL_STD_MODES) {
2230 for (i = 0; i < 6; i++) {
2231 struct std_timing *std;
2232 struct drm_display_mode *newmode;
2234 std = &data->data.timings[i];
2235 newmode = drm_mode_std(connector, edid, std);
2237 drm_mode_probed_add(connector, newmode);
2245 * add_standard_modes - get std. modes from EDID and add them
2246 * @connector: connector to add mode(s) to
2247 * @edid: EDID block to scan
2249 * Standard modes can be calculated using the appropriate standard (DMT,
2250 * GTF or CVT. Grab them from @edid and add them to the list.
2253 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2256 struct detailed_mode_closure closure = {
2257 .connector = connector,
2261 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2262 struct drm_display_mode *newmode;
2264 newmode = drm_mode_std(connector, edid,
2265 &edid->standard_timings[i]);
2267 drm_mode_probed_add(connector, newmode);
2272 if (version_greater(edid, 1, 0))
2273 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2276 /* XXX should also look for standard codes in VTB blocks */
2278 return modes + closure.modes;
2281 static int drm_cvt_modes(struct drm_connector *connector,
2282 struct detailed_timing *timing)
2284 int i, j, modes = 0;
2285 struct drm_display_mode *newmode;
2286 struct drm_device *dev = connector->dev;
2287 struct cvt_timing *cvt;
2288 const int rates[] = { 60, 85, 75, 60, 50 };
2289 const u8 empty[3] = { 0, 0, 0 };
2291 for (i = 0; i < 4; i++) {
2292 int uninitialized_var(width), height;
2293 cvt = &(timing->data.other_data.data.cvt[i]);
2295 if (!memcmp(cvt->code, empty, 3))
2298 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2299 switch (cvt->code[1] & 0x0c) {
2301 width = height * 4 / 3;
2304 width = height * 16 / 9;
2307 width = height * 16 / 10;
2310 width = height * 15 / 9;
2314 for (j = 1; j < 5; j++) {
2315 if (cvt->code[2] & (1 << j)) {
2316 newmode = drm_cvt_mode(dev, width, height,
2320 drm_mode_probed_add(connector, newmode);
2331 do_cvt_mode(struct detailed_timing *timing, void *c)
2333 struct detailed_mode_closure *closure = c;
2334 struct detailed_non_pixel *data = &timing->data.other_data;
2336 if (data->type == EDID_DETAIL_CVT_3BYTE)
2337 closure->modes += drm_cvt_modes(closure->connector, timing);
2341 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2343 struct detailed_mode_closure closure = {
2344 .connector = connector,
2348 if (version_greater(edid, 1, 2))
2349 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2351 /* XXX should also look for CVT codes in VTB blocks */
2353 return closure.modes;
2357 do_detailed_mode(struct detailed_timing *timing, void *c)
2359 struct detailed_mode_closure *closure = c;
2360 struct drm_display_mode *newmode;
2362 if (timing->pixel_clock) {
2363 newmode = drm_mode_detailed(closure->connector->dev,
2364 closure->edid, timing,
2369 if (closure->preferred)
2370 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2372 drm_mode_probed_add(closure->connector, newmode);
2374 closure->preferred = 0;
2379 * add_detailed_modes - Add modes from detailed timings
2380 * @connector: attached connector
2381 * @edid: EDID block to scan
2382 * @quirks: quirks to apply
2385 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2388 struct detailed_mode_closure closure = {
2389 .connector = connector,
2395 if (closure.preferred && !version_greater(edid, 1, 3))
2397 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2399 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2401 return closure.modes;
2404 #define AUDIO_BLOCK 0x01
2405 #define VIDEO_BLOCK 0x02
2406 #define VENDOR_BLOCK 0x03
2407 #define SPEAKER_BLOCK 0x04
2408 #define VIDEO_CAPABILITY_BLOCK 0x07
2409 #define EDID_BASIC_AUDIO (1 << 6)
2410 #define EDID_CEA_YCRCB444 (1 << 5)
2411 #define EDID_CEA_YCRCB422 (1 << 4)
2412 #define EDID_CEA_VCDB_QS (1 << 6)
2415 * Search EDID for CEA extension block.
2417 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2419 u8 *edid_ext = NULL;
2422 /* No EDID or EDID extensions */
2423 if (edid == NULL || edid->extensions == 0)
2426 /* Find CEA extension */
2427 for (i = 0; i < edid->extensions; i++) {
2428 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2429 if (edid_ext[0] == ext_id)
2433 if (i == edid->extensions)
2439 static u8 *drm_find_cea_extension(struct edid *edid)
2441 return drm_find_edid_extension(edid, CEA_EXT);
2444 static u8 *drm_find_displayid_extension(struct edid *edid)
2446 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2450 * Calculate the alternate clock for the CEA mode
2451 * (60Hz vs. 59.94Hz etc.)
2454 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2456 unsigned int clock = cea_mode->clock;
2458 if (cea_mode->vrefresh % 6 != 0)
2462 * edid_cea_modes contains the 59.94Hz
2463 * variant for 240 and 480 line modes,
2464 * and the 60Hz variant otherwise.
2466 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2467 clock = clock * 1001 / 1000;
2469 clock = DIV_ROUND_UP(clock * 1000, 1001);
2475 * drm_match_cea_mode - look for a CEA mode matching given mode
2476 * @to_match: display mode
2478 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2481 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2485 if (!to_match->clock)
2488 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2489 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2490 unsigned int clock1, clock2;
2492 /* Check both 60Hz and 59.94Hz */
2493 clock1 = cea_mode->clock;
2494 clock2 = cea_mode_alternate_clock(cea_mode);
2496 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2497 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2498 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2503 EXPORT_SYMBOL(drm_match_cea_mode);
2506 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2507 * the input VIC from the CEA mode list
2508 * @video_code: ID given to each of the CEA modes
2510 * Returns picture aspect ratio
2512 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2514 /* return picture aspect ratio for video_code - 1 to access the
2515 * right array element
2517 return edid_cea_modes[video_code-1].picture_aspect_ratio;
2519 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2522 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2525 * It's almost like cea_mode_alternate_clock(), we just need to add an
2526 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2530 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2532 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2533 return hdmi_mode->clock;
2535 return cea_mode_alternate_clock(hdmi_mode);
2539 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2540 * @to_match: display mode
2542 * An HDMI mode is one defined in the HDMI vendor specific block.
2544 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2546 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2550 if (!to_match->clock)
2553 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2554 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2555 unsigned int clock1, clock2;
2557 /* Make sure to also match alternate clocks */
2558 clock1 = hdmi_mode->clock;
2559 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2561 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2562 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2563 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2570 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2572 struct drm_device *dev = connector->dev;
2573 struct drm_display_mode *mode, *tmp;
2577 /* Don't add CEA modes if the CEA extension block is missing */
2578 if (!drm_find_cea_extension(edid))
2582 * Go through all probed modes and create a new mode
2583 * with the alternate clock for certain CEA modes.
2585 list_for_each_entry(mode, &connector->probed_modes, head) {
2586 const struct drm_display_mode *cea_mode = NULL;
2587 struct drm_display_mode *newmode;
2588 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2589 unsigned int clock1, clock2;
2591 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2592 cea_mode = &edid_cea_modes[mode_idx];
2593 clock2 = cea_mode_alternate_clock(cea_mode);
2595 mode_idx = drm_match_hdmi_mode(mode) - 1;
2596 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2597 cea_mode = &edid_4k_modes[mode_idx];
2598 clock2 = hdmi_mode_alternate_clock(cea_mode);
2605 clock1 = cea_mode->clock;
2607 if (clock1 == clock2)
2610 if (mode->clock != clock1 && mode->clock != clock2)
2613 newmode = drm_mode_duplicate(dev, cea_mode);
2617 /* Carry over the stereo flags */
2618 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2621 * The current mode could be either variant. Make
2622 * sure to pick the "other" clock for the new mode.
2624 if (mode->clock != clock1)
2625 newmode->clock = clock1;
2627 newmode->clock = clock2;
2629 list_add_tail(&newmode->head, &list);
2632 list_for_each_entry_safe(mode, tmp, &list, head) {
2633 list_del(&mode->head);
2634 drm_mode_probed_add(connector, mode);
2641 static struct drm_display_mode *
2642 drm_display_mode_from_vic_index(struct drm_connector *connector,
2643 const u8 *video_db, u8 video_len,
2646 struct drm_device *dev = connector->dev;
2647 struct drm_display_mode *newmode;
2650 if (video_db == NULL || video_index >= video_len)
2653 /* CEA modes are numbered 1..127 */
2654 cea_mode = (video_db[video_index] & 127) - 1;
2655 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2658 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2662 newmode->vrefresh = 0;
2668 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2672 for (i = 0; i < len; i++) {
2673 struct drm_display_mode *mode;
2674 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2676 drm_mode_probed_add(connector, mode);
2684 struct stereo_mandatory_mode {
2685 int width, height, vrefresh;
2689 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2690 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2691 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2693 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2695 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2696 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2697 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2698 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2699 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2703 stereo_match_mandatory(const struct drm_display_mode *mode,
2704 const struct stereo_mandatory_mode *stereo_mode)
2706 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2708 return mode->hdisplay == stereo_mode->width &&
2709 mode->vdisplay == stereo_mode->height &&
2710 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2711 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2714 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2716 struct drm_device *dev = connector->dev;
2717 const struct drm_display_mode *mode;
2718 struct list_head stereo_modes;
2721 INIT_LIST_HEAD(&stereo_modes);
2723 list_for_each_entry(mode, &connector->probed_modes, head) {
2724 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2725 const struct stereo_mandatory_mode *mandatory;
2726 struct drm_display_mode *new_mode;
2728 if (!stereo_match_mandatory(mode,
2729 &stereo_mandatory_modes[i]))
2732 mandatory = &stereo_mandatory_modes[i];
2733 new_mode = drm_mode_duplicate(dev, mode);
2737 new_mode->flags |= mandatory->flags;
2738 list_add_tail(&new_mode->head, &stereo_modes);
2743 list_splice_tail(&stereo_modes, &connector->probed_modes);
2748 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2750 struct drm_device *dev = connector->dev;
2751 struct drm_display_mode *newmode;
2753 vic--; /* VICs start at 1 */
2754 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2755 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2759 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2763 drm_mode_probed_add(connector, newmode);
2768 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2769 const u8 *video_db, u8 video_len, u8 video_index)
2771 struct drm_display_mode *newmode;
2774 if (structure & (1 << 0)) {
2775 newmode = drm_display_mode_from_vic_index(connector, video_db,
2779 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2780 drm_mode_probed_add(connector, newmode);
2784 if (structure & (1 << 6)) {
2785 newmode = drm_display_mode_from_vic_index(connector, video_db,
2789 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2790 drm_mode_probed_add(connector, newmode);
2794 if (structure & (1 << 8)) {
2795 newmode = drm_display_mode_from_vic_index(connector, video_db,
2799 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2800 drm_mode_probed_add(connector, newmode);
2809 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2810 * @connector: connector corresponding to the HDMI sink
2811 * @db: start of the CEA vendor specific block
2812 * @len: length of the CEA block payload, ie. one can access up to db[len]
2814 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2815 * also adds the stereo 3d modes when applicable.
2818 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2819 const u8 *video_db, u8 video_len)
2821 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2822 u8 vic_len, hdmi_3d_len = 0;
2829 /* no HDMI_Video_Present */
2830 if (!(db[8] & (1 << 5)))
2833 /* Latency_Fields_Present */
2834 if (db[8] & (1 << 7))
2837 /* I_Latency_Fields_Present */
2838 if (db[8] & (1 << 6))
2841 /* the declared length is not long enough for the 2 first bytes
2842 * of additional video format capabilities */
2843 if (len < (8 + offset + 2))
2848 if (db[8 + offset] & (1 << 7)) {
2849 modes += add_hdmi_mandatory_stereo_modes(connector);
2851 /* 3D_Multi_present */
2852 multi_present = (db[8 + offset] & 0x60) >> 5;
2856 vic_len = db[8 + offset] >> 5;
2857 hdmi_3d_len = db[8 + offset] & 0x1f;
2859 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2862 vic = db[9 + offset + i];
2863 modes += add_hdmi_mode(connector, vic);
2865 offset += 1 + vic_len;
2867 if (multi_present == 1)
2869 else if (multi_present == 2)
2874 if (len < (8 + offset + hdmi_3d_len - 1))
2877 if (hdmi_3d_len < multi_len)
2880 if (multi_present == 1 || multi_present == 2) {
2881 /* 3D_Structure_ALL */
2882 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2884 /* check if 3D_MASK is present */
2885 if (multi_present == 2)
2886 mask = (db[10 + offset] << 8) | db[11 + offset];
2890 for (i = 0; i < 16; i++) {
2891 if (mask & (1 << i))
2892 modes += add_3d_struct_modes(connector,
2899 offset += multi_len;
2901 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2903 struct drm_display_mode *newmode = NULL;
2904 unsigned int newflag = 0;
2905 bool detail_present;
2907 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2909 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2912 /* 2D_VIC_order_X */
2913 vic_index = db[8 + offset + i] >> 4;
2915 /* 3D_Structure_X */
2916 switch (db[8 + offset + i] & 0x0f) {
2918 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
2921 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2925 if ((db[9 + offset + i] >> 4) == 1)
2926 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2931 newmode = drm_display_mode_from_vic_index(connector,
2937 newmode->flags |= newflag;
2938 drm_mode_probed_add(connector, newmode);
2952 cea_db_payload_len(const u8 *db)
2954 return db[0] & 0x1f;
2958 cea_db_tag(const u8 *db)
2964 cea_revision(const u8 *cea)
2970 cea_db_offsets(const u8 *cea, int *start, int *end)
2972 /* Data block offset in CEA extension block */
2977 if (*end < 4 || *end > 127)
2982 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2986 if (cea_db_tag(db) != VENDOR_BLOCK)
2989 if (cea_db_payload_len(db) < 5)
2992 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2994 return hdmi_id == HDMI_IEEE_OUI;
2997 #define for_each_cea_db(cea, i, start, end) \
2998 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3001 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3003 const u8 *cea = drm_find_cea_extension(edid);
3004 const u8 *db, *hdmi = NULL, *video = NULL;
3005 u8 dbl, hdmi_len, video_len = 0;
3008 if (cea && cea_revision(cea) >= 3) {
3011 if (cea_db_offsets(cea, &start, &end))
3014 for_each_cea_db(cea, i, start, end) {
3016 dbl = cea_db_payload_len(db);
3018 if (cea_db_tag(db) == VIDEO_BLOCK) {
3021 modes += do_cea_modes(connector, video, dbl);
3023 else if (cea_db_is_hdmi_vsdb(db)) {
3031 * We parse the HDMI VSDB after having added the cea modes as we will
3032 * be patching their flags when the sink supports stereo 3D.
3035 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3042 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3044 u8 len = cea_db_payload_len(db);
3047 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3048 connector->dvi_dual = db[6] & 1;
3051 connector->max_tmds_clock = db[7] * 5;
3053 connector->latency_present[0] = db[8] >> 7;
3054 connector->latency_present[1] = (db[8] >> 6) & 1;
3057 connector->video_latency[0] = db[9];
3059 connector->audio_latency[0] = db[10];
3061 connector->video_latency[1] = db[11];
3063 connector->audio_latency[1] = db[12];
3065 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3066 "max TMDS clock %d, "
3067 "latency present %d %d, "
3068 "video latency %d %d, "
3069 "audio latency %d %d\n",
3070 connector->dvi_dual,
3071 connector->max_tmds_clock,
3072 (int) connector->latency_present[0],
3073 (int) connector->latency_present[1],
3074 connector->video_latency[0],
3075 connector->video_latency[1],
3076 connector->audio_latency[0],
3077 connector->audio_latency[1]);
3081 monitor_name(struct detailed_timing *t, void *data)
3083 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3084 *(u8 **)data = t->data.other_data.data.str.str;
3088 * drm_edid_to_eld - build ELD from EDID
3089 * @connector: connector corresponding to the HDMI/DP sink
3090 * @edid: EDID to parse
3092 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3093 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3096 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3098 uint8_t *eld = connector->eld;
3106 memset(eld, 0, sizeof(connector->eld));
3108 cea = drm_find_cea_extension(edid);
3110 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3115 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3116 for (mnl = 0; name && mnl < 13; mnl++) {
3117 if (name[mnl] == 0x0a)
3119 eld[20 + mnl] = name[mnl];
3121 eld[4] = (cea[1] << 5) | mnl;
3122 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3124 eld[0] = 2 << 3; /* ELD version: 2 */
3126 eld[16] = edid->mfg_id[0];
3127 eld[17] = edid->mfg_id[1];
3128 eld[18] = edid->prod_code[0];
3129 eld[19] = edid->prod_code[1];
3131 if (cea_revision(cea) >= 3) {
3134 if (cea_db_offsets(cea, &start, &end)) {
3139 for_each_cea_db(cea, i, start, end) {
3141 dbl = cea_db_payload_len(db);
3143 switch (cea_db_tag(db)) {
3145 /* Audio Data Block, contains SADs */
3146 sad_count = dbl / 3;
3148 memcpy(eld + 20 + mnl, &db[1], dbl);
3151 /* Speaker Allocation Data Block */
3156 /* HDMI Vendor-Specific Data Block */
3157 if (cea_db_is_hdmi_vsdb(db))
3158 parse_hdmi_vsdb(connector, db);
3165 eld[5] |= sad_count << 4;
3167 eld[DRM_ELD_BASELINE_ELD_LEN] =
3168 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3170 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3171 drm_eld_size(eld), sad_count);
3173 EXPORT_SYMBOL(drm_edid_to_eld);
3176 * drm_edid_to_sad - extracts SADs from EDID
3177 * @edid: EDID to parse
3178 * @sads: pointer that will be set to the extracted SADs
3180 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3182 * Note: The returned pointer needs to be freed using kfree().
3184 * Return: The number of found SADs or negative number on error.
3186 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3189 int i, start, end, dbl;
3192 cea = drm_find_cea_extension(edid);
3194 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3198 if (cea_revision(cea) < 3) {
3199 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3203 if (cea_db_offsets(cea, &start, &end)) {
3204 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3208 for_each_cea_db(cea, i, start, end) {
3211 if (cea_db_tag(db) == AUDIO_BLOCK) {
3213 dbl = cea_db_payload_len(db);
3215 count = dbl / 3; /* SAD is 3B */
3216 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3219 for (j = 0; j < count; j++) {
3220 u8 *sad = &db[1 + j * 3];
3222 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3223 (*sads)[j].channels = sad[0] & 0x7;
3224 (*sads)[j].freq = sad[1] & 0x7F;
3225 (*sads)[j].byte2 = sad[2];
3233 EXPORT_SYMBOL(drm_edid_to_sad);
3236 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3237 * @edid: EDID to parse
3238 * @sadb: pointer to the speaker block
3240 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3242 * Note: The returned pointer needs to be freed using kfree().
3244 * Return: The number of found Speaker Allocation Blocks or negative number on
3247 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3250 int i, start, end, dbl;
3253 cea = drm_find_cea_extension(edid);
3255 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3259 if (cea_revision(cea) < 3) {
3260 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3264 if (cea_db_offsets(cea, &start, &end)) {
3265 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3269 for_each_cea_db(cea, i, start, end) {
3270 const u8 *db = &cea[i];
3272 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3273 dbl = cea_db_payload_len(db);
3275 /* Speaker Allocation Data Block */
3277 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3288 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3291 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3292 * @connector: connector associated with the HDMI/DP sink
3293 * @mode: the display mode
3295 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3296 * the sink doesn't support audio or video.
3298 int drm_av_sync_delay(struct drm_connector *connector,
3299 struct drm_display_mode *mode)
3301 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3304 if (!connector->latency_present[0])
3306 if (!connector->latency_present[1])
3309 a = connector->audio_latency[i];
3310 v = connector->video_latency[i];
3313 * HDMI/DP sink doesn't support audio or video?
3315 if (a == 255 || v == 255)
3319 * Convert raw EDID values to millisecond.
3320 * Treat unknown latency as 0ms.
3323 a = min(2 * (a - 1), 500);
3325 v = min(2 * (v - 1), 500);
3327 return max(v - a, 0);
3329 EXPORT_SYMBOL(drm_av_sync_delay);
3332 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3333 * @encoder: the encoder just changed display mode
3334 * @mode: the adjusted display mode
3336 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3337 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3339 * Return: The connector associated with the first HDMI/DP sink that has ELD
3342 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
3343 struct drm_display_mode *mode)
3345 struct drm_connector *connector;
3346 struct drm_device *dev = encoder->dev;
3348 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3349 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3351 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
3352 if (connector->encoder == encoder && connector->eld[0])
3357 EXPORT_SYMBOL(drm_select_eld);
3360 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3361 * @edid: monitor EDID information
3363 * Parse the CEA extension according to CEA-861-B.
3365 * Return: True if the monitor is HDMI, false if not or unknown.
3367 bool drm_detect_hdmi_monitor(struct edid *edid)
3371 int start_offset, end_offset;
3373 edid_ext = drm_find_cea_extension(edid);
3377 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3381 * Because HDMI identifier is in Vendor Specific Block,
3382 * search it from all data blocks of CEA extension.
3384 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3385 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3391 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3394 * drm_detect_monitor_audio - check monitor audio capability
3395 * @edid: EDID block to scan
3397 * Monitor should have CEA extension block.
3398 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3399 * audio' only. If there is any audio extension block and supported
3400 * audio format, assume at least 'basic audio' support, even if 'basic
3401 * audio' is not defined in EDID.
3403 * Return: True if the monitor supports audio, false otherwise.
3405 bool drm_detect_monitor_audio(struct edid *edid)
3409 bool has_audio = false;
3410 int start_offset, end_offset;
3412 edid_ext = drm_find_cea_extension(edid);
3416 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3419 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3423 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3426 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3427 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3429 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3430 DRM_DEBUG_KMS("CEA audio format %d\n",
3431 (edid_ext[i + j] >> 3) & 0xf);
3438 EXPORT_SYMBOL(drm_detect_monitor_audio);
3441 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3442 * @edid: EDID block to scan
3444 * Check whether the monitor reports the RGB quantization range selection
3445 * as supported. The AVI infoframe can then be used to inform the monitor
3446 * which quantization range (full or limited) is used.
3448 * Return: True if the RGB quantization range is selectable, false otherwise.
3450 bool drm_rgb_quant_range_selectable(struct edid *edid)
3455 edid_ext = drm_find_cea_extension(edid);
3459 if (cea_db_offsets(edid_ext, &start, &end))
3462 for_each_cea_db(edid_ext, i, start, end) {
3463 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3464 cea_db_payload_len(&edid_ext[i]) == 2) {
3465 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3466 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3472 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3475 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3476 * hdmi deep color modes and update drm_display_info if so.
3477 * @edid: monitor EDID information
3478 * @info: Updated with maximum supported deep color bpc and color format
3479 * if deep color supported.
3480 * @connector: DRM connector, used only for debug output
3482 * Parse the CEA extension according to CEA-861-B.
3483 * Return true if HDMI deep color supported, false if not or unknown.
3485 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3486 struct drm_display_info *info,
3487 struct drm_connector *connector)
3489 u8 *edid_ext, *hdmi;
3491 int start_offset, end_offset;
3492 unsigned int dc_bpc = 0;
3494 edid_ext = drm_find_cea_extension(edid);
3498 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3502 * Because HDMI identifier is in Vendor Specific Block,
3503 * search it from all data blocks of CEA extension.
3505 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3506 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3507 /* HDMI supports at least 8 bpc */
3510 hdmi = &edid_ext[i];
3511 if (cea_db_payload_len(hdmi) < 6)
3514 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3516 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3517 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3521 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3523 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3524 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3528 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3530 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3531 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3536 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3537 connector->name, dc_bpc);
3541 * Deep color support mandates RGB444 support for all video
3542 * modes and forbids YCRCB422 support for all video modes per
3545 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3547 /* YCRCB444 is optional according to spec. */
3548 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3549 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3550 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3555 * Spec says that if any deep color mode is supported at all,
3556 * then deep color 36 bit must be supported.
3558 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3559 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3566 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3576 * drm_add_display_info - pull display info out if present
3578 * @info: display info (attached to connector)
3579 * @connector: connector whose edid is used to build display info
3581 * Grab any available display info and stuff it into the drm_display_info
3582 * structure that's part of the connector. Useful for tracking bpp and
3585 static void drm_add_display_info(struct edid *edid,
3586 struct drm_display_info *info,
3587 struct drm_connector *connector)
3591 info->width_mm = edid->width_cm * 10;
3592 info->height_mm = edid->height_cm * 10;
3594 /* driver figures it out in this case */
3596 info->color_formats = 0;
3598 if (edid->revision < 3)
3601 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3604 /* Get data from CEA blocks if present */
3605 edid_ext = drm_find_cea_extension(edid);
3607 info->cea_rev = edid_ext[1];
3609 /* The existence of a CEA block should imply RGB support */
3610 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3611 if (edid_ext[3] & EDID_CEA_YCRCB444)
3612 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3613 if (edid_ext[3] & EDID_CEA_YCRCB422)
3614 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3617 /* HDMI deep color modes supported? Assign to info, if so */
3618 drm_assign_hdmi_deep_color_info(edid, info, connector);
3620 /* Only defined for 1.4 with digital displays */
3621 if (edid->revision < 4)
3624 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3625 case DRM_EDID_DIGITAL_DEPTH_6:
3628 case DRM_EDID_DIGITAL_DEPTH_8:
3631 case DRM_EDID_DIGITAL_DEPTH_10:
3634 case DRM_EDID_DIGITAL_DEPTH_12:
3637 case DRM_EDID_DIGITAL_DEPTH_14:
3640 case DRM_EDID_DIGITAL_DEPTH_16:
3643 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3649 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3650 connector->name, info->bpc);
3652 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3653 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3654 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3655 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3656 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3660 * drm_add_edid_modes - add modes from EDID data, if available
3661 * @connector: connector we're probing
3664 * Add the specified modes to the connector's mode list.
3666 * Return: The number of modes added or 0 if we couldn't find any.
3668 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3676 if (!drm_edid_is_valid(edid)) {
3677 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3682 quirks = edid_get_quirks(edid);
3685 * EDID spec says modes should be preferred in this order:
3686 * - preferred detailed mode
3687 * - other detailed modes from base block
3688 * - detailed modes from extension blocks
3689 * - CVT 3-byte code modes
3690 * - standard timing codes
3691 * - established timing codes
3692 * - modes inferred from GTF or CVT range information
3694 * We get this pretty much right.
3696 * XXX order for additional mode types in extension blocks?
3698 num_modes += add_detailed_modes(connector, edid, quirks);
3699 num_modes += add_cvt_modes(connector, edid);
3700 num_modes += add_standard_modes(connector, edid);
3701 num_modes += add_established_modes(connector, edid);
3702 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3703 num_modes += add_inferred_modes(connector, edid);
3704 num_modes += add_cea_modes(connector, edid);
3705 num_modes += add_alternate_cea_modes(connector, edid);
3707 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3708 edid_fixup_preferred(connector, quirks);
3710 drm_add_display_info(edid, &connector->display_info, connector);
3712 if (quirks & EDID_QUIRK_FORCE_8BPC)
3713 connector->display_info.bpc = 8;
3715 if (quirks & EDID_QUIRK_FORCE_12BPC)
3716 connector->display_info.bpc = 12;
3720 EXPORT_SYMBOL(drm_add_edid_modes);
3723 * drm_add_modes_noedid - add modes for the connectors without EDID
3724 * @connector: connector we're probing
3725 * @hdisplay: the horizontal display limit
3726 * @vdisplay: the vertical display limit
3728 * Add the specified modes to the connector's mode list. Only when the
3729 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3731 * Return: The number of modes added or 0 if we couldn't find any.
3733 int drm_add_modes_noedid(struct drm_connector *connector,
3734 int hdisplay, int vdisplay)
3736 int i, count, num_modes = 0;
3737 struct drm_display_mode *mode;
3738 struct drm_device *dev = connector->dev;
3740 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
3746 for (i = 0; i < count; i++) {
3747 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3748 if (hdisplay && vdisplay) {
3750 * Only when two are valid, they will be used to check
3751 * whether the mode should be added to the mode list of
3754 if (ptr->hdisplay > hdisplay ||
3755 ptr->vdisplay > vdisplay)
3758 if (drm_mode_vrefresh(ptr) > 61)
3760 mode = drm_mode_duplicate(dev, ptr);
3762 drm_mode_probed_add(connector, mode);
3768 EXPORT_SYMBOL(drm_add_modes_noedid);
3771 * drm_set_preferred_mode - Sets the preferred mode of a connector
3772 * @connector: connector whose mode list should be processed
3773 * @hpref: horizontal resolution of preferred mode
3774 * @vpref: vertical resolution of preferred mode
3776 * Marks a mode as preferred if it matches the resolution specified by @hpref
3779 void drm_set_preferred_mode(struct drm_connector *connector,
3780 int hpref, int vpref)
3782 struct drm_display_mode *mode;
3784 list_for_each_entry(mode, &connector->probed_modes, head) {
3785 if (mode->hdisplay == hpref &&
3786 mode->vdisplay == vpref)
3787 mode->type |= DRM_MODE_TYPE_PREFERRED;
3790 EXPORT_SYMBOL(drm_set_preferred_mode);
3793 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3794 * data from a DRM display mode
3795 * @frame: HDMI AVI infoframe
3796 * @mode: DRM display mode
3798 * Return: 0 on success or a negative error code on failure.
3801 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3802 const struct drm_display_mode *mode)
3806 if (!frame || !mode)
3809 err = hdmi_avi_infoframe_init(frame);
3813 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3814 frame->pixel_repeat = 1;
3816 frame->video_code = drm_match_cea_mode(mode);
3818 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3821 * Populate picture aspect ratio from either
3822 * user input (if specified) or from the CEA mode list.
3824 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3825 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3826 frame->picture_aspect = mode->picture_aspect_ratio;
3827 else if (frame->video_code > 0)
3828 frame->picture_aspect = drm_get_cea_aspect_ratio(
3831 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3832 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3836 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3838 static enum hdmi_3d_structure
3839 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3841 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3844 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3845 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3846 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3847 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3848 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3849 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3850 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3851 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3852 case DRM_MODE_FLAG_3D_L_DEPTH:
3853 return HDMI_3D_STRUCTURE_L_DEPTH;
3854 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3855 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3856 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3857 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3858 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3859 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3861 return HDMI_3D_STRUCTURE_INVALID;
3866 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3867 * data from a DRM display mode
3868 * @frame: HDMI vendor infoframe
3869 * @mode: DRM display mode
3871 * Note that there's is a need to send HDMI vendor infoframes only when using a
3872 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3873 * function will return -EINVAL, error that can be safely ignored.
3875 * Return: 0 on success or a negative error code on failure.
3878 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3879 const struct drm_display_mode *mode)
3885 if (!frame || !mode)
3888 vic = drm_match_hdmi_mode(mode);
3889 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
3891 if (!vic && !s3d_flags)
3894 if (vic && s3d_flags)
3897 err = hdmi_vendor_infoframe_init(frame);
3904 frame->s3d_struct = s3d_structure_from_display_mode(mode);
3908 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
3910 static int drm_parse_display_id(struct drm_connector *connector,
3911 u8 *displayid, int length,
3912 bool is_edid_extension)
3914 /* if this is an EDID extension the first byte will be 0x70 */
3916 struct displayid_hdr *base;
3917 struct displayid_block *block;
3921 if (is_edid_extension)
3924 base = (struct displayid_hdr *)&displayid[idx];
3926 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3927 base->rev, base->bytes, base->prod_id, base->ext_count);
3929 if (base->bytes + 5 > length - idx)
3932 for (i = idx; i <= base->bytes + 5; i++) {
3933 csum += displayid[i];
3936 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
3940 block = (struct displayid_block *)&displayid[idx + 4];
3941 DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
3942 block->tag, block->rev, block->num_bytes);
3944 switch (block->tag) {
3945 case DATA_BLOCK_TILED_DISPLAY: {
3946 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
3949 u8 tile_v_loc, tile_h_loc;
3950 u8 num_v_tile, num_h_tile;
3951 struct drm_tile_group *tg;
3953 w = tile->tile_size[0] | tile->tile_size[1] << 8;
3954 h = tile->tile_size[2] | tile->tile_size[3] << 8;
3956 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
3957 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
3958 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
3959 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
3961 connector->has_tile = true;
3962 if (tile->tile_cap & 0x80)
3963 connector->tile_is_single_monitor = true;
3965 connector->num_h_tile = num_h_tile + 1;
3966 connector->num_v_tile = num_v_tile + 1;
3967 connector->tile_h_loc = tile_h_loc;
3968 connector->tile_v_loc = tile_v_loc;
3969 connector->tile_h_size = w + 1;
3970 connector->tile_v_size = h + 1;
3972 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
3973 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
3974 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
3975 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
3976 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
3978 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
3980 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
3985 if (connector->tile_group != tg) {
3986 /* if we haven't got a pointer,
3987 take the reference, drop ref to old tile group */
3988 if (connector->tile_group) {
3989 drm_mode_put_tile_group(connector->dev, connector->tile_group);
3991 connector->tile_group = tg;
3993 /* if same tile group, then release the ref we just took. */
3994 drm_mode_put_tile_group(connector->dev, tg);
3998 printk("unknown displayid tag %d\n", block->tag);
4004 static void drm_get_displayid(struct drm_connector *connector,
4007 void *displayid = NULL;
4009 connector->has_tile = false;
4010 displayid = drm_find_displayid_extension(edid);
4012 /* drop reference to any tile group we had */
4016 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4019 if (!connector->has_tile)
4023 if (connector->tile_group) {
4024 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4025 connector->tile_group = NULL;